CN109429541B - Inverter control method and device and inverter - Google Patents

Inverter control method and device and inverter Download PDF

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Publication number
CN109429541B
CN109429541B CN201780029428.0A CN201780029428A CN109429541B CN 109429541 B CN109429541 B CN 109429541B CN 201780029428 A CN201780029428 A CN 201780029428A CN 109429541 B CN109429541 B CN 109429541B
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phase
voltage command
command value
period
output voltage
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CN109429541A (en
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鸟羽章夫
小高章弘
海田英俊
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Fuji Electric Co Ltd
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Fuji Electric Co Ltd
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02PCONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
    • H02P27/00Arrangements or methods for the control of AC motors characterised by the kind of supply voltage
    • H02P27/04Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage
    • H02P27/06Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters
    • H02P27/08Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters with pulse width modulation
    • H02P27/085Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters with pulse width modulation wherein the PWM mode is adapted on the running conditions of the motor, e.g. the switching frequency
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/14Arrangements for reducing ripples from dc input or output
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/14Arrangements for reducing ripples from dc input or output
    • H02M1/15Arrangements for reducing ripples from dc input or output using active elements
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/32Means for protecting converters other than automatic disconnection
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/539Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency
    • H02M7/5395Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency by pulse-width modulation
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K4/00Generating pulses having essentially a finite slope or stepped portions
    • H03K4/06Generating pulses having essentially a finite slope or stepped portions having triangular shape
    • H03K4/08Generating pulses having essentially a finite slope or stepped portions having triangular shape having sawtooth shape
    • H03K4/48Generating pulses having essentially a finite slope or stepped portions having triangular shape having sawtooth shape using as active elements semiconductor devices
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K7/00Modulating pulses with a continuously-variable modulating signal
    • H03K7/08Duration or width modulation ; Duty cycle modulation
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/0003Details of control, feedback or regulation circuits
    • H02M1/0009Devices or circuits for detecting current in a converter
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/32Means for protecting converters other than automatic disconnection
    • H02M1/327Means for protecting converters other than automatic disconnection against abnormal temperatures

Abstract

A control method for controlling switching elements by PWM pulses obtained by comparing output voltage command values of respective phases with carrier waves, the PWM pulses being targeted for an inverter in which a plurality of series circuits each composed of two switching elements are connected in parallel with each other with respect to a capacitor connected in parallel with a DC voltage source, and the connection point between the switching elements is used as an AC output terminal of each phase. A modified PWM pulse is generated in which the sum of the pulse widths of the phases in a period corresponding to one or more periods of a carrier is substantially equal and the generation timing and/or generation frequency of the pulse of at least one phase is varied, based on the output of a counter means common to the phases, with respect to an estimated PWM pulse obtained by comparing the carrier with the time average value of the output voltage of each phase in the period. Accordingly, the ripple current component of the capacitor can be reduced to suppress heat generation, and cost reduction can be achieved.

Description

Inverter control method and device and inverter
Technical Field
The present invention relates to a control method and a control device for an inverter, and an inverter, which can reduce a ripple current component flowing in a capacitor in a dc portion of a main circuit of the inverter and can suppress heat generation of the capacitor (capacitor).
Background
Fig. 18 is a main circuit configuration diagram of the three-phase inverter.
In fig. 18, a capacitor C is connected in parallel to a dc voltage source B, and a semiconductor switching element U such as an IGBT for constituting a three-phase bridge circuit is connected to both ends of the capacitor CP、VP、 WP、UN、VN、WN. The connection point of the two switching elements of each phase is connected via an AC output terminal TU、TV、TWAnd a three-phase ac load M connected to a motor or the like.
In fig. 18, L denotes a reactor (reactor) (intentionally connected reactor or floating reactor unintentionally present on the wiring), and P, N denotes the positive and negative electrodes of the dc voltage source B.
In addition, EdIs the voltage of a DC voltage source B, VCIs the voltage of the capacitor C, ibatIs the output current of a DC voltage source B, iCIs the current flowing in the capacitor C, idcIs a direct current flowing in the main circuit, iU、iV、iWIs the output current of each phase.
In the three-phase inverter, the switching element U is operated at a predetermined time ratioP、VP、 WP、UN、VN、WNThe dc voltage is turned on (on) and off (off) to be converted into a three-phase ac voltage having a desired frequency and magnitude, and supplied to the load M.
As a switching element UP、VP、WP、UN、VN、WNA method of turning on/off, in other words, a method of controlling an inverter, for example, a method of obtaining a switching element U by comparing a carrier (carrier) triangular wave with output voltage command values (modulation signals) of three phases is knownP、VP、WP、UN、VN、WNThe method of driving a pulse (P WM pulse). Such a control method is disclosed in, for example, patent document 1 and non-patent document 1 as a PWM control method.
Fig. 19 shows that the switching element U of fig. 18 is caused by PWM pulses obtained by comparing a triangular wave as a carrier wave with the output voltage command value U, V, W of each phaseP~WNAn example of an operation waveform in the case of on/off. The operation waveform is the output current i of each phaseU、iV、iWThe operation waveform is a sine wave and has a power factor (power factor) of 1.
The output voltage command value U, V, W in fig. 19 is used to perform so-called two-phase modulation (two-arm modulation) which is widely known as a modulation method in which the on/off state of the switching element of one of three phases is fixed for a fixed (fixed) period of time, and the on/off state of the switching element of the other two phases is controlled. Details of the two-phase modulation are described in, for example, non-patent document 1, and therefore, the description thereof is omitted here.
By controlling the three-phase inverter by two-phase modulation, it is possible to obtain advantages such as maintaining the three-phase output line-to-line voltage as a sine wave, suppressing switching loss caused by the on/off of the switching elements, and improving the voltage utilization rate of the inverter.
As can be seen from FIG. 19, the switching element U is providedP~WNOn/off of the main circuit, direct current i of the main circuitdcThe waveform is a pulse train waveform, and includes a dc component and an ac component.
As shown in FIG. 18, a reactor L is provided between a DC voltage source B and a capacitor C, and a DC current idcA DC component i flowing from a DC voltage source B into a reactor LbatAnd an alternating current component i supplied from a capacitor CCAnd (4) summing. I.e. idc=ibat+iC
At this time, the ripple current component i is associated with the AC componentCThe capacitor C self-heats up due to the flow of (2), and the temperature rises. In general, since the lifetime of a capacitor is shortened when the temperature is high, it is necessary to take measures such as using an unusually large (large-capacity) capacitor or having a cooling means for actively cooling the capacitor in order to suppress the temperature increase.
For this reason, non-patent document 2 discloses a cooling technique for transferring heat of a capacitor to a water-cooling jacket (water-cooling jacket) disposed around the capacitor as a cooling means for the capacitor in the main circuit.
Non-patent document 3 discloses an invention in which: according to the variation of the load power factor, the conventional common space vector control method and the space vector control method for selecting the space vector with the minimum repetition of the voltage pulse between the output lines are switched, thereby suppressing the harmonic component contained in the direct current of the three-phase inverter and further reducing the ripple current component i of the capacitorC
Here, a carrier wave, an output voltage command value and an output voltage of each phase in the conventional two-phase modulation method will be described with reference to fig. 20.
Fig. 20 is an operation waveform diagram in the case where a triangular wave is used as a carrier wave as in fig. 19, and switching elements U are operated by PWM pulses obtained by comparing output voltage command values U, V, W of respective phases with the carrier waveP~WNThe U-phase, V-phase and W-phase voltages can be output by switching on and off. The levels (levels) P, N of the U-phase, V-phase, and W-phase voltages shown in fig. 20 correspond to the potentials (E) of the positive electrode P of the dc voltage source Bd) And the potential (0) of the negative electrode N.
In fig. 20, the output voltage command value U of the U-phase is fixed in both the 1 st cycle and the 2 nd cycle of the carrier wave, and the output voltage command value V, W is changed by using the other V-phase and W-phase as modulation phases, whereby the PWM pulse can be generated by comparing the PWM pulse with the carrier wave. In digital (digital) control, for example, detection of the voltage and current of each phase, calculation/determination of the voltage command value for the next carrier cycle, presetting (preset), and the like are performed in the 1 st cycle, and the voltage command value for each phase is switched at the start of the 2 nd cycle.
Δ t in fig. 20 is the potential E of the positive electrode P of the dc voltage source B output in all of the U-phase, V-phase, and W-phasedResulting in a direct current i of the main circuitdcThe period equals 0. As ripple current component i of capacitor CCThe typical case of increase is that the period Δ t becomes longer and causes the direct current idcThe amount of change of (c) is large.
Fig. 21 is an operation waveform diagram in the case of using a sawtooth wave as a carrier wave, and Δ t is also a direct current i as in fig. 20dcThe period equals 0.
In either case of fig. 20 and 21, since the generation timing (rising and falling) of the pulses of the V-phase and W-phase voltages as the modulation phases is defined by the carrier wave common to the phases, the degree of freedom of the timing (timing) of generating the voltage pulses is low, and inevitably, by shortening idcThe ripple current component i is increased by the period Δ t equal to 0CThe reduced degree of freedom is also lower.
That is, in these conventional techniques, even if i is desired to be shorteneddcThe period Δ t is 0, but there is also a limit, and therefore improvement is required.
In view of the above problems, the applicant has already filed japanese patent application No. 2015-166526 and PCT/JP2016/75045 (hereinafter, referred to as "prior applications") as a control method, a control device, and an inverter for an inverter capable of effectively reducing a ripple current component of a capacitor.
In the inventions of the prior applications, when n (n is a plurality of (complex)) series circuits each including two semiconductor switching elements are connected in parallel to a dc voltage source, a connection point of the two switching elements is connected to each phase of an n-phase ac load as an ac output terminal of one phase, and a time ratio of a dc voltage appearing at the ac output terminal by turning on and off the switching elements is changed, so that an n-phase ac voltage of a desired magnitude and frequency is output from an inverter, an ac output terminal of at least a specific one of the n phases is kept connected to a positive electrode or a negative electrode of the dc voltage source for a fixed period of time, and ac output terminals of phases other than the specific one phase are connected to a negative electrode or a positive electrode of the dc voltage source for a period of time shorter than the fixed period of time, the switching elements of the respective phases are turned on and off during the fixed period, so that a period during which all the ac output terminals of the n phases are simultaneously connected to the positive electrode or the negative electrode of the dc voltage source is shortened as much as possible (for example, the period during which the simultaneous connection is eliminated).
Here, as shown in fig. 22, the carrier wave for PWM-controlling the inverter uses two triangular waves (or sawtooth waves) 1 and 2 whose phases are inverted, and each of the output voltage command values of the n phases is associated with any one of the plurality of carrier waves so that the output voltage command value of the other phase than the specific phase does not overlap with one carrier wave, thereby generating a PWM pulse for turning on and off the switching element of the corresponding phase by comparing each of the n output voltage command values with each of the carrier waves.
[ Prior art documents ]
[ patent document ]
[ patent document 1] (Japanese) laid-open patent application No. 2013-183636 (FIG. 3, etc.)
[ non-patent document ]
[ non-patent document 1] the general society of Law people's Electrical Association, "" semiconductor power conversion Circuit ", pp.124-125, issued 5 months and 25 days 1995 (Japanese: the human society of the general society of Japan," "half-core electric Activity changing Circuit", pp.124-125, 25 days 1995)
[ non-patent document 2] xylocun clone, etc. "high power density inverter for hybrid electric vehicle", japanese review, vol.95, No.11, pp.754-755, No.11 months of 2013 (japanese: xylocun clone 1241 か, No. ハィブリツド autodrive to け high power density ィンバータ "", japanese output, vol.95, No.11, pp.754-755, No.11 months of 2013)
[ patent document 3] xi ze Lu Jie, et al, "a space vector modulation method for reducing input current harmonics corresponding to power factor changes in a three-phase inverter", a semiconductor power conversion/motor drive contract treaty paper, an electrical society Hokkaido branch, SPC-15-133, 28 th 2015 8 (Japanese: West is times ほか, "" power rate of three phases ィンバ - タ change に. F した input power higher than contract を and lower than air するベクトル way ], a semi-physical force conversion/モ - タドラィブ treaty , a Hokkaido branch, SPC-15-133, 2015 8 th 28 th)
Disclosure of Invention
[ problems to be solved by the invention ]
According to the invention of the above-mentioned prior application, as is apparent from period 1 of fig. 22, the period (i) in which all of the three-phase ac output terminals are simultaneously connected to the positive electrode P or the negative electrode N of the dc voltage source B is eliminateddcPeriod of 0), the direct current i may be reduceddcThereby reducing the ripple current component i flowing in the capacitor CCFurther, heat generation can be suppressed.
However, in this case, since two types of carriers are used to generate the PWM pulse, it is difficult to realize the PWM pulse in a general-purpose microcomputer (microcomputer), and an external circuit, a digital integrated circuit such as an FPG (Field-Programmable Gate Array) and a dsp (digital Signal processor), or the like is required as a control device, which may cause an increase in cost and an increase in size.
In the technique disclosed in non-patent document 3, since the PWM pulse is generated by a space vector control method, the calculation process is complicated, and it is still difficult to realize the PWM pulse by using a general-purpose microcomputer.
In the PWM control method described in non-patent documents 1 and 3 and/or the invention of the prior application, a current continues to flow through the switching element fixed to the on state based on (basic) so-called two-phase modulation, and in the commonly known two-phase modulation. Therefore, the conditions such as the output frequency of the inverter may cause the following problems: 1) overheating of specific switching elements; 2) compared with three-phase modulation, the switching operation times are reduced, and the noise is increased; 3) when two-phase modulation is performed, the voltage command value of each phase suddenly changes, which causes an electrical failure (disturbance).
That is, in the above-described prior art or the invention of the prior application, the ripple current component of the capacitor can be reduced without worrying about the complication of the calculation processing and/or the increase in cost due to the use of an expensive calculation processing device, but it is not satisfactory from the viewpoint of versatility and/or economy.
Accordingly, an object of the present invention is to provide a method, a device, and an inverter for controlling an inverter, which can control the inverter by a modified PWM pulse having a pulse generation timing and/or a pulse generation frequency different from those of the conventional inverter using a general-purpose microcomputer, thereby maintaining a target output voltage, reducing a ripple current component of a capacitor, preventing heat generation of the capacitor, and reducing the cost of the entire system.
[ means for solving problems ]
In order to solve the above-described problems, a method of controlling an inverter according to claim 1 is a method of controlling an inverter in which a plurality of series circuits each including two semiconductor switching elements are connected in parallel to a capacitor connected in parallel to a dc voltage source, and a connection point between the two semiconductor switching elements is an ac output terminal of each phase, and the switching elements are controlled by using PWM pulses obtained by comparing an output voltage instruction value of each phase with a carrier.
In the present invention, an estimated PWM pulse obtained by comparing a time average value of an output voltage of each phase in a period corresponding to one period or a plurality of periods of the carrier with the carrier is generated from an output of a counter unit common to the respective phases, and a modified PWM pulse having substantially the same total pulse width of each phase in the period and having a generation timing and/or generation frequency of a pulse of at least one phase different from the estimated PWM pulse is generated, and the switching element is controlled using the modified PWM pulse.
A control method of the inverter of claim 2 is a control method of an inverter in which a plurality of series circuits composed of two semiconductor switching elements are connected in parallel with each other with respect to a capacitor connected in parallel with a direct-current voltage source, and a connection point between the two semiconductor switching elements is used as an alternating-current output terminal of each phase, and the switching elements are controlled using PWM pulses obtained by comparing an output voltage command value of each phase with a carrier.
In the present invention, an estimated PWM pulse obtained by comparing a time average value of an output voltage of each phase in a period corresponding to one period or a plurality of periods of the carrier with the carrier is generated from an output of a counter unit common to the respective phases, and a modified PWM pulse in which a sum of pulse widths of the respective phases in the period is substantially equal and a generation timing and/or a generation frequency of a pulse of at least one phase is different to exceed a degree necessary for control is generated, and the switching element is controlled using the modified PWM pulse.
The method of controlling an inverter according to claim 3 is characterized in that, in the method of controlling an inverter according to claim 1 or 2, the output of the counter means is used to generate the carrier wave for generating the modified PWM pulse by comparing the output voltage command value with the output voltage command value of each phase of the inverter.
The method of controlling an inverter according to claim 4 is characterized in that, in the method of controlling an inverter according to claim 1 or 2, the carrier wave is a triangular wave or a sawtooth wave.
The inverter control device according to claim 5 is an inverter control device in which a plurality of series circuits each including two semiconductor switching elements are connected in parallel with a capacitor connected in parallel with a dc voltage source, and a connection point between the two semiconductor switching elements is used as an ac output terminal of each phase, and generates a PWM pulse for controlling the switching elements by comparing an output voltage command value of each phase with a carrier.
In the present invention, with respect to an estimated PWM pulse obtained by comparing a time average value of an output voltage of each phase in a period corresponding to one period or a plurality of periods of the carrier with the carrier, a modified PWM pulse in which a sum of pulse widths of each phase in the period is substantially equal and generation timings and/or generation frequencies of pulses of at least one phase are different is generated from an output of a counter unit common to each phase, and the switching element is driven using the modified PW M pulse.
The inverter according to claim 6 is an inverter in which a plurality of series circuits each including two semiconductor switching elements are connected in parallel with a capacitor connected in parallel with a dc voltage source, a connection point between the two semiconductor switching elements is used as an ac output terminal of each phase, and the switching elements are controlled by using PWM pulses generated by comparing an output voltage command value of each phase with a carrier.
In the present invention, an estimated PWM pulse obtained by comparing a time average value of an output voltage of each phase in a period corresponding to one period or a plurality of periods of the carrier with the carrier is generated from an output of a counter unit common to the respective phases, and deformed PWM pulses in which the sum of pulse widths of the respective phases in the period is substantially equal and generation timings and/or generation frequencies of the pulses of at least one phase are different are generated, and the switching element is driven using the deformed PWM pulses.
A method of controlling a three-phase inverter according to claim 7, which is a method of controlling an inverter of a three-phase inverter in which three series circuits each including two semiconductor switching elements are connected in parallel with each other with respect to a capacitor connected in parallel with a DC voltage source, and a connection point between the two semiconductor switching elements is used as an AC output terminal of each phase, the inverter controlling the switching elements using PWM pulses obtained by comparing an output voltage command value of each phase with a triangular wave, wherein the method includes holding an AC output voltage of a 1 st phase at a positive electrode potential or a negative electrode potential of the DC voltage source for a fixed period, and using PWM pulses obtained by comparing the triangular wave having a period equal to the period with output voltage command values of other 2 nd and 3 rd phases to make the 2 nd phase, and, And a control method for performing switching operation of the switching element of the 3 rd phase.
In addition, in one cycle of the triangular wave, the output voltage command value of the 2 nd phase is made larger in a rising half cycle and smaller in a falling half cycle of the triangular wave than the average value of the output voltage command values, and the output voltage command value of the 3 rd phase is made smaller in the rising half cycle and larger in the falling half cycle of the triangular wave than the average value of the output voltage command values.
A control method of a three-phase inverter according to claim 8, which is a control method of an inverter in which three series circuits composed of two semiconductor switching elements are connected in parallel with each other with respect to a capacitor connected in parallel with a dc voltage source, and a PWM pulse obtained by comparing an output voltage command value of each phase with a triangular wave is used to control the switching elements, in which a connection point between the two semiconductor switching elements is used as an ac output terminal of each phase, and the control method is such that an ac output voltage of a 1 st phase is held at a positive electrode potential or a negative electrode potential of the dc voltage source for a fixed period, and the 2 nd phase is connected to a dc voltage source by using the PWM pulse obtained by comparing the triangular wave having a period equal to the period with output voltage command values of other 2 nd and 3 rd phases, And a control method for performing switching operation of the switching element of the 3 rd phase.
In addition, the present invention is characterized in that, in the 1 st cycle of two consecutive cycles of the triangular wave, the output voltage command value of the 2 nd phase is made larger in the rising half cycle and smaller in the falling half cycle of the triangular wave than the average value of the output voltage command values, and the output voltage command value of the 3 rd phase is made smaller in the rising half cycle and larger in the falling half cycle of the triangular wave than the average value of the output voltage command values, and,
in a 2 nd cycle of two consecutive cycles of the triangular wave, the output voltage command value of the 3 rd phase is made larger in a rising half cycle and smaller in a falling half cycle of the triangular wave than an average value of the output voltage command values, and the output voltage command value of the 2 nd phase is made smaller in the rising half cycle and larger in the falling half cycle of the triangular wave than the average value of the output voltage command values.
A control method of a three-phase inverter according to claim 9 is a control method of a three-phase inverter in which three series circuits composed of two semiconductor switching elements are connected in parallel with each other with respect to a capacitor connected in parallel with a dc voltage source, and a connection point between the two semiconductor switching elements is used as an ac output terminal of each phase, the three-phase inverter controlling the switching elements using a PWM pulse obtained by comparing an output voltage command value of each phase with a carrier, and the control method is characterized in that an ac output voltage of a 1 st phase is held at a positive electrode potential or a negative electrode potential of the dc voltage source for a fixed period, and the 2 nd phase, the 3 rd phase, and the carrier having a period equal to the period are respectively used to compare output voltage command values of the other 2 nd phase and the 3 rd phase to control the PWM pulse, A method for controlling the switching operation of the switching element of phase 3.
In addition, in the present invention, the ac output voltage of the 1 st phase is maintained at the positive electrode potential or the negative electrode potential of the dc voltage source in two consecutive periods of the carrier, the output voltage command value of the 2 nd phase is made larger in the 1 st period of the carrier and smaller in the 2 nd period of the carrier than the average value of the output voltage command values in the two periods, and the output voltage command value of the 3 rd phase is made smaller in the 1 st period of the carrier and larger in the 2 nd period of the carrier than the average value of the output voltage command values in the two periods.
A control device of a three-phase inverter according to claim 10 is a control device of a three-phase inverter in which three series circuits composed of two semiconductor switching elements are connected in parallel with each other with respect to a capacitor connected in parallel with a dc voltage source, and a connection point between the two semiconductor switching elements is used as an ac output terminal of each phase, the control device controlling the switching elements using PWM pulses obtained by comparing an output voltage command value of each phase with a triangular wave, and the control device holds an ac output voltage of a 1 st phase at a positive electrode potential or a negative electrode potential of the dc voltage source for a fixed period, and controls the 2 nd phase using PWM pulses obtained by comparing the triangular wave having a period equal to the period with output voltage command values of other 2 nd phase, 3 rd phase, respectively, And a control device for the switching element of phase 3.
In addition, the present invention is characterized in that the control is performed in one cycle of the triangular wave such that the output voltage command value of the 2 nd phase is larger in a rising half cycle and smaller in a falling half cycle of the triangular wave than an average value of the output voltage command values, and the output voltage command value of the 3 rd phase is smaller in the rising half cycle and larger in the falling half cycle of the triangular wave than the average value of the output voltage command values.
The control device of a three-phase inverter of claim 11 is a control device of a three-phase inverter in which three series circuits composed of two semiconductor switching elements are connected in parallel with each other with respect to a capacitor connected in parallel with a direct-current voltage source, and a connection point between the two semiconductor switching elements is used as an alternating-current output terminal of each phase, the control device controlling the switching elements using PWM pulses obtained by comparing an output voltage command value of each phase with a triangular wave,
the control device is a control device that maintains the alternating-current output voltage of the 1 st phase at the positive electrode potential or the negative electrode potential of the direct-current voltage source for a fixed period, and controls the switching elements of the 2 nd and 3 rd phases using PWM pulses obtained by comparing the triangular wave having a period equal to the period with output voltage instruction values of the other 2 nd and 3 rd phases, respectively.
Further, the present invention is characterized in that the control is performed in the 1 st cycle of two consecutive cycles of the triangular wave such that the output voltage command value of the 2 nd phase is larger in the rising half cycle and smaller in the falling half cycle of the triangular wave than the average value of the output voltage command values, and the output voltage command value of the 3 rd phase is smaller in the rising half cycle and larger in the falling half cycle of the triangular wave than the average value of the output voltage command values, and,
and controlling the output voltage command value of the 3 rd phase to be larger in a rising half period and smaller in a falling half period of the triangular wave than an average value of the output voltage command values in a 2 nd period of two consecutive periods of the triangular wave, and controlling the output voltage command value of the 2 nd phase to be smaller in the rising half period and larger in the falling half period of the triangular wave than the average value of the output voltage command values.
A control device of a three-phase inverter according to claim 12 is a control device of a three-phase inverter in which three series circuits composed of two semiconductor switching elements are connected in parallel with each other with respect to a capacitor connected in parallel with a dc voltage source, and a connection point between the two semiconductor switching elements is used as an ac output terminal of each phase, the control device controlling the switching elements using PWM pulses obtained by comparing an output voltage command value of each phase with a triangular wave, and the control device holds an ac output voltage of a 1 st phase at a positive electrode potential or a negative electrode potential of the dc voltage source for a fixed period, and controls the 2 nd phase using PWM pulses obtained by comparing the carrier wave having a period equal to the period with output voltage command values of other 2 nd phase and 3 rd phase, respectively, And a control device for the switching element of phase 3.
In the present invention, the control is performed so that the ac output voltage of the 1 st phase is maintained at the positive electrode potential or the negative electrode potential of the dc voltage source, the output voltage command value of the 2 nd phase is larger in the 1 st cycle of the carrier and smaller in the 2 nd cycle of the carrier than the average value of the output voltage command values in the two cycles, and the output voltage command value of the 3 rd phase is smaller in the 1 st cycle of the carrier and larger in the 2 nd cycle of the carrier than the average value of the output voltage command values in the two cycles, in two consecutive cycles of the carrier.
The three-phase inverter of claim 13, wherein three series circuits each composed of two semiconductor switching elements are connected in parallel with each other with respect to a capacitor connected in parallel with a dc voltage source, and a connection point between the two semiconductor switching elements is used as an ac output terminal of each phase, and a three-phase inverter for controlling the switching elements by using PWM pulses obtained by comparing the output voltage command value of each phase with the triangular wave, the three-phase inverter maintains the 1 st phase AC output voltage at the positive pole potential or the negative pole potential of the DC voltage source in a fixed period, and a three-phase inverter that controls switching elements of the 2 nd and 3 rd phases using PWM pulses obtained by comparing output voltage command values of the triangular wave and the other 2 nd and 3 rd phases, respectively, having a period equal to the period.
In addition, in the present invention, in one cycle of the triangular wave, the output voltage command value of the 2 nd phase is made larger in a rising half cycle and smaller in a falling half cycle of the triangular wave than the average value of the output voltage command values, and the output voltage command value of the 3 rd phase is made smaller in the rising half cycle and larger in the falling half cycle of the triangular wave than the average value of the output voltage command values.
The three-phase inverter according to claim 14 is the three-phase inverter according to claim 13, wherein the output voltage command value of the 2 nd phase is set to zero or a minimum value in a falling half period of the triangular wave, and the output voltage command value of the 3 rd phase is set to zero or a minimum value in a rising half period of the triangular wave.
The three-phase inverter of claim 15, wherein three series circuits each composed of two semiconductor switching elements are connected in parallel with each other with respect to a capacitor connected in parallel with a dc voltage source, and a connection point between the two semiconductor switching elements is used as an ac output terminal of each phase, and a three-phase inverter for controlling the switching elements by using PWM pulses obtained by comparing the output voltage command value of each phase with the triangular wave, the three-phase inverter maintains the 1 st phase AC output voltage at the positive pole potential or the negative pole potential of the DC voltage source in a fixed period, and a three-phase inverter that controls switching elements of the 2 nd and 3 rd phases using PWM pulses obtained by comparing output voltage command values of the triangular wave and the other 2 nd and 3 rd phases, respectively, having a period equal to the period.
In addition, the present invention is characterized in that, in a 1 st cycle of two consecutive cycles of the triangular wave, the output voltage command value of the 2 nd phase is made larger in a rising half cycle and smaller in a falling half cycle of the triangular wave than an average value of the output voltage command values, the output voltage command value of the 3 rd phase is made smaller in the rising half cycle and larger in the falling half cycle of the triangular wave than the average value of the output voltage command values, and, in the 2 nd cycle of the two consecutive cycles of the triangular wave, the output voltage command value of the 3 rd phase is made larger in the rising half cycle and smaller in the falling half cycle of the triangular wave than the average value of the output voltage command values, and the output voltage command value of the 2 nd phase is made smaller in the rising half cycle and larger in the falling half cycle of the triangular wave than the average value of the output voltage command values .
The three-phase inverter of claim 16, wherein three series circuits each composed of two semiconductor switching elements are connected in parallel with each other with respect to a capacitor connected in parallel with a dc voltage source, and a connection point between the two semiconductor switching elements is used as an ac output terminal of each phase, and a three-phase inverter for controlling the switching elements using PWM pulses obtained by comparing output voltage command values of the respective phases with a carrier, the three-phase inverter maintains the AC output voltage of the 1 st phase at the positive pole potential or the negative pole potential of the DC voltage source in a fixed period, and a three-phase inverter for controlling switching elements of the 2 nd and 3 rd phases using PWM pulses obtained by comparing output voltage command values of the carrier wave and the other 2 nd and 3 rd phases having a period equal to the period, respectively.
In addition, in the present invention, the ac output voltage of the 1 st phase is held at the positive electrode potential or the negative electrode potential of the dc voltage source in two consecutive periods of the carrier, the output voltage command value of the 2 nd phase is made larger in the 1 st period of the carrier and smaller in the 2 nd period of the carrier than the average value of the output voltage command values in the two periods, and the output voltage command value of the 3 rd phase is made smaller in the 1 st period of the carrier and larger in the 2 nd period of the carrier than the average value of the output voltage command values in the two periods.
The three-phase inverter according to claim 17 is the three-phase inverter according to claim 16, wherein the output voltage command value of the 2 nd phase is set to zero or a minimum value in the 2 nd cycle, and the output voltage command value of the 3 rd phase is set to zero or a minimum value in the 1 st cycle.
The three-phase inverter according to claim 18 is characterized in that, in the three-phase inverter according to claim 16 or 17, the carrier wave is a triangular wave.
The control method of a three-phase inverter according to claim 19 is a control method of a three-phase inverter in which three series circuits composed of two semiconductor switching elements are connected in parallel with each other with respect to a capacitor connected in parallel with a direct-current voltage source, and a connection point of the two semiconductor switching elements is used as an alternating-current output terminal of each phase, the semiconductor switching elements being controlled using PWM pulses obtained by comparing an output voltage command value of each phase with a triangular wave, the control method of a three-phase inverter being characterized in that,
dividing the voltage command value of each phase intoIn a predetermined period and a remaining period within one cycle of the carrier wave, a voltage command value for each of the periods is set to a voltage command value D for each phase which is a basis for outputting a target voltage from the three-phase inverterU、DV、 DWIncreased or decreased voltage command value DUAOr DUB、DVAOr DVB、DWAOr DWBAnd the time average value of the voltage command value of each phase in one period of the carrier is made to coincide with the voltage command value of each phase as the base, and,
when an arbitrary ratio A is set for each phaseU、AV、AWVoltage command value D of each phaseUAAnd DUB、DVAAnd DVB、DWAAnd DWBAre respectively composed of
DUA=AU·DU(if 1≤AU·DU,then DUA=1)
DUB=2DU-DUA
DVA=AV·DV(if 1≤AV·DV,then DVA=1)
DVB=2DV-DVA
DWA=AW·DW(if 1≤AW·DW,then DWA=1)
DWB=2DW-DWA
(wherein, the size of the carrier wave is more than or equal to 0 and less than or equal to 1, and D is more than or equal to 0U、DV、DW1) or less.
A control device for a three-phase inverter according to claim 20 is a control device for a three-phase inverter in which three series circuits each including two semiconductor switching elements are connected in parallel to a capacitor connected in parallel to a dc voltage source, and a connection point of the two semiconductor switching elements is used as an ac output terminal of each phase, and the control device includes a voltage command value generating unit that generates a voltage command value for each phase, a comparing unit that generates a PWM pulse for driving the semiconductor switching elements by comparing the voltage command value for each phase generated by the voltage command value generating unit with a carrier, and a distributing unit that generates a drive pulse for driving all the semiconductor switching elements based on the PWM pulse, and the control device controls the time ratio of the voltage of the dc voltage source appearing at the ac output terminal by turning on and off the semiconductor switching elements Varying to output a three-phase alternating voltage of a desired magnitude and frequency, the control device being characterized in that,
the voltage command value for each phase is divided into a predetermined period and a remaining period within one cycle of the carrier wave, and the voltage command value for each of these periods is set to a voltage command value D for each phase that is a basis for outputting a target voltage from a three-phase inverterU、DV、 DWIncreased or decreased voltage command value DUAOr DUB、DVAOr DVB、DWAOr DWBAnd the time average value of the voltage command value of each phase in one period of the carrier is made to coincide with the voltage command value of each phase as the base, and,
when an arbitrary ratio A is set for each phaseU、AV、AWThe voltage command value generation means generates the voltage command value D for each phaseUAAnd DUB、DVAAnd DVB、DWAAnd DWBAre respectively composed of
DUA=AU·DU(if 1≤AU·DU,then DUA=1)
DUB=2DU-DUA
DVA=Av·Dv(if 1≤AV·DV,then DVA=1)
DVB=2DV-DVA
DWA=AW·DW(if 1≤AW·DW,then DWA=1)
DWB=2DW-DWA
(wherein, the size of the carrier wave is more than or equal to 0 and less than or equal to 1, and D is more than or equal to 0U、DV、DW1) or less.
Further, the three-phase inverter of claim 21 is a three-phase inverter having: three series circuits each including two semiconductor switching elements are connected in parallel to a capacitor connected in parallel to a dc voltage source, and a connection point between the two semiconductor switching elements is used as an ac output terminal of each phase; and a control device including a voltage command value generation unit that generates a voltage command value for each of the phases, a comparison unit that generates a PWM pulse for driving the semiconductor switching elements by comparing the voltage command value for each of the phases generated by the voltage command value generation unit with a carrier, and a distribution unit that generates a drive pulse for driving all the semiconductor switching elements based on the PWM pulse, and that changes a time ratio of a voltage of the dc voltage source appearing at the ac output terminal by turning on/off the semiconductor switching elements to output a three-phase ac voltage of a desired magnitude and frequency,
the voltage command value for each phase is divided into a predetermined period and a remaining period within one cycle of the carrier wave, and the voltage command value for each of these periods is set to a voltage command value D for each phase that is a basis for outputting a target voltage from a three-phase inverterU、DV、 DWIncreased or decreased voltage command value DUAOr DUB、DVAOr DVB、DWAOr DWBAnd the time average value of the voltage command value of each phase in one period of the carrier is made to coincide with the voltage command value of each phase as the base, and,
when an arbitrary ratio A is set for each phaseU、AV、AWFrom said voltageVoltage command value D of each phase generated by command value generation meansUAAnd DUB、DVAAnd DVB、DWAAnd DWBAre respectively composed of
DUA=AU·DU(if 1≤AU·DU,then DUA=1)
DUB=2DU-DUA
DVA=AV·DV(if 1≤AV·DV,then DVA=1)
DVB=2DV-DVA
DWA=AW·DW(if 1≤AW·DW,then DWA=1)
DWB=2DW-DWA
(wherein, the size of the carrier wave is more than or equal to 0 and less than or equal to 1, and D is more than or equal to 0U、DV、DW1) or less.
A control method of a three-phase inverter according to claim 22 is a control method of an inverter in which three series circuits composed of two semiconductor switching elements are connected in parallel with each other with respect to a capacitor connected in parallel with a direct-current voltage source, and a connection point of the two semiconductor switching elements is used as an alternating-current output terminal of each phase, the inverter controlling the switching elements using PWM pulses obtained by comparing an output voltage command value of each phase with a triangular wave.
In the present invention, the voltage command value of the 1 st phase out of at least two phases is a voltage command value in which the output voltage in a predetermined period in one period of the carrier wave is equal to or greater than the time average value of the target voltage to be output in the one period and the output voltage in the remaining period in the one period is equal to or less than the time average value of the target voltage, the voltage command value of the 2 nd phase out of the two phases is a voltage command value in which the output voltage in the predetermined period in one period of the carrier wave is less than the time average value of the target voltage to be output in the one period and the output voltage in the remaining period in the one period is equal to or greater than the time average value of the target voltage, and the voltage command value of the 1 st phase in the one period is equal to or greater than the time average value of the target voltage of the 1 st phase, And the voltage command value of the 2 nd phase in the one period is equal to the time average value of the target voltage of the 2 nd phase.
The method of controlling a three-phase inverter according to claim 23 is characterized in that, in the method of controlling a three-phase inverter according to claim 22, a command value ratio, which is a ratio between a voltage command value and a target voltage in the predetermined period or the remaining period, is equal in both the 1 st phase and the 2 nd phase.
The method of controlling a three-phase inverter according to claim 24 is characterized in that, in the method of controlling a three-phase inverter according to claim 22, a command value ratio, which is a ratio between a voltage command value and a target voltage in the predetermined period or the remaining period, is different between the 1 st phase and the 2 nd phase.
A method of controlling a three-phase inverter according to claim 25 is a method of controlling a three-phase inverter according to claim 24, the method including:
the voltage command value of the 1 st phase is a voltage command value in which the output voltage in the predetermined period in one period of the carrier wave is equal to or greater than the time average value of the target voltage to be output in the one period, and the output voltage in the remaining period in the one period is smaller than the time average value of the target voltage, and,
The voltage command value of the phase 2 is a pattern in which the output voltage in the predetermined period in one period of the carrier wave is smaller than the time average value of the target voltage to be output in the one period, and the output voltage in the remaining period in the one period is equal to or greater than the time average value of the target voltage; and
the phase 1 voltage command value and the phase 2 voltage command value are in a mode 2 in which the output voltage in the predetermined period in one cycle of the carrier wave is equal to or greater than a time average value of a target voltage to be output in the one cycle, and the output voltage in the remaining period in the one cycle is smaller than the time average value of the target voltage,
wherein the 1 st mode and the 2 nd mode are switched.
The method of controlling a three-phase inverter according to claim 26 is characterized in that, in the method of controlling a three-phase inverter according to any one of claims 23 to 25, the command value ratio is changed in accordance with a magnitude or a phase angle of an output voltage or a phase angle of an output current of each phase.
A control device of a three-phase inverter according to claim 27, wherein three series circuits of two semiconductor switching elements are connected in parallel to each other with respect to a capacitor connected in parallel to a dc voltage source, and a connection point between the two semiconductor switching elements is used as an ac output terminal of each phase, the control device comprises a voltage command value generating unit for generating a voltage command value for each phase, a comparing unit for generating a PWM pulse for driving the switching elements by comparing the voltage command value for each phase generated by the voltage command value generating unit with a carrier, and a distributing unit for generating a drive pulse for all the switching elements based on the PWM pulse, and the control device changes a time ratio of a voltage of the dc voltage source appearing at the ac output terminal by turning on/off the switching elements And a control device for outputting a three-phase AC voltage of a desired magnitude and frequency.
In the present invention, the voltage command value generation means employs a method in which, with respect to the voltage command value of the 1 st phase of the at least two phases, the output voltage of the carrier in a predetermined period in one period is equal to or higher than the time average value of the target voltage to be output in the one period, and the output voltage of the remaining period in the one period is smaller than the time average value of the target voltage,
The voltage command value of the 2 nd phase of the two phases is such that the output voltage in the predetermined period in one cycle of the carrier wave is smaller than the time average value of the target voltage to be output in the one cycle, and the output voltage in the remaining period in the one cycle is equal to or larger than the time average value of the target voltage,
The voltage command values for the 1 st phase and the 2 nd phase are generated in such a manner that the voltage command value for the 1 st phase in the one cycle is equal to the time average value of the target voltage for the 1 st phase, and the voltage command value for the 2 nd phase in the one cycle is equal to the time average value of the target voltage for the 2 nd phase, respectively.
The three-phase inverter of claim 28 is a three-phase inverter having: three series circuits each including two semiconductor switching elements are connected in parallel to a capacitor connected in parallel to a dc voltage source, and a connection point between the two semiconductor switching elements is used as an ac output terminal of each phase; and a control device including a voltage command value generation unit that generates a voltage command value for each phase, a comparison unit that generates a PWM pulse for driving the switching elements by comparing the voltage command value for each phase generated by the voltage command value generation unit with a carrier, and a distribution unit that generates a drive pulse for driving all the switching elements based on the PWM pulse, and that changes a time ratio of a voltage of the dc voltage source appearing at the ac output terminal by turning on and off the switching elements to output a three-phase ac voltage of a desired magnitude and frequency.
[ Effect of the invention ]
According to the present invention, a modified PWM pulse is generated by comparing a single carrier generated by a measurement unit common to each phase with an output voltage command value of each phase, and the inverter is controlled using the modified PWM pulse, whereby a target voltage can be output from the inverter, and a ripple current component flowing in a capacitor of a dc part can be reduced, thereby suppressing heat generation of the capacitor.
Further, since it is not necessary to use a plurality of types of carriers and to perform complicated calculation for controlling the spatial vector, it is possible to realize the control by using a general-purpose microcomputer and to reduce the cost and size of the entire device including the control device and the cooling unit.
In addition, the overheating and/or noise increase of a specific switching element due to the conventional two-phase modulation method can be prevented.
Drawings
Fig. 1 is a diagram for explaining a concept of generation of an output voltage pulse of one phase of a three-phase inverter and a relationship among a voltage command value, an output voltage, a carrier wave, and the like.
FIG. 2 is a waveform diagram showing the operation of example 1 of the invention 2.
FIG. 3 is a waveform diagram showing the operation of example 1 of the invention 2.
FIG. 4 is a waveform diagram showing the operation of example 2 of the invention 2.
FIG. 5 is a waveform diagram showing the operation of example 3 of the invention 2.
FIG. 6 is a waveform diagram showing the operation of example 4 of the invention 2.
Fig. 7 is a functional block diagram of a control device for an inverter according to the 1 st to 3 rd aspects.
Fig. 8 is a waveform diagram showing the operation of each part of the inverter according to embodiment 6 of the 3 rd invention.
Fig. 9 is a waveform diagram showing the operation of each part of the inverter according to embodiment 6 of the 3 rd invention.
FIG. 10 is a waveform diagram showing the operation of each part of an inverter based on a conventional three-phase modulation system.
Fig. 11 is a graph showing the relationship between the weight and the effective value of the capacitor current for each modulation rate in example 7 of the 3 rd invention.
Fig. 12 is a waveform diagram showing operation of each part of an inverter according to operation example 1 of embodiment 7 of the 3 rd invention.
Fig. 13 is a waveform diagram showing operation of each part of an inverter according to operation example 2 of embodiment 7 of the 3 rd invention.
Fig. 14 is a waveform diagram showing operation of each part of an inverter according to operation example 3 of embodiment 7 of the 3 rd invention.
Fig. 15 is a waveform diagram showing the operation of each part of the inverter based on the conventional three-phase modulation method (condition 1 in embodiment 3 of the invention 2).
Fig. 16 is a waveform diagram of operations of each part of the inverter based on condition 2 of embodiment 7 of the 3 rd invention.
Fig. 17 is a waveform diagram of operations of each part of an inverter based on condition 3 in embodiment 8 of invention 3.
Fig. 18 is a main circuit diagram of a three-phase inverter.
Fig. 19 is a diagram showing an operation waveform in a case of two-phase modulation in which a triangular wave is used as a carrier wave in the conventional technique.
Fig. 20 is a diagram showing an operation waveform in a conventional two-phase modulation in which a carrier wave uses a triangular wave.
Fig. 21 is a diagram showing an operation waveform in a conventional two-phase modulation in which a carrier wave uses a sawtooth wave.
Fig. 22 is a waveform diagram showing an operation of the 1 st and 2 nd carriers in the invention of the prior application in the case of two-phase modulation using a triangular wave.
Detailed Description
The following describes the invention 1.
In general, the fundamental wave components of the voltage and current on the ac side of the inverter depend on the state of the ac output side (load) of the inverter, and therefore the ac side active power of the inverter also depends on the same. On the other hand, the dc voltage of the inverter is maintained at a substantially predetermined dc voltage value although the dc voltage also fluctuates. The dc-side effective power of the inverter corresponds to the sum of the ac-side effective power of the inverter and the loss of the inverter itself, but since the loss of the inverter itself is preferably small and has no property of being freely adjustable, it can be said that the dc-side effective power (product of the dc voltage value and the dc component of the dc-side current) of the inverter is substantially determined by the operating state of the ac side.
Here, the ripple current component in the dc portion of the inverter has a degree of freedom that can be changed in accordance with the output method of the output voltage pulse of the inverter (in other words, the pulse pattern (pattern) of the output voltage) under the restriction that is determined by the operating state on the ac side as described above.
That is, in order to reduce the ripple current component of the dc part or the capacitor of the inverter, there is no other way than generating the output voltage pulse so as to reduce the ripple current component under the limitation of the ac-side voltage and the fundamental wave component determined by the operating state of the ac-side of the inverter.
In the PWM control, in principle, the PWM pulse width (pulse width of the switching operation) in the carrier period (switching operation period) shown as the 1 st period and the 2 nd period in fig. 20 and 21 is proportional to the average value of the ac side voltage of the inverter in the period. Therefore, if the PWM pulse width is maintained at the target value within the period and the generation timing (rising and falling) and/or the generation frequency are/is changed, the ripple current component flowing in the dc-side capacitor can be reduced while maintaining the ac-side voltage (average value) to be output from the inverter, and heat generation in the capacitor can be suppressed.
Further, the adjustment of the generation timing and the generation frequency of the PWM pulse can be performed by maintaining the sum of the pulse widths in a period of two or more periods, not in one period of the carrier, and in this case, the degree of freedom of adjustment can be further increased.
The above-described operation is suitable for either a two-phase modulation system or a three-phase modulation system, and the number of phases of the inverter is not limited to three.
Here, fig. 1(a) and (b) are diagrams for explaining a concept of generation of an output voltage pulse of one phase of a three-phase inverter and a relationship between a voltage command value, an output voltage, a carrier wave, and the like.
As shown in fig. 1(a), the following operations are sequentially and repeatedly performed in a certain carrier cycle T:
period ta: the switching element of the upper arm of one phase is turned on and the switching element of the lower arm is turned off, thereby outputting the voltage (amplitude V) of the positive electrode P of the DC voltage source BP);
Period tb: connecting the switching elements of the lower arm of one phaseWhen the switching element of the upper arm is turned on, the voltage of the negative electrode N of the DC voltage source B is outputted (0[ V ])]);
Period tc: duration of re-coincidence taThe voltage of the positive electrode P is similarly output.
It is known that the average value V of the AC side voltage of the inverter in the carrier period TaveCan pass through
Vave=VP×∑(TP)/T
And (4) showing. Here, VPAs mentioned above, the voltage amplitude, Σ (T), of the positive pole PP) Is the output V in the period TPThe sum of the periods of (a) in fig. 1, Σ (T)P)=ta+tc
By utilizing the above-mentioned matters, the average value V of the voltage to be generated on the ac side of the inverter in the carrier period T can be realized by adjusting the pulse width in the PWM controlave
It should be noted that in a plurality of cycles (for example, two cycles), the first and second signals can be passed
Vave=VP×∑(TP)/2T
The pulse width is adjusted. Even when the carrier period varies, the average value V for the target voltage can be obtained by setting the sum of the target periods to the denominator of the above equationaveSigma (T)P)。
As described above, the main point of outputting a desired ac-side voltage in the three-phase inverter is only to control the sum of the pulse widths in a predetermined period. As is apparent from the above equation, the average value V of the voltage is not affected at any timing of the generation of the voltage pulse (PWM pulse) in the carrier cycleave
That is, the present invention is achieved with the degree of freedom in the case of realizing the present invention, and the gist of the present invention is to reduce the ripple current component of the capacitor by appropriately adjusting the timing and frequency of generating the pulse.
As is apparent from the above description, any one of the sum of the pulse widths and the output timing of the pulse is a problem of time management in the switching operation. In order to perform the above-described time management (management of at which timing and for how long a pulse is output), a counter (timer) which is a counting means must be used.
For example, in a carrier comparison method in which a triangular wave as a carrier is compared with a voltage command value, the triangular wave is generated by an up-count (count up) and a down-count (count down) of a counter, and a pulse is switched at a timing when the magnitude relationship between the triangular wave and the voltage command value is inverted by comparing the value with the voltage command value, and in a space vector control method as shown in non-patent document 3, a counter controls which voltage vector is output for a long period.
In the invention of the above-mentioned prior application, the PWM control uses a carrier comparison method, but two kinds of carriers whose phases are inverted are used, and therefore two counters are required. In a conventional carrier comparison method, a carrier is common to each phase, so that one counter may be provided.
When the inverter is controlled by a general-purpose microcomputer that is commercially available, the inverter is often designed on the premise that a single counter is used, and the counter for generating the PWM pulse is generally shared by the respective phases. Therefore, it is difficult to realize the invention of the prior application by using a general-purpose microcomputer, and a process of providing an external circuit or the like is required.
In the space vector control method adopted in non-patent document 3, selection items of voltage vectors generated for each specific interval (for example, 60 °) of the voltage phase are switched, and at which timing and for how long a predetermined voltage vector is output from the selection items is determined. Since this counter is not common to the phases because the options of the voltage vectors are switched according to the voltage phases, generally, in order to execute this processing, it is necessary to use an FPGA that performs digital signal processing and/or a DSP that can perform high-speed signal processing in addition to the microcomputer, and complication of the calculation processing and/or increase in cost cannot be avoided.
That is, the technique disclosed in non-patent document 3 is difficult to realize on the premise that a common microcomputer uses a single counter common to each phase.
In contrast, in the present invention, by comparing the voltage command value of each phase with a single carrier generated by a single counting means common to each phase, it is possible to generate modified PWM pulses having different pulse generation timings and/or generation frequencies from PWM pulses generated by a conventional carrier comparison method. Therefore, as compared with the invention of the prior application, non-patent document 3, and the like, it is possible to output a desired voltage and reduce the ripple current component of the capacitor simply, specifically, by using only a general-purpose microcomputer capable of inverter control. The carrier wave may be a triangular wave and/or a sawtooth wave as a typical carrier wave, and these waves may be output by the counter unit.
In general, when the adjustment cycle of the ac side voltage is shortened and the control is performed more finely, the command value can be changed not within one carrier cycle but within one-half carrier cycle mainly according to the control requirement on the ac side. In the case where a triangular wave is used as the carrier wave, the switching operation of one phase may be performed at the rising and falling of the triangular wave, that is, may be performed twice in one carrier wave period.
Therefore, as shown in fig. 1(b), by updating the voltage command value for one phase at the top and bottom of the triangular wave, the result can be reflected in the timing of the pulse.
However, in general, since the update cycle of the pulse timing is sufficiently shorter than the time constant (time constant) of the control necessary for the operation on the ac side, the variation width of the command value per one-half cycle of the carrier becomes small when such control is performed. In particular, when the ac side is in a steady state, the command value is updated theoretically only by the amount of change corresponding to the phase of the fundamental wave of the ac voltage. That is, in the PWM pulse in such a case, there is no difference in which the generation loss of the capacitor or the heat generation due to the ripple current component caused by the switching operation is significantly different from the PWM pulse generated by comparing the average value of the output voltage in one carrier period with the triangular wave.
On the other hand, in the present invention, as described above, by changing the generation timing and/or the generation frequency of the PWM pulse to a degree exceeding the necessity for control, the ripple current component can be reduced, and a significant difference in the generation loss of the capacitor can be generated.
It should be noted that, from the viewpoint of the upper temperature limit of the capacitor, the relaxation of the temperature rise due to heat generation is a major problem, and for example, the upper temperature limit of a polypropylene (polypropylene) film capacitor is about 105 ℃, and the actual operating temperature can be up to 100 ℃ at the maximum, so that the temperature rise can be reduced only a little (for example, 2 to 3 ℃) under the same operating conditions. In particular, the present invention is suitable for being implemented by software processing, and therefore has an advantage that the hardware addition cost of the inverter is zero or extremely small.
Fig. 7 is a functional block diagram of an inverter control device according to claim 1, and the following 2 nd and 3 rd inventions.
Each function of the control device 10 is realized by hardware of a general-purpose microcomputer and software mounted on the hardware. In fig. 7, 11 is a carrier generation means for generating a triangular wave or a sawtooth wave as a carrier common to the respective phases by operating a single counting means 12 based on a carrier frequency fc, 13 is a voltage command value generation means for calculating a voltage command value of each phase by inputting a voltage/current detection value, 14 is a comparison means for generating a deformed PWM pulse by comparing the carrier with the voltage command value of each phase, and 15 is a comparison means for generating a deformed PWM pulse for all the switching elements U based on the deformed PWM pulseP~WNThe distribution unit of the driving pulse of (2).
The voltage command value D input to the voltage command value generation means 13U、DV、DWRatio AU、AV、AWAnd the load power factor, which will be described later in the embodiment of invention 3.
Next, as a specific example of the 1 st invention, each of the embodiments of the 2 nd and 3 rd inventions in which the inverter is controlled by using the modified PWM pulse will be described in detail.
In the following embodiments, as shown in fig. 18, the dc voltage source B, the capacitor C, and the switching element U are providedP、VP、WP、UN、VN、WNAnd the like, and the three-phase inverter is subjected to PWM control by comparing the carrier wave with the output voltage command value of each phase.
First, in the invention 2, the original output voltage command value of the modulation phase (hereinafter simply referred to as "voltage command value") is converted according to a predetermined conversion rule, and the converted voltage command value is compared with a single carrier to obtain a modified PWM pulse to drive the switching element, thereby causing I to be generateddcThe period of 0 is shorter than the conventional period, and the ripple current component of the capacitor C can be reduced.
That is, in the 2 nd invention, instead of the conventional two-phase modulation method (the modulation method in which the on/off state of the switching element of one phase is fixed for a fixed period and the on/off state of the switching element of the remaining two phases is controlled) shown in fig. 19, 20, etc., the two-phase modulation method (simply referred to as "modified two-phase modulation method" for convenience) in which the ripple current component is reduced by converting the voltage command values of two phases as the modulation phases according to a predetermined conversion rule and performing the switching operation using the modified PWM pulse obtained by comparing the converted voltage command value with the single carrier wave is used.
[ example 1]
First, fig. 2 shows example 1 of the 2 nd invention, in which the U-phase voltage command value U is fixed in the 1 st cycle and the 2 nd cycle, and the V-phase and the W-phase are set as modulation phases. Fig. 2(a) shows a carrier wave based on a previously commonly used two-phase modulation and voltage command values U, V, W for each phase for comparison, which have the same waveform as the carrier wave and voltage command values U, V, W in fig. 20.
In example 1, the voltage command value U, V, W in fig. 2(a) is converted into the voltage command values U (same as the original values) and V in fig. 2(b) according to the conversion rule described belowt、WtAnd compared to the carrier.
Here, referring to fig. 3, the voltage command value V is converted to each voltage command value Vt、WtThe transformation rule of (2) is explained. Carrier wave and voltage command value U, V in fig. 3t、WtThe same as in FIG. 2 (b).
First, if the peak value of the peak (the vertex where the slope changes from positive to negative) of the triangular wave as the carrier wave is "1" and the peak value of the valley (the position where the slope changes from negative to positive) of the triangular wave is "0", the voltage command value V is generated in accordance with equation 1 in the rising half period of the carrier wavet、WtAnd generating a voltage command value V according to equation 2 during the falling half periodt、 Wt. As described above, the voltage command value U is kept as it is.
[ formula 1]
Figure BDA0001862727020000271
Figure BDA0001862727020000272
[ formula 2]
Figure BDA0001862727020000273
Figure BDA0001862727020000274
In FIG. 3, V1、W1Indicates the magnitude, V, of the voltage command value V, W in the 1 st cycle2、W2Indicating the voltage command value in the 2 nd cycleV, W, respectively.
By using these V1、W1,V2、W2To express the converted voltage command value Vt、 WtIn the 1 st cycle, V is within the rising half-cycle of the carriert=1,W t0, V during the falling half period of the carrier wavet=(2V1-1),Wt=2W1. In addition, with respect to cycle 2, V is within the rising half period of the carriert=2V2W t0, V during the falling half period of the carrier wavet=0,Wt=2W2
In other words, the conversion to the respective voltage command values Vt、WtThe transformation rule of (3) is as follows.
As a rule, for the 2 nd and 3 rd phases (here, V-phase and W-phase) except for the 1 st phase (here, U-phase) in which the output voltage is fixed to the potential of the positive electrode P or the potential of the negative electrode N, the voltage command value of one phase is output in the rising half cycle of the carrier wave, and the voltage command value of the other phase is output in the falling half cycle of the carrier wave. Accordingly, a period (i) during which all of the three-phase ac output terminals are simultaneously connected to the positive electrode P or the negative electrode N of the dc voltage source B can be eliminateddcPeriod of 0) and may reduce the direct current idcSo that ripple current component i of the capacitor C can be reducedC
Since the output voltage is kept constant by equalizing the width of the PWM pulse generated for the switching element based on the original voltage command value x (here, the voltage command value for either the V-phase or the W-phase) with the width of the PWM pulse generated based on the converted voltage command value, the magnitude of the converted voltage command value is 2 times the original voltage command value x, that is, 2 x.
In the example of fig. 3, the voltage command value W of the falling half period in the 1 st cycletIs 2W1Voltage command value V of the rising half period in the 2 nd periodtIs 2V2And decreases the voltage command value W of the half cycletIs 2W2
However, as a result of doubling the magnitude of the voltage command value after conversion, once the wave height value "1" of the carrier wave is exceeded, the modulation cannot be performed correctly, so that if the wave height value "1" is exceeded, the magnitude of the remainder exceeding "1", that is, (2x-1) can be set as the voltage command value in the half-wave period of the rising or falling.
In the example of fig. 3, the voltage command value V of the falling half period in the 1 st periodtHas a size of (2V)1-1)。
Next, it was confirmed that the PWM pulse width values obtained by comparing the voltage command value and the carrier wave are equal between the case of performing the modified two-phase modulation using the converted voltage command value according to the present embodiment and the case of performing the conventional two-phase modulation using the original voltage command value as shown in fig. 20.
In this case, when the original voltage command value is x (0 ≦ x ≦ 1), the carrier period is T, and the carrier amplitude is 0 to 1 (wave height value), the PWM pulse width in the general two-phase modulation is xT, and the modified PWM pulse width T for the modified two-phase modulation according to the present embodiment is TtThe pulse width of the rising and falling half cycles of the triangular wave can be obtained by addition (addition), and therefore, it is expressed by the following equation 3.
[ formula 3]
Figure BDA0001862727020000291
That is, the PWM pulse width is xT regardless of the two-phase modulation or the modified two-phase modulation.
In order to control the inverter according to embodiment 1 by the digital control device, as shown in fig. 3, voltage/current detection and voltage command value calculation of each phase are performed in the 1 st cycle of the carrier wave to determine a new voltage command value in the next cycle in advance, and after the elapse of the preset time and the waiting time, the start point (peak) of the rising half cycle and the start point (peak) of the falling half cycle in the next 2 nd cycle may be switched to the new voltage command value.
In the two-phase modulation, a PWM pulse can be generated by dividing one cycle of the voltage command value into six parts per 60 ° electrical angle (electrical angle), replacing the 1 st phase in which the output voltage is fixed to the positive electrode P or the negative electrode N for each 60 °, and comparing the voltage command values of the remaining 2 nd and 3 rd phases with the carrier wave.
Since the above operation is repeated regularly every 60 °, the operation of the voltage command value for the entire one cycle can be defined as long as the operation is defined for one 60 ° period. Therefore, in the present embodiment, a case where, for example, the output voltage of the U-phase among the three phases is fixed to the potential of the positive electrode P and the V-phase and the W-phase are the modulation phases is described.
In the case where the output voltage of the U-phase among the three phases is fixed to the potential of the negative electrode N and the V-phase and the W-phase are modulated phases, for example, the voltage command value V is generated using the equations 1 and 2 in the rising half cycle and the falling half cycle of the carrier wave, respectivelyt、WtAnd (4) finishing.
Although the conversion rule of the voltage command value differs depending on whether the carrier wave and the voltage command value are set to "0" to "+ 1" or "-1" to "+ 1", the voltage command value of each phase is basically generated in such a manner that when the voltage command value of each phase is close to the rising half period or the falling half period of the carrier wave and a margin is generated beyond the wave height value, a voltage command value corresponding to the magnitude of the margin is generated in the other half period.
By converting the voltage command value in this way, it is possible to avoid repetition of the voltage command value for two phases of modulation. Here, if the original magnitudes of the voltage command values of the two phases to be modulated are both smaller than "0.5", the converted voltage command values do not overlap. In contrast, if the original magnitude of one of the two phases of the voltage command value is larger than "0.5", the voltage command value is repeated. However, since the repetition period is smaller than that in the case of general two-phase modulation, the direct current i is reduceddcThe effect of the contained ripple current component.
However, as described in the prior application (japanese patent application No. 2015-166526, PCT/J P2016/75045), since there are also operation conditions under which the ripple current component can be reduced by performing the normal two-phase modulation and/or the three-phase modulation, it is also possible to use the normal modulation and the modified two-phase modulation according to the present embodiment at the same time, and to appropriately switch the two according to each operation condition.
According to the present embodiment, since the carrier wave is a single triangular wave and can be realized by software processing using hardware constituted by a general-purpose micro mechanism, the versatility is high and the cost advantage is also large. In particular, since the calculation scale of equations 1 and 2 is extremely small and the setting (preset) of the voltage command value can be realized only by writing it into the register of the general-purpose microcomputer, the load is extremely light in the processing of software, and the increase in the processing load can be substantially ignored.
In this embodiment, the voltage command value is updated when the carrier wave is switched from falling to rising, but the voltage command value may be updated when the carrier wave is switched from rising to falling, and the same is true for this point in other embodiments.
In the conversion rule, the basic idea is to generate PWM pulses corresponding to the original voltage command values of the two phases as the modulation phases as separated as possible in the rising half cycle and the falling half cycle of the triangular wave, and to set the converted voltage command value to zero on the side where the PWM pulses are not generated, if possible.
However, even if the voltage command value is not set to zero, if the original voltage command value is set as the average value in one cycle of the carrier wave and the voltage command value in the rising half cycle and the voltage command value in the falling half cycle are set to have a predetermined magnitude relationship with respect to the average value, i can be reduced as compared with the conventional two-phase modulationdcThe period equals 0.
[ example 2]
Next, example 2 of the 2 nd invention will be explained.
In general, since a switching operation causes a rapid change in current and voltage in a main circuit of an inverter, there is a possibility that generated electromagnetic interference may prevent accurate detection of current. In the normal control, since there are many operating conditions under which the switching operation is not performed in the vicinity (vicinity) of the peak and the valley of the carrier wave, the current is often detected in the vicinity of or at the peak and the valley of the carrier wave. Therefore, as shown in fig. 20, if current detection, command value calculation, and the like are performed during a period including the peak of the carrier wave, and switching operation is performed while avoiding the peak and/or the valley of the carrier wave, it is possible to prevent electromagnetic interference from occurring.
However, in embodiment 1, as is apparent from fig. 3, the voltage command value is switched at the time of the peak and the trough of the carrier wave, and the switching operation is performed at or near the time of switching the voltage command value. For this reason, if it is assumed that the current is detected at the time of the peak and/or the trough of the carrier wave, it is easily affected by the disturbance accompanying the switching operation.
Although the timing (timing) at which the switching operation is not performed may be appropriately determined and the current detection may be performed, in this case, the voltage command value cannot be calculated at a fixed timing, and therefore, the time required to calculate the voltage command value may be insufficient or the control system may be unstable.
Therefore, in embodiment 2, by adjusting the voltage command value so that the switching operation is not performed at the vertex of the carrier wave, the current can be detected at a timing that is less likely to be affected by the disturbance accompanying the switching.
Fig. 4 is an explanatory diagram of the operation of embodiment 2. Fig. 4(a) shows a carrier wave and voltage command values of respective phases based on embodiment 1 for comparison, and their waveforms are the same as those shown in the upper part of fig. 3.
In embodiment 2, as shown in fig. 4(b), voltage command value V of 1 st cycle is obtained according to embodiment 1t’、Wt', and, the voltage command value V for the 2 nd cyclet’、Wt’、 Vt、WtIn other words, Vt of the rising half period of the carrier wave obtained according to embodiment 1 is regarded as the falling half periodPeriodic Vt', and W of falling half period of carrier wave to be obtained according to embodiment 1tW as a rising half periodt'. That is, in the 2 nd cycle, the voltage command values in the rising half cycle and the falling half cycle of each opposite carrier wave are replaced.
In the rising half period of the 2 nd cycle, Vt' -0, during the falling half period, Wt’=0。
Accordingly, if the voltage command value V of the V phase and W phase as the modulation phaset’、WtEither of which is less than 0.5, no switching operation is performed at the valleys of the carrier. Therefore, by detecting the current at this timing, the influence of the disturbance accompanying the switching operation can be avoided.
As shown in fig. 4(b), when at least one voltage command value is greater than 0.5, the switching operation may be performed at the valley of the carrier wave, but since the frequency thereof is reduced, the influence of the disturbance can be greatly reduced.
[ example 3]
Next, example 3 of the 2 nd invention will be explained. Fig. 5 is an explanatory diagram of the operation of embodiment 3.
According to the above embodiment 2, as shown in fig. 5, if the original voltage command value, for example, W, is set in two consecutive cycles of the carrier wavetIf there is no change, the voltage command values are distributed symmetrically around the boundary point (the valley of the carrier) between the 1 st cycle and the 2 nd cycle, and the switching operation does not occur at this time point (timing). Therefore, if the current detection is performed at this point, the current detection is not affected by the disturbance accompanying the switch.
In embodiment 3, one PWM pulse is generated in approximately two periods of the carrier wave, which results in a reduction in the density of the pulses, in other words, a decrease in the switching frequency of the inverter. This may incur an increase in noise and/or ripple (ripple) of the ac output current caused by the switching operation. This is also the case in embodiment 2.
In view of the above, if the frequency of the carrier is increased, the influence can be alleviated. That is, for example, if the original carrier frequency is 8[ kHz ], it is conceivable to set the carrier frequency to 16 [ kHz, which is twice the carrier frequency. In this case, the control period may be set to 8[ kHz ], the current detection and the voltage command value calculation may be performed once in two periods of the carrier, and the voltage command value for actual comparison with the carrier may be set up four times in total at the time of each of the peaks and troughs in the two periods of the carrier.
[ example 4]
Next, example 4 of the 2 nd invention will be explained. FIG. 6 is an explanatory view of the operation of example 4.
In the above embodiments, the voltage command value is switched between the rising half period and the falling half period of the carrier wave, but the voltage command value may be switched for each period in two consecutive periods of the carrier wave as shown in fig. 6, and the same effect can be obtained.
Accordingly, since the switching operation is not performed at the middle point of one cycle of the carrier wave, if the current is detected at that point, it is not affected by the disturbance accompanying the switching operation.
In this case, the timing suitable for current detection is earlier than in examples 2 and 3 by a half cycle of the carrier. Therefore, the calculation of the voltage command value can be started in advance, and the time until the next update of the voltage command value can be ensured to be long, so that the calculation time can be made sufficient.
As measures against the decrease in the switching frequency, the carrier frequency may be increased as in example 3.
[ example 5]
In example 5, a waveform other than a symmetrical triangular wave is used as the carrier wave.
According to the example of fig. 6, since the voltage command value does not change in each of the 1 st cycle and the 2 nd cycle, a sawtooth wave or a triangular wave whose rising gradient and falling gradient are asymmetric can be used as the carrier wave. Here, the sawtooth wave is a triangular wave of a carrier wave in which the timing of a peak in a certain period coincides with the timing of a trough in the next period.
In the sawtooth wave, the switching operation is performed at the time of the peak and the trough, and therefore, although it can be said that this time is not suitable for current detection, the direct current i is reduceddcThe period of 0 can also achieve the same effect as in each of the embodiments, in order to reduce the ripple current.
The control device of the inverter according to each embodiment of the invention 2 can be realized by the functional block diagram of fig. 7 described above.
That is, in the control device 10 shown in fig. 7, the carrier generation means 11 generates a triangular wave based on the operation of the counting means 12, and the comparison means 14 compares the triangular wave with the voltage instruction values of the respective phases to generate the modified PWM pulse. Then, based on the modified PWM pulse, the distribution unit 15 generates the PWM pulse for all the switching elements UP~WNThe drive pulse of (1).
Next, the 3 rd invention will be explained.
In the above-described 2 nd invention, the ripple current component is reduced by using the modified two-phase modulation method, but as the PWM control method of the 3 rd invention, a three-phase modulation method is used in which the inverter is controlled by comparing the voltage command value of each phase of the three-phase inverter with a triangular wave as a carrier wave.
In this case, the voltage command values for at least two phases among the voltage command values for the three phases are set as follows: in a predetermined period and a remaining period in one period of a triangular wave (for example, in a first half (rising) period and a second half (falling) period in one period of a symmetrical triangular wave as a carrier wave), voltage command values serving as a basis for outputting a target voltage from a three-phase inverter by a conventional three-phase modulation method are increased and decreased, and the time average value of the voltage command values of the two phases which are increased and decreased is made equal to the voltage command value of each phase serving as the basis.
In other words, the voltage command value of the 1 st phase of at least two of the three phases is a voltage command value in which the output voltage of the predetermined period in one period of the triangular wave is equal to or greater than the time average value of the target voltage and the output voltage of the remaining period in the one period is equal to or less than the time average value of the target voltage, and the voltage command value of the 2 nd phase of the two phases is a voltage command value in which the output voltage of the predetermined period in one period of the triangular wave is equal to or less than the time average value of the target voltage and the output voltage of the remaining period in the one period is equal to or greater than the time average value of the target voltage. Further, the voltage command value is generated in such a manner that the voltage command value of the 1 st phase in one cycle of the triangular wave is equal to the time average value of the target voltage of the 1 st phase, and the voltage command value of the 2 nd phase in the one cycle is equal to the time average value of the target voltage of the 2 nd phase.
Accordingly, the same output voltage as that of the conventional three-phase modulation method can be obtained, and by comparing the voltage command value of each phase with the triangular wave, deformed PWM pulses whose pulse generation timings are shifted can be generated, and then applying the deformed PWM pulses to the switching operation, the ripple current flowing in the capacitor can be reduced, and heat generation can be suppressed.
The configuration of the main circuit of the three-phase inverter is the same as that shown in fig. 18.
In the following description, the magnitude of the triangular wave is represented by 0 to 1 (0. ltoreq. triangular wave. ltoreq.1), and the voltage command value for the three phases (U-phase, V-phase, W-phase) of the three-phase inverter is represented by Dx(subscript X denotes U, V, W), and the voltage command values D are setxThe minimum value in (D) is 0 and the maximum value is 1 (0. ltoreq. D)x≤1)。
[ example 6]
Example 6 of the 3 rd invention will be explained.
First, the original voltage command value of the U-phase to W-phase for comparison with the triangular wave is set to DU、DV、DW. These voltage command values DU、Dv、DWFor outputting a three-phase alternating-current voltage as a target voltage from the inverter main circuit.
Voltages for U-phase, V-phase and W-phaseThe command value is divided into first half (rising) and second half (falling) periods of one period of the triangular wave for each half period of the triangular wave, and the subscript a is assigned to the voltage command value for each half period when the voltage command value is equal to or greater than the original voltage command value and the subscript B is assigned to the voltage command value less than the original voltage command value. That is, the voltage command value for each phase equal to or greater than the original voltage command value is set to DUA、DVA、DWAAnd the voltage command value of each phase smaller than the original voltage command value is set as DUB、DVB、DwB
In the case of the invention 3, the voltage command value D is obtained by applyingUA、DUB、DVA、 DVB、DWA、DWBThe method aspect of comparing with the triangular wave to generate the deformed PWM pulse is characterized.
At this time, an arbitrary ratio A is set for each phaseU、AV、AwAnd as shown in the following formulas 4 to 9 for DUA~DwBAnd (4) defining. These ratios AU、AV、AwIs represented by DUA~ DwBAnd original voltage command value DU、DV、DwThe parameter of the degree of divergence between the values corresponds to the command value ratio in the claims, and is particularly referred to as "weight" in the present specification. These weights AU、AV、AwPreferably has a value of 1 or more and 2 or less.
Note that if a is set to 1, the voltage command value in one period of the triangular wave is the same as the three-phase modulation method that has been commonly used (for example, D)UA=DUB= DU)。
[ formula 4]
DUA=AU·DU(if 1≤AU·DU,then DUA=1)
[ formula 5]
DUB=2DU-DUA
[ formula 6]
DVA=Av·Dv(if 1≤Av·Dv,then DVA=1)
[ formula 7]
DVB=2Dv-DVA
[ formula 8]
DWA=AW·DW (if 1≤AW·DW,then DWA=1)
[ formula 9]
DWB=2DW-DWA
By defining in this way, the magnitude of the voltage command value changes for each half cycle of the triangular wave, but the time average value of the voltage command value in one cycle of the triangular wave is the same as the time average value of the original voltage command value. The PWM control originally means that a target voltage is equivalently obtained by adjusting the width of a pulse having a magnitude corresponding to a voltage command value in a fixed cycle. Therefore, even if the magnitude of the voltage command value changes for each half cycle of the triangular wave, the target voltage can be output from the inverter as long as the time average value in one cycle matches the original voltage command value.
The matters described so far will be specifically described with reference to fig. 8.
In this case, the original voltage command value D of each phase to be compared with the triangular wave is expressed by the following equations 10 to 12U、DV、DWAnd (4) defining. In these equations, λ is a modulation factor and is an element for determining the magnitude of the output voltage of the inverter (amplitude of the ac voltage). In addition, θ is an angle.
[ formula 10]
Figure BDA0001862727020000371
[ formula 11]
Figure BDA0001862727020000372
[ formula 12]
Figure BDA0001862727020000373
For example, in fig. 8, λ is 0.8, 0 ≦ θ ≦ 20 °, and aU=1、AV2 and AwThe operation waveform diagram of each part of the inverter under the condition of 2.
When the voltage command value is larger than the triangular wave, the switching element of the upper arm of each phase of the inverter is turned on, and the switching element of the lower arm having a complementary relationship thereto is turned off.
In fig. 8, the voltage command value for the V phase is in the first half period t of the triangular wave1Internal voltage command value D smaller than originalVVoltage command value D ofVBDuring the second half period t2Internal voltage command value D greater than originalVVoltage command value D ofVA. On the other hand, the voltage command value of the W phase is opposite to that of the V phase, and during the first half period t1Internal voltage command value D greater than originalwVoltage instruction value D ofWADuring the second half period t2Internal voltage command value D smaller than originalwVoltage command value D ofwB
In the period t, the voltage command value for the U-phase1、t2All of which have the original voltage command value DU(DUA=DUB=DU) The size is unchanged.
Table 1 summarizes the conditions described so far.
[ Table 1]
Figure BDA0001862727020000381
Next, fig. 9 is an operation waveform diagram of each portion of the inverter based on the conditions of table 2. Fig. 10 is an operation waveform diagram in the case where the conventional three-phase modulation method is usedVoltage command value D of each phaseU、DV、DwWhich one of them is the original voltage command value (D)UA=DUB=DU,DVA=DVB=DV,DWA=DWB=DW)。
[ Table 2]
Figure BDA0001862727020000391
The current waveforms in fig. 9 and 10 correspond to the current waveforms of the respective portions shown in fig. 18. In addition, i in fig. 9 and 10dcaveIs a current flowing from the DC voltage source B, and corresponds to i in FIG. 18batIt can also be considered as the current i flowing in the dc part of the inverterdcTime average of (d). In addition, the capacitor current (ripple current component) iCCan be represented as iC=idc-idcave
If the attention is paid to the capacitor current i in FIGS. 9 and 10CIt is apparent that the amount of change in the current in fig. 9 is small compared to fig. 10. It shows that i can be reduced according to example 6, compared with the case where the previous three-phase modulation method is usedCIs determined.
As is apparent from the on signals of the switching elements of the respective arms in fig. 9, the switching elements are repeatedly turned on and off, that is, the switching elements are subjected to so-called three-phase modulation.
That is, to reduce the capacitor current iCIn the invention of the above-mentioned prior application, it is a prerequisite that one of the voltage command values of the three phases is maintained at the maximum value or the minimum value of the carrier triangular wave, that is, so-called two-phase modulation. In contrast, in the present embodiment, i can be reduced without performing two-phase modulationCThis eliminates problems such as overheating and/or noise increase of the specific switching element due to the two-phase modulation.
In example 6, as shown in tables 1 and 2, although the angle rangesProvided that theta is more than or equal to-30 degrees and less than or equal to 30 degrees, and the weight A of the U phaseUWeight of 1, V phase V2, and weight of W phase A W2, but in other angular ranges, for example, in the case of a change to aU=2、AV1 and AWIn such a case, the same effect can be obtained as in 2.
[ example 7]
Next, example 7 of the 3 rd invention will be explained. In example 7, in order to examine the influence of the weight a on the effective current value of the capacitor C, the operation waveforms of the respective portions of the inverter were obtained under the conditions shown in table 3.
[ Table 3]
Figure BDA0001862727020000401
More specifically, the weight a for the U phase is determined for each modulation rate λUWeight of 1, V phaseVWeight of W phasewThe influence of the weight a on the effective value of the capacitor current in the case where the weight a is included in the angular range of-30 ° ≦ θ ≦ 30 ° was examined.
It should be noted that even in an angular range other than-30 ° ≦ θ ≦ 30 °, the same results as in the angular range of-30 ° ≦ θ ≦ 30 ° can be obtained as long as the weights of the phases are replaced as described above.
Fig. 11 is a diagram showing a relationship between the weight a and the effective value of the capacitor current based on the modulation rate.
In fig. 11, the condition that the weight a is 1 is the same as that of the conventional three-phase modulation method. It is understood that if λ is not 0.2, the effective value of the capacitor current is reduced more than that of the conventional one by setting the weight a > 1. When the modulation factor is 0.6 ≦ λ ≦ 1, the effective value of the capacitor current is the smallest when a is 2.
The reason for this is considered to be that the magnitude of the current flowing through the dc portion of the inverter is changed by changing the timing of turning on and off each switching element by taking both the weight a and the modulation factor λ into consideration.
In addition to the above-described investigation results, the case where λ is 0.2 is taken as an example, and the operation waveform is specifically described with reference to the operation waveform.
FIG. 12, FIG. 13, and FIG. 14 are A as operation example 1U=AV=AWIn the case of 1, a is an operation example 2U1 and AV=AWCase 1.4, and a as operation example 3U1 and AV=AWThe operation waveform in the case of 2.
The operation example 1 in fig. 12 is the same as the operation of the conventional three-phase modulation method. In this case, in the angular range of-30 DEG to 30 DEG, the inverter has a relatively large number of periods during which the upper arm of the U phase is on and the lower arms of the V phase and the W phase are on. The on/off state of the switching element is defined as (1, 0, 0), and the on/off state of each phase is also defined as follows.
When the on/off state of each phase is (1, 0, 0), the inverter is set to direct current idcCurrent i of U phaseUThe flow is performed. For the current iUAs is apparent from fig. 12, the magnitude of (d) is the largest of the currents of the respective phases.
In operation example 2 of fig. 13, the on/off state becomes (1, 0, 1) in a relatively large number of periods within the angle range of-30 ° ≦ θ ≦ 30 °. In this case, as the direct current idcPhase i of current of V-phasevReverse current-ivThe flow is performed. At this time, ivIn the negative direction, so that the direct current idcThe flow proceeds in the positive direction. In addition, ivIs smaller than i described in connection with fig. 12U. That is, the direct current i in operation example 2dcLess current than would flow in the case of the prior art. For this reason, if A U1 and Av=AWWhen 1.4, the capacitor current i can be reduced as compared with the conventional three-phase modulation methodCIs determined.
In operation example 3 of FIG. 14, theta is set at-30 DEG ≦ 30 DEGIn the angular range, the on/off state is (1, 0, 1) for a relatively long period. Direct current i at this timedcAs explained for fig. 13.
Next, relatively many on/off states are (0, 1, 0). In this case, the DC current idcPhase of current i of VvFlows but in a negative direction, so that a direct current idcIs also negative. For this purpose, a direct current idcRepeating positive and negative values for this reason increases the capacitor current i compared to the previous three-phase modulation schemeCIs determined.
As is apparent from the above description, if the weight a is set to an optimum value according to the magnitude of the modulation rate, the capacitor current i can be made to be the optimum valueCIs the smallest.
[ example 8]
Next, example 8 of the present invention will be explained. In the present embodiment, in order to examine the influence of the load power factor on the effective value of the current of the capacitor, the operation waveforms of the respective portions of the inverter were determined under the conditions shown in table 4.
The conditions in table 4 are the same as those described in example 7, except that the load power factor is deteriorated (deteriorated).
[ Table 4]
Angular range theta -30°≤θ≤30°
Modulation rate lambda 0.2
Peak value of load current 1
Load power factor 0.866
The weight a and the like are the conditions 1 to 3 shown in tables 5 to 7, respectively.
[ Table 5]
[ Condition 1]
Figure BDA0001862727020000431
[ Table 6]
[ Condition 2]
Figure BDA0001862727020000432
[ Table 7]
[ Condition 3]
Figure BDA0001862727020000441
In condition 1 shown in Table 5, the weight of each phase is AU=AVA W1 corresponds to a conventional three-phase modulation system.
In condition 2 shown in table 6, the weight of each phase is the value used in operation example 2 of example 7, i.e., aU=1,AV=AW=1.4。
In condition 3 shown in Table 7, in the range of-30 DEG to 0 DEG, AU= 1.4,AV=1.2,AW1, and in the range of 0 DEG to theta to 30 DEG, AU=1,AV=1.2,AW=1.4。
Examples 6 and 7 differ from examples 6 and 7 in that the values of the weights A of the two phases having weights are equal to each other, but example 8 differs from examples 6 and 7 in that the values of the weights A of the two phases having weights (U phase and V phase in the range of-30 DEG. ltoreq. theta.ltoreq.0 DEG, and V phase and W phase in the same range of 0 DEG. ltoreq. theta.ltoreq.30 deg) are different from each other.
In examples 6 and 7, if the U-phase and the V-phase are weighted, for example, the voltage command value in the first half (rising) period of the triangular wave is DUA、DVBAnd the voltage command value in the second half (falling) period is DUB、DVAIn this way, the magnitude relationship between the original voltage command value and the changed voltage command value is made different between the two phases in the first half and the second half of the triangular wave (as described above, subscript a of the voltage command value: changed voltage command value ≧ original voltage command value, subscript B of the voltage command value: changed voltage command value)<The original voltage command value).
However, in example 8, particularly in the range of-30 DEG.ltoreq.theta.ltoreq.30 DEG, if the U phase and the V phase are weighted, for example, the voltage command value in the first half of the triangular wave is DUA、DVAThe voltage command value in the second half period is DUB、DVBIn this way, the magnitude relationship between the original voltage command value and the voltage command value after the change is made the same for both phases in the first half and the second half of the triangular wave, which is different from examples 6 and 7.
Table 8 shows the capacitor current I in the angle range of-30 DEG. ltoreq. theta.ltoreq.30 DEG in the case of using the above-mentioned conditions 1 to 3cIs determined. Fig. 15 to 17 are operation waveform examples in the case of the condition 1 to the condition 3, respectively.
[ Table 8]
Condition Effective value of capacitor current
Condition 1 (corresponding to a conventional control method) 0.31
Condition 2 (corresponding to example 7) 0.36
Condition 3 (corresponding to example 8) 0.26
As can be seen from table 8, in the case of condition 2, although the weight a having the effect in example 7 is set, the effective value of the capacitor current is larger than that in the case of the previous three-phase modulation method, which is condition 1. The reason for this is that the load power factor is deteriorated (deteriorated), and as can be understood from a comparison of FIG. 15 and FIG. 16, particularly in the range of-30. ltoreq. theta.ltoreq.0, it is clear that the current value in FIG. 16 (condition 2) becomes large, as can be understood from this.
On the other hand, in the case of condition 3 shown in fig. 17, the capacitor current effective value is lower than that of condition 1. This is because, by setting condition 3 shown in table 7, current i of the dc part of the inverter can be realizeddcThe on/off state of the switching element as reduced can be understood from a comparison between fig. 15 and 17.
In examples 6 to 8, the voltage command values of at least two phases are increased or decreased respectively from the original voltage command values in the first half period and the second half period (first half period is equal to second half period) of one period of the symmetrical triangular wave, but the present invention is not limited to such an example.
For example, when the triangular wave is asymmetric, the voltage command value may be increased or decreased with respect to the original voltage command value in each of the rising period and the falling period of the triangular wave (the rising period ≠ the falling period), and in either case, the time average value of the voltage command value of each phase in one cycle of the triangular wave may be kept equal to the original voltage command value of each phase.
In addition, the present invention can also be applied to the following comparison, namely: in n periods of the carrier (n is multiple, n equals n)1+n2,n1And n2Both are integers of 1 or more) are added to the reaction mixture1A period and n2The voltage command value increased or decreased with respect to the original voltage command value of each phase in each cycle is compared with the carrier. In this case, the time average value of the voltage command value of each phase, which is increased or decreased in n cycles, may be kept equal to the original voltage command value of each phase.
The control device of the inverter according to each embodiment of the 3 rd invention can be realized by the functional block diagram of fig. 7 described above.
That is, the voltage command value generation means 13 generates the original voltage command value D based on the voltage/current detection valueU、DV、DWWeight AU、Av、AWAnd a load power factor, etc. to generate a voltage command value DUA、DUB、DVA、DVB、DWA、DWBThe comparison unit 14 compares these voltage command values DUA、DUB、DVA、DVB、DWA、DWBAnd compared with a symmetrical triangular wave or an asymmetrical triangular wave generated by using the counting unit 12 within the carrier generating unit 11, thereby generating a deformed PWM pulse. The subsequent operations are the same as in the 1 st and 2 nd inventions.
[ description of symbols ]
B: DC voltage source
C: capacitor with a capacitor element
L: electric reactor
UP、VP、WP、UN、VN、WN: semiconductor switching element
M: three-phase AC load
P: positive electrode
N: negative electrode
TU、TV、TW: AC output terminal
10: control device
11: carrier generation unit
12: counting unit
13: voltage command value generation unit
14: comparison unit
15: dispensing unit

Claims (37)

1. A method for controlling an inverter in which a plurality of series circuits each including two semiconductor switching elements are connected in parallel to a capacitor connected in parallel to a DC voltage source, and a connection point between the two semiconductor switching elements is used as an AC output terminal of each phase, wherein the switching elements are controlled using PWM pulses obtained by comparing an output voltage command value of each phase with a carrier,
the switching device includes a counter unit that is common to the respective phases, and that generates a modified PWM pulse in which the sum of pulse widths of the respective phases in a period corresponding to one or more periods of the carrier is substantially equal and the generation timing and/or generation frequency of a pulse of at least one phase is different from the estimated PWM pulse so as to exceed the degree necessary for control, based on an output of a counter unit common to the respective phases, and controls the switching element using the modified PWM pulse.
2. The method of controlling an inverter according to claim 1,
the output of the counting unit is used to generate the carrier wave for generating the deformed PWM pulse by comparison with the output voltage command value of each phase of the inverter.
3. The method of controlling an inverter according to claim 1,
the carrier wave is a triangular wave or a sawtooth wave.
4. The method of controlling an inverter according to claim 1,
the inverter is a three-phase inverter having three of the series circuits,
in the generation of the deformed PWM pulse, when the deformed PWM pulse corresponding to a period of one cycle or a plurality of cycles of the carrier wave is generated,
generating a deformed PWM pulse for phase 1 for controlling the semiconductor switching element so that the AC output voltage of phase 1 is maintained at the positive electrode potential or the negative electrode potential of the DC voltage source,
for phase 2, a phase 2 converted voltage command value for generating a modified PWM pulse having a generation timing and/or a generation frequency different from those of the estimated PWM pulse is used,
for the 3 rd phase, a 3 rd phase converted voltage command value for generating a modified PWM pulse having a generation timing and/or a generation frequency different from the estimated PWM pulse is used.
5. The control method of an inverter according to claim 4,
the carrier wave is a triangular wave which is,
the phase 2 conversion voltage command value is set to be larger than an average value of the phase 2 output voltage command value in the one cycle in a rising half cycle and smaller than the average value of the phase 2 output voltage command value in the one cycle in a falling half cycle of the one cycle of the triangular wave,
the phase 3 conversion voltage command value is set to be smaller than an average value of the phase 3 output voltage command value in the rising half period and larger than the average value of the phase 3 output voltage command value in the falling half period of the one period of the triangular wave.
6. The control method of an inverter according to claim 4,
the carrier wave is a triangular wave which is,
the phase 2 conversion voltage command value is set to,
in the 1 st period of the two consecutive periods of the triangular wave,
is greater than the average value in the 1 st cycle of the output voltage command value of the 2 nd phase in the rising half cycle of the triangular wave and is less than the average value in the 1 st cycle of the output voltage command value of the 2 nd phase in the falling half cycle,
in the 2 nd cycle of the two consecutive cycles,
less than an average value in the 2 nd period of the output voltage command value of the 2 nd phase in a rising half period of the triangular wave and greater than an average value in the 2 nd period of the output voltage command value of the 2 nd phase in a falling half period,
the phase 3 conversion voltage command value is set to,
in the 1 st period, the first and second periods,
less than an average value in the 1 st cycle of the output voltage command value of the 3 rd phase in a rising half cycle of the triangular wave and greater than an average value in the 1 st cycle of the output voltage command value of the 3 rd phase in a falling half cycle,
in the 2 nd period, the first period is not completed,
and is greater than the average value of the output voltage command value of the 3 rd phase in the 2 nd period and is less than the average value of the output voltage command value of the 3 rd phase in the 2 nd period in the falling half period of the triangular wave.
7. The control method of an inverter according to claim 4,
the phase 2 conversion voltage command value is set to,
greater than an average value of output voltage command values of the 2 nd phase in the two cycles in the 1 st cycle of the continuous two cycles of the carrier wave,
in a 2 nd period of two consecutive periods of the carrier wave, is smaller than an average value of output voltage command values of the 2 nd phase in the two periods,
the phase 3 conversion voltage command value is set to,
less than an average value of output voltage command values of the 3 rd phase in 1 st period of two consecutive periods of the carrier wave,
and the average value of the output voltage command values of the 3 rd phase in the 2 nd period in two continuous periods of the carrier wave is larger than the average value of the output voltage command values of the 3 rd phase in the two periods.
8. The method of controlling an inverter according to claim 1,
the inverter is a three-phase inverter having three of the series circuits,
in the generation of the modified PWM pulse, as an output voltage command value of each phase, an output voltage command value D for each phase which is a basis for outputting a target voltage from the three-phase inverter is used, the output voltage command value D being a predetermined period and a remaining period in one cycle of the carrier waveU、DVAnd DWConverted voltage command value D increased or decreasedUAOr DUB、DVAOr DVBAnd DWAOr DWB
The time average value of the converted voltage command value of each phase in one cycle of the carrier wave is set to be equal to the output voltage command value of each phase as the base, respectively, and,
when an arbitrary ratio A is set for each phaseU、AVAnd AWThe command value D of the conversion voltage of each phaseUAAnd DUB、DVAAnd DVBAnd DWAAnd DWBAre respectively composed of
DUA=AU·DUWherein, if 1 is less than or equal to AU·DUThen D isUA=1;
DUB=2DU-DUA
DVA=AV·DVWherein, if 1 is less than or equal to AV·DVThen D isVA=1;
DVB=2DV-DVA
DWA=AW·DWWherein, if 1 is less than or equal to AW·DWThen D isWA1 is ═ 1; and
DWB=2DW-DWA
denotes that, where 0 ≦ carrier has a size ≦ 1 and 0 ≦ DU、DVAnd DW≤1。
9. The method of controlling an inverter according to claim 8,
the conversion voltage command value for the 1 st phase of at least two phases of the respective phases is set so that the output voltage of the 1 st phase in the predetermined period is equal to or greater than a time average value of a target voltage of the 1 st phase to be output in the one cycle and the output voltage of the 1 st phase in the remaining period is smaller than the time average value of the target voltage of the 1 st phase,
the conversion voltage command value for the 2 nd phase among the two phases is set so that the output voltage of the 2 nd phase in the predetermined period is smaller than the time average value of the target voltage of the 2 nd phase to be output in the one cycle, and the output voltage of the 2 nd phase in the remaining period is equal to or greater than the time average value of the target voltage of the 2 nd phase.
10. The method of controlling an inverter according to claim 9,
the command value ratio, which is the ratio between the converted voltage command value and the output voltage command value as the basis in the predetermined period or the remaining period, is equal to the command value ratio in the 1 st phase and the 2 nd phase.
11. The method of controlling an inverter according to claim 9,
the command value ratio, which is the ratio between the converted voltage command value and the output voltage command value as the basis in the predetermined period or the remaining period, is different between the command values of the 1 st phase and the 2 nd phase.
12. The method of controlling an inverter according to claim 11,
has a 1 st mode and a 2 nd mode, and switches between the 1 st mode and the 2 nd mode,
the 1 st mode is a mode in which the 1 st phase conversion voltage command value is set such that the 1 st phase output voltage in the predetermined period is equal to or greater than a time average of a 1 st phase target voltage to be output in the one cycle, and the 1 st phase output voltage in the remaining period is less than the time average of the 1 st phase target voltage, and the 2 nd phase conversion voltage command value is set such that the 2 nd phase output voltage in the predetermined period is less than the time average of the 2 nd phase target voltage to be output in the one cycle, and the 2 nd phase output voltage in the remaining period is equal to or greater than the time average of the 2 nd phase target voltage,
the 2 nd mode is a mode in which the 1 st phase converted voltage command value and the 2 nd phase converted voltage command value are set such that the 1 st phase and 2 nd phase output voltages in the predetermined period are equal to or greater than a time average of the 1 st phase and 2 nd phase target voltages to be output in the one cycle, and the 1 st phase and 2 nd phase output voltages in the remaining period are smaller than the time average of the 1 st phase and 2 nd phase target voltages.
13. The control method of an inverter according to any one of claims 10 to 12,
the command value ratio is changed in accordance with the magnitude or phase angle of the output voltage of each phase or the phase angle of the output current.
14. A control device for an inverter in which a plurality of series circuits each including two semiconductor switching elements are connected in parallel to a capacitor connected in parallel to a DC voltage source, and a connection point between the two semiconductor switching elements is used as an AC output terminal of each phase, wherein PWM pulses for controlling the switching elements are generated by comparing an output voltage command value of each phase with a carrier,
the switching device includes a counter unit that is common to the respective phases, and that generates a modified PWM pulse in which the sum of pulse widths of the respective phases in a period corresponding to one or more periods of the carrier is substantially equal and the generation timing and/or generation frequency of a pulse of at least one phase is different from the estimated PWM pulse so as to exceed the degree necessary for control, based on an output of a counter unit common to the respective phases, and controls the switching element using the modified PWM pulse.
15. The control device of an inverter according to claim 14,
the inverter is a three-phase inverter having three of the series circuits,
the control device generates the deformed PWM pulse corresponding to a period of one or more periods of the carrier wave
Generating a deformed PWM pulse for phase 1 for controlling the semiconductor switching element so that the AC output voltage of phase 1 is maintained at the positive electrode potential or the negative electrode potential of the DC voltage source,
for phase 2, a phase 2 converted voltage command value for generating a modified PWM pulse having a generation timing and/or a generation frequency different from those of the estimated PWM pulse is used,
for the 3 rd phase, a 3 rd phase converted voltage command value for generating a modified PWM pulse having a generation timing and/or a generation frequency different from the estimated PWM pulse is used.
16. The control device of an inverter according to claim 15,
the carrier wave is a triangular wave which is,
the phase 2 conversion voltage command value is larger than an average value of the phase 2 output voltage command value in the one cycle in a rising half cycle of the one cycle of the triangular wave and is smaller than the average value of the phase 2 output voltage command value in the one cycle in a falling half cycle,
the phase 3 conversion voltage command value is smaller than an average value of the phase 3 output voltage command value in the one period in a rising half period of the one period of the triangular wave and larger than the average value of the phase 3 output voltage command value in a falling half period.
17. The control device of an inverter according to claim 16,
the phase 2 conversion voltage command value is set to zero or minimum value in the falling half period of the triangular wave, and the phase 3 conversion voltage command value is set to zero or minimum value in the rising half period of the triangular wave.
18. The control device of an inverter according to claim 15,
the carrier wave is a triangular wave,
the phase 2 conversion voltage command value is set to,
in the 1 st period of the two consecutive periods of the triangular wave,
is greater than the average value in the 1 st cycle of the output voltage command value of the 2 nd phase in the rising half cycle of the triangular wave and is less than the average value in the 1 st cycle of the output voltage command value of the 2 nd phase in the falling half cycle,
in the 2 nd cycle of the two consecutive cycles,
less than an average value in the 2 nd period of the output voltage command value of the 2 nd phase in a rising half period of the triangular wave and greater than an average value in the 2 nd period of the output voltage command value of the 2 nd phase in a falling half period,
the phase 3 conversion voltage command value is set to,
in the 1 st period, the first and second periods,
less than an average value in the 1 st cycle of the output voltage command value of the 3 rd phase in a rising half cycle of the triangular wave and greater than an average value in the 1 st cycle of the output voltage command value of the 3 rd phase in a falling half cycle,
in the 2 nd period, the first period is not completed,
and is greater than the average value of the output voltage command value of the 3 rd phase in the 2 nd period and is less than the average value of the output voltage command value of the 3 rd phase in the 2 nd period in the falling half period of the triangular wave.
19. The control device of an inverter according to claim 15,
the phase 2 conversion voltage command value is set to,
greater than an average value of output voltage command values of the 2 nd phase in the two cycles in the 1 st cycle of the continuous two cycles of the carrier wave,
in a 2 nd period of two consecutive periods of the carrier wave, is smaller than an average value of output voltage command values of the 2 nd phase in the two periods,
the phase 3 conversion voltage command value is set to,
less than an average value of output voltage command values of the 3 rd phase in 1 st period of two consecutive periods of the carrier wave,
and the average value of the output voltage command values of the 3 rd phase in the 2 nd period in two continuous periods of the carrier wave is larger than the average value of the output voltage command values of the 3 rd phase in the two periods.
20. The control device of an inverter according to claim 19,
the 2 nd phase conversion voltage command value is set to zero or the minimum value in the 2 nd cycle, and the 3 rd phase conversion voltage command value is set to zero or the minimum value in the 1 st cycle.
21. The control device of an inverter according to claim 19 or 20,
the carrier wave is a triangular wave.
22. The control device of an inverter according to claim 14,
the inverter is a three-phase inverter having three of the series circuits,
the control device is provided with
A voltage command value generation unit for generating the output voltage command value for each phase;
comparison means for comparing the output voltage command value of each phase with the carrier to generate the deformed PWM pulse; and
a distribution unit that generates a drive pulse for driving all the semiconductor switching elements in accordance with the modified PWM pulse,
the comparison means is configured to use, as the output voltage command value for each phase, an output voltage command value D for each phase that is a basis for outputting a target voltage from the three-phase inverter, the output voltage command value D being a predetermined period and a remaining period in one cycle of the carrier waveU、DVAnd DWConverted voltage command value D increased or decreasedUAOr DUB、DVAOr DVBAnd DWAOr DWBWherein the converted voltage command value is generated by the voltage command value generation means,
the time average value of the converted voltage command value of each phase in one cycle of the carrier wave is set to be equal to the output voltage command value of each phase as the base, respectively, and,
when an arbitrary ratio A is set for each phaseU、AVAnd AWThe conversion voltage command value D of each phaseUAAnd DUB、DVAAnd DVBAnd DWAAnd DWBAre respectively composed of
DUA=AU·DUWherein, if 1 is less than or equal to AU·DUThen D isUA=1;
DUB=2DU-DUA
DVA=AV·DVWherein, if 1 is less than or equal to AV·DVThen D isVA=1;
DVB=2DV-DVA
DWA=AW·DWWherein, if 1 is less than or equal to AW·DWThen D isWA1 is ═ 1; and
DWB=2DW-DWA
denotes that, where 0 ≦ carrier has a size ≦ 1 and 0 ≦ DU、DVAnd DW≤1。
23. The control device of an inverter according to claim 22,
the converted voltage command value for the 1 st phase among the at least two phases generated by the voltage command value generation means is set so that the output voltage of the 1 st phase in the predetermined period is equal to or greater than a time average value of the target voltage of the 1 st phase to be output in the one cycle and the output voltage of the 1 st phase in the remaining period is smaller than the time average value of the target voltage of the 1 st phase,
the converted voltage command value for the 2 nd phase of the two phases generated by the voltage command value generation means is set so that the output voltage for the 2 nd phase in the predetermined period is smaller than the time average of the target voltage for the 2 nd phase to be output in the one cycle, and the output voltage for the 2 nd phase in the remaining period is equal to or larger than the time average of the target voltage for the 2 nd phase.
24. The control device of an inverter according to claim 23,
the command value ratio, which is the ratio between the converted voltage command value and the output voltage command value as the basis in the predetermined period or the remaining period, is equal to the command value ratio in the 1 st phase and the 2 nd phase.
25. The control device of an inverter according to claim 23,
the command value ratio, which is the ratio between the converted voltage command value and the output voltage command value as the basis in the predetermined period or the remaining period, is different between the 1 st phase and the 2 nd phase.
26. The control device of an inverter according to claim 25,
has a 1 st mode and a 2 nd mode, and switches between the 1 st mode and the 2 nd mode,
the 1 st mode is a mode in which the 1 st phase conversion voltage command value is set such that the 1 st phase output voltage in the predetermined period is equal to or greater than a time average of a 1 st phase target voltage to be output in the one cycle, and the 1 st phase output voltage in the remaining period is less than the time average of the 1 st phase target voltage, and the 2 nd phase conversion voltage command value is set such that the 2 nd phase output voltage in the predetermined period is less than the time average of the 2 nd phase target voltage to be output in the one cycle, and the 2 nd phase output voltage in the remaining period is equal to or greater than the time average of the 2 nd phase target voltage,
the 2 nd mode is a mode in which the 1 st phase converted voltage command value and the 2 nd phase converted voltage command value are set such that the 1 st phase and 2 nd phase output voltages in the predetermined period are equal to or greater than a time average of the 1 st phase and 2 nd phase target voltages to be output in the one cycle, and the 1 st phase and 2 nd phase output voltages in the remaining period are smaller than the time average of the 1 st phase and 2 nd phase target voltages.
27. The control device of an inverter according to any one of claims 24 to 26,
the command value ratio is changed in accordance with the magnitude or phase angle of the output voltage of each phase or the phase angle of the output current.
28. An inverter in which a plurality of series circuits each including two semiconductor switching elements are connected in parallel to a capacitor connected in parallel to a direct-current voltage source, and a connection point between the two semiconductor switching elements is used as an alternating-current output terminal of each phase, the inverter being configured to control the switching elements using a PWM pulse generated by comparing an output voltage command value of each phase with a carrier,
the switching device includes a counter unit that is common to the respective phases, and that generates a modified PWM pulse in which the sum of pulse widths of the respective phases in a period corresponding to one or more periods of the carrier is substantially equal and the generation timing and/or generation frequency of a pulse of at least one phase is different from the estimated PWM pulse so as to exceed the degree necessary for control, based on an output of a counter unit common to the respective phases, and controls the switching element using the modified PWM pulse.
29. The inverter of claim 28,
the inverter is a three-phase inverter having three of the series circuits,
when generating the deformed PWM pulse corresponding to a period of one cycle or a plurality of cycles of the carrier, the inverter,
generating a deformed PWM pulse for phase 1 for controlling the semiconductor switching element so that the AC output voltage of phase 1 is maintained at the positive electrode potential or the negative electrode potential of the DC voltage source,
for phase 2, a phase 2 converted voltage command value for generating a modified PWM pulse having a generation timing and/or a generation frequency different from those of the estimated PWM pulse is used,
for the 3 rd phase, a 3 rd phase converted voltage command value for generating a modified PWM pulse having a generation timing and/or a generation frequency different from the estimated PWM pulse is used.
30. The inverter of claim 29,
the carrier wave is a triangular wave which is,
the phase 2 conversion voltage command value is set to be larger than an average value of the phase 2 output voltage command value in the one cycle in a rising half cycle and smaller than the average value of the phase 2 output voltage command value in the one cycle in a falling half cycle of the one cycle of the triangular wave,
the phase 3 conversion voltage command value is set to be smaller than an average value of the phase 3 output voltage command value in the rising half period and larger than the average value of the phase 3 output voltage command value in the falling half period of the one period of the triangular wave.
31. The inverter of claim 30,
the phase 2 conversion voltage command value is set to zero or minimum value in the falling half period of the triangular wave, and the phase 3 conversion voltage command value is set to zero or minimum value in the rising half period of the triangular wave.
32. The inverter of claim 29,
the carrier wave is a triangular wave which is,
the phase 2 conversion voltage command value is set to,
in the 1 st period of the two consecutive periods of the triangular wave,
is greater than the average value in the 1 st cycle of the output voltage command value of the 2 nd phase in the rising half cycle of the triangular wave and is less than the average value in the 1 st cycle of the output voltage command value of the 2 nd phase in the falling half cycle,
in the 2 nd cycle of the two consecutive cycles,
less than an average value in the 2 nd period of the output voltage command value of the 2 nd phase in a rising half period of the triangular wave and greater than an average value in the 2 nd period of the output voltage command value of the 2 nd phase in a falling half period,
the phase 3 conversion voltage command value is set to,
in the 1 st period, the first and second periods,
less than an average value in the 1 st cycle of the output voltage command value of the 3 rd phase in a rising half cycle of the triangular wave and greater than an average value in the 1 st cycle of the output voltage command value of the 3 rd phase in a falling half cycle,
in the 2 nd period, the first period is not completed,
and is greater than the average value of the output voltage command value of the 3 rd phase in the 2 nd period and is less than the average value of the output voltage command value of the 3 rd phase in the 2 nd period in the falling half period of the triangular wave.
33. The inverter of claim 29,
the phase 2 conversion voltage command value is set to,
greater than an average value of output voltage command values of the 2 nd phase in the two cycles in the 1 st cycle of the continuous two cycles of the carrier wave,
in a 2 nd period of two consecutive periods of the carrier wave, is smaller than an average value of output voltage command values of the 2 nd phase in the two periods,
the phase 3 conversion voltage command value is set to,
less than an average value of output voltage command values of the 3 rd phase in 1 st period of two consecutive periods of the carrier wave,
and the average value of the output voltage command values of the 3 rd phase in the 2 nd period in two continuous periods of the carrier wave is larger than the average value of the output voltage command values of the 3 rd phase in the two periods.
34. The inverter of claim 33,
the 2 nd phase conversion voltage command value is set to zero or the minimum value in the 2 nd cycle, and the 3 rd phase conversion voltage command value is set to zero or the minimum value in the 1 st cycle.
35. The inverter of claim 33 or 34,
the carrier wave is a triangular wave.
36. The inverter of claim 28,
the inverter is a three-phase inverter having three of the series circuits,
the inverter is also provided with
A voltage command value generation unit for generating the output voltage command value for each phase;
comparison means for comparing the output voltage command value of each phase with the carrier to generate the deformed PWM pulse; and
a distribution unit that generates a drive pulse for driving all the semiconductor switching elements in accordance with the modified PWM pulse,
the comparison means is configured to use, as the output voltage command value for each phase, an output voltage command value D for each phase that is a basis for outputting a target voltage from the three-phase inverter, the output voltage command value D being for each of a predetermined period and a remaining period within one cycle of the carrier waveU、DVAnd DWConverted voltage command value D increased or decreasedUAOr DUB、DVAOr DVBAnd DWAOr DWBWherein the converted voltage command value is generated by the voltage command value generation means,
the time average value of the converted voltage command value of each phase in one cycle of the carrier wave is set to be equal to the output voltage command value of each phase as the base, respectively, and,
when an arbitrary ratio A is set for each phaseU、AVAnd AWThe command value D of the conversion voltage of each phaseUAAnd DUB、DVAAnd DVBAnd DWAAnd DWBAre respectively composed of
DUA=AU·DUWherein, if 1 is less than or equal to AU·DUThen D isUA=1;
DUB=2DU-DUA
DVA=AV·DVWherein, if 1 is less than or equal to AV·DVThen D isVA=1;
DVB=2DV-DVA
DWA=AW·DWWherein, if 1 is less than or equal to AW·DWThen D isWA1 is ═ 1; and
DWB=2DW-DWA
denotes that, where 0 ≦ carrier has a size ≦ 1 and 0 ≦ DU、DVAnd DW≤1。
37. The inverter of claim 36,
the converted voltage command value for the 1 st phase among the at least two phases generated by the voltage command value generation means is set so that the output voltage of the 1 st phase in the predetermined period is equal to or greater than a time average value of the target voltage of the 1 st phase to be output in the one cycle and the output voltage of the 1 st phase in the remaining period is smaller than the time average value of the target voltage of the 1 st phase,
the converted voltage command value for the 2 nd phase of the two phases generated by the voltage command value generation means is set so that the output voltage for the 2 nd phase in the predetermined period is smaller than the time average of the target voltage for the 2 nd phase to be output in the one cycle, and the output voltage for the 2 nd phase in the remaining period is equal to or larger than the time average of the target voltage for the 2 nd phase.
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