CN109427929B

CN109427929B - Preparation method of PERC micro-pattern printed single crystal solar cell

Info

Publication number: CN109427929B
Application number: CN201710786330.1A
Authority: CN
Inventors: 常青; 扈静; 谢耀辉
Original assignee: Tongwei Solar Chengdu Co Ltd
Current assignee: Tongwei Solar Chengdu Co Ltd
Priority date: 2017-09-04
Filing date: 2017-09-04
Publication date: 2020-09-11
Anticipated expiration: 2037-09-04
Also published as: CN109427929A

Abstract

The invention discloses a preparation method of a PERC micro-pattern printed single crystal solar cell, which takes a single crystal silicon wafer as a base material and is prepared by the steps of texturing, diffusion, etching, annealing, back passivation, antireflection film plating, back laser grooving, printing, sintering and light attenuation reduction in sequence; the annealing step adopts oxygen-free annealing, and the back passivation step is to plate Al on the back of the silicon wafer₂O₃And SiN_XThe step of plating the antireflection film is to plate SiN on the front surface of the silicon wafer_XThe positive electrode printing step adopts screen printing, and the positive electrode printing screen adopts a mesh-free micro-pattern printing screen. According to the preparation method of the PERC micro-pattern printed single crystal solar cell, the LID of the cell can be reduced to about 1%, the power of a finished component is improved, the conversion efficiency is high, and the grade and the electrical property are obviously improved.

Description

Preparation method of PERC micro-pattern printed single crystal solar cell

Technical Field

The invention belongs to the technical field of solar cell preparation, and particularly relates to a preparation method of a PERC micro-pattern printed single crystal solar cell.

Background

With the increasing shortage of global energy, solar energy is widely regarded by countries in the world with unique advantages of no pollution, large market space and the like. The solar cell is also called a solar chip or a photovoltaic cell, and is a device for directly converting solar energy into electric energy by utilizing a photovoltaic effect, mainly comprising a crystalline silicon cell, a semiconductor cell, an inorganic cell, an organic cell and the like, wherein the crystalline silicon solar cell is dominant in the market mainstream.

The mainstream technology of crystalline silicon solar cells is perc (passivated Emitter reader cell) -Emitter and back passivated cell technology, which increases the conversion efficiency by adding a dielectric passivation layer on the back side of the cell. The passivation technology is implemented on the back of the battery, so that the internal back reflection of light on a silicon substrate is enhanced, the back recombination is reduced, the potential gradient of a P-N junction is maximally spanned, electrons flow more stably, and the electron recombination is reduced, so that the efficiency of the PERC battery is effectively improved. However, the conventional PERC cell generally has a light-to-attenuation (LID) problem, and the LID can cause the power attenuation of the component to be more than 10%.

Disclosure of Invention

In view of the above, the present invention provides a method for manufacturing a PERC micro pattern printed single crystal solar cell capable of reducing light attenuation.

In order to solve the technical problems, the technical scheme of the invention is to adopt a preparation method of a PERC micro-pattern printed single crystal solar cell, which takes a single crystal silicon wafer as a base material and is prepared by the steps of A. texturing, B. diffusing, C. etching, D. annealing, E. back passivation, F. plating an antireflection film, G. back laser grooving, H. back electrode, back electric field, positive electrode printing, I. sintering and J. light attenuation reduction in sequence; the step D of annealing adopts oxygen-free annealing, and the step E of back passivation is to plate Al on the back of the silicon chip₂O₃And SiN_XF, plating an antireflection film by plating SiN on the front surface of the silicon wafer_XH, adopting screen printing in the steps of back electrode printing, back electric field printing and positive electrode printing, and adopting a mesh-knot-free micro-pattern printing screen plate in the positive electrode printing screen plate.

Further, the j. light attenuation reducing step specifically includes the following steps:

a. placing the sintered solar cell into a light attenuation furnace;

b. heating the solar cell;

c. illuminating the solar cell;

d. cooling the solar cell;

e. and (4) discharging.

The heating temperature in the step b is 278-.

And c, adopting simulated sunlight to illuminate the solar cell in the step c, wherein the illumination intensity is 5.0-6.9SUN, and the illumination time is 38-42 seconds.

The light attenuation (LID) of the cell is greatly reduced by the light attenuation process. At present, the light attenuation of single crystal in the industry is basically more than 2%, even more, more than 3%, and after the light attenuation process, the LID of the battery piece can be reduced to about 1%, so that the power of the finished product of the component is improved. In addition, the efficiency of the battery piece before and after passing through the light source furnace is basically unchanged or has little difference, and no additional side effect is caused to the production.

Further, the b. diffusion step specifically includes the steps of:

a. putting the textured monocrystalline silicon wafer into a diffusion furnace, and introducing large nitrogen into the diffusion furnace;

b. heating the diffusion furnace chamber to a first temperature, and continuously introducing large nitrogen;

c. maintaining the furnace chamber at a first temperature, and introducing large nitrogen and oxygen into the furnace chamber to oxidize the battery piece;

d. performing low-temperature diffusion at a first temperature, and continuously introducing large nitrogen, small nitrogen and oxygen into the furnace chamber in the process;

e. heating the diffusion furnace chamber to a second temperature while propelling phosphorus atoms, and continuously introducing large nitrogen;

f. maintaining the furnace chamber at a second temperature and performing high-temperature diffusion, and continuously introducing large nitrogen, small nitrogen and oxygen into the furnace chamber in the process;

g. heating the furnace chamber of the diffusion furnace to a third temperature while propelling phosphorus atoms, and continuously introducing large nitrogen

h. Continuously propelling phosphorus atoms at a third temperature, and continuously introducing large nitrogen and oxygen into the furnace chamber in the process;

i. cooling and oxidizing while pushing phosphorus atoms, and continuously introducing large nitrogen and oxygen into the furnace chamber in the process;

j. discharging;

wherein the first temperature < the second temperature < the third temperature.

In the step a, the initial temperature of the diffusion furnace is set at 590-610 ℃, the first temperature is 770-790 ℃, the second temperature is 807-827 ℃, and the third temperature is 840-860 ℃.

In the step b, the temperature of the furnace chamber is increased to the first temperature at the speed of 0.18-0.22 ℃/s; in the step e, the temperature of the furnace chamber is increased to a second temperature at the speed of 0.18-0.22 ℃/s; step g, raising the temperature of the furnace chamber to a third temperature at the speed of 0.18-0.22 ℃/s; and (5) cooling at the speed of 0.18-0.22 ℃/s in the step i. Silicon wafers which are heated and cooled too quickly are fragile, and excessive impurities are separated out by too quick cooling and serve as trap states to capture electrons on the surfaces.

The flow rate of introducing the large nitrogen in the steps from a to i is 1800 plus 2200 ml/min. The flow rate of oxygen introduced in the step c is 80-120 ml/min; the flow rate of the oxygen introduced in the step d is 180-220 ml/min; the flow rate of the oxygen introduced in the step f is 180-220 ml/min; the flow rate of the oxygen introduced in the step h is 180-220 ml/min; the flow rate of the oxygen introduced in the step i is 180-220 ml/min; the purpose of oxygen introduction in steps c, d and f is different, so that the required oxygen introduction amount is different. The purpose of step c is to form a very thin layer of sio2 to make the subsequent diffusion more uniform. And (f) taking oxygen in the steps d and f as a reaction gas for generating a phosphorus source, wherein the reaction formula is as follows:

4POCL₃+3O₂＝2P₂O₅+6CL₂

2P₂O₅+5Si＝5SiO₂+4P

the purpose of introducing oxygen in step f is to form SiO₂Reacts with the excess phosphorus heavily doped at the surface.

The flow rate of introducing the small nitrogen in the step d is 180-220 ml/min; and f, introducing small nitrogen at the flow rate of 80-120 ml/min. And d, step h, gradually reducing the introduced small nitrogen amount until the small nitrogen amount in the step h is zero, so as to reduce the doping concentration of P atoms on the surface.

The time for introducing oxygen to carry out oxidation in the step c is 180-220 s; the time for low-temperature diffusion in the step d is 480-520 s; the time of high-temperature diffusion in the step f is 280-320 s; the time for phosphorus atom propulsion in step h is 180-220 s.

The solar cell needs a large-area PN junction to realize conversion from light energy to electric energy, and the diffusion furnace is a special device for manufacturing the PN junction of the solar cell. The tubular diffusion furnace mainly comprises an upper loading part and a lower loading part of a quartz boat, an exhaust gas chamber, a furnace body part, a gas holder part and the like. The diffusion is generally carried out by using a liquid source of phosphorus oxychloride as a diffusion source. The P-type silicon chip is placed in a quartz container of a tubular diffusion furnace, phosphorus oxychloride is brought into the quartz container by using nitrogen at the high temperature of 850-900 ℃, and phosphorus atoms are obtained by the reaction of the phosphorus oxychloride and the silicon chip. After a certain period of time, phosphorus atoms enter the surface layer of the silicon wafer from the periphery, and permeate and diffuse to the interior of the silicon wafer through gaps among the silicon atoms to form an interface of the N-type semiconductor and the P-type semiconductor, namely a PN junction. The PN junction manufactured by the method has good uniformity, the non-uniformity of the square resistance is less than ten percent, and the minority carrier lifetime can be longer than 10 ms. Manufacturing PN junctions is the most basic and critical process for solar cell production. Because it is the formation of the PN junction that the electrons and holes do not return to their original positions after flowing, a current is formed and is drawn by a wire, i.e., a direct current.

The diffusion is an important process in the production process of the crystalline silicon solar cell, the surface of the crystalline silicon solar cell is uniformly doped by the traditional diffusion process, in order to reduce contact resistance and improve the load capacity of the cell, the surface doping concentration of the solar cell is higher, but the energy band shrinkage of a diffusion region, lattice distortion, defect increase, "dead layer" is obvious and the short wave response of the cell is poor due to overhigh surface impurity concentration; in order to obtain a high-efficiency crystalline silicon solar cell with good short-wave response, the diffusion of the crystalline silicon wafer develops towards the direction of high sheet resistance. The diffusion method of the crystalline silicon solar cell adopted at present comprises the following steps: the method comprises the following steps of placing a crystalline silicon wafer into a horizontal diffusion furnace cavity, introducing mixed gas, wherein the mixed gas is formed by mixing nitrogen and phosphorus oxychloride in proportion, diffusing the crystalline silicon wafer under a normal pressure state, and obtaining the crystalline silicon wafer with poor uniformity of surface square resistance after diffusion processing.

By adopting the diffusion process, the invention carries out low-temperature and high-temperature diffusion twice, and carries out temperature rise and temperature reduction twice aerobic propulsion, thereby reducing the impurity concentration on the surface of the silicon wafer, improving the uniformity of diffusion, improving the light absorption rate of the solar cell and further improving the conversion efficiency of the solar cell. Through low-temperature and high-temperature two-stage diffusion and propelling of the interval between the two-stage diffusion, P atoms are pushed into the PN junction from the surface, and the surface P concentration is reduced as much as possible. In contrast, the diffusion and propulsion methods of the prior art are higher in surface concentration of P atoms than the present invention. The high concentration of P atoms forms a dead layer on the surface, capturing electrons, and reducing the photoelectric conversion efficiency of the cell. Compared with the prior art, the method provided by the invention has the advantages that the diffusion of impurities and phosphorus atoms from the surface of the silicon wafer to the interior of the silicon wafer are ensured, and simultaneously, the problems that the diffusion of the impurities and the removal of phosphorosilicate glass are influenced due to the fact that a silicon dioxide layer on the surface of the silicon wafer is too thick are solved. In addition, the invention also has the following advantages of 1, more uniform PN junction; 2. the silicon wafer interval in the single tube furnace can be small, and the yield is higher; 3. and the source and the gas are saved.

Further, the d. annealing step of the present invention specifically includes the steps of:

a. placing the etched monocrystalline silicon wafer cell into an annealing furnace, and introducing large nitrogen into a furnace tube of the annealing furnace, wherein the flow of the introduced large nitrogen is 1500ml/min-3500 ml/min;

b. raising the temperature in the annealing furnace tube to a temperature I at 290-;

c. maintaining the temperature I and the pressure I for 890-910 s;

d. reducing the temperature in the furnace tube of the annealing furnace to the temperature II within 140-;

e. increasing the pressure in the furnace tube of the annealing furnace to normal pressure within 90-110 s;

f. and (4) discharging.

In the prior art, the monocrystalline silicon solar cell has uneven diffusion and higher surface concentration. And the single crystal silicon is easy to form lattice distortion after high-temperature diffusion. Therefore, an annealing process is added after texturing, diffusion and etching, the annealing function plays a role in phosphorus propulsion on one hand, the surface concentration of phosphorus is reduced, a dead layer is reduced, and the electric performance is mainly embodied as obvious UOC advantage; on the other hand, the distorted crystal lattice can be recovered in the diffusion process.

The existing annealing process mainly adopts a one-step oxygen introduction method, and oxygen is a main impurity in the silicon wafer. Too high an oxygen content increases defects in the wafer, reduces conversion efficiency and increases light induced degradation.

The invention adopts an anaerobic annealing process, carries out phosphorus atom propulsion by annealing, and recovers distorted lattices in the diffusion process. Oxygen does not participate in the annealing process, so that new impurities generated by the reaction of the oxygen and the silicon wafer are avoided. And when the distorted crystal lattice is recovered in the diffusion process by annealing, the propulsion of phosphorus atoms is continued, the surface concentration of the phosphorus atoms is reduced, dead layers are reduced, and the electrical property is improved. More importantly, no oxygen is involved in the annealing process, so that the phenomenon that the performance of the cell is affected by impurities generated by reaction of oxygen with phosphorus and silicon is avoided.

Furthermore, the screen printing plate used for positive electrode printing in the silk-screen printing is a non-mesh-knot micro-pattern printing screen printing plate, and comprises a screen frame and a screen yarn which is fixedly connected in the screen frame in a stretching way, wherein the screen yarn is formed by weaving a plurality of warps and wefts, each warp and weft in the screen yarn are respectively parallel or perpendicular to the screen frame, a printing area and a non-printing area are arranged on the screen yarn, the pattern of the printing area comprises a plurality of auxiliary grid line holes which are distributed at intervals in parallel and are used for printing auxiliary grid lines, a plurality of main grid line holes which are distributed at intervals in parallel and are used for printing main grid lines, and a peripheral frame line hole which is used for printing peripheral frame lines, each auxiliary grid line hole is positioned between two adjacent wefts, each main grid line hole is communicated with the plurality of auxiliary grid line holes, the main grid line holes and the auxiliary grid line holes are mutually perpendicular, and a plurality of micro patterns which cannot be penetrated by conductive silver, the peripheral frame line holes are arranged around the main grid line holes and the auxiliary grid line holes, and the peripheral frame line holes are wavy or zigzag. The shape of the micro pattern can be various patterns such as circle, rectangle, triangle, square, diamond, polygon and the like, and the arrangement mode of the micro pattern on the main grid line hole is various arrangement modes such as parallel, interval and the like.

Preferably, the screen frame is made of aluminum alloy.

Preferably, the warp and weft of the gauze are made of stainless steel or nickel-based alloy.

Preferably, the diameter of the warp or weft of the mesh yarn is 16 mm.

Preferably, the mesh number of the net yarn is 325 meshes.

Preferably, the number of the auxiliary grid holes in the screen printing area is 90-130.

Preferably, the width of any one auxiliary grid hole in the screen printing area is 20-35 mu m.

Preferably, the distance between adjacent auxiliary grid holes in the screen printing area is 1.0-2.0 mm.

Preferably, the width of any main grid hole in the screen printing area is 0.4-1.5 mm.

Preferably, the ratio of the total area of the micro patterns on the main grid holes to the area of the main grid holes is 25-45%.

According to the invention, the zero-degree mesh opening technology is adopted for positive electrode printing, mesh knots can be effectively avoided at the auxiliary grid, and the problems that in the prior art, the mesh knots formed by warps and wefts on a mesh cloth seriously influence the passing of printing slurry, the printing line type uniformity is poor, the mesh is easy to block, the lines and patterns are lost to form virtual prints and broken grids, the grid line width cannot be too narrow and the like are solved; meanwhile, the line type of the positive electrode frame adopts a wave or sawtooth type, so that the shielding of the warp and weft is avoided, and the problem that the frame line is easy to be printed falsely due to the shielding of the warp and weft is solved; the main grid line hole is additionally provided with a plurality of micro patterns, namely, the main grid line is coated with emulsion with a certain pattern, the emulsion plays a role in supporting in the imprinting process and can increase the ink penetration amount, and the space of the position can be filled after the surrounding slurry collapses due to the fact that the area of the position with the emulsion is very small, so that smoothness of the electrode main grid line is guaranteed. The screen printing method has the advantages that the obstruction of screen knots and the shielding of warps and wefts are avoided, the ink permeability can be increased by more than 20%, the printing is smoother, the printing linearity is smoother, the phenomena of grid breakage, main grid virtual printing and frame virtual printing are reduced, the auxiliary grids are thinned, the line width of the screen printing plate and the auxiliary grids is the thinnest and can reach 20 micrometers, the height-width ratio is large, the light-shielding area of grid lines is reduced, and the grade and the electrical property of the solar cell piece are improved.

In conclusion, the preparation method of the PERC micro-pattern printed single crystal solar cell provided by the invention can reduce the LID of the cell to about 1%, improve the power of the finished component, and has high conversion efficiency and obviously improved grade and electrical property.

Drawings

FIG. 1 is a schematic structural diagram of a non-network-knot micro-pattern printing screen according to the present invention;

FIG. 2 is an enlarged view of A in FIG. 1 (the border line is wavy);

FIG. 3 is an enlarged view of A in FIG. 1 (the frame lines are zigzag);

FIG. 4 is an enlarged schematic view of B in FIG. 1;

FIG. 5 is a graph of LID versus conveyor belt travel speed after 25KWH illumination;

FIG. 6 is a graph of LID versus temperature after 25KWH illumination;

FIG. 7 is a graph of data from experiment I;

FIG. 8 is a graph of data from experiment II.

Illustration of the drawings:

1-screen frame, 2-screen gauze, 3-printing area, 4-non-printing area and 5-micro pattern; 21-warp, 22-weft; 31-auxiliary grid line hole, 32-main grid line hole and 33-frame line hole.

Detailed Description

In order to make the technical solutions of the present invention better understood by those skilled in the art, the present invention will be further described in detail with reference to the accompanying drawings and preferred embodiments. It should be noted that the following preferred embodiments should not be construed as limiting the invention, which is to be limited only by the scope of the appended claims. It will be apparent to those skilled in the art that various modifications and adaptations can be made without departing from the spirit and scope of the invention, and these modifications and adaptations should be considered within the scope of the invention.

The invention provides a preparation method of a PERC micro-pattern printed single crystal solar cell, which takes a single crystal silicon wafer as a base material and comprises the following steps:

A. texturing-the preparation of the monocrystalline silicon texture is to form millions of tetrahedral square pyramids, i.e. pyramid structures, on each square centimeter of silicon surface by utilizing the anisotropic etching of silicon. Due to multiple reflection and refraction of incident light on the surface, the absorption of light is increased, and the short-circuit current and the conversion efficiency of the cell are improved. The anisotropic etching solution for silicon is usually a hot alkaline solution, and the usable bases include sodium hydroxide, potassium hydroxide, lithium hydroxide, ethylenediamine, and the like. The suede silicon is mostly prepared by cheap sodium hydroxide dilute solution with the concentration of about 1 percent, and the corrosion temperature is 70-85 ℃. In order to obtain uniform suede, alcohols such as ethanol and isopropanol are added into the solution as complexing agents in a proper amount so as to accelerate the corrosion of silicon. Before preparing the textured surface, the silicon wafer needs to be subjected to primary surface corrosion, a mechanical damage layer is removed, and after the textured surface is corroded, general chemical cleaning is carried out. The etching depth is controlled to be 2.8-3.5 um. The silicon wafers prepared on the surface are not suitable for long-term storage in water to prevent contamination and should be diffused and sintered as soon as possible.

B. The diffusion-specifically comprises the following steps:

(1) putting the cell into a diffusion furnace, and introducing large nitrogen into the diffusion furnace; the initial temperature of the diffusion furnace was set at 590-610 ℃ before placing the cell pieces. The cells are preferably placed back-to-back in a quartz boat, which is placed in a diffusion furnace. The large nitrogen is introduced into the furnace chamber at 1800-2200ml/min for adjusting the reaction pressure, so that the pressure in the furnace chamber of the diffusion furnace is kept at 140mbar in 100-140mbar during the reaction.

(2) Heating the diffusion furnace chamber to a first temperature, and continuously introducing large nitrogen; in the step, the temperature of the furnace chamber is raised to 770-790 ℃ at the speed of 0.18-0.22 ℃/s, and large nitrogen is continuously introduced into the furnace chamber at 1800-2200ml/min, so that the pressure in the furnace chamber is maintained at 100-140 mbar.

(3) Maintaining the furnace chamber at a first temperature, and introducing large nitrogen and oxygen into the furnace chamber to oxidize the battery piece; in the step, the time for introducing oxygen to carry out oxidation is 180-220 s; the flow rate of oxygen is 80-120 ml/min; the flow rate of the large nitrogen is 1800-2200 ml/min. The pressure in the chamber was maintained at 100-. The purpose of this step is to form a uniform oxide layer on the surface of the cell, so that the subsequent diffusion is more uniform.

(4) Performing low-temperature diffusion at a first temperature, and continuously introducing large nitrogen, small nitrogen and oxygen into the furnace chamber in the process; a layer of SiO containing phosphorus is formed on the surface of the battery piece₂And (3) a layer. In the step, low-temperature diffusion is carried out at 770-790 ℃, and the time of the low-temperature diffusion is 480-520 s; the flow of the small nitrogen is 180-; the flow rate of the oxygen is 180-220 ml/min; the flow rate of the large nitrogen is 1800-2200 ml/min. The pressure in the chamber was maintained at 100-. POCl₃Decomposing at a temperature of more than 600 ℃ to form phosphorus pentachloride (PCl)₅) And phosphorus pentoxide (P)₂O₅) (ii) a Generated P₂O₅React with silicon at diffusion temperatures to form silicon dioxide (SiO)₂) And a phosphorus atom. POCl₃When thermally decomposed, if there is no external oxygen (O)₂) Generated PCl is not sufficient to participate in decomposition₅Is not easy to decompose, has corrosion effect on silicon and damages the surface state of the silicon wafer. But in the presence of foreign O₂In the presence of PCl₅Will be further decomposed into P₂O₅And chlorine (Cl) is discharged₂). Generated P₂O₅Further reacts with silicon to form SiO₂And phosphorus atom, from which it can be seen that in order to promote POCl, phosphorus is diffused₃Sufficient decomposition and avoidance of PCl₅The corrosion to the surface of the silicon wafer needs to be carried out by introducing a certain flow of oxygen while introducing nitrogen. In the presence of oxygen, POCl₃P produced by decomposition₂O₅Deposited on the surface of a silicon wafer, P₂O₅Reaction with silicon to form SiO₂And phosphorus atoms, forming a layer of phosphorus-silicon glass on the surface of the silicon wafer, and then diffusing the phosphorus atoms into the silicon.

(5) Heating the diffusion furnace chamber to a second temperature while propelling phosphorus atoms, and continuously introducing large nitrogen; the temperature is raised while the propulsion is carried out. In the step, the temperature of the furnace chamber is increased to 807-; the flow rate of the large nitrogen is 1800-2200 ml/min. The pressure in the chamber was maintained at 100-.

(6) Maintaining the furnace chamber at a second temperature and performing high-temperature diffusion, and continuously introducing small nitrogen and oxygen into the furnace chamber in the process; in the step, high-temperature diffusion is carried out at 807-827 ℃, and the time of the high-temperature diffusion and the low-temperature diffusion is 280-320s s; the flow rate of introducing the small nitrogen is 80-120 ml/min; the flow rate of the oxygen is 180-220 ml/min; the flow rate of the large nitrogen is 1800-2200 ml/min. The pressure in the chamber was maintained at 100-.

(7) Heating the diffusion furnace chamber to a third temperature while propelling phosphorus atoms, and continuously introducing large nitrogen; in this step, the temperature of the furnace chamber is raised to 840-860 ℃ at a rate of 0.18-0.22 ℃/s. The flow rate of the large nitrogen is 1800-2200 ml/min. The pressure in the chamber was maintained at 100-.

(8) Continuously propelling phosphorus atoms at a third temperature, and continuously introducing large nitrogen and oxygen into the furnace chamber in the process; in this step, the phosphorus atom is continuously pushed for 180-220s at 840-860 ℃. The flow rate of the oxygen is 180-220 ml/min; the flow rate of the large nitrogen is 1800-2200 ml/min. The pressure in the chamber was maintained at 100-. At high temperature, P atoms with high surface concentration can be diffused into the matrix, and the surface dead layer is reduced. The purpose of the oxygen being the SiO formed₂Reacts with the surface heavily doped to remove excess P to form PSG (phosphosilicate glass) which can subsequently be washed away with acid.

(9) Cooling and oxidizing while pushing phosphorus atoms, and continuously introducing large nitrogen and oxygen into the furnace chamber in the process; cooling to room temperature at a speed of 0.18-0.22 ℃/s, wherein the flow of the oxygen is 180-; the flow rate of the large nitrogen is 1800-2200 ml/min. The pressure in the chamber was maintained at 100-.

(10) And (4) discharging. Throughout the process, the first temperature < the second temperature < the third temperature.

The invention adopts the modes of low-temperature diffusion, high-temperature diffusion, heating propulsion, high-temperature continuous propulsion and finally cooling oxidation and propulsion at the same time. During low-temperature diffusion, phosphorus atoms are accumulated on the surface of the silicon wafer, at the moment, grain boundary diffusion plays a main role, impurity atoms can escape through a grain boundary and dislocation 'pipeline', but the impurity absorption effect is not obvious; and in the second step of high-temperature diffusion, the metal precipitate and the metal complex can be quickly and effectively dissolved, so that impurity atoms are changed into interstitial atoms capable of quickly moving from different forms, but at the high temperature, the segregation coefficients in the polycrystalline silicon substrate and the heavy phosphorus diffusion region are not greatly different, so that further high-temperature propulsion is needed, and finally, the temperature is reduced to increase the driving force for gettering (at the moment, the segregation coefficients of the metal in different regions are greatly different), and finally, the purpose of improving the raw materials is achieved.

The following is the sheet resistance data after diffusion according to the above method and conventional scheme.

C. Etching-since during diffusion, even if back-to-back diffusion is used, all surfaces of the wafer, including the edges, will inevitably be diffused with phosphorus. Photo-generated electrons collected by the front surface of the PN junction can flow to the back surface of the PN junction along the region with phosphorus diffused at the edge, and a short circuit is caused. Therefore, the doped silicon at the periphery of the solar cell must be etched to remove the PN junction at the edge of the cell. This is typically done using plasma etching techniques. In the plasma etching, under the low-pressure state, precursor molecules of the reaction gas CF4 are excited by radio-frequency power to generate ionization and form plasma. The plasma is composed of charged electrons and ions, and the gas in the reaction cavity can absorb energy and form a large number of active groups under the impact of the electrons and the energy is converted into the ions. The active reaction groups reach the surface of SiO2 due to diffusion or under the action of an electric field, and chemically react with the surface of the etched material, and form volatile reaction products which are separated from the surface of the etched material and are pumped out of the cavity by a vacuum system.

D. Annealing-the oxygen-free annealing process employed in the present invention comprises the following steps.

(1) Putting the battery piece into an annealing furnace; pushing the battery piece into a furnace tube of an annealing furnace, introducing large nitrogen into the furnace tube, wherein the flow rate of the large nitrogen is 1500-3500 ml/min, and simultaneously preheating the furnace tube to 640-660 ℃. The purpose of introducing the large nitrogen is to extrude the air in the furnace pipe and reduce the oxygen content in the furnace pipe as much as possible.

In order to ensure throughput during the production process, the furnace is typically maintained at a temperature of 600 ℃ in the non-annealed state. This reduces the time required to raise the temperature (e.g., to 740 c).

The large nitrogen flow may be in the range 1500ml/min-3500ml/min, the purpose of limiting the large nitrogen flow in step a is to vent the air in the chamber as quickly as possible. When the flow is too small, the air discharge speed is slow, and when the flow is too large, the air discharge speed is unnecessary, so that waste is caused.

(2) Raising the temperature in the furnace tube of the annealing furnace to a temperature I, and pumping vacuum to a pressure I; the temperature of the furnace tube is raised to 740-760 ℃ in 290-310s, and the vacuum is pumped so that the pressure in the furnace tube is 160-180 mPA. The vacuum facilitates uniform heat transfer within the furnace tube and further reduces the oxygen content. In the step B, nitrogen introduction and vacuum pumping exist at the same time, and impurity gas separated out in the annealing process when the flow of large nitrogen is too small cannot be discharged in time, so that waste is caused when the flow of large nitrogen is too large.

(3) Keeping the temperature I and the pressure I; 890-. The phosphorus atoms are diffused at a high temperature, which is around 850 ℃. High-temperature diffusion can quickly and effectively dissolve metal precipitates and metal complexes to change impurity atoms from different forms into interstitial atoms capable of moving quickly, but at high temperature, the segregation coefficients of a polycrystalline silicon substrate and a heavy phosphorus diffusion region are not greatly different, so that the driving force for gettering needs to be increased through cooling annealing (at the moment, the segregation coefficients of metals in different regions are greatly different), and finally the purpose of improving raw materials is achieved. In addition, the crystal lattice distorted in the diffusion process can be recovered by cooling annealing. Because the air is exhausted and the vacuum is extracted in the previous step, oxygen atoms are prevented from entering the inner part of the cell to generate recombination centers, and the performance of the cell is reduced.

(4) Reducing the temperature in the furnace tube of the annealing furnace to a temperature II; the temperature in the furnace tube is reduced to 640-660 ℃ in 140-160 s. The nitrogen charging in the step D is to increase the pressure to normal pressure.

(5) Raising the pressure in the furnace tube of the annealing furnace to normal pressure; the pressure in the furnace tube is increased from 160-180mPA to the normal pressure within 90-110s, and the normal pressure is about 1031 mPA.

(6) And (4) discharging. d

The lower table is a comparison of the electrical properties of the cell before and after annealing.

As can be seen from the table, after the annealing is carried out by the process, the electrical properties of the battery piece in all aspects are better than those before the annealing.

D. Back passivation-deposition of Al using ALD apparatus₂O₃Atomic layer deposition (ald) is a method by which a substance can be deposited on a substrate surface layer by layer as a monoatomic film. Atomic layer deposition is similar to ordinary chemical deposition. However, in an atomic layer deposition process, the chemical reaction of a new atomic film is directly related to the previous one in such a way that only one layer of atoms is deposited per reaction. ALD Al₂O₃Has negative bound charges and is particularly suitable for passivating the surface of a p-type silicon wafer.

E. Plating an antireflection film, namely, the reflectivity of the silicon surface after texturing is about 20%, and in order to further reduce the surface reflection and improve the conversion efficiency of the battery, a layer of silicon nitride antireflection film needs to be deposited. At present, PECVD equipment is often adopted in industrial production to prepare the antireflection film. PECVD is plasma enhanced chemical vapor deposition. Its technical principle is that low-temp. plasma is used as energy source, the sample is placed on the cathode of glow discharge under low pressure, the sample is heated to a predefined temp. by means of glow discharge, then a proper quantity of SiH reaction gas is introduced₄And NH₃The gas undergoes a series of chemical reactions and plasma reactions to form a solid film, i.e., a silicon nitride film, on the surface of the sample. Typically, such plasma enhanced chemistry is usedThe thickness of the film deposited by the vapor deposition method is about 70nm-90 nm. Films of such thickness have optical functionality. By using the principle of thin film interference, the reflection of light can be greatly reduced, the short-circuit current and the output of the battery can be greatly increased, and the efficiency can be greatly improved.

F. Back laser grooving-Al₂O₃The back passivated cell is different from the conventional cell in that a layer of Al is plated on the surface of a silicon wafer₂O₃Passivation of the back surface of the film, Al₂O₃And plating a layer of SiN film on the outer surface of the film, and then slotting the back surface of the silicon wafer by using laser. Due to Al₂O₃The film and the SiN film are insulating layers which cannot conduct electricity, and the laser mainly acts on the Al on the back surface₂O₃The film and the SiN film are cut to expose the silicon substrate, so that the silicon substrate can form good ohmic contact with the aluminum back field after the back electric field printing and sintering are completed.

G. The back electrode, the back electric field and the positive electrode are printed, and the method specifically comprises the following steps:

(1) printing a back electrode: printing a metal strip with the thickness of 20 mu m and the width of 4mm by adopting silver-aluminum paste;

(2) printing an aluminum back surface field: adopting aluminum paste, printing the aluminum paste with the thickness of 20 mu m, and preventing the silicon wafer from being excessively bent, and forming aluminum balls in the sintering process and forming aluminum bulges on the back of the battery;

(3) printing a positive electrode: the non-mesh-knot printing screen for micro patterns comprises a screen frame 1 and a screen 2 connected and fixed in the screen frame 1, wherein the screen 2 is woven by a plurality of warps 21 and wefts 23, each warp 21 and each weft 22 in the screen 2 are respectively parallel or perpendicular to the screen frame 1, a printing area 3 and a non-printing area 4 are arranged on the screen 2, the pattern of the printing area 3 comprises a plurality of sub-grid holes 31 distributed at intervals in parallel for printing sub-grid lines, a plurality of main grid holes 32 distributed at intervals in parallel for printing main grid lines and a peripheral frame line hole 33 for printing peripheral frame lines, the sub-grid holes 31 are positioned between two adjacent wefts 22, each main grid hole 32 is communicated with the plurality of sub-grid holes 31, the main grid holes 32 are perpendicular to the sub-grid holes 31, each main grid line hole 32 is provided with a plurality of tiny patterns 5 which cannot be penetrated by conductive silver paste, a peripheral frame line hole 33 is arranged around the main grid line hole 32 and the auxiliary grid line hole 31, and the peripheral frame line hole 33 is wavy or zigzag.

The shape of the micro pattern 5 may be a plurality of patterns such as a circle, a rectangle, a triangle, a square, a diamond, a polygon, etc., and the arrangement manner of the micro pattern on the main grid line hole is a plurality of arrangement manners such as a parallel arrangement manner, an interval arrangement manner, etc. Fig. 4 shows a case where the minute patterns are rectangular and arranged in parallel with each other.

Preferably, the material of the net frame 1 is aluminum alloy.

Preferably, the warp 21 and weft 22 of the gauze are made of stainless steel or nickel-based alloy.

Preferably, the diameter of the warp 21 or weft 22 of the mesh yarn is 16 mm.

Preferably, the mesh number of the net yarn 2 is 325 meshes.

Preferably, the number of the auxiliary grid holes 31 in the screen printing area is 90-130.

Preferably, the width of any one of the secondary grid holes 31 in the screen printing area is 20-35 μm.

Preferably, the distance between adjacent auxiliary grid holes 31 in the screen printing area is 1.0-2.0 mm.

Preferably, the width of any main grid hole 32 in the screen printing area is 0.4-1.5 mm.

Preferably, the ratio of the total area of the micro patterns on the main grid holes to the area of the main grid holes (i.e. the hollow-out rate of the main grid holes) is between 25% and 45%.

The screen printing plate is made up through stretching the screen cloth by a certain tension, adhering it to the frame, coating photosensitive glue on the screen cloth after removing oil and impurities, solidifying, developing and washing to form the pattern on the printing area, and coating the latex on the holes of main grid line. The emulsion plays a supporting role in the imprinting process, the ink penetration amount can be increased, and as the area of the place with the emulsion is very small, the gap of the place can be filled after the surrounding slurry collapses, so that the smoothness of the electrode main grid line is ensured.

H. Sintering-the paste printed on the substrate is formed into a thick film conductor by a sintering process, the sintering parameters and equipment being selected with reference to the prior art.

I. The light attenuation step-comprises the following steps:

(1) placing the sintered solar cell into a light attenuation furnace; and conveying the solar cell to a light attenuation furnace by adopting a conveying belt. The traveling speed of the conveyer belt is 6000 and 6500 mm/min.

(2) Heating the solar cell; the heating temperatures are 278-282 ℃ and 293-295 ℃.

(3) Illuminating the solar cell; the solar cell is irradiated by simulated sunlight, the light intensity of the irradiation is 5.0-6.9SUN, and the irradiation time is 38-42 seconds.

(4) And cooling the solar cell.

(5) And (4) discharging.

The light attenuation furnace is used for ventilation, including air supply and air draft. The rotating speed of the fan for air supply is 2100-2500 rpm. The rotating speed of the draught fan is 1300-1700 rpm.

It is generally accepted in the industry that light attenuation (LID) < 2% is acceptable.

The boron-doped solar cell can form boron-oxygen complex in the body, and the boron-oxygen complex can reduce minority carrier lifetime, thereby reducing the efficiency of the cell. If the light attenuation process is utilized, the cell passes through a light source furnace after being printed and sintered, and the illumination treatment is carried out on the cell at a certain temperature, the hydrogen passivation effect of the cell can be enhanced under the annealing environment, the influence of a boron-oxygen complex on reducing the minority carrier lifetime is reduced, so that the light attenuation of the solar cell is reduced, and the effect that the efficiency of the cell is almost the same before and after the light source furnace can be ensured.

According to the invention, the light attenuation furnace is added in the sintering furnace of the screen printing section, so that the process operation is stable. The operating parameters of the light attenuation furnace are adjusted by combining equipment hardware and plant facilities, so that the light attenuation (LID) after passing through a light source is greatly reduced. At present, the light attenuation of the single crystal in the industry is basically more than 2%, even more, more than 3%, and after the light attenuation process is carried out by a light source furnace, the LID of the battery plate can be reduced to be about 1%, so that the power of a finished component product is improved. In addition, the efficiency of the cell before and after the light-passing attenuation furnace is basically unchanged or slightly different, and no additional side effect is produced.

We verify the LID enhancement by the process provided by the present invention through experiments.

Fig. 5 to 6 show the relationship between LID and the speed (hereinafter referred to as belt speed) and temperature of the conveyor belt after 25KWH illumination. The experiments were performed in duplicate and averaged.

From fig. 5 we can see that the LID is proportional to the tape speed and that at 6000-.

As can be seen from FIG. 6, LID is waved and is lower in the interval 278 ℃ and 282 ℃ and 293 ℃ and 295 ℃, the lowest value occurring at 280 ℃.

Fig. 7 is a graph of experimental I light intensity, LID, and belt speed 6000/6500. Wherein BL is the control group, the light attenuator with the maximum illumination intensity of 10SUN is selected, Y axis is LID, and X axis is the percentage of the maximum illumination intensity. From fig. 7 we can see that BL efficiency decays around 2%; the attenuation after passing through the LID furnace is obviously reduced by about 1 percent. The belt speed is 6000: the efficiency behind the LID is less attenuated at

light sources

54, 63, 69. Belt speed 6500: the efficiency behind the LID is less attenuated at

light sources

51, 57, 63, 69.

FIG. 8 is a graph showing the results of experiment II. Wherein BL is a control group without the light attenuation reduction process. The Y-axis is LID and the X-axis is the percentage of maximum illumination intensity (10 SUN). The lowest efficiency decay of about 1.29% for the light source 66 at LID 8KWH (and no decay in efficiency after LID furnace), we can determine the preferred parameters: light source intensity 66/tape speed 6500/temperature 280.

Next, we verify the influence of the non-network-junction micro-pattern printing screen plate provided by the present invention on the width of the grid line through experiments.

The experiment selects 156mm single crystal silicon wafer, the thickness is 200 μm, the resistivity is 1-3 omega silicon wafer 600 pieces of the same batch, according to the "making hair-diffusion-etching-annealing-back passivation-plating antireflection coating-back laser grooving-back electrode, back electric field, positive electrode printing-sintering-light attenuation" craft that the invention provides make the solar cell piece, the difference is that this 600 silicon wafers are divided into three groups each 200 pieces at random, choose the same printing line to print, carry on the sintering test by the same sintering furnace and tester, the concrete data are shown in the following table. Wherein the printing screen of the test 1 is the non-mesh micro-pattern printing screen of the invention, and the hollow-out rate of the main grid hole is 25%; the printing screen of the test 2 is the non-mesh-knot micro-pattern printing screen, and the hollow rate of the main grid line hole is 45 percent; the printing screen for run 3 was a conventional 22.5 ° diagonal screen.

TABLE 1 height and width of secondary grid line of battery piece

	Line width (mum)	Line height (mum)	Aspect ratio
				Test 1	46.66	18.53	39.7％
Test
	2	47.77	18.69	39.1％
Test
	3	50.84	16.36	32.2％

TABLE 2 Battery piece Electrical Performance data

As can be seen from the above table, the line type of the secondary grid lines printed by the screen printing plate without the screen knots is narrower in width, larger in thickness and obviously improved in aspect ratio compared with the conventional screen printing plate, so that the short-circuit current of the cell is improved, the conversion efficiency is also improved compared with the conventional screen printing plate, and the solar cell printed by the screen printing plate is more excellent in electrical property.

Claims

1. A preparation method of a PERC micro-pattern printed single crystal solar cell is characterized by comprising the following steps: the preparation method comprises the following steps of A, texturing, B, diffusion, C, etching, D, annealing, E, back passivation, F, antireflection film plating, G, back laser grooving, H, back electrode, back electric field, positive electrode printing, I, sintering and J, light attenuation; the step D of annealing adopts oxygen-free annealing, and the step E of back passivation is to plate Al on the back of the silicon chip₂O₃And SiN_XF, plating an antireflection film by plating SiN on the front surface of the silicon wafer_XH, adopting screen printing in the steps of back electrode printing, back electric field printing and positive electrode printing, and adopting a mesh-knot-free micro-pattern printing screen plate in the positive electrode printing screen plate;

the step of reducing light attenuation further comprises the following steps:

a. placing the sintered solar cell into a light attenuation furnace;

b. heating the solar cell at 278-282 ℃ and 293-295 ℃;

c. adopting simulated sunlight to illuminate the solar cell, wherein the illumination intensity is 5.0-6.9SUN, and the illumination time is 38-42 seconds;

d. cooling the solar cell;

e. discharging;

the step of B, diffusing comprises the following steps:

a. placing the textured monocrystalline silicon wafer into a diffusion furnace, setting the initial temperature of the diffusion furnace at 590-;

b. heating the diffusion furnace chamber to a first temperature at the speed of 0.18-0.22 ℃/s, and continuously introducing large nitrogen, wherein the flow rate of the large nitrogen is 1800-2200 ml/min;

c. maintaining the furnace chamber at a first temperature, and introducing large nitrogen and oxygen into the furnace chamber to oxidize the battery piece for 180-;

d. performing low-temperature diffusion at a first temperature for 480-;

e. heating the diffusion furnace chamber to a second temperature at the speed of 0.18-0.22 ℃/s, simultaneously propelling phosphorus atoms, and continuously introducing large nitrogen, wherein the flow rate of introducing the large nitrogen is 1800-;

f. maintaining the furnace chamber at the second temperature and performing high-temperature diffusion for 280 plus 320 seconds, wherein large nitrogen, small nitrogen and oxygen are continuously introduced into the furnace chamber in the process, the flow rate of introducing the large nitrogen is 1800 plus 220ml/min, the flow rate of introducing the small nitrogen is 80-120ml/min, and the flow rate of introducing the oxygen is 180 plus 220 ml/min;

g. heating the diffusion furnace chamber to a third temperature at the speed of 0.18-0.22 ℃/s, simultaneously propelling phosphorus atoms, and continuously introducing large nitrogen, wherein the flow rate of introducing the large nitrogen is 1800-;

h. continuously pushing phosphorus atoms for 180-;

i. cooling and oxidizing at the speed of 0.18-0.22 ℃/s while propelling phosphorus atoms, continuously introducing large nitrogen and oxygen into the furnace chamber in the process, wherein the flow rate of introducing the large nitrogen is 1800 plus one hour (2200 ml/min), and the flow rate of introducing the oxygen is 180 plus one hour (220 ml/min);

j. discharging;

wherein the first temperature < the second temperature < the third temperature;

the first temperature is 770-790 ℃, the second temperature is 807-827 ℃, and the third temperature is 840-860 ℃;

the annealing step further comprises the steps of:

c. maintaining the temperature I and the pressure I for 890-910 s;

f. and (4) discharging.

2. The method for manufacturing a PERC micro pattern printed single crystal solar cell according to claim 1, wherein: the non-net knot micro-pattern printing screen comprises a screen frame and a piece of screen gauze which is fixedly connected in the screen frame in a stretching way, wherein the screen gauze is formed by weaving a plurality of warps and wefts, each warp and weft in the screen gauze are respectively parallel or vertical to the screen frame, a printing area and a non-printing area are arranged on the screen gauze, the pattern in the printing area comprises a plurality of auxiliary grid line holes which are distributed at intervals in parallel and are used for printing auxiliary grid lines, a plurality of main grid line holes which are distributed at intervals in parallel and are used for printing main grid lines and a peripheral frame line hole which is used for printing a peripheral frame line, the auxiliary grid line holes are positioned between two adjacent wefts, each main grid line hole is communicated with the plurality of auxiliary grid line holes, the main grid line holes and the auxiliary grid line holes are mutually vertically arranged, a plurality of micro-patterns which can not be penetrated by conductive silver paste are arranged on the main grid line holes, the peripheral frame line holes are arranged around the, the shape of the peripheral frame line hole is wave-shaped or zigzag.