CN109411370B - 一种倒装焊芯片的htcc系统级封装结构及封装方法 - Google Patents

一种倒装焊芯片的htcc系统级封装结构及封装方法 Download PDF

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CN109411370B
CN109411370B CN201811102793.2A CN201811102793A CN109411370B CN 109411370 B CN109411370 B CN 109411370B CN 201811102793 A CN201811102793 A CN 201811102793A CN 109411370 B CN109411370 B CN 109411370B
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张小龙
龚科
周国昌
李文琛
王鼎
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Xian Institute of Space Radio Technology
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Abstract

本发明涉及一种倒装焊芯片的HTCC系统级封装结构及封装方法，尤其涉及一种适用于大功耗倒装焊芯片的HTCC一体化系统级封装结构，所述的大功耗是指倒装焊芯片的功耗不小于10W，属于系统级封装技术领域。本发明的一种适用于大功耗倒装焊芯片的数模混合高集成度HTCC一体化系统级封装结构，与现有封装结构相比，既解决了大功耗芯片散热、倒装焊和金丝键合工艺兼容的难题，又通过双密封腔体设计提高了系统集成度；满足星载数字类陶瓷系统级封装的需求，有较强的实用性和广阔的市场应用前景。

Description

一种倒装焊芯片的HTCC系统级封装结构及封装方法
技术领域
本发明涉及一种倒装焊芯片的HTCC系统级封装结构及封装方法，尤其涉及一种适用于大功耗倒装焊芯片的HTCC一体化系统级封装结构，所述的大功耗是指倒装焊芯片的功耗不小于10W，属于系统级封装技术领域。
背景技术
近年来，面对宇航载荷越来越严苛的重量、体积以及自主可控的要求，系统级封装(System in Package,SiP)技术为实现载荷集成化、小型化、轻量化提供了一条有效的解决途径。由于高温共烧陶瓷(HTCC)具有结构强度高、热导率高、化学稳定性好和布线密度高等优点，在星载数字类系统及封装电路中广泛应用。目前常用的封装结构为HTCC一体化封装结构，HTCC作为封装和元器件互联的基板，HTCC底面制作阵列引脚，通过直插或表贴的方式焊接到印制板上。星载数字类系统级封装的基本结构如图1所示。主要包括HTCC基板、围框，盖板、引脚等。
随着星载系统级封装电路功能越来越复杂对封装形式多样性的要求。复杂的电路功能需要更高密度的集成式封装结构；多种芯片的使用需要封装结构能够兼容键合(Wire-Bonding)、倒装焊(Flip-Chip)、焊接、粘接等多种封装工艺的混合使用；大功耗芯片的使用需要封装结构提供良好的散热路径；数模混合一体化及更高的使用频率需要优化的基板布局布线设计。
由于HTCC工艺下的倒装焊芯片安装后需要做底部填充，填充物会挥发有机气体，破坏密封腔体内部气氛，影响其余芯片可靠性，并且对于大功耗倒装芯片，需要保证有良好的散热路径，因此现有的方式是将倒装焊芯片独立放置在HTCC基板的正面，并且不再放置其余芯片，仅倒装焊芯片就占用了基板的主要区域，系统集成度较低，无法满足复杂系统电路集成的需求。
发明内容
本发明的技术解决问题是：克服现有技术的不足，提出一种倒装焊芯片的HTCC系统级封装结构及封装方法。
本发明的技术解决方案是：
一种倒装焊芯片的HTCC系统级封装结构，该封装结构包括HTCC基板、上腔体围框、上腔体盖板、下腔体围框、下腔体盖板、CGA引脚阵列和散热片；
散热片和上腔体盖板并排放置在HTCC基板的上方，HTCC基板和散热片之间为倒装焊芯片的安装区域，在HTCC基板和上腔体盖板之间安装上腔体围框，即HTCC基板、上腔体盖板和上腔体围框一起形成一个密闭的空腔；CGA引脚阵列的中心带有空腔，下腔体盖板位于CGA引脚阵列的中心空腔内，CGA引脚阵列和下腔体盖板位于HTCC基板的下表面，在HTCC基板和下腔体盖板之间安装下腔体围框，即HTCC基板、下腔体盖板和下腔体围框一起形成一个密闭的空腔。
一种倒装焊芯片的HTCC系统级封装结构的制备方法，该方法的步骤包括：
(1)制备HTCC基板，要求HTCC基板的长和宽分别为35-60mm，厚度为2-4mm，倒装焊芯片安装区域平面度不大于30μm；
(2)制备上腔体围框和下腔体围框，要求上腔体围框的高度为1.5-3mm，下腔体围框的高度为1.5-2mm；上腔体围框和下腔体围框的壁厚均为1-2mm，上腔体围框和下腔体围框的材料均为可伐合金；
(3)制备上腔体盖板和下腔体盖板，上腔体盖板和下腔体盖板的材料均为可伐合金，上腔体盖板和下腔体盖板的厚度均为0.1-0.5mm；
(4)制备CGA引脚阵列，CGA引脚阵列的材料为Sn20Pb80，CGA引脚阵列中焊柱的直径为0.45-0.60mm，焊柱的高度为2-3mm；CGA引脚阵列中焊柱的排布方式为：Pitch为1.0mm，焊柱的总数量为860个；
(5)制备散热片，散热片的材料为AlSiC，厚度为0.5-2.0mm；
(6)在HTCC基板的下表面的中心区域焊接下腔体围框，在HTCC基板位于下腔体围框内部的区域安装芯片或表贴元件，然后在下腔体围框的下面安装下腔体盖板，下腔体围框的四周安装CGA引脚阵列6；
(7)将HTCC基板的上表面分为左右两部分，在HTCC基板的上表面的做部分并排安装两个倒装焊芯片，然后在HTCC基板的上表面右部分焊接上腔体围框，在HTCC基板位于上腔体围框内部的区域安装芯片或表贴元件，最后在上腔体围框上面安装上腔体盖板，得到倒装焊芯片的HTCC系统级封装结构。
有益效果
(1)HTCC基板作为芯片的互联基板、封装体、无源元件集成载体，长和宽尺寸要求在35-60mm范围，厚度要求在2-4mm范围。基板尺寸过大或过厚，会使封装的重量增大，力学性能较差；基板尺寸过小，会使芯片散热比较集中，散热能力较差；基板厚度过小，其承载能力较差。针对工作频率高达400MHz的复杂数模混合电路，基板层叠设计为信号层与平面层间隔设计，对平面层的数字模拟电路区域进行分割，对数字与模拟信号引脚区域进行划分，布线进行阻抗控制等方式提高电路性能；
(2)HTCC基板的上表面作为主要的芯片安装面，将其分为两个部分，分别作为倒装焊(Flip-Chip)芯片安装区域和密封区域分别设计。倒装焊(Flip-Chip)芯片安装区域采用非气密封装方式，便于在裸芯片的被动面安装散热片，从而可满足高达10W功耗的倒装焊芯片的散热需求；倒装焊(Flip-Chip)区域仅占用42mm×19mm的区域便可放置共计有多达7800多个凸点的倒装焊芯片；密封区域焊接可伐金属围框，可伐金属围框壁为1-2mm，可保证围框与基板的充分接触，通过平行缝焊或熔缝的方式实现金属围框内区域的气密封装，有效保护区域内部键合点的可靠性；
(3)HTCC基板的下表面作为CGA引脚阵列安装面和另一密封区域。下表面中心区域焊接可伐金属围框，通过平行缝焊或熔缝的方式实现金属围框内区域的气密封装，有效提高封装的集成度；下表面的四周区域焊接材料为Sn20Pb80的CGA引脚阵列，CGA引脚阵列6中焊柱的直径为0.45-0.60mm，焊柱的高度为2-3mm，焊柱排布的Pitch为1.0mm时，最多可放置860个。
(4)本发明的一种适用于大功耗倒装焊芯片的数模混合高集成度HTCC一体化系统级封装结构，与现有封装结构相比，既解决了大功耗芯片散热、倒装焊和金丝键合工艺兼容的难题，又通过双密封腔体设计提高了系统集成度；满足星载数字类陶瓷系统级封装的需求，有较强的实用性和广阔的市场应用前景。
附图说明
图1为现有星载数字类系统级封装的基本结构示意图；
图2为本发明的封装结构示意图；
图3为本发明的封装结构的爆炸结构示意图。
具体实施方式
一种倒装焊芯片的HTCC系统级封装结构，该封装结构包括HTCC基板1、上腔体围框2、上腔体盖板3、下腔体围框4、下腔体盖板5、CGA引脚阵列6和散热片7；
散热片7和上腔体盖板3并排放置在HTCC基板1的上方，HTCC基板1和散热片7之间为倒装焊芯片的安装区域，在HTCC基板1和上腔体盖板3之间安装上腔体围框2，即HTCC基板1、上腔体盖板3和上腔体围框2一起形成一个密闭的空腔；CGA引脚阵列6的中心带有空腔，下腔体盖板5位于CGA引脚阵列6的中心空腔内，CGA引脚阵列6和下腔体盖板5位于HTCC基板1的下表面，在HTCC基板1和下腔体盖板5之间安装下腔体围框4，即HTCC基板1、下腔体盖板5和下腔体围框4一起形成一个密闭的空腔。
一种倒装焊芯片的HTCC系统级封装结构的制备方法，该方法的步骤包括：
(1)制备HTCC基板1，要求HTCC基板1的长和宽分别为35-60mm，厚度为2-4mm，倒装焊芯片安装区域平面度不大于30μm；
(2)制备上腔体围框2和下腔体围框4，要求上腔体围框2的高度为1.5-3mm，下腔体围框4的高度为1.5-2mm；上腔体围框2和下腔体围框4的壁厚均为1-2mm，上腔体围框2和下腔体围框4的材料均为可伐合金；
(3)制备上腔体盖板3和下腔体盖板5，上腔体盖板3和下腔体盖板5的材料均为可伐合金，上腔体盖板3和下腔体盖板5的厚度均为0.1-0.5mm；
(4)制备CGA引脚阵列6，CGA引脚阵列6的材料为Sn20Pb80，CGA引脚阵列6中焊柱的直径为0.45-0.60mm，焊柱的高度为2-3mm；CGA引脚阵列6中焊柱的排布方式为：Pitch为1.0mm，焊柱的总数量为860个；
(5)制备散热片7，散热片7的材料为AlSiC，厚度为0.5-2.0mm；
(6)在HTCC基板1的下表面的中心区域焊接下腔体围框4，在HTCC基板1位于下腔体围框4内部的区域安装芯片或表贴元件，然后在下腔体围框4的下面安装下腔体盖板5，下腔体围框4的四周安装CGA引脚阵列6；
(7)将HTCC基板1的上表面分为左右两部分，在HTCC基板1的上表面的做部分并排安装两个倒装焊芯片，然后在HTCC基板1的上表面右部分焊接上腔体围框2，在HTCC基板1位于上腔体围框2内部的区域安装芯片或表贴元件，最后在上腔体围框2上面安装上腔体盖板3，得到倒装焊芯片的HTCC系统级封装结构。
如图2和3所示，本发明的封装结构包括HTCC基板1、上腔体围框2、上腔体盖板3、下腔体围框4、下腔体盖板5、CGA引脚阵列6、散热片7。HTCC基板1的上表面分为两个区域：分别为上腔体围框2安装区域和倒装焊芯片安装区域8；HTCC基板1的下表面中心区域焊接下腔体围框4，下腔体围框4的四周区域通过CGA引脚阵列6实现与PCB的电互联和机械互联；上腔体盖板3焊接在上腔体围框2上；下腔体盖板5焊接在下腔体围框4上。
实施例
如图2和图3所示，一种倒装焊芯片的HTCC系统级封装结构，该封装结构包括HTCC基板1、上腔体围框2、上腔体盖板3、下腔体围框4、下腔体盖板5、CGA引脚阵列6和散热片7；
散热片7和上腔体盖板3并排放置在HTCC基板1的上表面，HTCC基板1和散热片7之间为倒装焊芯片的安装区域，在HTCC基板1和上腔体盖板3之间安装上腔体围框2，即HTCC基板1、上腔体盖板3和上腔体围框2一起形成一个密闭的空腔；CGA引脚阵列6的中心带有空腔，下腔体盖板5安装在CGA引脚阵列6的中心空腔内，CGA引脚阵列6和下腔体盖板5位于HTCC基板1的下表面，在HTCC基板1和下腔体盖板5之间安装下腔体围框4，即HTCC基板1、下腔体盖板5和下腔体围框4一起形成一个密闭的空腔。
一种倒装焊芯片的HTCC系统级封装结构的制备方法，该方法的步骤包括：
(1)制备HTCC基板1，HTCC基板1的长和宽均为45mm，厚度为4.0mm，倒装焊芯片安装区域平面度不大于30μm；
(2)制备上腔体围框2和下腔体围框4，上腔体围框2的高度为1.8mm，外径尺寸为42.0×21.5mm，壁厚为1mm；下腔体围框4的高度为1.5mm，外径尺寸为24.8×24.8mm，壁厚为1.3mm；上腔体围框2和下腔体围框4的材料均为可伐合金；
(3)制备上腔体盖板3和下腔体盖板5，上腔体盖板3和下腔体盖板5的材料均为可伐合金，上腔体盖板3和下腔体盖板5的总厚度均为0.4mm，四周焊接区域厚度均为0.1mm。
(4)制备CGA引脚阵列6，CGA引脚阵列6的材料为Sn20Pb80，CGA引脚阵列6中焊柱的直径为0.51mm，焊柱的高度为2.54mm；CGA引脚阵列6中焊柱的排布方式为：Pitch为1.0mm，焊柱的总数量为860个；
(5)制备散热片7，散热片7的材料为AlSiC，散热片7的尺寸为42.0×20.0mm，厚度为1.2mm；
(6)在HTCC基板1的下表面的中心区域焊接下腔体围框4，在HTCC基板1位于下腔体围框4内部的区域安装芯片或表贴元件，然后在下腔体围框4的下面安装下腔体盖板5，下腔体围框4的四周安装CGA引脚阵列6；
(7)将HTCC基板1的上表面分为左右两部分，在HTCC基板1的上表面的做部分并排安装两个倒装焊芯片，然后在HTCC基板1的上表面右部分焊接上腔体围框2，在HTCC基板1位于上腔体围框2内部的区域安装芯片或表贴元件，最后在上腔体围框2上面安装上腔体盖板3，得到倒装焊芯片的HTCC系统级封装结构。
得到的上述的封装结果具备如下优点：
(1)HTCC基板1的长和宽均为45mm，整个系统级封装面积缩小了70％以上；厚度为4.0mm，系统级封装结构的总重量约为48±2g，经试验考核满足GJB2438A中机械冲击和恒定加速度的相关要求；
(2)基板层叠设计为信号层与平面层间隔设计，对平面层的数字模拟电路区域进行分割，对数字与模拟信号引脚区域进行划分，布线进行阻抗控制等方式提高电路性能；经测试，在400MHz工作条件下，模拟通道间的信号隔离度>75dB，数字与模拟信号间的隔离度>65dB；
(3)倒装焊(Flip-Chip)芯片安装区域安装两片复旦电子JFM4VSX55倒装焊裸芯片，凸点数共计达到7806个；倒装焊芯片安装区域采用非气密封装方式，在裸芯片的被动面安装散热片7，散热片7的材料为AlSiC，尺寸为42.0×20.0mm，厚度为1.2mm；当倒装焊芯片的总功耗为10W时，经散热分析得出，系统级封装内部芯片最高温升为15.2℃，系统级封装在单板级应用时，内部芯片最高结温满足一级降额要求；
(4)密封区域焊接可伐金属围框，可伐金属围框壁为1-2mm，可保证围框与基板的充分接触，通过平行缝焊或熔缝的方式实现金属围框内区域的气密封装，经试验考核满足GJB2438A中密封的相关要求，有效保护区域内部键合点的可靠性；
(5)CGA引脚阵列6的材料为Sn20Pb80，CGA引脚阵列6中焊柱的直径为0.51mm，焊柱的高度为2.54mm；CGA引脚阵列6中焊柱的排布方式为：Pitch为1.0mm，焊柱的总数量为860个；经力学仿真分析得出，系统级封装在单板级应用时，焊柱的最大受力约为26MPa，满足单机力学考核条件。

Claims (1)

1.一种倒装焊芯片的HTCC系统级封装结构，其特征在于：该封装结构包括HTCC基板(1)、上腔体围框(2)、上腔体盖板(3)、下腔体围框(4)、下腔体盖板(5)、CGA引脚阵列(6)和散热片(7)；
散热片(7)和上腔体盖板(3)并排放置在HTCC基板(1)的上方，在HTCC基板(1)和上腔体盖板(3)之间安装上腔体围框(2)，CGA引脚阵列(6)的中心带有空腔，下腔体盖板(5)位于CGA引脚阵列(6)的中心空腔内，CGA引脚阵列(6)和下腔体盖板(5)位于HTCC基板(1)的下表面，在HTCC基板(1)和下腔体盖板(5)之间安装下腔体围框(4)；
HTCC基板(1)和散热片(7)之间为倒装焊芯片的安装区域，倒装焊芯片安装区域平面度不大于30μm；
HTCC基板(1)的长和宽分别为35-60mm，厚度为2-4mm；
上腔体围框(2)的高度为1.5-3mm，下腔体围框(4)的高度为1.5-2mm；上腔体围框(2)和下腔体围框(4)的壁厚均为1-2mm，上腔体围框(2)和下腔体围框(4)的材料均为可伐合金；
上腔体盖板(3)和下腔体盖板(5)的材料均为可伐合金，上腔体盖板(3)和下腔体盖板(5)的厚度均为0.1-0.5mm；
CGA引脚阵列(6)的材料为Sn20Pb80，CGA引脚阵列(6)中焊柱的直径为0.45-0.60mm，焊柱的高度为2-3mm；
CGA引脚阵列(6)中焊柱的排布方式为：Pitch为1.0mm，焊柱的总数量为860个；
散热片(7)的材料为AlSiC，厚度为0.5-2.0mm；
该倒装焊芯片的HTCC系统级封装结构的制备方法，步骤包括：
(1)制备HTCC基板(1)、上腔体围框(2)、下腔体围框(4)、上腔体盖板(3)、下腔体盖板(5)、CGA引脚阵列(6)和散热片(7)；
(2)在HTCC基板(1)的下表面的中心区域焊接下腔体围框(4)，在HTCC基板(1)位于下腔体围框(4)内部的区域安装芯片或表贴元件，然后在下腔体围框(4)的下面安装下腔体盖板(5)，下腔体围框(4)的四周安装CGA引脚阵列(6)；
(3)将HTCC基板(1)的上表面分为左右两部分，在HTCC基板(1)的上表面的做部分并排安装两个倒装焊芯片，然后在HTCC基板(1)的上表面右部分焊接上腔体围框(2)，在HTCC基板(1)位于上腔体围框(2)内部的区域安装芯片或表贴元件，最后在上腔体围框(2)上面安装上腔体盖板(3)，得到倒装焊芯片的HTCC系统级封装结构；
所述的步骤(1)中，HTCC基板(1)的长和宽分别为35-60mm，厚度为2-4mm，倒装焊芯片安装区域平面度不大于30μm；上腔体围框(2)的高度为1.5-3mm，下腔体围框(4)的高度为1.5-2mm；上腔体围框(2)和下腔体围框(4)的壁厚均为1-2mm，上腔体围框(2)和下腔体围框(4)的材料均为可伐合金；上腔体盖板(3)和下腔体盖板(5)的材料均为可伐合金，上腔体盖板(3)和下腔体盖板(5)的厚度均为0.1-0.5mm；CGA引脚阵列(6)的材料为Sn20Pb80，CGA引脚阵列(6)中焊柱的直径为0.45-0.60mm，焊柱的高度为2-3mm；CGA引脚阵列(6)中焊柱的排布方式为：Pitch为1.0mm，焊柱的总数量为860个；散热片(7)的材料为AlSiC，厚度为0.5-2.0mm。
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