CN109390330B - 一种实现自身静电放电保护的高压器件 - Google Patents

一种实现自身静电放电保护的高压器件 Download PDF

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CN109390330B
CN109390330B CN201710656774.3A CN201710656774A CN109390330B CN 109390330 B CN109390330 B CN 109390330B CN 201710656774 A CN201710656774 A CN 201710656774A CN 109390330 B CN109390330 B CN 109390330B
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汪广羊
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CSMC Technologies Fab2 Co Ltd
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Abstract

本发明提供一种实现自身静电放电保护的高压器件，包括：半导体衬底；形成于半导体衬底中的第一N‑阱、P‑阱和第二N‑阱；形成于第一N‑阱中的第一N+离子注入区和第一隔离区；形成于P‑阱中的第二N+离子注入区和紧贴第二N+离子注入区的P+离子注入区；形成于第二N‑阱中的第三N+离子注入区；形成于半导体衬底中的第二隔离区，所述第二隔离区覆盖部分第二N‑阱和部分P‑阱，其中，第二N+离子注入区、P+离子注入区和第三N+离子注入区构成NPN型BJT，通过所述BJT实现所述静电放电保护。根据本发明，可以实现不同电压的静电放电保护，把静电放电保护能力和高压器件参数分离开，降低高压器件开发难度，最终降低成本。

Description

一种实现自身静电放电保护的高压器件
技术领域
本发明涉及半导体制造领域，具体而言涉及一种利用衬底底部双极结型晶体管(BJT)实现自身静电放电(ESD)保护的高压(HV)器件。
背景技术
静电放电是在我们生活中普遍存在的自然现象，但静电放电时在短时间内产生的大电流，会对集成电路产生致命的损伤，是集成电路生产应用中造成失效的重要问题。例如，对于发生在人体上的静电放电现象，通常发生在几百个纳秒内，最大的电流峰值可能达到几个安培，其它模式静电放电发生的时间更短，电流也更大。如此大的电流在短时间内通过集成电路，产生的功耗会严重超过其所能承受的最大值，从而对集成电路产生严重的物理损伤并导致其最终失效。
为了解决该问题，在实际应用中主要从环境和电路本身两方面来解决。环境方面，主要是减少静电的产生和及时消除静电，例如，应用不易产生静电的材料、增加环境湿度、操作人员和设备接地等。电路方面，主要是增加集成电路本身的静电放电耐受能力，例如增加额外的静电保护器件或者电路来保护集成电路内部电路不被静电放电损害。
发明内容
针对现有技术的不足，本发明提供一种实现自身静电放电保护的高压器件，包括：半导体衬底；形成于所述半导体衬底中的第一N-阱、P-阱和第二N-阱；形成于所述第一N-阱中的第一N+离子注入区和第一隔离区；形成于所述P-阱中的第二N+离子注入区和紧贴所述第二N+离子注入区的P+离子注入区；形成于所述第二N-阱中的第三N+离子注入区；形成于所述半导体衬底中的第二隔离区，所述第二隔离区覆盖部分所述第二N-阱和部分所述P-阱，其中，所述第二N+离子注入区、所述P+离子注入区和所述第三N+离子注入区构成NPN型BJT，通过所述BJT实现所述静电放电保护。
在一个示例中，所述第二N+离子注入区作为所述BJT的集电极，所述P+离子注入区作为所述BJT的基极，所述第三N+离子注入区作为所述BJT的发射极。
在一个示例中，所述第一N-阱和所述第二N-阱同时形成且深度相同。
在一个示例中，通过调整所述第一N-阱和所述第二N-阱之间的间距的大小来实现不同电压的静电放电保护。
在一个示例中，调整所述间距的大小时保证所述P-阱的下方形成有部分所述第二N-阱。
在一个示例中，所述P-阱的深度小于所述第一N-阱的深度。
在一个示例中，所述第一N+离子注入区作为所述高压器件的漏极，所述第二N+离子注入区作为所述高压器件的源极。
在一个示例中，静电放电引发的电流从所述第一N+离子注入区经由所述第一N-阱和所述第二N-阱流向所述第三N+离子注入区。
在一个示例中，通过调整所述第一N-阱和所述第二N-阱之间的间距的大小先触发所述BJT，完成对所述高压器件的静电放电保护。
在一个示例中，所述高压器件还包括形成在所述半导体衬底上的栅极，所述栅极覆盖部分所述P-阱、部分所述第一N-阱和部分所述第一隔离区。
根据本发明，可以实现不同电压的静电放电保护，把静电放电保护能力和高压器件参数分离开，降低高压器件开发难度，最终降低成本。
附图说明
本发明的下列附图在此作为本发明的一部分用于理解本发明。附图中示出了本发明的实施例及其描述，用来解释本发明的原理。
附图中：
图1为现有的高压器件实现自身静电放电保护的示意图；
图2为根据本发明示例性实施例的高压器件实现自身静电放电保护的示意图。
具体实施方式
在下文的描述中，给出了大量具体的细节以便提供对本发明更为彻底的理解。然而，对于本领域技术人员而言显而易见的是，本发明可以无需一个或多个这些细节而得以实施。在其他的例子中，为了避免与本发明发生混淆，对于本领域公知的一些技术特征未进行描述。
应当理解的是，本发明能够以不同形式实施，而不应当解释为局限于这里提出的实施例。相反地，提供这些实施例将使公开彻底和完全，并且将本发明的范围完全地传递给本领域技术人员。在附图中，为了清楚，层和区的尺寸以及相对尺寸可能被夸大。自始至终相同附图标记表示相同的元件。
应当明白，当元件或层被称为“在...上”、“与...相邻”、“连接到”或“耦合到”其它元件或层时，其可以直接地在其它元件或层上、与之相邻、连接或耦合到其它元件或层，或者可以存在居间的元件或层。相反，当元件被称为“直接在...上”、“与...直接相邻”、“直接连接到”或“直接耦合到”其它元件或层时，则不存在居间的元件或层。应当明白，尽管可使用术语第一、第二、第三等描述各种元件、部件、区、层和/或部分，这些元件、部件、区、层和/或部分不应当被这些术语限制。这些术语仅仅用来区分一个元件、部件、区、层或部分与另一个元件、部件、区、层或部分。因此，在不脱离本发明教导之下，下面讨论的第一元件、部件、区、层或部分可表示为第二元件、部件、区、层或部分。
空间关系术语例如“在...下”、“在...下面”、“下面的”、“在...之下”、“在...之上”、“上面的”等，在这里可为了方便描述而被使用从而描述图中所示的一个元件或特征与其它元件或特征的关系。应当明白，除了图中所示的取向以外，空间关系术语意图还包括使用和操作中的器件的不同取向。例如，如果附图中的器件翻转，然后，描述为“在其它元件下面”或“在其之下”或“在其下”元件或特征将取向为在其它元件或特征“上”。因此，示例性术语“在...下面”和“在...下”可包括上和下两个取向。器件可以另外地取向(旋转90度或其它取向)并且在此使用的空间描述语相应地被解释。
在此使用的术语的目的仅在于描述具体实施例并且不作为本发明的限制。在此使用时，单数形式的“一”、“一个”和“所述/该”也意图包括复数形式，除非上下文清楚指出另外的方式。还应明白术语“组成”和/或“包括”，当在该说明书中使用时，确定所述特征、整数、步骤、操作、元件和/或部件的存在，但不排除一个或更多其它的特征、整数、步骤、操作、元件、部件和/或组的存在或添加。在此使用时，术语“和/或”包括相关所列项目的任何及所有组合。
现有的高压器件100如图1所示，在半导体衬底中形成有N-阱101和P-阱102，P-阱102的深度小于N-阱101的深度，在N-阱101中形成有作为高压器件100的漏极的第一N+离子注入区103，在P-阱102中形成有作为高压器件100的源极的第二N+离子注入区104，在P-阱102中还形成有紧贴第二N+离子注入区104的P+离子注入区105，在N-阱101中还形成有隔离区107，高压器件100的栅极106覆盖部分P-阱102、部分N-阱101和部分隔离区107。
由于工作电压大、占用芯片的面积大，现有的高压器件100都是依靠自身的电路结构实现静电放电保护。如图1所示，当高压器件100内部产生静电放电时，由静电放电引发的电流从作为高压器件100的漏极的第一N+离子注入区103经由N-阱101和P-阱102流向P+离子注入区105和作为高压器件100的源极的第二N+离子注入区104，完成对自身的静电放电保护。
然而，为了优化MOS管线性区的线性电阻(Rdson)等参数，现有的高压器件100很难实现很好的静电放电保护。为此，本发明提出一种实现自身静电放电保护的高压器件，利用衬底底部BJT实现所述静电放电保护，可以把自身的静电放电保护能力和Rdson等参数的优化分开，从而降低高压器件开发难度，最终降低成本。
为了彻底理解本发明，将在下列的描述中提出详细的结构及/或步骤，以便阐释本发明提出的技术方案。本发明的较佳实施例详细描述如下，然而除了这些详细描述外，本发明还可以具有其他实施方式。
本发明提出的实现自身静电放电保护的高压器件200如图2所示，在半导体衬底中形成有第一N-阱201、P-阱202和第二N-阱209，P-阱202的深度小于第一N-阱201的深度，第一N-阱201和第二N-阱209的深度相同，第一N-阱201和第二N-阱209之间的间距为a，通过调整a的大小来实现不同电压的静电放电保护，调整a的大小时保证P-阱202的下方形成有部分第二N-阱209。
在第一N-阱201中形成有作为高压器件200的漏极的第一N+离子注入区203，在P-阱202中形成有作为高压器件200的源极的第二N+离子注入区204，在P-阱202中还形成有紧贴第二N+离子注入区204的P+离子注入区205，在第二N-阱209中形成有第三N+离子注入区208，在第一N-阱201中还形成有第一隔离区207，高压器件200的栅极206覆盖部分P-阱202、部分第一N-阱201和部分第一隔离区207，在半导体衬底中还形成有第二隔离区210，第二隔离区210覆盖部分第二N-阱209和部分P-阱202。
第二N+离子注入区204、P+离子注入区205和第三N+离子注入区208构成NPN型BJT，其中第二N+离子注入区204作为BJT的集电极，P+离子注入区205作为BJT的基极，第三N+离子注入区208作为BJT的发射极。
如图2所示，当高压器件200内部产生静电放电时，由静电放电引发的电流从作为高压器件200的漏极的第一N+离子注入区203经由第一N-阱201和第二N-阱209流向第三N+离子注入区208，完成对高压器件200的静电放电保护。高压器件200的主要耐压区在作为漏极的第一N+离子注入区203，因此，通过调整第一N-阱201和第二N-阱209之间的间距a的大小先触发BJT，使静电放电引发的电流从作为高压器件200的漏极的第一N+离子注入区203经由第一N-阱201和第二N-阱209流向第三N+离子注入区208，而不是经由第一N-阱201和P-阱202流向P+离子注入区205和作为高压器件200的源极的第二N+离子注入区204。
本发明通过衬底底部BJT可以实现对高压器件200的很强的静电放电保护能力，从而将现有高压器件的静电放电自保护单独分离出来，降低了高压器件的开发难度，在相同静电放电保护能力下，可以更加节省面积，提高产品的市场竞争力。
作为示例，高压器件200的栅极206包括自下而上依次层叠的栅极介电层和栅极材料层，在栅极206的两侧形成有侧壁结构。
作为示例，栅极介电层包括氧化物层，例如二氧化硅(SiO2)层。栅极材料层包括多晶硅层、金属层、导电性金属氮化物层、导电性金属氧化物层和金属硅化物层中的一种或多种，其中，金属层的构成材料可以是钨(W)、镍(Ni)或钛(Ti)；导电性金属氮化物层包括氮化钛(TiN)层；导电性金属氧化物层包括氧化铱(IrO2)层；金属硅化物层包括硅化钛(TiSi)层。栅极介电层和栅极材料层的形成方法可以采用本领域技术人员所熟习的任何现有技术，优选化学气相沉积法(CVD)，如低温化学气相沉积(LTCVD)、低压化学气相沉积(LPCVD)、快热化学气相沉积(RTCVD)、等离子体增强化学气相沉积(PECVD)。
作为示例，第一N-阱201和第二N-阱209同时形成，第一隔离区207和第二隔离区210同时形成，第一N+离子注入区203、第二N+离子注入区204和第三N+离子注入区208同时形成。在形成第一N-阱201和第二N-阱209之后，形成P-阱202。
本发明已经通过上述实施例进行了说明，但应当理解的是，上述实施例只是用于举例和说明的目的，而非意在将本发明限制于所描述的实施例范围内。此外本领域技术人员可以理解的是，本发明并不局限于上述实施例，根据本发明的教导还可以做出更多种的变型和修改，这些变型和修改均落在本发明所要求保护的范围以内。本发明的保护范围由附属的权利要求书及其等效范围所界定。

Claims (8)

1.一种实现自身静电放电保护的高压器件，其特征在于，包括：
半导体衬底；
形成于所述半导体衬底中的第一N-阱、P-阱和第二N-阱，其中所述第一N-阱和所述第二N-阱深度相同，所述P-阱的深度小于所述第一N-阱的深度，且所述第一N-阱和所述第二N-阱之间存在间距；
形成于所述第一N-阱中的第一N+离子注入区和第一隔离区；
形成于所述P-阱中的第二N+离子注入区和紧贴所述第二N+离子注入区的P+离子注入区；
形成于所述第二N-阱中的第三N+离子注入区；
形成于所述半导体衬底中的第二隔离区，所述第二隔离区覆盖部分所述第二N-阱和部分所述P-阱，其中，所述第二N+离子注入区、所述P+离子注入区和所述第三N+离子注入区构成NPN型BJT，通过所述BJT实现所述静电放电保护，且通过调整所述第一N-阱和所述第二N-阱之间的间距的大小来实现不同电压的静电放电保护。
2.根据权利要求1所述的高压器件，其特征在于，所述第二N+离子注入区作为所述BJT的集电极，所述P+离子注入区作为所述BJT的基极，所述第三N+离子注入区作为所述BJT的发射极。
3.根据权利要求1所述的高压器件，其特征在于，所述第一N-阱和所述第二N-阱同时形成。
4.根据权利要求1所述的高压器件，其特征在于，调整所述间距的大小时保证所述P-阱的下方形成有部分所述第二N-阱。
5.根据权利要求1所述的高压器件，其特征在于，所述第一N+离子注入区作为所述高压器件的漏极，所述第二N+离子注入区作为所述高压器件的源极。
6.根据权利要求1所述的高压器件，其特征在于，静电放电引发的电流从所述第一N+离子注入区经由所述第一N-阱和所述第二N-阱流向所述第三N+离子注入区。
7.根据权利要求6所述的高压器件，其特征在于，通过调整所述第一N-阱和所述第二N-阱之间的间距的大小先触发所述BJT，完成对所述高压器件的静电放电保护。
8.根据权利要求1-7中任一项所述的高压器件，其特征在于，还包括形成在所述半导体衬底上的栅极，所述栅极覆盖部分所述P-阱、部分所述第一N-阱和部分所述第一隔离区。
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