CN109347484A - A kind of 64B/66B encoder tabled look-up based on second level and coding method - Google Patents

A kind of 64B/66B encoder tabled look-up based on second level and coding method Download PDF

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CN109347484A
CN109347484A CN201811307961.1A CN201811307961A CN109347484A CN 109347484 A CN109347484 A CN 109347484A CN 201811307961 A CN201811307961 A CN 201811307961A CN 109347484 A CN109347484 A CN 109347484A
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data
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xgmii
block
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CN109347484B (en
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哈云雪
徐丹妮
唐金锋
刑宗歧
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Xian Microelectronics Technology Institute
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65Purpose and implementation aspects
    • H03M13/6502Reduction of hardware complexity or efficient processing

Abstract

The invention discloses a kind of 64B/66B encoder tabled look-up based on second level and coding methods, are 2 to size72Table carry out key position Characteristic Extraction, accordingly by table disassemble at first order size be 28Table, first order mapping is carried out with 8bit control information xgmii_txc [7:0] of XGMII input on this basis, the second extraction of characteristic quantity is carried out simultaneously, second of characteristic quantity extracted is the xgmii_txd [63:56] and xgmii_txd [31:24] in 64bit data information xgmii_txd [63:0], and generating second level size is 21Table, and second level mapping is carried out, to obtain coding result.Not needing huge look-up table can be completed coding.It economizes on resources.And cataloged procedure is pure hardware encoding, switching efficiency is high, tens nanoseconds coding can be completed.

Description

A kind of 64B/66B encoder tabled look-up based on second level and coding method
Technical field
The invention belongs to encoding and decoding technique fields, and in particular to a kind of 64B/66B encoder tabled look-up based on second level and volume Code method.
Background technique
64B/66B coding module be XGMII is inputted according to coding rule 64bit data information xgmii_txd [63: 0] and 8bit controls the data information that information xgmii_txc [7:0] is encoded into 66bit, and the data information of 66bit includes 2bit Synchronous head, 8bit block type and 56bit payload., the redundancy of 2bit is added to achieve the purpose that 0,1 equilibrium.Existing volume There are two types of code implementations: look-up table and logical operation method.Look-up table is that cataloged procedure is abstracted into a look-up table to map Process, this method circuit area is huge, uses a large amount of ROM resource;Logical operation method is that 64bit data are divided into 8 The narrow passage of 8bit, each narrow passage are decoded respectively, and this method is will be 2 in method 172Table split into 828Size Table, carry out parallel decoding, this method look-up table for look-up table is small very much, but 8 sizes are 256 Look-up table decodes simultaneously still expends resource very much for hardware realization.
Summary of the invention
The characteristics of during the present invention is realized for 64B/66B encoding and decoding, hardware spending is big, low efficiency, proposes a kind of pass The method of the Characteristic Extraction of key position, this method carries out Characteristic Extraction using the own characteristic of code word, by huge lookup Table dwindles into the achievable small look-up table of hardware.
In order to achieve the above objectives, a kind of 64B/66B code device tabled look-up based on second level of the present invention includes front and back two Grade look-up table, first look-up table obtain that one preliminary as a result, second level look-up table is according to first according to control word is sent The result of look-up table and the rule of partial codeword carry out second level mapping, finally obtain coding result.
A kind of 64B/66B encoder tabled look-up based on second level, including the first latch module, level encoder module, channel Division module, the second latch module, second level coding module, data selecting module and state machine control module;
Wherein, the first latch module is for caching the 64bit data of input, and by the 64bit data of caching It is sent to the second latch module;
Level encoder module, which is used to control information xgmii_txc according to the 8bit of input, translates part block type, and generates Synchronous head is sent to the second latch module by synchronous head, by received 8bit control information txc [7:0] and level encoder knot Fruit is sent to second level coding module;
Channel division module is divided into the 0th to the 7th totally 8 channels, one, each channel word for will input parallel 64bit Section, and 8 bytes after division are sent to second level coding module;
Second latch module is used for sequential coupling and data buffer storage, caches the first latch module received and sends 64bit data and level encoder module send synchronous head, and make the second latch module output and second level coding The output synchronization of module reaches data selecting module;
Second level coding module is used for the result block_type according to level encoder module, the output of the joint passage division module The 0th channel and the 3rd channel original code word lane_0 [7:0], lane_3 [7:0], obtain whole block type Block Type Field, and the value in 8 channels that channel division module exports is subjected to byte according to XGMII command character mapping table and is reflected It penetrates, obtains coded data encode;By 8bit block type Block Type Field, the coded data in channel 0 to channel 7 Encode and 8bit control information xgmii_txc is sent to data selecting module;It will be generated simultaneously with Block Type Field Block structure word t_blk_type export to state machine control module;
Data selecting module judges whether reception data export according to the enable signal that state machine control module exports, if It can export, just export 66bit with synchronous head according to coding result, data encoding result includes the synchronous head and 64bit of 2bit Coded data encode;If cannot export, output error is identified;
Obtained block type judges the legitimacy of code stream after state machine control module is used to be encoded according to second level, and will sentence Disconnected result is sent to data selecting module as control signal.
A kind of 64B/66B coding method tabled look-up based on second level, comprising the following steps:
Step 1, the 64bit data information inputted are written in the first latch module, and level encoder module is believed according to control Breath xgmii_txc determines synchronous head sync_header_o [1:0];Channel division module) the 64bit data information of input is divided It exports at 8 channels to second level coding module;
Data in step 2, the first latch module are read, the synchronous head sync_ with the output of level encoder module Header_o [1:0] synthesizes 66bit data, and is written in the second latch module;Level encoder module is according to the control of input Information xgmii_txc judges the type of the bag data, and exports block structure block_type and control information xgmii_txc;
The level encoder mould result block_type and lead to that step 3, second level coding module are exported according to level encoder module The lane_0 [7:0] and lane_3 [7:0] data of road division module output carry out second level coding, obtain second level coding result Block Type Field;And Block Type Field is mapped to corresponding block structure word (t_blk_type), then send out State machine control module is given, state machine control module is somebody's turn to do according to the block structure word judgement that state machine judgement receives at this time is sent Whether bag data is legal, if legal, exports tx_coded_sel=1 to data selecting module, if illegally, tx_coded_ Sel=0;The value in 8 channels that second level coding module exports channel division module is carried out according to XGMII command character mapping table Byte mapping, obtains coded data encode;
Step 4, data selecting module judge whether output data according to the value of the tx_coded_sel received, if tx_ Coded_sel=1, and txc [7:0]=8 ' b00000000, then the 64bit is total evidence, then by the number of the second latch module It is read according to xgmii_txd_dd [65:0], at this time sync_header_o [1:0]=xgmii_txd_dd [65:64], encode_ O [63:0]=xgmii_txd_dd [63:0], coding are completed;If tx_coded_sel=1, txc [7:0]!=8 ' B00000000, then the 64bit is not total evidence, then reads the data xgmii_txd_dd [65:0] of the second latch module Out, sync_header_o [1:0]=xgmii_txd_dd [65:64] at this time, txc corresponds to position when being 1, which is control word Symbol, the encode of output second level coding module input, the byte is data character, output second when the corresponding position txc [7:0] is 0 The data cached corresponding byte of latch module input;If tx_coded_sel=0, indicate to send frame mistake;encode_o [63:0]=0xFEFEFEFE_FEFEFEFE, coding are completed.
Further, it in step 2, tables look-up to obtain level encoder result block structure block_type.
Further, second level is encoded when controlling information xgmii_txc is 11111111,11111000 or 10001000, Block Type Field is determined according to the data information of the input in block structure block_type and the 0th channel and the 3rd channel.
Further, in step 2, data type includes S data type, T data type, D data type, E data type With C data type, wherein S data type includes the legacy structure block that block_type is 0x33,0x66 and 0x78, S data Type includes the legacy structure block that block_type is 0x87,0x99,0xaa, 0xb4,0xcc, 0xd2,0xe1 and 0xff, S number It include the block data structure that synchronous head is 01 according to type, E data type is illegal block structure, and C data type is other legal piece Structure.
Further, in step 2, xgmii_txc determines synchronous head process according to the control information are as follows: when control information When xgmii_txc_i [7:0]=8 ' b00000000,2 ' b01 of synchronous head, otherwise, 2 ' b10 of synchronous head.
Compared with prior art, the present invention at least has technical effect beneficial below, and the present invention is 2 to size72Table Lattice carry out the Characteristic Extraction of key position, and accordingly disassembling table at first order size is 28Table, on this basis with 8bit control information xgmii_txc [7:0] of XGMII input carries out first order mapping, while carrying out the secondary of characteristic quantity and mentioning Take, second characteristic quantity that extracts be xgmii_txd [63:56] in 64bit data information xgmii_txd [63:0] and Xgmii_txd [31:24], generating second level size is 21Table, and second level mapping is carried out, to obtain coding result. Not needing huge look-up table can be completed coding.It economizes on resources.And cataloged procedure is pure hardware encoding, switching efficiency is high, several Coding can be completed in ten nanoseconds.
Detailed description of the invention
Fig. 1 is 64B/66B encoder composition mechanism schematic diagram;
Fig. 2 is 64B/66B state machine redirect procedure figure.
Specific embodiment
The following describes the present invention in detail with reference to the accompanying drawings and specific embodiments.
Referring to Fig.1, a kind of 64B/66B encoder tabled look-up based on second level includes the first latch module 1, level encoder mould Block 2, channel division module 3, the second latch module 4, second level coding module 5, data selecting module 6 and state machine control mould Block 7, in Fig. 1,8 for the input of the end xgmii 64bit data-signal xgmii_txd_i [63:0], 9 be the input of the end xgmii 8bit controls signal xgmii_txc_i [7:0], and 10 clock signals inputted for the end xgmii, 11 pass through for xgmii_txd [63:0] Signal xgmii_txd_d [63:0] after crossing level cache, the 12 synchronous head signal sync_ exported for level encoder module Header [1:0], the 13 result block_type (i.e. the one level search table mapping result of table 4) and control for level encoder output Information xgmii_txc [7:0] processed, the 14 8 parallel bytes exported for channel division module 3,15 be the second latch module 4 output data xgmii_txd_dd [65:0], 16 for second level encoder output to data selector as a result, include 8 channels Data (command character) coding result encode, control information xgmii_txc [7:0] and Block Type Field, 17 be second level Encoder 5, which is exported, to be exported to the block structure word t_blk_type [2:0] of state machine control module 7,18 for state machine control module To the control signal tx_coded_sel of data selector, 19 be entire encoder output as a result, including 64bit coding knot Fruit encode_o [63:0] and 2bit synchronous head sync_header_o [1:0].
First latch module 1 is for caching the 64bit data of entrance.Due to might have in 64bit data Part or all of byte is clear data, which does not need encode directly output, therefore when 64bit data enter It needs first to be cached after encoder, judges whether this 64bit (i.e. 8 bytes) is data to level encoder module, if Wherein whole bytes are data, then sync_header [1:0]=2 ' b01;If there is command character, then sync_header [1:0]=2 ' b10, and sync_header [1:0] is stored in into the second latch module 4.
The effect of second latch module 4 is sequential coupling, so that 15 (i.e. xgmii_ of the second latch module 4 output Txd_dd [65:0]) and second level coding module 5 export 16 be synchronization reach data selecting module 6.
Channel division module 3 is divided into 8 channels for will input parallel 64bit, and each channel is a byte.By table 1 it is found that command character mapping is as unit of byte, and therefore, it is necessary to 64bit is splitted into 8 bytes to be mapped one by one.
Level encoder module 2 is used to directly translate block type block_ according to the 8bit xgmii_txc table of comparisons 3 of input Type is 0x78,0x99,0xaa, 0xb4,0x4b, 0xcc, 0xd2,0xe1,0xff, blk_type_1_level1, blk_ Type_2_level1 and blk_type_3_level1, wherein xgmii_txc [7:0]=0x87,0x1e is translated into one group (blk_type_1_level1), xgmii_txc [7:0]=0x2d, 0x33 is translated into one group (blk_type_2_level1), it will Xgmii_txc [7:0]=0x66,0x55 is translated into one group (blk_type_3_level1) and generates synchronous head sync_header [1:0]。
Second level coding module 5 be used for according to level encoder module 2 as a result, in conjunction with the 0th channel and the 3rd channel source code Word lane_0 [7:0], lane_3 [7:0] generate whole block type Block Type Field, draw referring to table 4, and by channel The value in 8 channels that sub-module 3 exports carries out byte mapping according to coding schedule, obtains encode;By block type Block Type Field, control word coding result encode and 8bit control information xgmii_txc [7:0] are sent to data selecting module 6.Together When the block structure word t_blk_type generated with Block Type Field is exported to state machine control module 7.
Data selecting module 6 is used to control information xgmii_txc [7:0] according to 8bit and the data selection of caching is output Initial data still encode after command character.
State machine control module 7 is used to judge the legal of code stream using the block structure word (t_blk_type) after coding Property, if legal, data selecting module 6 is with regard to output code flow, if illegally, data selecting module 6 is identified with regard to output error.
It is to input XGMII according to coding rule that a kind of 64B/66B coding method tabled look-up based on second level, which is coding module, 64bit data information xgmii_txd [63:0] and 8bit control information xgmii_txc [7:0] be encoded into 66bit, including 2bit synchronous head, 8bit block type and 56bit payload.Tables 1 and 2 is mapping table.Table 3 is block structure word explanation, Table 4 is one level search table corresponding relationship, and table 5 is second level look-up table corresponding relationship.
1 XGMII command character mapping table of table
2 64B/66B coding schedule of table
3 block structure word explanation of table
4 one level search table corresponding relationship of table
5 second level look-up table corresponding relationship of table
Three kinds of situations are divided to be illustrated cataloged procedure below.
Situation 1: the data information xgmii_txd_i [63:0] of transmission is 64bit clear data (assuming that transmission data are 0x1234_5678_9abc_def0), information xgmii_txc_i [7:0]=8 ' b00000000 is controlled.
1. data come in after first clock cycle (CLK0), data be written the first latch module 1 in, meanwhile, Synchronous head sync_header [1:0]=2 ' b01 is exported in level encoder module 2, indicates that the bag data is clear data;In addition, The moment channel divides mould 3 and input data is divided into 8 channel outputs, is respectively as follows: lane0=0x12, lane1=0x34, Lane2=0x56, lane3=0x78, lane4=0x9a, lane5=0xbc, lane6=0xde, lane7=0xf0.
2. data come in after second clock cycle (CLK1), the data in the first latch module 1 are read, with level-one The second latch module 4 is written in the synchronous head sync_header [1:0] that coding module 2 exports jointly;In addition, level encoder module According to input xgmii_txc_i judge the bag data for total evidence, level encoder module to second level coding module export txc [7: 0]=8 ' b00000000 indicates that the bag data is full frame of data.
3. data come in after the third clock cycle (CLK2), second level coding module is according to txc [7:0]=8 ' Result t_blk_type [2:0] of the b00000000 by second level encoder output to state machine control module is arranged to D data class Type (according to table 3, t_blk_type [2:0]=3 ' b100), is sent to state machine control module 7, and state machine control module 7 Whether the D data type received at this time according to transmission state machine (such as Fig. 2) judgement of oneself is legal, if legal, just selects to data It selects module 6 and exports tx_coded_sel=1, if illegal tx_coded_sel=0.
4. data come in after the 4th clock cycle (CLK3), data selecting module 6 is defeated according to state machine control module 7 The tx_coded_sel entered judges whether output data, if tx_coded_sel=1, and txc=[7:0]=8 ' B00000000, then by 4 data xgmii_txd_dd [65:0] of the second latch module read, at this time sync_header_o [1: 0]=xgmii_txd_dd [65:64], encode_o [63:0]=xgmii_txd_dd [63:0], coding is completed at this time.If Tx_coded_sel=0, mark send frame mistake.Encode_o [63:0]=0xFEFEFEFE_FEFEFEFE, encodes at this time It completes.
Situation 2: the data information xgmii_txd_i [63:0] of transmission is 64bit clear data+control word (assuming that sending number Only level-one is needed to decode in this case according to for 0x35fd0707_0707), xgmii_txc_i [7:0]=8 ' b01111111 Coding work can be completed.
1. data come in after first clock cycle (CLK0), data be written the first latch module 1 in;Meanwhile Sync_header [1:0]=2 ' b10 is exported in level encoder module 2, indicates that the data block is non-clear data;In addition the moment Input data xgmii_txd_i [63:0] is divided into 8 channel outputs by channel division module 3, is respectively as follows: lane0=0x35, Lane1=0xfd, lane2=0x07, lane3=0x07, lane4=0x07, lane5=0x07, lane6=0x07, Lane7=0x07.
2. data come in after second clock cycle (CLK1), the data in the first latch module 1 are read, with level-one The sync_header [1:0] that coding module 2 exports synthesizes 66bit data, and the second latch module 4 is written;In addition, level encoder Module judges the bag data according to input xgmii_txc_i for non-total evidence, and level encoder module exports txc [7:0]=8 ' B01111111, according to xgmii_txc_i [7:0]=8 ' b01111111, the corresponding relationship of look-up table 4 can obtain Block Type Field=0x99.
3. data come in after the third clock cycle (CLK2), according to table 2, second level coding module 5 is according to Block T_blk_type is arranged to T data type (t_blk_type [2:0]=3 ' b011) according to table 3 by Type Field=0x99, It is sent to state machine control module 7, state machine control module 7 receives at this time according to the transmission state machine (such as Fig. 2) of oneself judgement T data type it is whether legal, if legal, just to data selecting module 6 export tx_coded_sel=1, if illegally Tx_coded_sel=0;In addition, the value comparison table 1 in 8 channels that second level coding module 5 is exported according to channel division module 3 Byte mapping is carried out, lane0 is that data do not map, and lane1=0xfd mapping becomes/and T/ (do not refer in agreement, herein may be used To be customized for 0x9c), lane2=0x07 mapping becomes/I/ (0x00), and lane3=0x07 mapping becomes/I/ (0x00), Lane4=0x07 mapping becomes/I/ (0x00), and lane5=0x07 mapping becomes/I/ (0x00), and lane6=0x07 is mapped to For/I/ (0x00), lane7=0x07 mapping becomes/I/ (0x00).And encode={ 35,9c, 0,0,0,0,0,0 } is inputted To data selector.
4. data come in after the 4th clock cycle (CLK3), data selecting module 6 is defeated according to state machine control module 7 The tx_coded_sel entered judges whether output data, if tx_coded_sel=1, and txc [7:0]=8 ' b01111111, Then 2 data xgmii_txd_dd [65:0] of the second latch module is read, at this time sync_header_o [1:0]=xgmii_ Txd_dd [65:64]=2 ' b10, encode_o [63:0]=encode={ 35,9c, 0,0,0,0,0,0 }, has encoded at this time At.If tx_coded_sel=0, mark sends frame mistake.Encode_o [63:0]=0xFEFEFEFE_FEFEFEFE, at this time Coding is completed.
Situation 3: the data information xgmii_txd_i [63:0] of transmission is 64bit control word (assuming that transmission data are 0xfd070707_0707), xgmii_txc_i [7:0]=8 ' b11111111 needs two-stage decoding just achievable in this case Coding work.
1. data come in after first clock cycle (CLK0), data be written the first latch module 1 in, meanwhile, Sync_header [1:0]=2 ' b10 is exported in level encoder module 2, indicates that the data block is non-clear data, in addition the moment Input data is divided into 8 channel outputs by channel division module, is respectively as follows: lane0=0xfd, lane1=0x07, lane2= 0x07, lane3=0x07, lane4=0x07, lane5=0x07, lane6=0x07, lane7=0x07.
2. data come in after second clock cycle (CLK1), the data in the first latch module 1 are read, with level-one The sync_header [1:0] that coding module 2 exports synthesizes 66bit data, and the second latch module 4 is written;In addition, level encoder Module judges the bag data according to input xgmii_txc_i for non-total evidence, and level encoder module exports txc [7:0]=8 ' B11111111, according to xgmii_txc_i [7:0]=8 ' b11111111, the corresponding relationship of look-up table 4 can obtain block_type =blk_type1.
3. data come in after the third clock cycle (CLK2), second level coding module is reflected according to table 5 when lane0=0xfd Penetrate Block Type Field=0x87, according to table 3 by t_blk_type be arranged to T data type (t_blk_type [2:0]= 3 ' b100), it is sent to state machine control module 7, state machine control module judges according to the transmission state machine (such as Fig. 2) of oneself Whether the T data type received at this time is legal, if legal, just exports tx_coded_sel=1 to data selecting module 6, such as The illegal tx_coded_sel=0 of fruit, in addition, the value in 8 channels of channel division module output carries out byte mapping according to table 1, Lane0=0xfd mapping becomes/T//(not referring in agreement, can be customized for 0x9c herein), lane1=0x07 mapping As/I/, that is, 0x00, lane2=0x07 mapping becomes/I/, that is, 0x00, and lane3=0x07 mapping becomes/I/, that is, 0x00, Lane4=0x07 mapping becomes/I/, that is, 0x00, and lane5=0x07 mapping becomes/I/, that is, 0x00, and lane6=0x07 is mapped to For/I/, that is, 0x00, lane7=0x07 mapping becomes/I/, that is, 0x00 and encode={ 9c, 0,0,0,0,0,0,0 } is input to Data selector.
4. data come in after the 4th clock cycle (CLK3), data selecting module 6 is defeated according to state machine control module 7 The tx_coded_sel entered judges whether output data, if tx_coded_sel=1, and txc [7:0]=8 ' b11111111 Second latch module, 4 data xgmii_txd_dd [65:0] is read, at this time sync_header_o [1:0]=xgmii_ Txd_dd [65:64]=2 ' b10, encode_o [63:0]=encode={ 9c, 0,0,0,0,0,0,0 }, has encoded at this time At.If tx_coded_sel=0, mark sends frame mistake.Encode_o [63:0]=0xFEFEFEFE_FEFEFEFE, at this time Coding is completed.
According to above scheme, logical design description is carried out to the coding control method with Verilog HDL language, and complete At logic synthesis and placement-and-routing, a coding controller is realized;Meanwhile a hardware verification plate based on FPGA of design, and The function of controller is tested.Test result shows that the present invention has good exploitativeness, and performance meets expection. Coding thinking of the invention has reference simultaneously for the extensive look-up table coding in other high speed data transfers.
The above content is merely illustrative of the invention's technical idea, and this does not limit the scope of protection of the present invention, all to press According to technical idea proposed by the present invention, any changes made on the basis of the technical scheme each falls within claims of the present invention Protection scope within.

Claims (6)

1. a kind of 64B/66B encoder tabled look-up based on second level, which is characterized in that including the first latch module (1), level-one is compiled Code module (2), channel division module (3), the second latch module (4), second level coding module (5), data selecting module (6) and State machine control module (7);
Wherein, the first latch module (1) is sent out for caching to the 64bit data of input, and by the 64bit data of caching Give the second latch module (4);
Level encoder module (2), which is used to control information xgmii_txc according to the 8bit of input, translates part block type, and generates same Head is walked, synchronous head is sent to the second latch module (4), by received 8bit control information txc [7:0] and level encoder knot Fruit is sent to second level coding module (5);
Channel division module (3) is divided into the 0th to the 7th totally 8 channels, one, each channel word for will input parallel 64bit Section, and 8 bytes after division are sent to second level coding module (5);
Second latch module (4) is used for sequential coupling and data buffer storage, caches the first latch module (1) hair received The synchronous head that the 64bit data and level encoder module (2) sent are sent, and make the second latch module (4) output and The output synchronization of second level coding module (5) reaches data selecting module (6);
Second level coding module (5) is used for the result block_type according to level encoder module (2), the joint passage division module (3) original code word lane_0 [7:0], the lane_3 [7:0] in the 0th channel and the 3rd channel that export, obtain whole block types Block TypeField, and the value in 8 channels of channel division module (3) output is carried out according to XGMII command character mapping table Byte mapping, obtains coded data encode;By 8bit block type Block Type Field, the coded number in channel 0 to channel 7 Data selecting module (6) are sent to according to encode and 8bit control information xgmii_txc;Block Type Field will be used simultaneously The block structure word t_blk_type of generation is exported to state machine control module (7);
Data selecting module (6) judges whether reception data export according to the enable signal that state machine control module (7) exports, such as Fruit can export, and just export 66bit with synchronous head according to coding result, data encoding result includes the synchronous head and 64bit of 2bit Coded data encode;If cannot export, output error is identified;
Obtained block type judges the legitimacy of code stream after state machine control module (7) is used to be encoded according to second level, and will sentence Disconnected result is sent to data selecting module (6) as control signal.
2. a kind of 64B/66B coding method that the second level based on encoder described in claim 1 is tabled look-up, which is characterized in that packet Include following steps:
In step 1, the 64bit data information write-in the first latch module (1) inputted, level encoder module (2) is according to control Information xgmii_txc determines synchronous head sync_header_o [1:0];Channel division module (3) believes the 64bit data of input Breath is divided into 8 channels and exports to second level coding module (5);
Data in step 2, the first latch module (1) are read, the synchronous head sync_ with level encoder module (2) output Header_o [1:0] synthesizes 66bit data, and is written in the second latch module (4);Level encoder module (2) is according to input Control information xgmii_txc judge the type of the bag data, and export block structure block_type and control information xgmii_ txc;
Level encoder mould result block_type that step 3, second level coding module (5) are exported according to level encoder module (2) and The lane_0 [7:0] and lane_3 [7:0] data of channel division module (3) output carry out second level coding, obtain second level coding knot Fruit Block Type Field;And Block Type Field is mapped to corresponding block structure word t_blk_type, then send out It gives state machine control module (7), state machine control module (7) is sentenced according to the block structure word that state machine judgement receives at this time is sent Whether the bag data of breaking is legal, if legal, exports tx_coded_sel=1 to data selecting module (6), if illegally, tx_ Coded_sel=0;The value in 8 channels that second level coding module (5) exports channel division module (3) is according to XGMII command character Mapping table carries out byte mapping, obtains coded data encode;
Step 4, data selecting module (6) judge whether output data according to the value of the tx_coded_sel received, if tx_ Coded_sel=1, and txc [7:0]=8 ' b00000000, then the 64bit is total evidence, then by the second latch module (4) Data xgmii_txd_dd [65:0] read, sync_header_o [1:0]=xgmii_txd_dd [65:64] at this time, Encode_o [63:0]=xgmii_txd_dd [63:0], coding are completed;If tx_coded_sel=1, txc [7:0]!=8 ' B00000000, then the 64bit is not total evidence, then reads the data xgmii_txd_dd [65:0] of the second latch module (4) Out, sync_header_o [1:0]=xgmii_txd_dd [65:64] at this time, txc corresponds to position when being 1, which is control word Symbol, the encode of output second level coding module (5) input, the byte is data character when the corresponding position txc [7:0] is 0, output the The data cached corresponding byte of two latch modules (4) input;If tx_coded_sel=0, indicate to send frame mistake; Encode_o [63:0]=0xFEFEFEFE_FEFEFEFE, coding are completed.
3. a kind of 64B/66B coding method tabled look-up based on second level according to claim 2, which is characterized in that step 2 In, it tables look-up to obtain level encoder result block structure block_type.
4. a kind of 64B/66B coding method tabled look-up based on second level according to claim 2, which is characterized in that second level is compiled Code is when controlling information xgmii_txc is 11111111,11111000 or 10001000, according to block structure block_type and the The data information of the input in 0 channel and the 3rd channel determines Block Type Field.
5. a kind of 64B/66B coding method tabled look-up based on second level according to claim 2, which is characterized in that step 2 In, data type includes S data type, T data type, D data type, E data type and C data type, wherein S data Type includes the legacy structure block that block_type is 0x33,0x66 and 0x78, and S data type includes that block_type is The legacy structure block of 0x87,0x99,0xaa, 0xb4,0xcc, 0xd2,0xe1 and 0xff, S data type include that synchronous head is 01 Block data structure, E data type be illegal block structure, C data type be other legal block structures.
6. a kind of 64B/66B coding method tabled look-up based on second level according to claim 2, which is characterized in that step 2 In, xgmii_txc determines synchronous head process according to the control information are as follows: when control information xgmii_txc_i [7:0]=8 ' When b00000000,2 ' b01 of synchronous head, otherwise, 2 ' b10 of synchronous head.
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