CN109324680A - Embeded processor and its power consumption optimization method and smart lock - Google Patents
Embeded processor and its power consumption optimization method and smart lock Download PDFInfo
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- CN109324680A CN109324680A CN201810864124.2A CN201810864124A CN109324680A CN 109324680 A CN109324680 A CN 109324680A CN 201810864124 A CN201810864124 A CN 201810864124A CN 109324680 A CN109324680 A CN 109324680A
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- embeded processor
- interrupt
- power consumption
- peripheral
- interruption
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/3287—Power saving characterised by the action undertaken by switching off individual functional units in the computer system
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/329—Power saving characterised by the action undertaken by task scheduling
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/4401—Bootstrapping
- G06F9/4418—Suspend and resume; Hibernate and awake
-
- G—PHYSICS
- G07—CHECKING-DEVICES
- G07C—TIME OR ATTENDANCE REGISTERS; REGISTERING OR INDICATING THE WORKING OF MACHINES; GENERATING RANDOM NUMBERS; VOTING OR LOTTERY APPARATUS; ARRANGEMENTS, SYSTEMS OR APPARATUS FOR CHECKING NOT PROVIDED FOR ELSEWHERE
- G07C9/00—Individual registration on entry or exit
- G07C9/00174—Electronically operated locks; Circuits therefor; Nonmechanical keys therefor, e.g. passive or active electrical keys or other data carriers without mechanical keys
- G07C9/00309—Electronically operated locks; Circuits therefor; Nonmechanical keys therefor, e.g. passive or active electrical keys or other data carriers without mechanical keys operated with bidirectional data transmission between data carrier and locks
-
- G—PHYSICS
- G07—CHECKING-DEVICES
- G07C—TIME OR ATTENDANCE REGISTERS; REGISTERING OR INDICATING THE WORKING OF MACHINES; GENERATING RANDOM NUMBERS; VOTING OR LOTTERY APPARATUS; ARRANGEMENTS, SYSTEMS OR APPARATUS FOR CHECKING NOT PROVIDED FOR ELSEWHERE
- G07C9/00—Individual registration on entry or exit
- G07C9/00174—Electronically operated locks; Circuits therefor; Nonmechanical keys therefor, e.g. passive or active electrical keys or other data carriers without mechanical keys
- G07C9/00571—Electronically operated locks; Circuits therefor; Nonmechanical keys therefor, e.g. passive or active electrical keys or other data carriers without mechanical keys operated by interacting with a central unit
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Abstract
The embodiment of the present invention provides a kind of embeded processor and its power consumption optimization method and smart lock, belongs to field of electronic devices.The power consumption optimization method includes: to carry out interruption configuration to embeded processor, and open embeded processor and can receive the total interface of interruption；Configuration embeded processor is in suspend mode, and when receiving peripheral interrupt or internal interrupt, exits suspend mode to execute task；Embeded processor is configured after execution task, again in suspend mode to wait peripheral interrupt or internal interrupt next time.The present invention constructs based on Low-power-consumptiodormancy dormancy, using peripheral interrupt or internal interrupt as the optimised power consumption scheme of trigger condition, so that embeded processor is only run when in response to interrupting, other times are then in the dormant state of low-power consumption, dramatically save power consumption.
Description
Technical field
The present invention relates to field of electronic devices, more particularly to a kind of embeded processor and its power consumption optimization method and intelligence
It can lock.
Background technique
Embeded processor, such as MCU (Micro Controller Unit, micro controller unit are commonly called as single-chip microcontroller),
It is the control centre of many electronic equipments or system.But it is embedded for using this battery powered class of electronic devices or system
The optimised power consumption of processor is a technical requirements of its unusual core, needs to accomplish that power consumption is low as far as possible to ensure equipment or system
It can run steadily in the long term.Simultaneously optimised power consumption be related to embeded processor itself operation logic and each peripheral hardware operation when
Sequence, by its with processing or system combine software frame as a whole when, it is particularly important.
But the system at present centered on embeded processor, center of gravity is embodied as with function, in the base that function is realized
On plinth, then optimised power consumption is paid close attention to, such scheme makes the logic of software frame not using optimised power consumption as overriding concern target, from
And complete optimised power consumption scheme cannot be formed.
Summary of the invention
The purpose of the embodiment of the present invention is that providing a kind of embeded processor and its power consumption optimization method and smart lock, it is used for
Solve the problems, such as the optimised power consumption of embeded processor.
To achieve the goals above, the embodiment of the present invention provides a kind of power consumption optimization method of embeded processor, comprising:
Interruption configuration is carried out to the embeded processor, and open the embeded processor to receive the institute of interruption
There is interface；
Configure the embeded processor and be in suspend mode, and receive it is following any one or both when, exit
The suspend mode is to execute task: the peripheral interrupt that external equipment is generated based on peripheral hardware incoming event；The embedded processing
The internal interrupt that the timer of device is generated based on predeterminable event；
The embeded processor is configured after executing the task, it is again next to wait in the suspend mode
The secondary peripheral interrupt or the internal interrupt.
Optionally, the external equipment is based on the peripheral hardware incoming event and generates the peripheral interrupt to include: according to by institute
State embeded processor execution logic task in the peripheral hardware incoming event quantity, by the logic task be divided into according to
The secondary several subtasks being performed, wherein the corresponding peripheral hardware incoming event in each subtask；And the outside
Equipment is based on any one of subtask pair when requesting the embeded processor to execute any one of subtask
The peripheral hardware incoming event answered generates the peripheral interrupt.
Optionally, the power consumption optimization method further include: the embeded processor carries out the external equipment initial
Change, so that the external equipment works independently of the embeded processor or suspend mode.
Optionally, the peripheral interrupt include I2C interrupt, SPI (Serial Peripheral Interface, it is serial outer
If interface) it interrupts, UART (Universal Asynchronous Receiver/Transmitter, universal asynchronous receiving-transmitting transmission
Device) interrupt and GPIO (General Purpose Input Output, universal input output) interrupt, timer interruption and in real time
Any one in clock RTC interruption or more persons.
Optionally, the embeded processor is MCU, DSP (Digital Signal Processing, at digital signal
Reason), in MPU (Micro Processor Unit, microprocessor unit) and SOC (System On Chip, system on chip)
Any one or more persons.
On the other hand, the embodiment of the present invention also provides a kind of embeded processor, comprising:
First configuration module for carrying out interruption configuration to the embeded processor, and opens the embedded processing
Device can receive the total interface of interruption；And
Second configuration module is in suspend mode for configuring the embeded processor, and following any receiving
When one or both, the suspend mode is exited to execute task: in the peripheral hardware that external equipment is generated based on peripheral hardware incoming event
It is disconnected；The internal interrupt that the timer of the embeded processor is generated based on predeterminable event；
Also, second configuration module is also used to configure the embeded processor after executing the task, weight
Newly in the suspend mode to wait the peripheral interrupt or the internal interrupt next time.
Optionally, the external equipment is based on the peripheral hardware incoming event and generates the peripheral interrupt to include: according to by institute
State embeded processor execution logic task in the peripheral hardware incoming event quantity, by the logic task be divided into according to
The secondary several subtasks being performed, wherein the corresponding peripheral hardware incoming event in each subtask；And the outside
Equipment is based on any one of subtask pair when requesting the embeded processor to execute any one of subtask
The peripheral hardware incoming event answered generates the peripheral interrupt.
Optionally, the embeded processor further include: initialization module, it is initial for being carried out to the external equipment
Change, so that the external equipment works independently of the embeded processor or suspend mode.
Optionally, the peripheral interrupt includes that I2C is interrupted, SPI is interrupted, UART is interrupted and GPIO is interrupted, timer interruption
With RTC interrupt in any one or more persons；And the corresponding interface that can receive interruption having of the embeded processor
Including any one or the more persons in I2C interface, SPI interface, UART interface and GPIO interface, timer interface and RTC interface.
Optionally, the embeded processor is any one in MCU, DSP, MPU and SOC or more persons.
On the other hand, the embodiment of the present invention also provides a kind of smart lock, including above-mentioned embeded processor.
Through the above technical solutions, the embodiment of the present invention is constructed using optimised power consumption as primary goal with Low-power-consumptiodormancy dormancy
Based on, using peripheral interrupt or internal interrupt as the optimised power consumption scheme of trigger condition so that embeded processor only responding
It is run when interrupting, other times are then in the dormant state of low-power consumption, to dramatically save power consumption.
The other feature and advantage of the embodiment of the present invention will the following detailed description will be given in the detailed implementation section.
Detailed description of the invention
Attached drawing is to further understand for providing to the embodiment of the present invention, and constitute part of specification, under
The specific embodiment in face is used to explain the present invention embodiment together, but does not constitute the limitation to the embodiment of the present invention.Attached
In figure:
Fig. 1 is a kind of flow diagram of the power consumption optimization method of embeded processor of the embodiment of the present invention；
Fig. 2 is the MCU optimised power consumption scheme of existing MCU optimised power consumption scheme and the embodiment of the present invention in terms of optimised power consumption
Effect contrast figure；
Fig. 3 is the flow diagram for generating peripheral interrupt in the preferred embodiment of the invention based on peripheral hardware incoming event；
Fig. 4 is a kind of structural schematic diagram of embeded processor of another embodiment of the present invention；
Fig. 5 is the frame of the example hardware system of the optimised power consumption scheme of the embeded processor suitable for the embodiment of the present invention
Frame schematic diagram；And
Fig. 6 is the software frame schematic diagram of the optimised power consumption scheme of the embeded processor of the embodiment of the present invention.
Description of symbols
410, the first configuration module；420, the second configuration module；430, initialization module
Specific embodiment
It is described in detail below in conjunction with specific embodiment of the attached drawing to the embodiment of the present invention.It should be understood that this
Locate described specific embodiment and be merely to illustrate and explain the present invention embodiment, is not intended to restrict the invention embodiment.
In embodiments of the present invention, logic task is the set of sequence of events, and it includes a complete processing logics.
The optimised power consumption scheme of existing embeded processor is to be embodied as core with function, so that its software programming logic generally uses
Be using logic task as the software mechanism of minimum task unit, after the processing of logic task is completed, embeded processor
Into suspend mode.
For sharing the smart lock of bicycle, present inventor has found during realizing the present invention program: one
Logic task can (for example, bluetooth receives, unlocking instruction generates interruption or network module receives server from unlocking instruction is received
Unlocking instruction generate interruption) start, to unlock complete and by network upload unlocking result terminate.This complete procedure is often
Last for several seconds, within time several seconds, the time of the actual task of the MCU of smart lock processing is seldom, and most of the time is in etc.
To the information feedback or idle phase of peripheral hardware, but MCU is still in operation and consumes battery capacity.
Therefore, it is different from existing MCU optimised power consumption scheme using logic task as minimum task unit, the embodiment of the present invention mentions
Go out with the processing of peripheral hardware task for a kind of MCU optimised power consumption scheme of minimum task unit, has been described in detail below text.
Fig. 1 is a kind of flow diagram of the power consumption optimization method of embeded processor of the embodiment of the present invention, wherein institute
Stating embeded processor can be MCU, DSP (Digital Signal Processing, Digital Signal Processing), MPU (Micro
Processor Unit, microprocessor unit), any one or more persons in SOC (System On Chip, system on chip),
Hereafter mainly by taking MCU as an example.
As shown in Figure 1, the power consumption optimization method may comprise steps of:
Step S110 carries out interruption configuration to the embeded processor, and opens the embeded processor and can connect
Receive the total interface interrupted.
Step S120 configures the embeded processor and is in suspend mode, and receive it is following any one or two
When person, the suspend mode is exited to execute task:
1) peripheral interrupt that external equipment is generated based on peripheral hardware incoming event；
2) internal interrupt that the timer of the embeded processor is generated based on predeterminable event.
Wherein, the external equipment refers to relatively independent with equipment or system where the embeded processor, but can
Equipment, module or the system of information exchange are carried out, such as the smart lock with embeded processor, the service communicated with
Device, smart phone etc. can be its external equipment.
Wherein, peripheral interrupt may include I2C interruption, SPI (Serial Peripheral Interface, serial peripheral
Interface) it interrupts, UART (Universal Asynchronous Receiver/Transmitter, universal asynchronous receiving-transmitting transmission
Device) it interrupts and GPIO (General Purpose Input Output, universal input output) interruption, timer interruption and RTC
Any one in interruption or more persons.
Wherein, the predeterminable event is, for example, to inquire primary network intensity etc. at regular intervals between requiring, and can be passed through
The timer of embeded processor itself generates respective interrupt.
Further, it can be appreciated that peripheral hardware incoming event and predeterminable event respectively correspond peripheral hardware task in logic task and
Preset task, i.e. a logic task can be divided based on peripheral hardware task and/or preset task, and at a logic task
During reason, when having peripheral hardware task and/or preset task to need to handle, embeded processor can be received in corresponding peripheral hardware
Disconnected and/or internal interrupt.
For external equipment, in a preferred embodiment, the power consumption optimization method can also include: the embedded place
Reason device initializes the external equipment, so that the external equipment works or stops independently of the embeded processor
It sleeps.In this way, external equipment is enabled to be detached from embeded processor autonomous working, avoid external equipment because by embedded processing
The influence of device suspend mode and can not normally generate interruption.
Step S130 configures the embeded processor after executing the task, is in the suspend mode again
To wait the peripheral interrupt or the internal interrupt next time.
In this way, interrupting by setting, a logic task several subtasks based on interruption are divided into, and embedded
Processor exits suspend mode just when receiving interruption only to execute corresponding task, and when not receiving interruption and has executed
After complete task, all in suspend mode, to farthest save the power consumption of embeded processor.
Fig. 2 is the MCU optimised power consumption scheme of existing MCU optimised power consumption scheme and the embodiment of the present invention in terms of optimised power consumption
Effect contrast figure.As shown in Fig. 2, existing MCU optimised power consumption scheme is using entire logic task as minimum task unit, in single
In logic task treatment process, MCU is constantly in operating status, and the MCU optimised power consumption scheme of the embodiment of the present invention is with peripheral hardware
Task and/or preset task are minimum task unit, are only needing to handle peripheral hardware times in single logical task processes
Just in operating status when business or preset task, remaining time is all in dormant state, hence it is evident that reduces embeded processor
Power consumption.
In the embodiment of the present invention, embeded processor is required to handle a plurality of types of logic tasks
Can have multiple logic tasks while arrive or having abnormal interrupt etc., so that the quantity of peripheral hardware incoming event is for embeded processor
It is uncertain, and embeded processor needs respond each peripheral hardware incoming event.Therefore, match in the embodiment of the present invention
It sets embeded processor and responds the peripheral interrupt received in real time, to write in logic in corresponding software, do not limit insertion
The carrying out practically time of formula processor and specific dormancy time.
But in a preferred embodiment, some embeded processors for having special purpose can be can be configured as only
For executing the logic task of some sequence flow forms, and a type of logic task is once only carried out, therefore its peripheral hardware
Incoming event is comparatively fixed, it is contemplated that more accurately control embeded processor the carrying out practically time and specific suspend mode
Time, so that embeded processor can be maximized dormancy time by the rule of logic task, detailed process is as follows.
Fig. 3 is the flow diagram for generating peripheral interrupt in the preferred embodiment of the invention based on peripheral hardware incoming event.Such as
Shown in Fig. 3, it may comprise steps of:
Step S310, according to the number of the peripheral hardware incoming event in the logic task executed by the embeded processor
The logic task, is divided into several subtasks being successively performed by amount.
Wherein, the corresponding peripheral hardware incoming event in each subtask.Because of the peripheral interrupt thing in logic task
Part is relatively fixed, divides logic task in advance so as to quantity based on peripheral hardware incoming event.
Step S320, the external equipment when requesting the embeded processor to execute any one of subtask,
Based on any one of corresponding peripheral hardware incoming event generation in subtask peripheral interrupt.
In this way, embeded processor can be known in advance peripheral interrupt arrival time and corresponding subtask execution when
Between, to be write in logic in corresponding software, can limit embeded processor the carrying out practically time and specific dormancy time, it is real
The maximization dormancy time of the logic task to this kind of sequence flow form is showed.
Fig. 4 is a kind of structural schematic diagram of embeded processor of another embodiment of the present invention, another embodiment with it is upper
The invention thinking of the embodiment for the power consumption optimization method stated is identical.As shown in figure 4, the embeded processor may include:
First configuration module 410 for carrying out interruption configuration to the embeded processor, and opens the embedded place
Reason device can receive the total interface of interruption.
Second configuration module 420 is in suspend mode for configuring the embeded processor, and is receiving following
When one or both of anticipating, the suspend mode is exited to execute task:
1) peripheral interrupt that external equipment is generated based on peripheral hardware incoming event；
2) internal interrupt that the timer of the embeded processor is generated based on predeterminable event.
Also, second configuration module 420 is also used to configure the embeded processor after executing the task,
Again in the suspend mode to wait the peripheral interrupt or the internal interrupt next time.
In a preferred embodiment, for the second configuration module 420, the external equipment is based on the peripheral hardware incoming event
Generating the peripheral interrupt includes: according to the peripheral hardware incoming event in the logic task executed by the embeded processor
Quantity, the logic task is divided into several subtasks being successively performed, wherein each subtask is one corresponding
The peripheral hardware incoming event；And the external equipment is requesting the embeded processor to execute any one of subtask
When, based on any one of corresponding peripheral hardware incoming event generation in subtask peripheral interrupt.
In more preferred embodiment, the embeded processor can also include: initialization module 430, for pair
The external equipment is initialized, so that the external equipment works independently of the embeded processor or suspend mode.
Here, the line of each intermodule is signal in attached drawing, the connection relationship between each module is not limited.
Other implementation details and effect and the embodiment of above-mentioned power consumption optimization method of the embodiment are same or similar, therefore
Details are not described herein.
Further, it is interrupted because being configured with, is apparent from the above-mentioned embodiment about embeded processor and about optimised power consumption
The application of the scheme of the embodiment of method will be dependent on the design of the hardware frame of equipment or system.
Fig. 5 is the frame of the example hardware system of the optimised power consumption scheme of the embeded processor suitable for the embodiment of the present invention
Frame schematic diagram, in the example hardware system, the embeded processor is, for example, MCU.As shown in figure 5, the embodiment of the present invention
The optimised power consumption scheme of embeded processor can be applied to one using MCU as core, by a variety of common Peripheral Interfaces (I2C,
SPI, UART, GPIO etc.) it connects in the hardware system of separate outer equipment or module.The MCU needs to have sleep mode with temporary
Business ceasing to hold office reduces power consumption, and needing to have interrupt function, (including GPIO is interrupted, I2C is interrupted, SPI is interrupted, UART is interrupted, timer
Interrupt, the peripheral interrupts etc. such as RTC is interrupted), external equipment or module are connected to MCU, external equipment or module by common interfaces
Can individually to power and can be detached from the hardware device or module that MCU works independently, when external equipment or module need MCU to be appointed
When business processing, a peripheral interrupt is generated, wakes up the peripheral hardware task processing that MCU carries out this.
Most MCU system can meet the hardware frame of the example hardware system, therefore the embodiment of the present invention is embedding
The optimised power consumption scheme for entering formula processor can be applied in the equipment or system of most embeded processor.
Based on the hardware frame, Fig. 6 is the software frame of the optimised power consumption scheme of the embeded processor of the embodiment of the present invention
Frame schematic diagram is a kind of similar software frame based on state machine different from general software operating process.As shown in fig. 6, big
Cause being described as follows for process:
Step S610 initializes peripheral module.
Specifically, system brings into operation, and MCU initializes all independent peripheral modules, at the beginning of independent peripheral module
MCU autonomous working or suspend mode can be detached from after beginningization.
Timing and peripheral interrupt is arranged in step S620 on demand.
Specifically, MCU carries out interruption configuration, opens all peripheral interrupts for having data to input, open MCU timer or
RTC implement of interruption function timing wake-up.
Step S630, MCU enter and keep suspend mode.
Wherein, MCU enters and keeps dormant state to wait down trigger.
Step S640, peripheral hardware and timer, which generate to interrupt, wakes up MCU.
Step S650, MCU exit suspend mode response interruption.
Further, MCU response interruption may include: the logic preservation logic task context letter according to similar state machine
Breath, the judgement of MCU logic task state when being generated for subsequent interrupt.
Further, a peripheral interrupt task after treatment, MCU re-enter into the suspend mode of low-power consumption,
Interruption next time is waited to arrive.Single peripheral interrupt treatment process should not include any waiting or delay operation, it is all
It waits or delay operation is realized that during waiting or delay, MCU should also enter suspend mode by Interruption.
It is found that the optimised power consumption scheme of the embodiment of the present invention is based on Low-power-consumptiodormancy dormancy, with peripheral interrupt or inside
Interrupting is trigger condition, and peripheral interrupt of every generation or internal interrupt run an interrupt task processing.Wherein, primary to interrupt
It may include that multiple data calculate and module data exports in processing task, may include the no-delay peripheral hardware behaviour of any direct read/write
Make, but any required peripheral hardware input operation waited or latency requirement, implement of interruption function should all be passed through.
Another embodiment of the present invention additionally provides a kind of smart lock, which includes embedded described in above-described embodiment
Processor also meets the hardware frame of above-mentioned example hardware system.
The smart lock is, for example, the smart lock in shared bicycle, and primary unlocking process can be divided into a logic task, should
Since logic task terminate receiving unlocking instruction, and to unlocking result is sent to server.It is related in the logic task more
A peripheral hardware operation, comprising:
1) network module data are read.
Wherein, network module is to be integrated in smart lock, is based on net for realizing smart lock and mobile terminal, server etc.
The functional module that network is communicated.
2) unlocking instruction is parsed.
For example, unlocking instruction comes from server or mobile terminal.
3) starting motor starts to unlock.
Wherein, the motor be used for drive smart lock open or locking driving mechanism, MCU need to wait for lock-switch state with
Judge to unlock and whether complete.
4) it closes motor and stops unlocking action.
5) unlocking result data is sent to network module.
6) it waits network module to return and sends result.
For example, whether network module succeeds to MCU feedback sends the letter of unlocking result to server or mobile terminal
Breath.
All of above and peripheral hardware operates relevant subtask, can complete in a very short period of time, MCU is in remaining time
Wait peripheral hardware the state returned the result, the time that the time of waiting occupies entire logic task is longer, thus have it is extra
Current drain.Aiming at the problem that consumption of this unwanted currents, the power consumption that the embeded processor of the embodiment of the present invention can be used is excellent
Change scheme can be such that the process of unlocking process
1) MCU suspend mode waits module or bluetooth serial ports to interrupt.
For example, it shares bicycle to unlock by bluetooth approach, so that its suspend mode waits peripheral module to send based on bluetooth
Interruption or pass through the received interruption of bluetooth serial ports.
2) it receives interruption and shows there is data transmission, read module or bluetooth serial ports data simultaneously parse unlocking instruction, starting electricity
Machine starts to unlock.
That is, MCU is in response to module or bluetooth serial ports interrupt start to execute unlocking operation.
3) MCU suspend mode waits unlocking condition switch triggering.
4) MCU receive unlocking condition switch interrupts show unlock terminate, close motor stop unlocking action, sent out by serial ports
Send unlocking result to network module.
5) MCU suspend mode waits network module serial data.
6) MCU receives the interruption of the serial ports from network module, reads serial data and judges to judge that network module is sent
Whether unlocking result succeeds.
Being understood with reference to Fig. 2, it is known that MCU is in the dormant state of low-power consumption in waiting or delay in the process,
Greatly reduce the power consumption of MCU.
In conclusion the embodiment of the present invention using optimised power consumption as primary goal, construct based on Low-power-consumptiodormancy dormancy, with
Peripheral interrupt or internal interrupt are the optimised power consumption scheme of trigger condition, and make embeded processor only when in response to interrupting
Operation, other times are then in the dormant state of low-power consumption, to dramatically save the power consumption of embeded processor.
The optional embodiment of the embodiment of the present invention is described in detail in conjunction with attached drawing above, still, the embodiment of the present invention is simultaneously
The detail being not limited in above embodiment can be to of the invention real in the range of the technology design of the embodiment of the present invention
The technical solution for applying example carries out a variety of simple variants, these simple variants belong to the protection scope of the embodiment of the present invention.
It is further to note that specific technical features described in the above specific embodiments, in not lance
In the case where shield, it can be combined in any appropriate way.In order to avoid unnecessary repetition, the embodiment of the present invention pair
No further explanation will be given for various combinations of possible ways.
It will be appreciated by those skilled in the art that implementing the method for the above embodiments is that can pass through
Program is completed to instruct relevant hardware, which is stored in a storage medium, including some instructions are used so that single
Piece machine, chip or processor (processor) execute all or part of the steps of each embodiment the method for the application.And it is preceding
The storage medium stated includes: USB flash disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory
The various media that can store program code such as (RAM, Random Access Memory), magnetic or disk.
In addition, any combination can also be carried out between a variety of different embodiments of the embodiment of the present invention, as long as it is not
The thought of the embodiment of the present invention is violated, equally should be considered as disclosure of that of the embodiment of the present invention.
Claims (11)
1. a kind of power consumption optimization method of embeded processor, which is characterized in that the power consumption optimization method includes:
Interruption configuration is carried out to the embeded processor, and opens the embeded processor and can receive all of interruption and connect
Mouthful；
Configure the embeded processor and be in suspend mode, and receive it is following any one or both when, exit described
Suspend mode is to execute task:
The peripheral interrupt that external equipment is generated based on peripheral hardware incoming event；
The internal interrupt that the timer of the embeded processor is generated based on predeterminable event；
The embeded processor is configured after executing the task, again in the suspend mode to wait next time
The peripheral interrupt or the internal interrupt.
2. power consumption optimization method according to claim 1, which is characterized in that the external equipment is inputted based on the peripheral hardware
Event generates the peripheral interrupt
According to the quantity of the peripheral hardware incoming event in the logic task executed by the embeded processor, by the logic
Task is divided into several subtasks being successively performed, wherein the corresponding peripheral hardware incoming event in each subtask；
And
The external equipment when requesting the embeded processor to execute any one of subtask, based on this any one
The corresponding peripheral hardware incoming event generation in the subtask peripheral interrupt.
3. power consumption optimization method according to claim 1, which is characterized in that the power consumption optimization method further include:
The embeded processor initializes the external equipment, so that the external equipment is independently of described embedded
Processor work or suspend mode.
4. power consumption optimization method according to claim 1, which is characterized in that the peripheral interrupt includes that I2C is interrupted, is serial
Peripheral Interface SPI interrupt, universal asynchronous receiving-transmitting transmitter UART interrupt and universal input output GPIO interrupt, timer interruption and
Any one in real-time clock RTC interruption or more persons.
5. power consumption optimization method as claimed in any of claims 1 to 4, which is characterized in that the embedded processing
Device is any one in micro controller unit MCU, digital signal processor DSP, microprocessor unit MPU and system on chip SOC
Person or more persons.
6. a kind of embeded processor, which is characterized in that the embeded processor includes:
First configuration module for carrying out interruption configuration to the embeded processor, and opens the embeded processor energy
It is enough to receive the total interface interrupted；And
Second configuration module is in suspend mode for configuring the embeded processor, and receive it is following any one
Or both when, exit the suspend mode to execute task:
The peripheral interrupt that external equipment is generated based on peripheral hardware incoming event；
The internal interrupt that the timer of the embeded processor is generated based on predeterminable event；
Also, second configuration module is also used to configure the embeded processor after executing the task, locates again
In the suspend mode to wait the peripheral interrupt or the internal interrupt next time.
7. embeded processor according to claim 6, which is characterized in that the external equipment is inputted based on the peripheral hardware
Event generates the peripheral interrupt
According to the quantity of the peripheral hardware incoming event in the logic task executed by the embeded processor, by the logic
Task is divided into several subtasks being successively performed, wherein the corresponding peripheral hardware incoming event in each subtask；
And
The external equipment when requesting the embeded processor to execute any one of subtask, based on this any one
The corresponding peripheral hardware incoming event generation in the subtask peripheral interrupt.
8. embeded processor according to claim 6, which is characterized in that the embeded processor further include:
Initialization module, for being initialized to the external equipment, so that the external equipment is independently of described embedded
Processor work or suspend mode.
9. embeded processor according to claim 6, which is characterized in that the peripheral interrupt includes I2C interruption, SPI
Any one in interruption, UART interruption and GPIO interruption, timer interruption and RTC interruption or more persons；And
The corresponding interface that can receive interruption having of the embeded processor includes I2C interface, SPI interface, UART interface
With any one or the more persons in GPIO interface, timer interface and RTC interface.
10. embeded processor according to any one of claims 6 to 9, which is characterized in that the embedded processing
Device is any one or more persons in MCU, DSP, MPU and SOC.
11. a kind of smart lock, which is characterized in that including embeded processor described in any one of claim 6 to 10.
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| CN201810864124.2A CN109324680A (en) | 2018-08-01 | 2018-08-01 | Embeded processor and its power consumption optimization method and smart lock |
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| CN201810864124.2A CN109324680A (en) | 2018-08-01 | 2018-08-01 | Embeded processor and its power consumption optimization method and smart lock |
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