CN113253824B

CN113253824B - MCU system based on RISC-V kernel, power supply method and terminal equipment

Info

Publication number: CN113253824B
Application number: CN202110682704.1A
Authority: CN
Inventors: 陈龙
Original assignee: Chengdu Aich Technology Co Ltd
Current assignee: Chengdu Aich Technology Co Ltd
Priority date: 2021-06-21
Filing date: 2021-06-21
Publication date: 2021-11-12
Anticipated expiration: 2041-06-21
Also published as: CN113253824A

Abstract

The invention discloses an MCU system based on RISC-V kernel, a power supply method and a terminal device, relates to the technical field of MCU chips, and provides an MCU system capable of meeting the requirement of low power consumption in the field of mobile Internet of things using batteries. The method comprises the following steps: a power supply and an MCU. The power consumption module of the MCU comprises a plurality of power-down domain power consumption modules and a plurality of normally-open domain power consumption modules; the power supply includes a primary power supply and a secondary power supply. The plurality of power-down domain power consumption modules are electrically connected with the main power supply, and the plurality of normally-open domain power consumption modules are electrically connected with the auxiliary power supply. When the MCU is in a working mode, the main power supply is in short circuit with the auxiliary power supply and is used for supplying power to the plurality of normally open domain power consumption modules and the plurality of power failure domain power consumption modules. When the MCU is in a low power consumption mode, the main power supply is closed, and the auxiliary power supply is used for supplying power to the plurality of normally open domain power consumption modules.

Description

MCU system based on RISC-V kernel, power supply method and terminal equipment

Technical Field

The invention relates to the technical field of MCU chips, in particular to an MCU system based on RISC-V kernel, a power supply method and a terminal device.

Background

In the world of internet of things with internet of everything interconnected, an MCU (micro controller Unit) chip is an important component of the internet of things, and power consumption performance of the MCU chip needs to be considered in many application scenarios. In practice, in combination with an application scenario of the MCU chip, the power consumption of the MCU chip can be reduced by switching the low-frequency clock, turning off unnecessary peripherals, and reducing the power voltage, and the operating state of the chip is generally divided into a normal operating mode, a low power consumption mode, a sleep mode, and the like according to the working requirement, so that different power consumption strategies are adopted in different operating states when designing the MCU chip.

The MCU based on RISC-V (instruction set architecture) comprises a high-performance open source RISC-V kernel, a plurality of digital modules and a plurality of analog elements, and the digital module elements and the analog elements need to consume electricity, so that the power consumption of the MCU is higher. The currently common method for realizing low power consumption of the MCU is to use different controls, such as switching a low-frequency clock and turning off unnecessary energy consumption modules, for the energy consumption modules by software based on a specific scene of chip use so as to achieve the purpose of energy saving. However, the above method obviously does not meet the requirement of ultra-low power consumption in the field of mobile internet of things using batteries.

Disclosure of Invention

The invention aims to provide an MCU system based on a RISC-V kernel, a power supply method and terminal equipment, and provides the MCU system capable of meeting the requirement of low power consumption in the field of mobile Internet of things using batteries.

In a first aspect, the present invention provides an MCU system based on RISC-V kernel, comprising: a power supply and an MCU. The power consumption module of the MCU comprises a plurality of power-down domain power consumption modules and a plurality of normally-open domain power consumption modules; the power supply comprises a main power supply and a secondary power supply; the plurality of power-down domain power consumption modules are electrically connected with the main power supply, and the plurality of normally-open domain power consumption modules are electrically connected with the auxiliary power supply.

When the MCU is in a working mode, the main power supply is in short circuit with the auxiliary power supply and is used for supplying power to the plurality of normally open domain power consumption modules and the plurality of power failure domain power consumption modules. When the MCU is in a low power consumption mode, the main power supply is closed, and the auxiliary power supply is used for supplying power to the plurality of normally open domain power consumption modules.

Under the condition of adopting the scheme, the power consumption module in the MCU is divided into a plurality of power-down domain power consumption modules and a plurality of normally-open domain power consumption modules. The power supply is divided into a main power supply and a secondary power supply, wherein the main power supply is a high-performance power supply, and the secondary power supply is a low-power consumption power supply. When the MCU is in a working mode, the main power supply is in short circuit with the auxiliary power supply and is used for supplying power to the plurality of normally open domain power consumption modules and the plurality of power failure domain power consumption modules so as to realize the normal work of the MCU. When the MCU is in a low power consumption mode, the main power supply is closed, and the auxiliary power supply is used for supplying power to the plurality of normally-open domain power consumption modules, so that the low power consumption of the MCU is realized. Therefore, when the MCU works in a working mode and a low power consumption mode, the invention uses two different power supplies to supply power, thereby ensuring that the MCU achieves the balance of performance and low power consumption.

Moreover, compared with the prior art that different controls are adopted for the energy consumption module through software, the invention optimizes the power consumption of the MCU system based on the hardware layer, thereby improving the low power consumption characteristic of the MCU, and therefore, the reliability of the invention is higher.

In a second aspect, the invention also discloses an MCU power supply method based on RISC-V kernel, comprising:

when the MCU is in a working mode, the main power supply and the auxiliary power supply are controlled to be in short circuit, and the main power supply is controlled to supply power to the normally open domain power consumption module and the power failure domain power consumption module;

when the MCU is in a low power consumption mode, the main power supply is controlled to be closed, and the auxiliary power supply is controlled to supply power to the normally open domain power consumption module.

In a third aspect, the present invention also discloses a terminal device, which includes a processor, a memory and a computer program stored in the memory and capable of running on the processor, wherein when the computer program is executed by the processor, the MCU power supply method based on RISC-V kernel is implemented.

In a fourth aspect, the present invention further discloses a computer storage medium, in which a computer program is stored, and the computer program, when being executed by a processor, implements the steps of the above-mentioned MCU power supply method based on RISC-V kernel.

The beneficial effects of the second aspect, the third aspect, the fourth aspect, and various implementations of the second aspect are the same as the beneficial effects of the first aspect or any possible implementation of the first aspect, and are not described herein again.

Drawings

The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the invention and not to limit the invention. In the drawings:

FIG. 1 is a diagram showing the architecture of an MCU system based on RISC-V kernel according to an embodiment of the present invention;

FIG. 2 is a schematic diagram illustrating power domain division of an MCU system based on RISC-V kernel according to an embodiment of the present invention;

FIG. 3 shows a schematic structural diagram of a main power supply and a secondary power supply of an MCU system based on RISC-V kernel according to an embodiment of the present invention;

FIG. 4 is a flowchart illustrating steps of a method for powering an MCU based on RISC-V kernel according to an embodiment of the present invention;

FIG. 5 shows a hardware flowchart of MCU operation mode switching in the MCU power supply method based on RISC-V kernel provided by the embodiment of the present invention;

fig. 6 shows a schematic diagram of a hardware structure of a terminal device according to an embodiment of the present invention.

Reference numerals: 200-terminal device, 2101-first processor, 2102-second processor, 210-processor, 220-memory, 230-communication interface, 240-communication line.

Detailed Description

Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. It should be understood that the description is illustrative only and is not intended to limit the scope of the present disclosure. Moreover, in the following description, descriptions of well-known structures and techniques are omitted so as to not unnecessarily obscure the concepts of the present disclosure.

Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means two or more unless specifically defined otherwise. The meaning of "a number" is one or more unless specifically limited otherwise.

In the world of internet of things with internet of everything interconnected, an MCU (micro controller Unit) chip is an important component of the internet of things, and power consumption performance of the MCU chip needs to be considered in many application scenarios. In practice, in combination with an application scenario of the MCU chip, the power consumption of the MCU chip can be reduced by switching the low-frequency clock, turning off unnecessary peripherals, reducing power supply voltage, and the like, and the running state of the chip is generally divided into a normal working mode, a low power consumption mode, a sleep mode, and the like according to the working requirement, so as to achieve the low power consumption purpose, therefore, the MCU chip is designed with different power consumption strategies in different running states.

In some technologies, the Power domain of the MCU with RISC-V architecture is divided into a main Power domain, a debug Power domain and a normally open Power domain, and the MCU is controlled by a PMU (Power Manager Unit) Unit to enter different low Power modes. Although the method can greatly optimize the energy consumption of the MCU, in many severe scenes with ultra-low power consumption requirements, for example, when the IOT equipment of the button cell needs to stand by for a long time outdoors, even if the clocks of the peripheral module, the Eflash and the like are all closed, the power supply only keeps working in a normally open power domain, but the self consumption of the power supply is about 50uA, and the ultra-low power consumption in the true sense cannot be realized.

Based on this, the embodiment of the present invention provides an MCU system based on RISC-V kernel, which includes: a power supply and an MCU. The power consumption module of the MCU comprises a plurality of power-down domain power consumption modules and a plurality of normally-open domain power consumption modules; the power supply comprises a main power supply and a secondary power supply; the plurality of power-down domain power consumption modules are electrically connected with the main power supply, and the plurality of normally-open domain power consumption modules are electrically connected with the auxiliary power supply.

The MCU system based on the RISC-V kernel divides all power consumption modules of the MCU into a power-down domain power consumption module and a normally-open domain power consumption module. The power-down domain power consumption module stops supplying power after the MCU enters the ultra-low power consumption mode, and the normally-open domain power consumption module keeps the power-on state all the time. And in the low power consumption mode, the main power supply is closed, and only the auxiliary power supply supplies power to the plurality of normally open domain power consumption modules, so that the low power consumption of the MCU is realized. And the auxiliary power supply has lower power consumption relative to the main power supply, so that low power consumption can be further realized.

In one possible implementation, fig. 1 shows an architecture diagram of an MCU system based on a RISC-V core. The MCU includes a RISC-V core, a program memory, a data memory, a High-speed AHB (Advanced High Performance Bus) and an external APB (Advanced Peripheral Bus). Wherein, the program memory and the data memory are connected with the RISC-V kernel. The RISC-V kernel and the high-speed module of the MCU are connected with the high-speed AHB. IIC (Inter-Integrated Circuit), UART (Universal Asynchronous Receiver/Transmitter), CAN (Controller Area Network), IR (Instruction Register), SPI (Serial Peripheral Interface), ADC (assembly Instruction), and CMP (Chip multiprocessors). GPIO (General-purpose input/output), PMU (Power Management Unit), OSC (oscillator), PLL (Phase-Locked Loop), IWDT (independent watchdog), RTC (Real Time Clock) are connected to the peripheral APB.

Referring to fig. 1, the MCU system provided in the embodiment of the present invention is based on RISC-V instruction set architecture, and the kernel architecture has the characteristics of open source, simplicity, and high performance. The RISC-V kernel is hung on an AHB (high performance bus) as a main module, and the kernel initiates read-write operation to carry out data interaction with the slave equipment. The data memory, program memory, system controller, etc. are all connected through the AHB to the RISC-V core, which can be accessed directly. And for other peripheral devices, such as GPIO, IIC, UART and the like, the APB is hung on the APB. Slave devices, RISC-V cores, conforming to the APB bus protocol may also access these devices via the bridge.

Further, the MCU system based on RISC-V kernel provided by the embodiment of the present invention further includes a power management module (PMU). The power management module is electrically connected with the power supply switches of the plurality of power-down domain power consumption modules and is used for controlling the power supply switches of the plurality of power-down domain power consumption modules when the MCU is switched from the working mode to the low power consumption mode so as to disconnect the main power supply from the plurality of power-down domain power consumption modules. The power management module is further used for controlling power supply switches of the power-down domain power consumption modules when the MCU is switched from the low power consumption mode to the working mode, so that the main power supply is electrically connected with the power-down domain power consumption modules.

Based on this, in the embodiment of the present invention, the power management module controls the power supply switches of the plurality of power-down domain power consumption modules, so that when the MCU is switched from the operating mode to the low power consumption mode, the power supply switches of the plurality of power-down domain power consumption modules are controlled to be turned off, so that the plurality of power-down domain power consumption modules are powered down, and at this time, the MCU enters the low power consumption mode. And when the MCU is switched from the low power consumption mode to the working mode, controlling the power supply switches of the power-down domain power consumption modules to be closed so as to enable the main power supply to be electrically connected with the power-down domain power consumption modules, and at the moment, the MCU enters the working mode.

On the basis, the MCU system based on the RISC-V kernel also comprises a switch device for connecting the main power supply and the auxiliary power supply. The power management module is electrically connected with the switch device, and is used for controlling the switch device to be switched off when the MCU is switched from the working mode to the low power consumption mode, and is also used for controlling the switch device to be switched on when the MCU is switched from the low power consumption mode to the working mode.

When the MCU is switched from the working mode to the low power consumption mode, the switching device is disconnected for disconnecting the secondary power supply from the main power supply. And when the MCU is switched from the low power consumption mode to the working mode, the switching device is closed and is used for enabling the auxiliary power supply and the main power supply to be in short circuit.

Further, when the MCU executes the waiting interrupt signal, the MCU is switched from the working mode to the low power consumption mode. Wherein the wait interrupt signal may be generated by a RISC-V instruction set definition.

When the MCU executes a wake-up signal, the MCU is switched from the low-power-consumption mode to the working mode, wherein the wake-up signal is generated by one or more of the plurality of normally-open-domain power consumption modules.

In the embodiment of the invention, the power-down domain power consumption module can comprise the RISC-V kernel, a main power supply, a bus, a phase-locked loop and a memory. The normally open domain power consumption module can comprise an independent watchdog module, a real-time clock module and a crystal oscillator module.

For example, fig. 2 shows a power domain division schematic diagram of an MCU system based on RISC-V core. The power-down area comprising the kernel, the bus, the memory and most of digital circuits is powered by a main power supply (MLDO), and after the kernel receives a low power consumption instruction (WFI), the system can selectively control the switches of the modules through a PMU before closing the MLDO, so that the power consumption is reduced by entering a low power consumption mode; modules in the normally open domain, including IWDT, RTC and OSC, belong to the part of the low power consumption MCU system which needs to be powered all the time, because no matter what specific sleep or standby mode the system enters, the MCU system is ensured to be woken up from the low power consumption mode, so that the RTC and IWDT which are used as the timing wake-up modules are kept in the normally open state.

As a specific example, referring to fig. 3, an MCU system based on RISC-V core according to an embodiment of the present invention includes a high-performance main power supply (MLDO) and a low-power auxiliary power supply (LPLDO). When the MCU is in the operating mode, different modules inside the MCU are powered by the high performance MLDO and low power LPLDO short, i.e., the MLDO _ SW switch in fig. 3 is closed. When the MCU is in the low power consumption mode, the LDO with high performance can be turned off together with other unnecessary functions, namely the MLDO _ SW is turned off, until the MLDO is turned on again after the system is awakened by the awakening circuit. However, when the MCU switches between different power supply modes, the MCU must strictly perform power on/off operations according to the power architecture scheme of the low power consumption system, otherwise the MCU may be erroneously reset due to power failure.

Referring to fig. 3, the power-down domain power consumption module is electrically connected to a power-down region, and the normally-open domain power consumption module is electrically connected to a normally-open region. ISO is a pressure relay, when the MCU is switched from the working mode to the low power consumption mode, the MLDO _ SW switch is controlled to be switched off, ISO is controlled to be switched off, a main power supply (MLDO) is controlled to be switched off, the power-down domain power consumption module is switched off at the moment, and the MCU is switched to the low power consumption mode. When the MCU switches the working mode from the low power consumption mode, the normally open domain power consumption module generates a wake-up signal to the normally open region to realize wake-up control, at the moment, the MLDO _ SW switch is controlled to be closed, the main power supply (MLDO) and the auxiliary power supply (LPLDO) are in short circuit, and the MCU switches to the working mode.

Referring to fig. 4, the embodiment of the invention also discloses an MCU power supply method based on RISC-V kernel, which is applied to the above mentioned MCU system based on RISC-V kernel, the MCU power supply method based on RISC-V kernel includes:

s101, when the MCU is in a working mode, the main power source and the auxiliary power source are controlled to be in short circuit, and the main power source is controlled to supply power to the normally open domain power consumption module and the power failure domain power consumption module.

It can be understood that, under the condition that the MCU is in the operating mode, the normally-on domain power consumption module and the power-off domain power consumption module are both in operation, and at this time, the main power supply and the auxiliary power supply are required to work together to meet the power supply requirements of the power consumption modules. Thus, the primary and secondary power supplies may be shorted to achieve the above power requirements.

And S102, when the MCU is in a low power consumption mode, controlling the main power supply to be closed, and controlling the auxiliary power supply to supply power to the normally open domain power consumption module.

When the MCU is in a low power consumption mode, the power consumption module in the power failure domain does not need to work. The normally open domain power consumption module comprising the IWDT, the RTC and the OSC belongs to a part which needs power supply all the time, and no matter what specific sleep or standby mode the MCU system based on the RISC-V kernel enters, the MCU system based on the RISC-V kernel is ensured to be woken up from the low power consumption mode, so the RTC and the IWDT and the like used as the timing wake-up module are required to be kept in a normally open state.

In order to reduce power consumption, the high-power-consumption main power supply is controlled to be turned off, and the low-power-consumption auxiliary power supply is used for supplying power to the normally-open-domain power consumption module, so that the functions are realized.

The MCU power supply method based on RISC-V kernel provided by the embodiment of the invention also comprises the following steps:

and controlling the RISC-V kernel to generate a waiting interrupt signal in response to the low power consumption instruction. And responding to the waiting interrupt signal, and controlling the MCU to switch from the working mode to the low power consumption mode.

The low-power-consumption instruction can be generated by software when processing specific things, and when the software determines that the low-power-consumption is to be entered, the low-power-consumption instruction is sent to the MCU.

For example: and (3) timing 1hour by software, automatically sending a low-power-consumption instruction to the MCU when no external interrupt needs to be processed.

Further, the MCU power supply method based on RISC-V kernel provided by the invention also includes: and responding to a wake-up signal, and switching the MCU from the low power consumption mode to the working mode.

Wherein the wake-up signal is generated by one or more of the plurality of normally open domain power consumption modules.

The hardware flow for switching the MCU working mode in the MCU power supply method based on the RISC-V kernel of the embodiment of the invention is shown in figure 5, and the concrete implementation steps are as follows:

step 1: after the MCU is powered on, it waits for the LDO (low dropout regulator) to output a stable voltage, and after the PLL outputs a stable clock, the system reads various trim values from the flash and stores these values in corresponding modules, such as OSC, LDO, etc.

Step 2: the MCU loads a BootLoader program from the Eflash, then performs initialization operations of hardware peripherals such as UART, IIC, RTC, etc. according to the BootLoader program, and transfers application program codes to an SRAM (Static Random-Access Memory) to start running.

Step3, executing the RISC-V kernel of the MCU system according to the fetched instruction according to a five-stage pipeline until the instruction reaches WFI (wait for interrupt), and preparing the MCU to enter a low power consumption mode.

Entering low power consumption:

step 4: hardware continuously reads an Eflash busy flag, the power of the Eflash is closed when the Eflash is in an idle state, and the clock of the Eflash controller module is determined whether to be closed according to the corresponding register state of an SCU (system controller).

Step 5: the input clock is switched by the PLL to HIS (internal clock source) or HSE (external clock source).

Step 6: and adjusting the SYS _ CLK frequency division coefficient of the MCU to reduce the CPU frequency of the MCU system to be lower than 2M.

Step 7: configuring a low Power consumption state corresponding bit in a PWR _ CR (Power Control Register ), setting the bit to be 1 (entering a low Power consumption operation mode), and automatically starting the LDO low Power consumption mode by hardware.

Step 8: the hardware executes the operation of closing the MLDO, controls and closes a switch of the MLDO through a register, and breaks short circuit with the LPLDO, and the MCU system is in a low power consumption mode at the moment;

step 9: the MCU runs in a low power consumption mode, at the moment, the LPLDO supplies power to maintain the normal running of a normally open domain of the system, and the MCU system starts to enter a wake-up flow until a wake-up circuit receives a wake-up interrupt signal, such as the counting of a timer in the normally open domain is completed, a GPIO receives a wake-up pulse and the like;

exiting low power consumption:

step 10: the power control register PWR _ CR is configured to 0 (start to exit the low power operation mode flag).

Step 11: the hardware forces the LPLDO to be switched to the MLDO (MLDO _ SW is short-circuited and MLDO is enabled to be turned on), the MLDO is waited to be stable, the CPU reads the PWR _ SR state register to obtain the MLDO state (0 indicates that the MLDO is ready, and the hardware can automatically wait for the MLDO to start to be stable).

Step 12: starting a control clock of the Eflash, and then starting the Eflash Power.

Step 13: after the eFlash is electrified and stabilized, the software starts the PLL firstly, and the SYSCLK clock switching is carried out after the PLL is stabilized (the PLL _ READY state register is read).

Step 14: and the software configures the relation between the working frequency of the Eflash and the working frequency of the CPU.

Step 15: the system has exited the low power state and reverted to the operating mode.

In another possible implementation manner, a secondary power supply (LPLDO) is responsible for power supply of a normally-on domain and a full MCU chip in a low power consumption mode, and if the LPLDO needs to work in the full MCU chip power supply mode, the specific steps are as follows:

1) before entering a low power consumption mode, turning off unnecessary peripheral module clocks, and reducing the system working frequency according to application requirements, if the PLL is not required to work, the system clock can be switched to an external clock or OSC (oscillator, crystal oscillator) mode before entering a standby mode;

2) according to application requirements, the LPLDO output voltage can be properly reduced through the PWR _ LDO _ LOW register configuration, and the STOP mode power consumption is further reduced.

3) PWR _ CR is enabled, then MLDO is turned off and the system enters a low power mode of operation.

4) If the CPU issues a WFI instruction, DEEPSLEEP of the kernel is enabled, then the system enters a low power consumption STOP mode (in which the eFlash power supply must be turned off by a corresponding bit of the register).

5) In order to ensure the stability of the system, after the LPLDO is switched, the switching can be carried out only after the LPLDO _ LV _ OK is valid.

6) The operating current is required to be below 30uA in the low power consumption STOP mode.

Under the condition of adopting the scheme, the embodiment of the invention divides the power consumption module in the MCU into a plurality of power-down domain power consumption modules and a plurality of normally-open domain power consumption modules. The power supply is divided into a main power supply and a secondary power supply, wherein the main power supply is a high-performance power supply, and the secondary power supply is a low-power consumption power supply. When the MCU is in a working mode, the main power supply is in short circuit with the auxiliary power supply and is used for supplying power to the plurality of normally open domain power consumption modules and the plurality of power failure domain power consumption modules so as to realize the normal work of the MCU. When the MCU is in a low power consumption mode, the main power supply is closed, and the auxiliary power supply is used for supplying power to the plurality of normally-open domain power consumption modules, so that the low power consumption of the MCU is realized. Therefore, in the embodiment of the invention, two different power supplies are used for supplying power in the working mode and the low power consumption mode of the MCU, so that the MCU achieves the balance of performance and low power consumption.

Furthermore, compared with the prior art that different controls are adopted for the energy consumption module through software, the power consumption optimization is performed on the MCU system based on the hardware layer, so that the low power consumption characteristic of the MCU is improved, and therefore the reliability of the embodiment of the invention is higher.

Referring to fig. 6, the present invention also discloses a terminal device, the above-mentioned MCU power supply method based on RISC-V kernel can be stored in the memory 220 of the terminal device as a computer instruction, and the computer instruction stored in the memory 220 is executed by the processor 210.

The terminal device 200 includes: the first processor 2101, when the second processor 2102 is coupled to the communication interface 230, the communication interface 230 and the processor 210, the processor 210 is configured to execute computer programs or instructions.

As shown in fig. 6, the processor 210 may be a general processing unit (CPU), a microprocessor, an application-specific integrated circuit (ASIC), or one or more ics for controlling the execution of programs according to the present invention. The communication interface 230 may be one or more. Communication interface 230 may use any transceiver or the like for communicating with other devices or a communication network.

As shown in fig. 6, the terminal device 200 may further include a communication line 240. Communication link 240 may include a path for transmitting information between the aforementioned components.

Optionally, as shown in fig. 6, the terminal device 200 may further include a memory 220. The memory 220 is used to store computer instructions for performing aspects of the present invention and is controlled for execution by the processor 210. Processor 210 is operative to execute computer instructions stored in memory 220.

As shown in fig. 6, the memory 220 may be a read-only memory (ROM) or other types of static storage devices that can store static information and instructions, a Random Access Memory (RAM) or other types of dynamic storage devices that can store information and instructions, an electrically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM) or other optical disc storage, optical disc storage (including compact disc, laser disc, optical disc, digital versatile disc, blu-ray disc, etc.), magnetic disk storage media or other magnetic storage devices, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a computer, but is not limited to such. The memory 220 may be separate and coupled to the processor 210 via a communication link 240. The memory 220 may also be integrated with the processor 210.

Optionally, the computer instructions in the embodiment of the present invention may also be referred to as application program codes, which is not specifically limited in this embodiment of the present invention.

In particular implementations, as one embodiment, processor 210 may include one or more CPUs, such as CPU0 and CPU1 in fig. 6, as shown in fig. 6.

In a specific implementation, as an embodiment, as shown in fig. 6, the terminal device 200 may include a plurality of processors, such as the first processor 2101 and the second processor 2102 in fig. 6. Each of these processors may be a single core processor or a multi-core processor.

The embodiment of the invention also provides a computer readable storage medium. The computer readable storage medium stores a computer program, and the computer program is executed by a processor to realize the steps of the MCU power supply method based on the RISC-V kernel.

In the above embodiments, the implementation may be wholly or partially realized by software, hardware, firmware, or any combination thereof. When implemented in software, may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer programs or instructions. The procedures or functions of the embodiments of the invention are performed in whole or in part when the computer program or instructions are loaded and executed on a computer. The computer may be a general purpose computer, a special purpose computer, a computer network, a terminal, user equipment, or other programmable device. The computer program or instructions may be stored in a computer readable storage medium or transmitted from one computer readable storage medium to another computer readable storage medium, for example, the computer program or instructions may be transmitted from one website site, computer, server, or data center to another website site, computer, server, or data center by wire or wirelessly. The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server, data center, etc. that integrates one or more available media. The available media may be magnetic media, such as floppy disks, hard disks, magnetic tape; or optical media such as Digital Video Disks (DVDs); it may also be a semiconductor medium, such as a Solid State Drive (SSD).

While the invention has been described in connection with various embodiments, other variations to the disclosed embodiments can be understood and effected by those skilled in the art in practicing the claimed invention, from a review of the drawings, the disclosure, and the appended claims. In the claims, the word "comprising" does not exclude other elements or steps, and the word "a" or "an" does not exclude a plurality. A single processor or other unit may fulfill the functions of several items recited in the claims. The mere fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage.

While the invention has been described in conjunction with specific features and embodiments thereof, it will be evident that various modifications and combinations can be made thereto without departing from the spirit and scope of the invention. Accordingly, the specification and figures are merely exemplary of the invention as defined in the appended claims and are intended to cover any and all modifications, variations, combinations, or equivalents within the scope of the invention. It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.

Claims

1. An MCU system based on RISC-V kernel is characterized by comprising a power supply and an MCU;

the power consumption module of the MCU comprises a plurality of power-down domain power consumption modules and a plurality of normally-open domain power consumption modules; the power supply comprises a main power supply and a secondary power supply; the plurality of power-down domain power consumption modules are electrically connected with the main power supply, and the plurality of normally-open domain power consumption modules are electrically connected with the secondary power supply;

when the MCU exits the low power consumption mode, the corresponding bit of the low power consumption state in the power supply control register is 0, the main power supply is started, the power supply of the embedded flash memory is started, the phase-locked loop is opened, and the relation between the CPU working frequency of the MCU system and the working frequency of the power supply control register is configured;

under the condition that the MCU is in a working mode, the main power supply is in short circuit with the auxiliary power supply and is used for supplying power to the plurality of normally open domain power consumption modules and the plurality of power failure domain power consumption modules;

when the MCU enters a low power consumption mode, the power supply of the embedded flash memory is closed, an input clock is switched to an internal clock source or an external clock source by the phase-locked loop, the frequency of the MCU system is 2M, the corresponding bit of a low power consumption state in a power supply control register is 1, and the main power supply is closed;

and under the condition that the MCU is in a low power consumption mode, the main power supply is closed, and the auxiliary power supply is used for supplying power to the normally open domain power consumption modules.

2. The RISC-V core based MCU system of claim 1, wherein the RISC-V core based MCU system further comprises a power management module;

the power management module is electrically connected with power supply switches of the plurality of power-down domain power consumption modules and is used for controlling the power supply switches of the plurality of power-down domain power consumption modules when the MCU is switched from the working mode to the low power consumption mode so as to disconnect the main power supply from the plurality of power-down domain power consumption modules;

the power management module is further configured to control a power supply switch of the plurality of power-down domain power consumption modules when the MCU is switched from the low power consumption mode to the operating mode, so that the main power supply is electrically connected to the plurality of power-down domain power consumption modules.

3. A RISC-V core based MCU system as defined in claim 2, further comprising a switching device for connecting said primary power supply and said secondary power supply;

the power management module is electrically connected with the switching device, and is used for controlling the switching device to be switched off when the MCU is switched from the working mode to the low power consumption mode, and is also used for controlling the switching device to be switched on when the MCU is switched from the low power consumption mode to the working mode.

4. The RISC-V core based MCU system of claim 1, wherein said MCU is switched from said operating mode to said low power mode when said MCU executes a wait for interrupt signal;

5. A RISC-V core based MCU system according to any of claims 1-4, wherein the power down domain power consuming module comprises a RISC-V core, the main power supply, a bus, a phase locked loop, and a memory;

the normally open domain power consumption module comprises an independent watchdog module, a real-time clock module and a crystal oscillator module.

6. An MCU power supply method based on RISC-V kernel is characterized in that, the method is applied to the MCU system based on RISC-V kernel of any claim 1 to 5, the MCU power supply method based on RISC-V kernel includes:

when the MCU exits from the low power consumption mode, configuring the corresponding bit of the low power consumption state in the power supply control register as 0, starting the main power supply, starting the power supply of the embedded flash memory, starting the phase-locked loop, performing clock switching of the MCU, and configuring the relation between the CPU working frequency of the MCU system and the working frequency of the power supply control register;

when the MCU enters a low power consumption mode, under the condition that the embedded flash memory is in an idle state, the power supply of the embedded flash memory is closed, an input clock is switched to an internal clock source or an external clock source by the phase-locked loop, the frequency division coefficient of the clock of the MCU is adjusted, the frequency of the MCU system is enabled to be 2M, a corresponding bit in the low power consumption state in a power supply control register is configured to be 1, and the main power supply is closed;

and when the MCU is in a low power consumption mode, the main power supply is controlled to be closed, and the auxiliary power supply is controlled to supply power to the normally open domain power consumption module.

7. The RISC-V core based MCU power supply method of claim 6, wherein after controlling the primary power source to be short-circuited with the secondary power source when the MCU is in an operation mode, and controlling the primary power source to supply power to the normally open domain power consumption module and the power-down domain power consumption module, and when the MCU is in a low power consumption mode, controlling the primary power source to be off, and before controlling the secondary power source to supply power to the normally open domain power consumption module, the RISC-V core based MCU power supply method further comprises:

controlling the RISC-V kernel to generate a wait interrupt signal in response to a low power consumption instruction;

and responding to the waiting interrupt signal, and controlling the MCU to switch from a working mode to the low power consumption mode.

8. The method for supplying power to an MCU based on a RISC-V core of claim 6, wherein when the MCU is in a low power consumption mode, the main power source is controlled to be turned off, and after the secondary power source is controlled to supply power to the normally open domain power consumption module, the method for supplying power to an MCU based on a RISC-V core further comprises:

and responding to a wake-up signal, and switching the MCU from the low power consumption mode to the working mode.

9. A terminal device comprising a processor, a memory and a computer program stored on the memory and executable on the processor, the computer program, when executed by the processor, implementing a RISC-V core based MCU power supply method as defined in any one of claims 6 to 8.