CN109270348A - Joint impedance detection method and joint impedance detection system - Google Patents
Joint impedance detection method and joint impedance detection system Download PDFInfo
- Publication number
- CN109270348A CN109270348A CN201810247087.0A CN201810247087A CN109270348A CN 109270348 A CN109270348 A CN 109270348A CN 201810247087 A CN201810247087 A CN 201810247087A CN 109270348 A CN109270348 A CN 109270348A
- Authority
- CN
- China
- Prior art keywords
- circuit
- joint
- loop
- pins
- circuit board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 title claims abstract description 69
- 238000000034 method Methods 0.000 claims abstract description 10
- 238000005259 measurement Methods 0.000 claims description 106
- 239000000758 substrate Substances 0.000 claims description 60
- 238000012545 processing Methods 0.000 claims description 24
- 230000002950 deficient Effects 0.000 claims description 21
- 230000008878 coupling Effects 0.000 claims description 11
- 238000010168 coupling process Methods 0.000 claims description 11
- 238000005859 coupling reaction Methods 0.000 claims description 11
- 238000013461 design Methods 0.000 description 16
- 230000005611 electricity Effects 0.000 description 12
- 238000010586 diagram Methods 0.000 description 11
- 239000002245 particle Substances 0.000 description 4
- 239000000853 adhesive Substances 0.000 description 3
- 230000001070 adhesive effect Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 239000011521 glass Substances 0.000 description 3
- 239000012780 transparent material Substances 0.000 description 2
- 240000001439 Opuntia Species 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R27/00—Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
- G01R27/02—Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
Abstract
A joint impedance detection method and a joint impedance detection system are provided. The joint impedance detection method is used for confirming whether a joint connected in a circuit loop has a bad area. The method comprises the following steps: providing a joint for jointing the two circuit elements, wherein the joint is provided with a plurality of pins which are coupled with the two circuit elements; electrically connecting at least two pins of the pins to form a circuit loop, wherein the circuit loop is provided with a first measuring contact and a second measuring contact, and the first measuring contact, the at least two pins and the second measuring contact are connected in series; measuring a loop impedance value of the circuit loop through the first measuring contact and the second measuring contact; judging whether the loop impedance value exceeds a reference impedance value; and if so, determining that the joint of the connection in the circuit loop has a bad area.
Description
Technical field
The present invention relates to the method and its system of a kind of joint impedance detection, especially one kind can effectively judge to engage
Whether place has the method and its system of the joint impedance detection of engagement defective region.
Background technique
With the development of science and technology the technique of circuit now have been developed that it is a kind of using anisotropic conductive adhesive paste
The technique that (Anisotropic Conductive Film, ACF) is bonded.Anisotropic conductive adhesive paste refers between two substrates
The special material of fitting, it is characterized in that allowing electric current can only using conducting particles connection chip and the electrode of substrate between the two
From the conducting flowing of bonding direction, but short circuit is connected between being avoided that adjacent two electrode simultaneously.Therefore in the prior art using different
Property conducting resinl in side's is by precompressed by the engagement such as circuit chip, flexible flat cable or integrated circuit (Bonding) in LCD glass base
It has been common technology on plate.
However in being usually in the prior art to be connect with micro- sem observation conducting particles for the detection mode of bond quality
Whether rupture situation after conjunction and the conducting particles number effectively pressed against are enough.Such as it can show schematic diagram such as Fig. 1, Fig. 1
It is the schematic diagram of joint in the prior art.Joint 90 may observe quality region 91 and defective region 92.But
Only micro- sem observation can be just used when substrate is transparent material (such as glass).If pressing against substrate non-transparent material (example
Such as printed circuit board), microscope is not just available.Furthermore it can not be measured with the mode of micro- sem observation conducting particles rupture situation
Change, can only be determined with manner of comparison.So be easy to causeing erroneous judgement, defective products is caused to flow out.
Therefore, it is necessary to the method and its system of a kind of new joint impedance detection be invented, to solve the prior art
Missing.
Summary of the invention
The main purpose of the present invention is to provide a kind of joint impedance detection method, it can effectively judge that joint is
It is no that there is engagement defective region.
Another main purpose of the invention is to provide a kind of system of joint impedance detection using the above method.
In order to achieve the above object, joint impedance detection method of the invention is to confirm that is connected in circuit loop connects
Whether there is defective region at conjunction.Method is the following steps are included: provide to engage the joint of two circuit elements, wherein connecing
It include multiple pins (pin) at conjunction, these pins couple two circuit elements；At least two for being electrically connected these pins draw
Foot is to form circuit loop, and wherein circuit loop has the first measurement contact and the second measurement contact, the first measurement contact, at least
It is serially connected between two pins and the second measurement contact；Pass through the first measurement contact and the second measurement contact measuring circuit
The loop resistance values in circuit；Judge whether loop resistance values are more than reference impedance value；And if so, decision circuit is loop-coupled
Joint has defective region.
Joint impedance detection system of the invention includes: at least one joint, circuit loop, measurement module and place
Manage module.Joint is to engage two circuit elements, and joint includes multiple pins, these pins couple two circuit elements
Part；Circuit loop is formed by least two pins electric connection of these pins, circuit loop have first measure contact and
Second measurement contact is serially connected between the first measurement contact, at least two pins and the second measurement contact；Measurement module
The first measurement contact and the second measurement contact are electrically connected with the loop resistance values in measuring circuit circuit.Processing module is electrically connected
Measurement module, processing module is to judge whether loop resistance values are more than reference impedance value；If so, connecting in decision circuit circuit
At least one joint connect has defective region.
The joint impedance detection method and joint impedance detection system provided by aforementioned present invention, by electrically connecting
At least two pins of those pins of joint are connect to form circuit loop, and the loop resistance values in measuring circuit circuit are to sentence
Whether disconnected loop resistance values are more than reference impedance value, and the bond quality of the joint between two circuit elements is detected with this.
Detailed description of the invention
Fig. 1 is the schematic diagram of joint in the prior art；
Fig. 2 is the configuration diagram of the first embodiment of joint impedance detection system of the invention；
Fig. 3 is the step flow chart of joint impedance detection method of the invention；
Fig. 4 A is the configuration diagram of the second embodiment of joint impedance detection system of the invention；
Fig. 4 B is the configuration diagram of the 3rd embodiment of joint impedance detection system of the invention；
Fig. 5 A is the configuration diagram of the fourth embodiment of joint impedance detection system of the invention；
Fig. 5 B is the configuration diagram of the 5th embodiment of joint impedance detection system of the invention；
Fig. 6 is the configuration diagram of the sixth embodiment of joint impedance detection system of the invention；
Fig. 7 is the configuration diagram of the 7th embodiment of joint impedance detection system of the invention.
Specific embodiment
For that can allow your juror that can know more about technology contents of the invention, spy lifts preferred embodiment and is described as follows.
It please refer to Fig. 2 below.Fig. 2 is the framework signal of the first embodiment of joint impedance detection system of the invention
Figure.
In the first embodiment of the present invention, 1 connecing to the C1 connection of decision circuitry circuit of joint impedance detection system
Whether 51 have a defective region at conjunction.Joint impedance detection system 1 includes joint 51, circuit loop C1, measurement module
20 and processing module 30.Joint 51 is to engage two circuit elements, and joint 51 includes multiple pins 41, those pins 41
Couple two circuit element.Circuit loop C1 is formed by least two pins 41 electric connection in those pins 41.Circuit
Circuit C1 has one first measurement contact 11 and one second measurement contact 12, the first measurement contact 11, at least two pins 41 and the
It is serially connected between two measurement contacts 12.In the first embodiment of the present invention, two circuit elements include substrate 61 and electricity
Road chip 62, joint 51 is engaging substrate 61 and circuit chip 62, such as utilizes anisotropic conductive adhesive paste (Anisotropic
Conductive Film, ACF) it is engaged, but the present invention is not limited thereto.The mode that circuit loop C1 can be routed is electrical
At least two pins 41 being connected in those pins 41 of coupling substrate 61 and circuit chip 62.
In the first embodiment of the present invention, each circuit element includes a sub-circuit circuit (not shown go out), and part
Pin 41 may include an interconnecting part 411, in the first embodiment of the present invention, the interconnecting part 411 of pin 41 is set to pin
41 middle position, circuit loop C1 can be electrically connected circuit element (i.e. substrate 61 or electricity via the interconnecting part 411 of pin 41
Road chip 62) sub-circuit circuit.It please join Fig. 2, in the first embodiment of the present invention, the first measurement contact 11 connects pin
41a, circuit loop C1 are connected to the sub-circuit circuit of substrate 61, then the son electricity via substrate 61 by the interconnecting part 411 of pin 41a
Road circuit is connected to pin 41a, and is formed by the wires design that pin 41a is connected to pin 41b, 41c, and the second measurement connects
12 connection pin 41c of point, wherein pin 41b, 41c is electrically connected with each other by the sub-circuit circuit of circuit chip 62.Namely
It says, the pin 41a of the joint 51 of the first measurement contact 11 and the second measurement contact 12 and coupling substrate 61 and circuit chip 62,
It is serially connected between pin 41b and pin 41c.
Measurement module 20 is electrically connected the first measurement contact 11 and the second measurement contact 12, and measurement module 20 is to measure electricity
The primary Ioops impedance value of road circuit C1.It is noted that being separated by a spy between the first measurement contact 11 and the second measurement contact 12
The pin 41 of fixed number amount, is for example, at least separated by 5 to 10 pins, the present invention is not limited thereto.But when first measurement contact 11 and
When the number of pins being separated by between second measurement contact 12 is excessive, measures obtained impedance value and just have biggish error.
Processing module 30 is electrically connected the measurement module 20, and whether processing module 30 is to judge loop resistance values more than one
Reference impedance value, such processing module can judge the bond quality of joint, and reference impedance value is a base in this present embodiment
Three times of plinth impedance value, wherein basal impedance value circuit loop in the case where joint does not have defective region should measure
Impedance value, such as in the case where joint does not have defective region, the measured circuit for obtaining circuit loop C1 of measurement module 20
Impedance value should be no more than 10 ohm, wherein 10 ohm are used as basic impedance value, but in the case where joint has defective region,
The measured loop resistance values for obtaining circuit loop C1 of measurement module 20 are but more than 30 ohm, i.e., loop resistance values are more than basal impedance
Three times of value.So can the joint 51 of decision circuit circuit C1 connection there is the defective region, can just allow loop resistance values
It is significantly increased.If therefore loop resistance values are more than three times of basal impedance value, processing module 30 determines that the joint 51 has
Engage undesirable region (the i.e. described defective region).
Then, Fig. 3 is please referred to.Fig. 3 is the step flow chart of joint impedance detection method of the invention.It must be noted that
, joint impedance detection method of the invention illustrates for can allow above-mentioned joint impedance detection system 1, but the present invention
Joint impedance detection method not so that be used in above-mentioned mutually isostructural joint impedance detection system 1 be limited.
Step 301 is carried out first: providing the joint to engage two circuit elements, wherein joint includes multiple draws
Foot, those pins couple two circuit elements.
Then it carries out step 302: being electrically connected at least two pins of those pins to form a circuit loop, wherein circuit
Circuit has one first measurement contact and one second measurement contact, the first measurement contact, at least two pins and the second measurement contact
Between be serially connected.
Step 303 is carried out again: by the primary Ioops impedance in the first measurement contact and the second measurement contact measuring circuit circuit
Value.
Then it carries out step 304: judging loop resistance values whether more than a reference impedance value.
Finally, carrying out step 305 if loop resistance values are more than a reference impedance value: decision circuit is loop-coupled to be connect
There is a defective region, conversely, carrying out step 306: decision circuit if loop resistance values are less than a reference impedance value at conjunction
Loop-coupled joint does not have a defective region.
It must be noted that joint impedance detection method of the invention is not limited with above-mentioned step order, only
It is able to achieve the purpose of the present invention, above-mentioned step order can be also changed.
Present invention may apply to a variety of different circuit loops.Next referring to Fig. 4 A.Fig. 4 A is engagement of the invention
Locate the configuration diagram of the second embodiment of impedance detection system, wherein same or similar element uses same or similar label.
In the second embodiment of the present invention, two circuit elements include substrate 61 and flexible circuit board 63, each circuit elements
Part (i.e. substrate 61 or flexible circuit board 63) includes a sub-circuit circuit (not shown go out), and joint impedance detection system 2 includes
Joint 52, circuit loop C2, measurement module 20 and processing module 30.Joint impedance detection system 2 is returned to decision circuitry
Whether the joint 52 of road C2 connection has a defective region.Joint 52 to engage substrate 61 and flexible circuit board 63, and
Joint 52 includes multiple pins 42, and multiple pins 42 couple substrate 61 and flexible circuit board 63, circuit loop C2 are by those
At least two pins 42 electric connection in pin 42 is formed.Circuit loop C2 has one first measurement contact 11 and one second survey
It measures contact 12 and includes circuit loop C2a, C2b, C2c, circuit loop C2a, C2b, C2c are electrically connected in those pins 42 extremely
Few two pins 42, wherein be serially connected between the first measurement contact 11, at least two pins 42 and the second measurement contact 12, and
The mode that circuit loop C2 can be routed is electrically connected in those pins 42 of coupling substrate 61 and flexible circuit board 63 extremely
Few two pins 42.
In the second embodiment of the present invention, the pin 42 of part may include an interconnecting part 421, wherein pin 42a, 42b,
42c, 42d separately include an interconnecting part 421, and interconnecting part 421 is set to the terminal position of pin 42a, 42b, 42c, 42d, electricity
Road circuit C2 can be electrically connected circuit element (i.e. substrate 61 or flexibility via the interconnecting part 421 of pin 42a, 42b, 42c, 42d
Circuit board 63) sub-circuit circuit.
It please join Fig. 4 A, in the second embodiment of the present invention, the first measurement contact 11 connects pin 42a, circuit loop C2a
For the sub-circuit circuit for being connected to substrate 61 by the interconnecting part 421 of pin 42a, then it is connected to via the sub-circuit circuit of substrate 61
The wires design of the interconnecting part 421 of pin 42b is formed, and circuit loop C2b is the wiring that pin 42c is connected to by pin 42b
Design is formed, and circuit loop C2c is the sub-circuit circuit that substrate 61 is connected to by the interconnecting part 421 of pin 42c, then via base
The wires design that the sub-circuit circuit of plate 61 is connected to the interconnecting part 421 of pin 42d is formed, and the second measurement contact 12 connects
Pin 42d by the primary Ioops impedance value of 20 measuring circuit circuit C2 of measurement module, and judges impedance loop by processing module 30
Whether more than a reference impedance value, such processing module 30 can judge connecing for the joint of substrate 61 and flexible circuit board 63 to value
Close quality.What remaining technical characteristic was identical with the first embodiment repeats no more in this.
Then, Fig. 4 B is please referred to.Fig. 4 B is that the framework of the 3rd embodiment of joint impedance detection system of the invention shows
It is intended to, wherein same or similar element uses same or similar label.
It is approximately similar to second embodiment in the third embodiment of the present invention, is implemented below for the present embodiment and second
Example difference is illustrated.Joint impedance detection system 3 includes joint 53, circuit loop C3, measurement module 20 and place
Module 30 is managed, whether joint impedance detection system 3 has a bad area to the joint 53 of decision circuitry circuit C3 connection
Domain.Joint 53 is to engage substrate 61 and flexible circuit board 63, and joint 53 includes multiple pins 43, multiple 43 couplings of pin
Substrate 61 and flexible circuit board 63 are connect, circuit loop C3 is to be electrically connected institute's shape by least two pins 43 in those pins 43
At.Circuit loop C3 has one first measurement contact 11 and one second measurement contact 12 and includes circuit loop C3a, C3b, C3c.
In the third embodiment of the present invention, the pin 43 of part may include an interconnecting part 431, wherein pin 43a, 43b,
43c, 43d separately include an interconnecting part 431, and interconnecting part 431 is set to the middle position of pin 43a, 43b, 43c, 43d, electricity
Road circuit C3 can be electrically connected circuit element (i.e. substrate 61 or flexibility via the interconnecting part 431 of pin 43a, 43b, 43c, 43d
Circuit board 63) sub-circuit circuit.
It please join Fig. 4 B, in the third embodiment of the present invention, the first measurement contact 11 connects pin 43a, circuit loop C3a
It is connected to the sub-circuit circuit of substrate 61 by the interconnecting part 431 of pin 43a, then is connected to and draws via the sub-circuit circuit of substrate 61
Foot 43a, and being formed by the wires design that pin 43a is connected to pin 43b, circuit loop C3b by pin 43b interconnecting part
431 are connected to the sub-circuit circuit of substrate 61, then are connected to pin 43b via the sub-circuit circuit of substrate 61, and by pin 43b
The wires design for being connected to pin 43c is formed, and circuit loop C3c is connected to the son of substrate 61 by the interconnecting part 431 of pin 43c
Circuit loop, then be connected to pin 43c via the sub-circuit circuit of substrate 61, and pin 43d is connected to by pin 43c, and by
The interconnecting part 431 of pin 43d is connected to the sub-circuit circuit of substrate 61, then is connected to pin via the sub-circuit circuit of substrate 61
The wires design of 43d is formed, and the second measurement contact 12 connects pin 43d, passes through 20 measuring circuit circuit C3 of measurement module
Primary Ioops impedance value, and judge loop resistance values whether more than a reference impedance value, such processing module by processing module 30
30 can judge the bond quality of the joint of substrate 61 and flexible circuit board 63.Remaining technical characteristic is identical with the first embodiment
Repeated no more in this.
Next referring to Fig. 5 A.Fig. 5 A is the framework signal of the fourth embodiment of joint impedance detection system of the invention
Figure, wherein same or similar element uses same or similar label.
In the fourth embodiment of the present invention, two circuit elements include flexible circuit board 63 and printed circuit board 64, each
Circuit element (i.e. flexible circuit board 63 or printed circuit board 64) includes a sub-circuit circuit (not shown go out), joint impedance inspection
Examining system 4 includes joint 54, circuit loop C4, measurement module 20 and processing module 30.Joint impedance detection system 4 to
Whether the joint 54 of decision circuitry circuit C4 connection has a defective region.Joint 54 to engage flexible circuit board 63 and
Printed circuit board 64, and joint 54 includes multiple pins 44, multiple pins 44 couple flexible circuit board 63 and printed circuit board
64.Circuit loop C4 is formed by least two pins 44 electric connection in those pins 44.Circuit loop C4 has first
It measures contact 11 and the second measurement contact 12 and includes circuit loop C4a, C4b, C4c, circuit loop C4a, C4b, C4c electrically connect
At least two pins 44 in those pins 44 are connect, wherein the first measurement contact 11, at least two pins 44 and the second measurement contact 12
Between be serially connected, and the mode that can be routed of circuit loop C4 is electrically connected at coupling flexible circuit board 63 and printing electricity
At least two pins 44 in those pins 44 of road plate 64.
In the fourth embodiment of the present invention, the pin 44 of part may include an interconnecting part 441, wherein pin 44a, 44b,
44c, 44d separately include an interconnecting part 441, and interconnecting part 441 is set to the terminal position of pin 44a, 44b, 44c, 44d, electricity
Road circuit C4 can be electrically connected circuit element (i.e. flexible circuit board 63 via the interconnecting part 441 of pin 44a, 44b, 44c, 44d
Or printed circuit board 64) sub-circuit circuit.
It please join Fig. 5 A, in the fourth embodiment of the present invention, the first measurement contact 11 connects pin 44a, circuit loop C4a
The sub-circuit circuit of printed circuit board 64, then the sub-circuit via printed circuit board 64 are connected to by the interconnecting part 441 of pin 44a
The wires design that circuit is connected to the interconnecting part 441 of pin 44b is formed, and circuit loop C4b is connected to pin by pin 44b
The wires design of 44c is formed, and circuit loop C4c is connected to the sub-circuit of printed circuit board 64 by the interconnecting part 441 of pin 44c
Circuit, then formed via the wires design of the sub-circuit circuit interconnecting part 441 that is connected to pin 44d of printed circuit board 64,
And the second measurement contact 12 connects pin 44d, by the primary Ioops impedance value of 20 measuring circuit circuit C4 of measurement module, and by
Whether reason module 30 judges loop resistance values more than a reference impedance value, and such processing module 30 can judge flexible circuit board 63
And the bond quality of the joint of printed circuit board 64.Remaining technical characteristic is identical with the first embodiment no longer superfluous in this
It states.
Next referring to Fig. 5 B.Fig. 5 B is the framework signal of the 5th embodiment of joint impedance detection system of the invention
Figure, wherein same or similar element uses same or similar label.
It is approximately similar to fourth embodiment in the fifth embodiment of the present invention, is implemented below for the present embodiment and the 4th
Example difference is illustrated.Joint impedance detection system 5 includes joint 55, circuit loop C5, measurement module 20 and place
Manage module 30.Whether joint impedance detection system 5 has a bad area to the joint 55 of decision circuitry circuit C5 connection
Domain.Joint 55 is to engage flexible circuit board 63 and printed circuit board 64, and joint 55 includes multiple pins 45, Duo Geyin
Foot 45 couples flexible circuit board 63 and printed circuit board 64.Circuit loop C5 is by 45 electricity of at least two pin in those pins 45
Property connection formed.Circuit loop C5 have first measurement contact 11 and one second measurement contact 12 and include circuit loop C5a,
C5b、C5c。
In the fifth embodiment of the present invention, the pin 45 of part may include an interconnecting part 451, wherein pin 45a, 45b,
45c, 45d separately include an interconnecting part 451, and interconnecting part 451 is set to the middle position of pin 45a, 45b, 45c, 45d, electricity
Road circuit C5 can be electrically connected circuit element (i.e. flexible circuit board 63 via the interconnecting part 451 of pin 45a, 45b, 45c, 45d
Or printed circuit board 64) sub-circuit circuit.
It please join Fig. 5 B, in the fifth embodiment of the present invention, the first measurement contact 11 connects pin 45a, circuit loop C5a
The sub-circuit circuit of printed circuit board 64, then the sub-circuit via printed circuit board 64 are connected to by the interconnecting part 451 of pin 45a
Circuit is connected to pin 45a, and is formed by the wires design that pin 45a is connected to pin 45b, and circuit loop C5b is by pin
The interconnecting part 451 of 45b is connected to the sub-circuit circuit of printed circuit board 64, then connects via the sub-circuit circuit of printed circuit board 64
Be connected to pin 45b, and formed by the wires design that pin 45b is connected to pin 45c, circuit loop C5c by pin 45c company
Logical portion 451 is connected to the sub-circuit circuit of printed circuit board 64, then is connected to and draws via the sub-circuit circuit of printed circuit board 64
Foot 45c, and pin 45d is connected to by pin 45c, and the son electricity of printed circuit board 64 is connected to by the interconnecting part of pin 45d 451
Road circuit, then be connected to the wires design of pin 45d via the sub-circuit circuit of printed circuit board 64 and formed, and the second measurement
Contact 12 connects pin 45d, by the primary Ioops impedance value of 20 measuring circuit circuit C5 of measurement module, and is sentenced by processing module 30
Whether more than a reference impedance value, such processing module 30 can judge flexible circuit board 63 and printed circuit to disconnected loop resistance values
The bond quality of the joint of plate 64.What remaining technical characteristic was identical with the first embodiment repeats no more in this.
Next referring to Fig. 6.Fig. 6 is the framework signal of the sixth embodiment of joint impedance detection system of the invention
Figure, wherein same or similar element uses same or similar label.
In the sixth embodiment of the present invention, circuit element includes substrate 61, circuit chip 62 and flexible circuit board 63, is connect
Impedance detection system 6 includes joint 56a, 56b, circuit loop C6, measurement module 20 and processing module 30 at conjunction.Joint resistance
Whether anti-detection system 6 has a defective region to joint 56a, 56b of the C6 connection of decision circuitry circuit.Joint 56a
To be engaged in substrate 61 and circuit chip 62 and joint 56b to be engaged in substrate 61 and flexible circuit board 63, circuit
Circuit C6 is at least two drawing in those pins of at least two pins and joint 56b in those pins by joint 56a
Foot electric connection is formed.Circuit loop C6 has the first measurement contact 11 and the second measurement contact 12, and the first measurement contact
11, the company of being one another in series between at least two pins of joint 56a, at least two pins of joint 56b and the second measurement contact 12
It connects.Judge that loop resistance values are by the primary Ioops impedance value of 20 measuring circuit circuit C6 of measurement module, and by processing module 30
It is no more than a reference impedance value, the joint 56a of substrate 61 and circuit chip 62 is engaged in by above-mentioned connection and is engaged in base
The circuit loop of the joint 56b of plate 61 and flexible circuit board 63 designs, and such processing module 30 can judge substrate 61 and electricity
The bond quality of two joints of road chip 62 and substrate 61 and flexible circuit board 63.Remaining technical characteristic and first embodiment
Something in common is repeated no more in this.
Next referring to Fig. 7.Fig. 7 is the framework signal of the 7th embodiment of joint impedance detection system of the invention
Figure, wherein same or similar element uses same or similar label.
In the seventh embodiment of the present invention, circuit element includes substrate 61, circuit chip 62, flexible circuit board 63 and print
Printed circuit board 64, joint impedance detection system 7 include joint 57a, 57b, 57c, circuit loop C7, measurement module 20 and place
Manage module 30.Whether joint impedance detection system 7 is to have one to joint 57a, 57b, 57c of circuit loop C7 connection
Defective region.Joint 57a to be engaged in substrate 61 and circuit chip 62, joint 57b to be engaged in substrate 61 with it is soft
Property circuit board 63 and joint 57c are to be engaged in flexible circuit board 63 and printed circuit board 64.Circuit loop C7 is by connecing
At least two pins at conjunction in those pins of 57a, at least two pins in those pins of joint 57b and joint 57c
Those pins at least two pins electric connection formed.Circuit loop C7 has the first measurement contact 11 and the second measurement
Contact 12, and at least two pins, the joint 57c of the first measurement contact 11, at least two pins of joint 57a, joint 57b
At least two pins and second measurement contact 12 between be serially connected.The present embodiment can be electrically connected by measurement module 20
First measurement contact 11 and the second measurement contact 12 are sentenced with the primary Ioops impedance value of measuring circuit circuit C7 by processing module 30
Whether disconnected loop resistance values by above-mentioned connection are engaged in the joint of substrate 61 Yu circuit chip 62 more than a reference impedance value
57a, the joint 57b for being engaged in substrate 61 and flexible circuit board 63 and it is engaged in flexible circuit board 63 and printed circuit board 64
The circuit loop of joint 57c designs, and such processing module 30 can judge substrate 61 and circuit chip 62, substrate 61 and flexibility
The bond quality of three joints of circuit board 63 and flexible circuit board 63 and printed circuit board 64.
In this present embodiment, circuit loop C7 can also have third measurement contact 13 and one the 4th measurement contact 14, the
Three measurement contacts 13 are set between the first measurement contact 11 and joint 57b, and the 4th measurement contact 14 is set to the second measurement
Between contact 12 and joint 57b, measurement module be electrically connected third measurement contact 13 and the 4th measurement contact 14 with measure by
Third measure contact 13, at least two pins of joint 57a, at least two pins of joint 57b and the 4th measurement contact 14 it
Between be serially connected the primary Ioops impedance value of the circuit loop C7 to be formed, such processing module can judge substrate 61 and circuit
The bond quality of two joints of chip 62 and substrate 61 and flexible circuit board 63, remaining technical characteristic and first embodiment phase
It is repeated no more with it in this.
The joint impedance detection method and joint impedance detection system provided by aforementioned present invention, by electrically connecting
At least two pins of those pins of joint are connect to form circuit loop, and the primary Ioops impedance value in measuring circuit circuit is to sentence
Whether disconnected loop resistance values with this detect the bond quality of joint two circuit elements between more than a reference impedance value.This
Outer joint impedance detection method provided by the invention and joint impedance detection system are applicable to different circuit elements
Between joint and the circuit loop various according to Demand Design, be not with circuit loop C1 to C7 shown in this specification
Limit, and substrate is also not limited to the glass substrate of LCD.
It is noted that above embodiment only illustrates the preferred embodiment of the present invention, to avoid repeating, do not remember in detail
Carry all possible variation combination.However, those skilled in the art should understand that above-mentioned each module or element may not be all must
It wants.It also may include the known module or element of other more details and to implement the present invention.Each module or element may all be regarded and be needed
It asks and is omitted or modified, and wantonly two intermodule may not have other modules or element.Without departing from the basic frame of the present invention
Structure person all should be the scope of the claims that this patent is advocated, and should be subject to the claims.
Claims (14)
1. a kind of joint impedance detection method, which is characterized in that the described method comprises the following steps:
The joint to engage two circuit elements is provided, wherein the joint includes multiple pins, the multiple pin
Couple two circuit elements；
At least two pins of the multiple pin are electrically connected to form circuit loop, wherein the circuit loop has first
Measure contact and second measurement contact, it is described first measurement contact, at least two pins and it is described second measurement contact it
Between be serially connected；
The loop resistance values of the circuit loop are measured by the first measurement contact and the second measurement contact；
Judge whether the loop resistance values are more than reference impedance value；And
If so, determining that the joint of the circuit loop connection has defective region.
2. joint impedance detection method according to claim 1, which is characterized in that the first measurement contact and described
At least it is separated by 5 to 10 pins between second measurement contact.
3. joint impedance detection method according to claim 1, which is characterized in that whether judge the loop resistance values
Include: more than the step of reference impedance value
Judge whether the loop resistance values are more than three times of basal impedance value.
4. joint impedance detection method according to claim 1, which is characterized in that two circuit elements include base
Plate and circuit chip, and the joint to engage two circuit elements is provided and is electrically connected the multiple pin
At least two pins to form the circuit loop the step of include:
The joint for engaging the substrate and the circuit chip is provided；And
At least two pins for coupling the multiple pin of the substrate and the circuit chip are electrically connected to be formed
State circuit loop.
5. joint impedance detection method according to claim 1, which is characterized in that two circuit elements include base
Plate and flexible circuit board, and the joint to engage two circuit elements is provided and is electrically connected the multiple draw
The step of at least two pins of foot are to form the circuit loop include:
The joint for engaging the substrate and the flexible circuit board is provided；And
At least two pins for coupling the multiple pin of the substrate and the flexible circuit board are electrically connected to be formed
The circuit loop.
6. joint impedance detection method according to claim 1, which is characterized in that two circuit elements include soft
Property circuit board and printed circuit board, and provide the joint to engage two circuit elements and described in being electrically connected
The step of at least two pins of multiple pins are to form the circuit loop include:
The joint for engaging the flexible circuit board and the printed circuit board is provided；And
It is electrically connected at least two pins for coupling the multiple pin of the flexible circuit board and the printed circuit board
To form the circuit loop.
7. the joint impedance detection method according to any claim in claim 4 to 6, which is characterized in that each institute
Stating circuit element includes sub-circuit circuit, and each pin includes interconnecting part, and the circuit loop can be via the interconnecting part
It is electrically connected the sub-circuit circuit of the circuit element.
8. a kind of joint impedance detection system characterized by comprising
At least one joint, each joint is to engage two circuit elements, and each joint includes multiple draws
Foot, the multiple pin couple two circuit elements；
Circuit loop is formed by least two pin electric connections of the multiple pin, and the circuit loop has first
Measure contact and second measurement contact, it is described first measurement contact, at least two pins and it is described second measurement contact it
Between be serially connected；
Measurement module is electrically connected the first measurement contact and the second measurement contact to measure returning for the circuit loop
Road impedance value；And
Processing module, is electrically connected the measurement module, the processing module to judge the loop resistance values whether be more than
Reference impedance value；If so, determining that at least one described joint of the circuit loop connection has defective region.
9. impedance detection system in joint according to claim 8, which is characterized in that the first measurement contact and described
At least it is separated by 5 to 10 pins between second measurement contact.
10. impedance detection system in joint according to claim 8, which is characterized in that based on the reference impedance value
Three times of impedance value.
11. impedance detection system in joint according to claim 8, which is characterized in that two circuit elements include
Substrate and circuit chip, the joint are electrically connected to engage the substrate and the circuit chip, the circuit loop
In at least two pins for the multiple pin for coupling the substrate and the circuit chip.
12. impedance detection system in joint according to claim 8, which is characterized in that two circuit elements include
Substrate and flexible circuit board, to engage the substrate and the flexible circuit board, the circuit loop is electrical for the joint
It is connected at least two pins for coupling the multiple pin of the substrate and the flexible circuit board.
13. impedance detection system in joint according to claim 8, which is characterized in that two circuit elements include
Flexible circuit board and printed circuit board, the joint are described to engage the flexible circuit board and the printed circuit board
Circuit loop is electrically connected at least two of the multiple pin for coupling the flexible circuit board and the printed circuit board
Pin.
14. joint impedance detection system described in any claim in 1 to 13 according to claim 1, which is characterized in that each
The circuit element includes sub-circuit circuit, and each pin includes interconnecting part, and the circuit loop can be via the connection
Portion is electrically connected the sub-circuit circuit of the circuit element.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW106123874 | 2017-07-17 | ||
| TW106123874A TWI629491B (en) | 2017-07-17 | 2017-07-17 | Bonding area impedance detection method and bonding area impedance detection system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN109270348A true CN109270348A (en) | 2019-01-25 |
Family
ID=63640643
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201810247087.0A Pending CN109270348A (en) | 2017-07-17 | 2018-03-23 | Joint impedance detection method and joint impedance detection system |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN109270348A (en) |
| TW (1) | TWI629491B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111308209A (en) * | 2020-03-13 | 2020-06-19 | 深圳市华星光电半导体显示技术有限公司 | Contact impedance measuring method for liquid crystal display panel joint and liquid crystal display panel |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1580793A (en) * | 2003-12-12 | 2005-02-16 | 友达光电股份有限公司 | Method for measuring contact impedance of joint point of liquid crystal display panel and the liquid crystal display panel |
| JP2006322821A (en) * | 2005-05-19 | 2006-11-30 | Hioki Ee Corp | Impedance measuring instrument |
| CN101377528A (en) * | 2007-08-27 | 2009-03-04 | 富士通株式会社 | High-sensitive resistance measuring device and monitoring method of solder bump |
| CN202119854U (en) * | 2011-03-03 | 2012-01-18 | 昌硕科技(上海)有限公司 | Pin welding state detection apparatus |
| CN102339250A (en) * | 2010-07-16 | 2012-02-01 | 鸿富锦精密工业（深圳）有限公司 | Mainboard signal testing device |
| CN202694326U (en) * | 2012-06-13 | 2013-01-23 | 深圳市祈飞科技有限公司 | Test device |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6937028B2 (en) * | 2003-05-30 | 2005-08-30 | Agere Systems Inc. | Resistor value detection circuit |
| TWI252943B (en) * | 2004-05-24 | 2006-04-11 | Hannstar Display Corp | Measuring method and structure for bonding impedance |
| CN100419438C (en) * | 2004-06-22 | 2008-09-17 | 瀚宇彩晶股份有限公司 | Connected impedance measurement and structure |
| TWI308220B (en) * | 2006-11-10 | 2009-04-01 | Innolux Display Corp | Bonding impedance detecting method for integrated circuit system |
| TWI411841B (en) * | 2008-12-02 | 2013-10-11 | Au Optronics Corp | Lcd module and method for measuring contact resistances between circuit boards therein |
-
2017
- 2017-07-17 TW TW106123874A patent/TWI629491B/en active
-
2018
- 2018-03-23 CN CN201810247087.0A patent/CN109270348A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1580793A (en) * | 2003-12-12 | 2005-02-16 | 友达光电股份有限公司 | Method for measuring contact impedance of joint point of liquid crystal display panel and the liquid crystal display panel |
| JP2006322821A (en) * | 2005-05-19 | 2006-11-30 | Hioki Ee Corp | Impedance measuring instrument |
| CN101377528A (en) * | 2007-08-27 | 2009-03-04 | 富士通株式会社 | High-sensitive resistance measuring device and monitoring method of solder bump |
| CN102339250A (en) * | 2010-07-16 | 2012-02-01 | 鸿富锦精密工业（深圳）有限公司 | Mainboard signal testing device |
| CN202119854U (en) * | 2011-03-03 | 2012-01-18 | 昌硕科技(上海)有限公司 | Pin welding state detection apparatus |
| CN202694326U (en) * | 2012-06-13 | 2013-01-23 | 深圳市祈飞科技有限公司 | Test device |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111308209A (en) * | 2020-03-13 | 2020-06-19 | 深圳市华星光电半导体显示技术有限公司 | Contact impedance measuring method for liquid crystal display panel joint and liquid crystal display panel |
| CN111308209B (en) * | 2020-03-13 | 2022-04-08 | 深圳市华星光电半导体显示技术有限公司 | Contact impedance measuring method for liquid crystal display panel joint and liquid crystal display panel |
Also Published As
| Publication number | Publication date |
|---|---|
| TW201908753A (en) | 2019-03-01 |
| TWI629491B (en) | 2018-07-11 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US6097202A (en) | Circuit board inspection apparatus and method | |
| KR101882700B1 (en) | Chip on glass substrate and method for measureing connection resistance of the same | |
| US7307427B2 (en) | Method and apparatus for engineering a testability interposer for testing sockets and connectors on printed circuit boards | |
| TWI250291B (en) | Methods and apparatus for diagnosing defect locations in electrical paths of connections of circuit assemblies | |
| TWI549219B (en) | Test sorting machine and its propulsion device, test tray and test machine interface board | |
| CN112164359B (en) | Display device and detection method thereof | |
| EP0862061A2 (en) | Circuit board inspection apparatus and method | |
| US10084214B2 (en) | Automatic switchover from cell voltage to interconnect voltage monitoring | |
| CN103675581B (en) | Electrical connection component and detection method thereof | |
| CN112825231A (en) | Display device and detection method of display device | |
| CN109270348A (en) | Joint impedance detection method and joint impedance detection system | |
| CN202815137U (en) | Electrical connecting component | |
| TWI308220B (en) | Bonding impedance detecting method for integrated circuit system | |
| TW200422627A (en) | Method of testing FPC bonding yield and FPC having testing pads thereon | |
| JP6076709B2 (en) | Continuity inspection device and continuity inspection method | |
| CN109752413B (en) | Structure and method for testing multiple solder balls between two substrates | |
| JP2001050995A (en) | Impedance measuring device for electronic component | |
| JP2006332612A5 (en) | ||
| WO2007138831A1 (en) | Board examination method and board examination device | |
| CN209402829U (en) | Flexible circuit board connecting structure and display device | |
| JP4411064B2 (en) | Bypass capacitor mounting / non-mounting inspection method | |
| JPH0348171A (en) | Leadless probe card of in-circuit tester for hybrid integrated circuit | |
| TWI321656B (en) | ||
| JP2000074975A (en) | Substrate inspection device and substrate inspection method | |
| TWI486598B (en) | Electrical connection assembly and testing method thereof |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| WD01 | Invention patent application deemed withdrawn after publication | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20190125 |