CN109144771A - A kind of error correction method, system, device and computer readable storage medium - Google Patents

A kind of error correction method, system, device and computer readable storage medium Download PDF

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Publication number
CN109144771A
CN109144771A CN201811051571.2A CN201811051571A CN109144771A CN 109144771 A CN109144771 A CN 109144771A CN 201811051571 A CN201811051571 A CN 201811051571A CN 109144771 A CN109144771 A CN 109144771A
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read
data
reference voltage
error rate
predetermined reference
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郭峰
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Inspur Electronic Information Industry Co Ltd
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Inspur Electronic Information Industry Co Ltd
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Priority to CN201811051571.2A priority Critical patent/CN109144771A/en
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1004Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's to protect a block of data words, e.g. CRC or checksum
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/38Response verification devices
    • G11C29/42Response verification devices using error correcting codes [ECC] or parity check

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  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Read Only Memory (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

The invention discloses a kind of error correction methods, data to be read are read using the first predetermined reference voltage, and determine that first reads error rate, when first reads error rate within the scope of the error correcting capability of LDPC decoding algorithm, error correction is carried out using LDPC decoding algorithm, since the first predetermined reference voltage is the optimal reference voltage determined under target environment by read-write simulation operations, rather than the fixed reference potential that manufacturer provides, therefore more meet the actual conditions of flash memory, it is just more suitable to be read using the voltage to flash memory, to make the error rate of read operation be effectively reduced, to be easier to meet the error correcting capability of hard decoder, it is improved error correction effect.Present invention also provides a kind of error correction system, device and computer readable storage mediums, and above-mentioned technical effect equally may be implemented.

Description

A kind of error correction method, system, device and computer readable storage medium
Technical field
The present invention relates to correcting data error technical fields, more specifically to a kind of error correction method, system, device and meter Calculation machine readable storage medium storing program for executing.
Background technique
Flash memory (Flash Memory) is non-volatile memory of long-life a kind of, is still able to maintain under power blackout situation The data information stored.It is the trend of future storage technologies development using flash media, with the promotion of flash memory fabrication technique, The flash memory bit error rate also rises with it.
The reason of causing the bit error rate to rise is that the corresponding electron number of each bit data can be with flash memory fabrication work in flash memory The promotion of skill and reduce, along with the influence for using duration and environment temperature, electronics also can slowly be lost, it is easy to cause The overturning of bit data is overturn between that is, 0 and 1, so that the bit error rate be caused to rise.
LDPC error correction algorithm is generallyd use at present to carry out correcting data error, so that the bit error rate is reduced, but for LDPC's For error correction algorithm, which includes decoding algorithm, which is by given reference voltage empirical value, to attempt to read Data, if the error rate of the data read carries out error correction within the scope of its error correcting capability, to data are read, to reduce The bit error rate of data, but the effect of its error correction or to be improved.
Therefore, correcting data error effect how was proposed, is those skilled in the art's problem to be solved.
Summary of the invention
The purpose of the present invention is to provide a kind of error correction method, system, device and computer readable storage mediums, to solve The problem of how proposing correcting data error effect.
To achieve the above object, the embodiment of the invention provides following technical solutions:
A kind of error correction method, comprising:
Utilize access of continuing described in first predetermined reference voltage corresponding with the target environment information of data to be read reading According to determining the first reading error rate;Wherein, first predetermined reference voltage is to first pass through read-write simulation operations in advance to determine most Excellent reference voltage;
Judge that described first reads error rate whether within the scope of the error correcting capability of LDPC decoding algorithm;
If so, carrying out error correction to the data to malfunction in read operation using the LDPC decoding algorithm.
Wherein, described using described in first predetermined reference voltage corresponding with the target environment information of data to be read reading Data to be read, before determining the first reading error rate, further includes:
The data to be read are read using the second predetermined reference voltage, determine the second reading error rate;Wherein, described Two predetermined reference voltages are the corresponding predetermined reference voltage of LDPC decoding algorithm;
Judge that described second reads error rate whether within the scope of the error correcting capability of the LDPC decoding algorithm;
If so, carrying out error correction to the data to malfunction in read operation using the LDPC decoding algorithm;
It is read if it is not, then executing the utilization first predetermined reference voltage corresponding with the target environment information of data to be read The step of taking the data to be read, determining the first reading error rate.
Wherein, it is described judge it is described first read error rate whether the LDPC decoding algorithm error correcting capability range After interior, further includes:
If it is not, then carrying out error correction to the data to malfunction in read operation using the soft decoding algorithm of LDPC.
Wherein, the target environment information of the data to be read includes the page object class of page where the data to be read Type;
First predetermined reference voltage corresponding with the target environment information of data to be read is then utilized to read described to be read Data determine the first reading error rate, comprising:
Determine the first predetermined reference voltage corresponding with the page object type;
The data to be read are read using the first predetermined reference voltage corresponding with the page object type, determine first Read error rate.
Wherein, the target environment information of the data to be read includes the target flash environmental information of the flash memory;
It is then described to read institute using first predetermined reference voltage corresponding with the target environment information of the data to be read Data to be read are stated, determine the first reading error rate, comprising:
Determine the first predetermined reference voltage corresponding with the target flash environmental information;
The data to be read are read using the first predetermined reference voltage corresponding with the target flash environmental information, really Fixed first reads error rate.
Wherein, the target flash environmental information includes:
The flash memory is currently accumulated the number information being read, the data to be read holding time in the flash memory and is believed Breath, the flash memory, which are currently accumulated, is wiped the read-write with the number information and the data to be read write across temperature;The read-write Temperature and the flash memory when being written into the data to be read across temperature for the flash memory are read the data to be read When temperature difference.
Wherein, described using described in first predetermined reference voltage corresponding with the target environment information of data to be read reading Data to be read, before determining the first reading error rate, further includes:
The write-in emulation data into emulation flash memory;The emulation flash memory is the flash memory for being written and read simulation operations, institute Stating emulation data is the data for being written and read simulation operations;
Preset times read operation is carried out to the emulation data using the target environment information, wherein reading behaviour every time Work carries out under different reference voltages respectively;
Count the error rate of each read operation;
The corresponding optimal reference voltage of the smallest read operation of error rate is determined, as the first preset reference electricity Pressure.
Present invention also provides a kind of error correction systems, comprising:
Read module, for being read using first predetermined reference voltage corresponding with the target environment information of data to be read The data to be read determine the first reading error rate;Wherein, first predetermined reference voltage is to first pass through read-write emulation in advance Operate determining optimal reference voltage;
Judgment module, for judge it is described first read error rate whether LDPC decoding algorithm error correcting capability range It is interior;
Correction module, for when it is described first read error rate within the scope of the error correcting capability of LDPC decoding algorithm when, Error correction is carried out to the data to malfunction in read operation using the LDPC decoding algorithm.
Present invention also provides a kind of error correction devices, comprising:
Memory, for storing computer program;
Processor is realized when for executing the computer program such as the step of the error correction method.
Present invention also provides a kind of computer readable storage medium, meter is stored on the computer readable storage medium Calculation machine program is realized when the computer program is executed by processor such as the step of the error correction method.
By above scheme it is found that a kind of error correction method provided by the invention, comprising: utilize the target with data to be read Corresponding first predetermined reference voltage of environmental information reads the data to be read, determines the first reading error rate;Wherein, described First predetermined reference voltage is the optimal reference voltage for first passing through read-write simulation operations in advance and determining;Judge that described first reads error Whether rate is within the scope of the error correcting capability of LDPC decoding algorithm;If so, being grasped using the LDPC decoding algorithm to reading The data to malfunction in work carry out error correction.
It can be seen that a kind of error correction method provided by the embodiments of the present application, read using the first predetermined reference voltage to Data are read, and determine that first reads error rate, read error rate in the error correcting capability range of LDPC decoding algorithm first When interior, error correction is carried out using LDPC decoding algorithm, since the first predetermined reference voltage is under target environment by read-write emulation The determining optimal reference voltage of operation, rather than the fixed reference potential that manufacturer provides, therefore more meet the actual conditions of flash memory, It is just more suitable to be read using the voltage to flash memory, so that the error rate of read operation is effectively reduced, thus It is easier to meet the error correcting capability of hard decoder, is improved error correction effect.
Present invention also provides a kind of error correction system, device and computer readable storage mediums, equally may be implemented above-mentioned Technical effect.
Detailed description of the invention
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this Some embodiments of invention for those of ordinary skill in the art without creative efforts, can be with It obtains other drawings based on these drawings.
Fig. 1 is a kind of error correction method flow chart disclosed by the embodiments of the present invention;
Fig. 2 is a kind of specific error correction method flow chart disclosed by the embodiments of the present invention;
Fig. 3 is a kind of specific error correction method flow chart disclosed by the embodiments of the present invention;
Fig. 4 is a kind of error correction system structural schematic diagram disclosed by the embodiments of the present invention;
Fig. 5 is a kind of error correction device structural schematic diagram disclosed by the embodiments of the present invention.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on Embodiment in the present invention, it is obtained by those of ordinary skill in the art without making creative efforts every other Embodiment shall fall within the protection scope of the present invention.
The embodiment of the invention discloses a kind of error correction method, system, device and computer readable storage mediums, to solve such as What mentioned the problem of correcting data error effect.
Referring to Fig. 1, a kind of error correction method provided in an embodiment of the present invention is specifically included:
S101 continues using described in first predetermined reference voltage corresponding with the target environment information of data to be read reading Access evidence, determines the first reading error rate;Wherein, first predetermined reference voltage is to first pass through read-write simulation operations in advance to determine Optimal reference voltage.
It should be noted that when carrying out data read operation to flash memory, different voltage conditions, the error of read operation Rate would also vary from, when the reference voltage of read data operation is the optimal reference voltage of flash memory under corresponding current environment, The corrupt data rate read in flash memory namely under the reference voltage can be minimum, therefore the reference voltage is also just most suitable for current dodge The reference voltage deposited.
In the present solution, first passed through under simulation operations have determined target environment in advance, the optimal reference voltage of flash memory, that is, Then first predetermined reference voltage reads data to be read using the optimal reference voltage, and determines the error this time read Rate.
Method of determination in relation to the first predetermined reference voltage will describe in detail in following embodiments, will no longer go to live in the household of one's in-laws on getting married herein It states.
It should be noted that LDPC (Low Density Parity Check Code, low density parity check code), It is divided into hard decoder and soft decoding, hard decoder is by repeatedly reading data, and in the corresponding error rate of multiple read data operation Middle determining numerical value is the smallest, when the smallest error rate of numerical value is within the scope of the corresponding error correcting capability of decoding algorithm, then to this The data of the corresponding read operation of error rate carry out error-correction operation.
Since LDPC decoding algorithm is related to multiple read data operation, in the present solution, due to also with LDPC Decoding algorithm, therefore read operation in this step is also to carry out repeatedly, it is specific several times, can be solved firmly according to LDPC Code algorithm and actual conditions determine, are not specifically limited in this programme.And first reads error rate, namely repeatedly reads behaviour In work, the smallest error rate of numerical value.
In a specific embodiment, using 3D TLC flash memory storage data to be read, in the flash memory, each Wordline can indicate the page of three types, and each type of page, the corresponding suitable reference voltage for reading data not phases Together.For example, the page of three types is respectively Lower Page, Middle Page, Upper Page.Lower Page is corresponding Reference voltage is reference voltage 1, reference voltage 5;The corresponding reference voltage of Middle Page is reference voltage 2, reference voltage 4 With reference voltage 6;The corresponding reference voltage of Upper Page is reference voltage 3 and reference voltage 7.
Therefore, for different types of page, it is thus necessary to determine that the reference voltage value of reference voltage corresponding with page type, example Such as, when data to be read are stored in Lower Page, then when determining its first default predeterminated voltage, then it needs to be determined that with reference Voltage 1, the corresponding reference voltage value of reference voltage 5.
Therefore in the present solution, the target environment information of the data to be read includes page where the data to be read Page object type;
First predetermined reference voltage corresponding with the target environment information of data to be read is then utilized to read described to be read Data determine the first reading error rate, comprising: determine the first predetermined reference voltage corresponding with the page object type;It utilizes The first predetermined reference voltage corresponding with the page object type reads the data to be read, determines the first reading error rate.
In another particular embodiment of the invention, the first predetermined reference voltage, it is also necessary in view of where data to be read The flash memory environment of flash memory.Flash memory environment is usually directed to Retention, i.e., the storage time of data to be read in a flash memory;Read Disturb, flash memory are accumulated by the number of carry out read operation;PE, i.e. flash memory accumulation wiped with the number write, Tcross, i.e., across The difference of temperature when temperature, temperature when flash memory is written into data to be read and the flash memory are read the data to be read Value.
Under different flash memory environment, suitable reference voltage be would also vary from, therefore in the present solution, access of continuing According to target environment information include the flash memory target flash environmental information;The then mesh using with the data to be read It marks corresponding first predetermined reference voltage of environmental information and reads the data to be read, determine the first reading error rate, comprising: really Fixed the first predetermined reference voltage corresponding with the target flash environmental information;Using corresponding with the target flash environmental information The first predetermined reference voltage read the data to be read, determine the first reading error rate.
S102 judges that described first reads error rate whether within the scope of the error correcting capability of LDPC decoding algorithm.
In this step, need to judge the above-mentioned error rate being read using the first predeterminated voltage whether in LDPC In the limit of power of decoding algorithm.
It should be noted that the error correcting capability of hard decoder is generally 120bit/kbit at present, that is, can be every Error correction 120bit data in 1000bit data, if it exceeds this range, then decoding algorithm will be unable to carry out error correction.
S103, if so, carrying out error correction to the data to malfunction in read operation using the LDPC decoding algorithm.
Specifically, if error rate is within the scope of the error correcting capability of LDPC hardware decoding algorithm, LDPC hard decoder is utilized Algorithm carries out error-correction operation to error data.
There are many forms, such as information to transmit (Messag passing) algorithm for related LDPC hardware decoding algorithm, related The specific descriptions of LDPC hardware decoding algorithm can refer to the prior art, no longer be defined in this programme.
It can be seen that a kind of error correction method provided by the embodiments of the present application, read using the first predetermined reference voltage to Data are read, and determine that first reads error rate, read error rate in the error correcting capability range of LDPC decoding algorithm first When interior, error correction is carried out using LDPC decoding algorithm, since the first predetermined reference voltage is under target environment by read-write emulation The determining optimal reference voltage of operation, rather than the fixed reference potential that manufacturer provides, therefore more meet the actual conditions of flash memory, It is just more suitable to be read using the voltage to flash memory, so that the error rate of read operation is effectively reduced, thus It is easier to meet the error correcting capability of hard decoder, is improved error correction effect.
A kind of specific error correction method provided by the embodiments of the present application is introduced below, it is described below a kind of specific Error correction method can be cross-referenced with above-described embodiment.
Referring to fig. 2, a kind of specific error correction method provided by the embodiments of the present application, specifically includes:
S201 reads the data to be read using the second predetermined reference voltage, determines the second reading error rate;Wherein, Second predetermined reference voltage is the corresponding predetermined reference voltage of LDPC decoding algorithm.
In the present solution, carrying out error correction first with existing LDPC hard decoder method.
In existing LDPC hard decoder link, fixed reference voltage value, i.e. the second predetermined reference voltage can be preset with Value.Second predetermined reference voltage value is the empirical value for specific flash memory, is to acquire data by manufacturer oneself, induction-arrangement obtains Voltage value, carry out data read operation using the voltage value, can be with.
In this step, that is, in existing LDPC hard decoder link, can using the second predetermined reference voltage value come Data to be read are read, and determine to read error rate, read error rate as second.
It should be noted that also due to LDPC decoding algorithm is the side by repeatedly reading and taking minimum error rate Formula, therefore in the present solution, also repeatedly read using the second predetermined reference voltage value, and determine that value is the smallest Second reads error rate.
S202 judges that described second reads error rate whether within the scope of the error correcting capability of the LDPC decoding algorithm; If so, S203 is executed, if it is not, then executing S204.
Specifically, judge the second reading error rate whether within the scope of the error correcting capability of LDPC decoding algorithm.About The error correcting capability of LDPC decoding algorithm is made in above-described embodiment to be discussed in detail, and particular content can refer to above-mentioned implementation Example, is no longer repeated herein.
S203 carries out error correction to the data to malfunction in read operation using the LDPC decoding algorithm.
S204 continues using described in first predetermined reference voltage corresponding with the target environment information of data to be read reading Access evidence, determines the first reading error rate;Wherein, first predetermined reference voltage is to first pass through read-write simulation operations in advance to determine Optimal reference voltage.
It should be noted that be read using corresponding second predetermined reference voltage of LDPC decoding algorithm, though So in most cases, reading the error rates of data all can be within the scope of the error correcting capability of LDPC decoding algorithm, but still It will appear the case where causing error rate that can be greater than the error correcting capability of LDPC decoding algorithm because of the reason of reference voltage, In the present solution, in order to avoid causing to read the error rate not feelings within the scope of LDPC error correcting capability because reference voltage is improper Condition adds a link on the basis of original LPDC hard decoder link, i.e., is read out when using the second predetermined reference voltage Operation, when reading error rate beyond LDPC decoding algorithm error correcting capability range, using the first predetermined reference voltage to be read Data are read, and are determined and read error rate.
That is, in the present solution, first with existing LDPC hard decoder link attempt error correction, but read error rate Beyond its error correcting capability range, then using the link added in this programme, using being more suitable for the first of current goal environmental information Predetermined reference voltage reads data, and reading error rate at this time just can decrease.
S205 judges that described first reads error rate whether within the scope of the error correcting capability of LDPC decoding algorithm;If so, S206 is then executed, if it is not, then executing S207.
Specifically, judge the first reading error rate whether within the scope of the error correcting capability of LDPC decoding algorithm.
S206 carries out error correction to the data to malfunction in read operation using the LDPC decoding algorithm.
S207 carries out error correction to the data to malfunction in read operation using the soft decoding algorithm of LDPC.
It should be noted that LDPC decoding algorithm, including hard decoder link and soft decoding link, in existing error-correction operation In, LDPC hard decoder link is usually first carried out, when reading error correcting capability of the error rate beyond decoding algorithm, is advanced to The soft decoding link of LDPC, although carrying out soft decoding, error correcting capability can increase, and the delay of correction process also can be significantly It is promoted, therefore in the present solution, not can be carried out error correction to reduce into the soft decoding link of LDPC, then LDPC hard decoder link When, that is, data to be read are read using the second predetermined reference voltage, second reads error rate calculates beyond LDPC hard decoder When the error correcting capability of method, does not first enter soft decoding link, but change reference voltage into first predetermined reference voltage and read again Extract operation determines the first reading error rate, if first reads error rate within the scope of the error correcting capability of LDPC decoding algorithm, Error correction then or using LDPC decoding algorithm is carried out, therefore compared to soft decoding algorithm, many times can be saved.
First read error rate also no longer within the scope of the error correcting capability of LDPC decoding algorithm when, enter back into the soft solution of LDPC Code link carries out error correction using data of the soft decoding algorithm of LDPC to reading.
A kind of specific error correction method provided by the embodiments of the present application is introduced below, it is described below a kind of specific Error correction method on the basis of the above embodiments, introduce how to determine the first predetermined reference voltage, other step contents with it is upper It is roughly the same to state embodiment, will no longer repeat herein.
Referring to Fig. 3, a kind of specific error correction method provided by the embodiments of the present application, in the above-described embodiments it is described using with Corresponding first predetermined reference voltage of the target environment information of data to be read reads the data to be read, determines the first reading Before error rate, further includes:
S301, the write-in emulation data into emulation flash memory;The emulation flash memory is the sudden strain of a muscle for being written and read simulation operations It deposits, the emulation data are the data for being written and read simulation operations.
Specifically, prepare SSD product first, i.e., for being written and read the emulation flash memory of simulation operations.
The data for being written and read simulation operations are written into emulation flash memory.
S302 carries out preset times read operation to the emulation data using the target environment information, wherein every time Read operation carries out under different reference voltages respectively.
S303 counts the error rate of each read operation.
S304 determines the corresponding optimal reference voltage of the smallest read operation of error rate, default as described first Reference voltage.
Specifically, it is determined that target environment information, the content of target environment information can specifically refer to above-described embodiment, at this In scheme, flash memory environmental information is related generally to.
For same flash memory environmental information, preset times are determined, and determine and each corresponding reference voltage.
Under current flash memory environment, the read operation of preset times is carried out, the reference voltage of each read operation is Reference voltage corresponding with number counts BER data each time, that is, reads error rate data, therefrom determines and reads The smallest reference voltage of error rate, as the corresponding optimal reference voltage of current flash environment.
First predetermined reference voltage is namely in the case where current flash environment is the corresponding flash memory environment of target environment information Optimal reference voltage.
It should be noted that the optimal ginseng under different flash memory environment can be prepared out in advance before carrying out error-correction operation Voltage is examined, to directly determine optimal reference voltage corresponding with current context information when carrying out error-correction operation.
Therefore preset flash memory environment is first set, such as shown in the following table 1, each value in section is combined and flash memory environment is equal The determination of optimal reference voltage is carried out, so that it is determined that the optimal reference voltage under different flash memory environment out.
Table 1
Retention Read Disturb PE Tcross
[6h,48h] [250k,575k] [5000,10000] [25,70]
A kind of error correction system provided by the embodiments of the present application is introduced below, a kind of error correction system described below with Above-described embodiment can be cross-referenced.
Referring to fig. 4, a kind of error correction system provided by the embodiments of the present application, specifically includes:
Read module 401, for utilizing first predetermined reference voltage corresponding with the target environment information of data to be read The data to be read are read, determine the first reading error rate;Wherein, first predetermined reference voltage is to first pass through read-write in advance The optimal reference voltage that simulation operations determine.
Judgment module 402, for judge it is described first read error rate whether LDPC decoding algorithm error correcting capability In range.
Correction module 403, for when the first reading error rate is within the scope of the error correcting capability of LDPC decoding algorithm When, error correction is carried out to the data to malfunction in read operation using the LDPC decoding algorithm.
The error correction system of the present embodiment is for realizing error correction method above-mentioned, therefore the specific embodiment in error correction system It can be seen that the embodiment part of error correction method hereinbefore, for example, read module 401, judgment module 402, are respectively used in realization Step S101, S102, S103 and S104 in error correction method is stated, so, specific embodiment is referred to corresponding each portion Divide the description of embodiment, details are not described herein.
A kind of error correction device provided by the embodiments of the present application is introduced below, a kind of error correction device described below, It can be cross-referenced with above-described embodiment.
Referring to Fig. 5, a kind of error correction device provided by the embodiments of the present application is specifically included:
Memory 501, for storing computer program;
Processor 502 realizes error correction method described in any of the above-described embodiment when for executing the computer program Step.
Present invention also provides another computer readable storage mediums, are stored thereon with computer program, the calculating Step provided by above-described embodiment may be implemented in machine program when being executed by processor.The storage medium may include: USB flash disk, move Dynamic hard disk, read-only memory (Read-Only Memory, ROM), random access memory (Random Access Memory, RAM), the various media that can store program code such as magnetic or disk.
Each embodiment in this specification is described in a progressive manner, the highlights of each of the examples are with other The difference of embodiment, the same or similar parts in each embodiment may refer to each other.
The foregoing description of the disclosed embodiments enables those skilled in the art to implement or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, as defined herein General Principle can be realized in other embodiments without departing from the spirit or scope of the present invention.Therefore, of the invention It is not intended to be limited to the embodiments shown herein, and is to fit to and the principles and novel features disclosed herein phase one The widest scope of cause.

Claims (10)

1. a kind of error correction method characterized by comprising
The data to be read are read using first predetermined reference voltage corresponding with the target environment information of data to be read, really Fixed first reads error rate;Wherein, first predetermined reference voltage is the optimal ginseng for first passing through read-write simulation operations in advance and determining Examine voltage;
Judge that described first reads error rate whether within the scope of the error correcting capability of LDPC decoding algorithm;
If so, carrying out error correction to the data to malfunction in read operation using the LDPC decoding algorithm.
2. the method according to claim 1, wherein the target environment information pair using with data to be read The first predetermined reference voltage for answering reads the data to be read, before determining the first reading error rate, further includes:
The data to be read are read using the second predetermined reference voltage, determine the second reading error rate;Wherein, described second is pre- If reference voltage is the corresponding predetermined reference voltage of LDPC decoding algorithm;
Judge that described second reads error rate whether within the scope of the error correcting capability of the LDPC decoding algorithm;
If so, carrying out error correction to the data to malfunction in read operation using the LDPC decoding algorithm;
If it is not, then executing the utilization first predetermined reference voltage corresponding with the target environment information of data to be read reads institute The step of stating data to be read, determining the first reading error rate.
3. the method according to claim 1, wherein described judge that whether described first read error rate described After within the scope of the error correcting capability of LDPC decoding algorithm, further includes:
If it is not, then carrying out error correction to the data to malfunction in read operation using the soft decoding algorithm of LDPC.
4. the method according to claim 1, wherein the target environment information of the data to be read includes described The page object type of page where data to be read;
First predetermined reference voltage corresponding with the target environment information of data to be read is then utilized to read the data to be read, Determine the first reading error rate, comprising:
Determine the first predetermined reference voltage corresponding with the page object type;
The data to be read are read using the first predetermined reference voltage corresponding with the page object type, determine the first reading Error rate.
5. the method according to claim 1, wherein the target environment information of the data to be read includes described The target flash environmental information of flash memory;
Then it is described using first predetermined reference voltage corresponding with the target environment information of the data to be read read it is described to Data are read, determine the first reading error rate, comprising:
Determine the first predetermined reference voltage corresponding with the target flash environmental information;
The data to be read are read using the first predetermined reference voltage corresponding with the target flash environmental information, determine the One reads error rate.
6. according to the method described in claim 5, it is characterized in that, the target flash environmental information includes:
The flash memory currently accumulate the number information being read, the data to be read in the flash memory holding time information, The flash memory, which is currently accumulated, is wiped the read-write with the number information and the data to be read write across temperature;It is described read-write across Temperature is when temperature and the flash memory of the flash memory when being written into the data to be read are read the data to be read The difference of temperature.
7. according to claim 1 to method described in 6 any one, which is characterized in that the mesh using with data to be read It marks corresponding first predetermined reference voltage of environmental information and reads the data to be read, before determining the first reading error rate, also Include:
The write-in emulation data into emulation flash memory;The emulation flash memory is the flash memory for being written and read simulation operations, described imitative True data is the data for being written and read simulation operations;
Preset times read operation is carried out to the emulation data using the target environment information, wherein each read operation point It is not carried out under different reference voltages;
Count the error rate of each read operation;
The corresponding optimal reference voltage of the smallest read operation of error rate is determined, as first predetermined reference voltage.
8. a kind of error correction system characterized by comprising
Read module, described in being read using first predetermined reference voltage corresponding with the target environment information of data to be read Data to be read determine the first reading error rate;Wherein, first predetermined reference voltage is to first pass through read-write simulation operations in advance Determining optimal reference voltage;
Judgment module, for judging that described first reads error rate whether within the scope of the error correcting capability of LDPC decoding algorithm;
Correction module, for utilizing when described first reads error rate within the scope of the error correcting capability of LDPC decoding algorithm The LDPC decoding algorithm carries out error correction to the data to malfunction in read operation.
9. a kind of error correction device characterized by comprising
Memory, for storing computer program;
Processor realizes the step of the error correction method as described in any one of claim 1 to 7 when for executing the computer program Suddenly.
10. a kind of computer readable storage medium, which is characterized in that be stored with computer on the computer readable storage medium Program is realized as described in any one of claim 1 to 7 when the computer program is executed by processor the step of error correction method.
CN201811051571.2A 2018-09-10 2018-09-10 A kind of error correction method, system, device and computer readable storage medium Pending CN109144771A (en)

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Application publication date: 20190104