CN109119128B - High-low temperature aging test rack structure - Google Patents
High-low temperature aging test rack structure Download PDFInfo
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- CN109119128B CN109119128B CN201811221808.7A CN201811221808A CN109119128B CN 109119128 B CN109119128 B CN 109119128B CN 201811221808 A CN201811221808 A CN 201811221808A CN 109119128 B CN109119128 B CN 109119128B
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- 238000012360 testing method Methods 0.000 title claims abstract description 116
- 230000032683 aging Effects 0.000 title claims abstract description 30
- 238000002955 isolation Methods 0.000 claims abstract description 21
- 239000011810 insulating material Substances 0.000 claims description 3
- 238000010276 construction Methods 0.000 claims 4
- 230000000694 effects Effects 0.000 abstract description 3
- 239000004065 semiconductor Substances 0.000 description 12
- 238000010586 diagram Methods 0.000 description 5
- 238000011990 functional testing Methods 0.000 description 3
- 238000005192 partition Methods 0.000 description 3
- 238000012423 maintenance Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000008054 signal transmission Effects 0.000 description 2
- 238000013459 approach Methods 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 230000006641 stabilisation Effects 0.000 description 1
- 238000011105 stabilization Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
- G11C29/56016—Apparatus features
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- Testing Of Individual Semiconductor Devices (AREA)
Abstract
The invention belongs to the technical field of high-low temperature aging tests, and discloses a high-low temperature aging test rack structure, which comprises a first temperature zone, a second temperature zone and an isolation temperature zone, wherein the isolation temperature zone is positioned between the first temperature zone and the second temperature zone; a first backboard is arranged in the first temperature zone and is used for mounting a plurality of test core boards in a pluggable manner; a second backboard is arranged in the second temperature zone and is used for mounting a plurality of test boards in a pluggable manner; a through plate is arranged in the isolation temperature region, and the first backboard is connected with the second backboard through the through plate. The invention solves the problem of poor stability of a test system caused by larger temperature impact of a high-low temperature severe environment on a test core board in the prior art. The invention achieves the technical effects of ensuring the quality of the test signal and improving the safety and stability of the test equipment.
Description
Technical Field
The invention relates to the technical field of high-low temperature aging tests, in particular to a high-low temperature aging test rack structure.
Background
The semiconductor memory has a certain failure probability, the relationship between the failure probability and the use times accords with the characteristics of a bathtub curve, the failure probability of the memory is high when the semiconductor memory starts to be used, and the failure probability is greatly reduced after the certain use times are passed until the semiconductor memory approaches or reaches the service life of the semiconductor memory, and the failure probability of the memory is increased again. Until now, no memory manufacturer ignores the failure problem of the semiconductor memory, and the problem is generally solved by accelerating the occurrence of the failure probability of the memory through Test burn-in (TDBI) and directly putting the memory into a product stabilization period. The general scheme of semiconductor memory burn-in test is to supply power supply signal and test signal to the semiconductor memory to be tested, and to make the semiconductor memory to be tested continuously and uninterruptedly work for a set period of time at high and low temperature or normal temperature, this process is called burn-in, so as to accelerate the failure of semiconductor memory device and screen out good products.
In the prior art, the functional test board card is generally directly designed into the high-low temperature aging device to reduce the test space, and the functional test and the high-low temperature aging test are combined to reduce the test time, so that the aim of reducing the test cost is fulfilled. The performance of a functional test board card placed in a high and low temperature burn-in device can be greatly affected by temperature. Because the semiconductor memory has a plurality of types, wide application, large quantity, higher performance and wide working temperature range, the practical application can be met only by needing a set of aging test system with flexible capacity, good expandability, wide temperature range, rich functions, high framework reliability and high cost performance. Compared with the requirements, the conventional semiconductor memory burn-in test box has certain gaps and defects.
Disclosure of Invention
The embodiment of the application solves the problem of poor stability of a test system caused by larger temperature impact on a test core board by a high-low temperature severe environment in the prior art by providing the high-low temperature aging test rack structure.
The embodiment of the application provides a high-low temperature aging test rack structure, which comprises a first temperature zone, a second temperature zone and an isolation temperature zone, wherein the isolation temperature zone is positioned between the first temperature zone and the second temperature zone; a first backboard is arranged in the first temperature zone and is used for mounting a plurality of test core boards in a pluggable manner; a second backboard is arranged in the second temperature zone and is used for mounting a plurality of test boards in a pluggable manner; and a through plate is arranged in the isolation temperature region, and the first backboard is connected with the second backboard through the through plate.
Preferably, the first back plate is connected to one end of the through board through a first board-to-board connector, and the second back plate is connected to the other end of the through board through a second board-to-board connector.
Preferably, the test core board is located in a first machine frame, and a first plug-in assisting device is arranged on the first machine frame and used for plugging the test core board.
Preferably, the first frame is provided with a fan, and the fan is located at the side surface of the test core board.
Preferably, the test board is located in a second machine frame, and a second plug-in assisting device is arranged on the second machine frame and used for plugging the test board.
Preferably, a third plugging-assisting device is arranged on the second machine frame and is used for plugging the second backboard.
Preferably, the through board is a printed circuit board.
Preferably, the isolation temperature region is filled with a flexible heat-insulating material.
Preferably, the temperature of the first temperature zone is set to a constant value.
Preferably, the temperature difference between the first temperature region and the second temperature region is set to a constant value.
One or more technical solutions provided in the embodiments of the present application at least have the following technical effects or advantages:
In the embodiment of the application, the provided high-low temperature aging test rack structure comprises a first temperature zone, a second temperature zone and an isolation temperature zone, wherein the isolation temperature zone is positioned between the first temperature zone and the second temperature zone; a first backboard is arranged in the first temperature zone and is used for mounting a plurality of test core boards in a pluggable manner; a second backboard is arranged in the second temperature zone and is used for mounting a plurality of test boards in a pluggable manner; a through board is arranged in the isolation temperature region, the first backboard is connected with the second backboard through the through board, namely, signals and power of the test core board positioned in the first temperature region are transmitted to the test board positioned in the second temperature region through the through board. In summary, the application adopts the backboard and the through board to carry out signal transmission, and the test board and the test core board are respectively placed in two independent temperature areas to work, thereby reducing unnecessary temperature impact on the test core board, reducing the possibility of device instability at high and low temperatures, further ensuring the quality of test signals and improving the integrity of the test signals.
Drawings
In order to more clearly illustrate the technical solutions of the present embodiment, the drawings required for the description of the embodiment will be briefly described below, and it is obvious that the drawings in the following description are one embodiment of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of the overall structure of a high-low temperature burn-in test rack structure according to an embodiment of the present invention;
FIG. 2 is a schematic block diagram of temperature partitions in a rack structure for high and low temperature burn-in testing according to an embodiment of the present invention;
Fig. 3 is a schematic connection diagram of a test core board, a first back board, a through board, a second back board, and a test board in a high-low temperature burn-in test rack structure according to an embodiment of the present invention;
fig. 4 is a schematic connection diagram of a frame and an auxiliary plug in a high-low temperature aging test rack structure according to an embodiment of the present invention.
Detailed Description
In order to better understand the above technical solutions, the following detailed description will refer to the accompanying drawings and specific embodiments.
The embodiment provides a high-low temperature aging test rack structure, which comprises a first temperature zone, a second temperature zone and an isolation temperature zone, wherein the isolation temperature zone is positioned between the first temperature zone and the second temperature zone as shown in figures 1-4; a first backboard is arranged in the first temperature zone and is used for mounting a plurality of test core boards in a pluggable manner; a second backboard is arranged in the second temperature zone and is used for mounting a plurality of test boards in a pluggable manner; and a through plate is arranged in the isolation temperature region, and the first backboard is connected with the second backboard through the through plate. The invention transmits the signal and power of the test core board in the first temperature zone to the test board in the second temperature zone through the through board.
The overall structure schematic diagram of the high-low temperature aging test rack structure is shown in fig. 1, and one or more groups of the high-low temperature aging test rack structures can be arranged in each aging test box. The high-low temperature burn-in test rack structure supports high-low temperature burn-in testing of semiconductor integrated circuits.
The back plate and the through plate adopt a plate-to-plate connector, namely the first back plate is connected with one end of the through plate through the first plate-to-plate connector, and the second back plate is connected with the other end of the through plate through the second plate-to-plate connector. The backboard (including the first backboard and the second backboard) not only provides connection between boards, but also plays a role in isolating each temperature area.
Referring to fig. 2, the first temperature zone is used for placing the test core board and the first back board, and the temperature of the first temperature zone may be set to a constant value, or may be set to track the temperature range of the second temperature zone, so that the temperature difference between the two temperature zones is kept constant. The second temperature zone is used for placing the test board and the second backboard. The isolation temperature areas can be filled with flexible heat-insulating materials, and good isolation between the temperature areas is ensured by matching the first backboard and the second backboard, so that the mutual influence between the first temperature area and the second temperature area is reduced as much as possible. In testing, the first temperature zone is typically at room temperature; the second temperature zone may be set at a high temperature (e.g., 150 degrees) or at a low temperature (e.g., -50 degrees). In the test, the gigabit Ethernet port and the switch network port on the test core board are connected through a network cable.
During testing, the test core board, the first backboard, the through board, the second backboard and the test board form a test unit (slot), and the connection relation among the test core board, the first backboard, the through board, the second backboard and the test board is shown in fig. 3, so that different numbers and different types of test units can be flexibly supported according to test requirements in practical application.
Referring to fig. 4, the test core board is located in a first frame and the test board is located in a second frame. For convenient operation, be provided with first aid plug ware on the first frame, be convenient for to the test core board in the first temperature zone carries out plug operation and changes the maintenance. And a second plug-in assisting device is arranged on the second machine frame, so that the test board in the second temperature zone can be conveniently subjected to plug-in operation, replacement and maintenance. In addition, a third plug-in assisting device can be arranged on the second machine frame, and the second backboard can be conveniently subjected to plug-in installation and replacement operation through the third plug-in assisting device. In the test, the test board is accumulatively plugged for a long time, and compared with other components (such as the through board and the test core board) which do not need to be frequently plugged, the service life of the second backboard is faster, and at the moment, only the second backboard needs to be replaced, so that the test cost can be effectively reduced.
In a preferred embodiment, the first subrack is provided with fans located at the sides of the test core board. The side face of the test core board in the aging test box is provided with a large number of fans so as to form a good air duct between the upper section and the lower section of the test core board, and the working temperature of the test core board is ensured to be in a reliable range.
In a preferred embodiment, a Printed Circuit Board (PCB) is used as the through board.
The high-low temperature aging test rack structure provided by the embodiment of the invention at least comprises the following technical effects:
(1) According to the high-low temperature aging test rack structure, the backboard and the through board are adopted for signal transmission, and the test board and the test core board can be respectively placed in two independent temperature areas for working, so that unnecessary temperature impact on the test core board is reduced; the possibility of instability of the electronic device of the test core board at high and low temperatures can be reduced, the quality of the test signal is ensured, and the integrity of the test signal is improved;
(2) According to the high-low temperature aging test rack structure, the temperature range of an aging test environment is widened by carrying out partition and temperature partition control on the space in the aging test box, the aging temperature range can be expanded to-50 ℃ to +150 ℃, and a wider temperature range can be achieved; the two temperature regions are well isolated through the isolation temperature region, so that temperature crosstalk between the two temperature regions (namely the first temperature region and the second temperature region) can be avoided, frosting or water leakage caused by meeting two airflows with different temperatures can be avoided, and the safety of the test equipment can be effectively improved;
(3) The high-low temperature aging test rack structure provided by the invention can flexibly configure the number of the test boards and the test core boards according to the needs; by configuring different test boards and test core boards, more kinds of product aging tests can be supported, and the test cost can be effectively reduced;
(4) According to the high-low temperature aging test rack structure, the printed circuit board is used as the through board to transmit the test signals and the power signals between the two temperature areas, and compared with the case that a cable is used as a transmission medium of the signals and the power, the high-low temperature aging test rack structure solves the problems that the cable capable of simultaneously withstanding high-low temperature aging is high in cost and easy to fail; secondly, the heat insulation and heat dissipation performance are better; thirdly, the sealing structure design between the isolation temperature area and other temperature areas is facilitated.
Finally, it should be noted that the above-mentioned embodiments are only for illustrating the technical solution of the present invention, and not for limiting the same, and although the present invention has been described in detail with reference to examples, it should be understood by those skilled in the art that modifications and equivalents may be made to the technical solution of the present invention without departing from the spirit and scope of the technical solution of the present invention, and all such modifications and equivalents are intended to be encompassed in the scope of the claims of the present invention.
Claims (9)
1. The high-low temperature aging test rack structure is characterized by comprising a first temperature zone, a second temperature zone and an isolation temperature zone, wherein the isolation temperature zone is positioned between the first temperature zone and the second temperature zone; a first backboard is arranged in the first temperature zone and is used for mounting a plurality of test core boards in a pluggable manner; the test core board is positioned in a first machine frame, and a first plug-in assisting device is arranged on the first machine frame and used for plugging the test core board; a second backboard is arranged in the second temperature zone and is used for mounting a plurality of test boards in a pluggable manner; and a through plate is arranged in the isolation temperature region, and the first backboard is connected with the second backboard through the through plate.
2. The high and low temperature burn-in rack structure of claim 1, wherein the first back plate is connected to one end of the through board by a first board-to-board connector and the second back plate is connected to the other end of the through board by a second board-to-board connector.
3. The high and low temperature burn-in chassis structure of claim 1, wherein the first chassis is provided with fans located on sides of the test core board.
4. The high and low temperature burn-in testing rack structure of claim 1, wherein the test board is located in a second frame, and a second plug-in aid is disposed on the second frame, and the second plug-in aid is used for plugging the test board.
5. The high and low temperature burn-in testing frame structure of claim 4, wherein a third booster is provided on the second frame, the third booster being configured to plug the second back plate.
6. The high and low temperature burn-in rack construction of claim 1, wherein said pass-through board is a printed circuit board.
7. The high and low temperature burn-in rack construction of claim 1, wherein the isolation temperature zone is filled with a flexible thermally insulating material.
8. The high and low temperature burn-in rack construction of claim 1, wherein the temperature of the first temperature zone is set to a constant value.
9. The high and low temperature burn-in rack construction of claim 1, wherein the temperature difference between the first temperature zone and the second temperature zone is set to a constant value.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811221808.7A CN109119128B (en) | 2018-10-19 | 2018-10-19 | High-low temperature aging test rack structure |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811221808.7A CN109119128B (en) | 2018-10-19 | 2018-10-19 | High-low temperature aging test rack structure |
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| CN109119128A CN109119128A (en) | 2019-01-01 |
| CN109119128B true CN109119128B (en) | 2024-05-31 |
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| CN201811221808.7A Active CN109119128B (en) | 2018-10-19 | 2018-10-19 | High-low temperature aging test rack structure |
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Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111289877B (en) * | 2020-03-03 | 2022-07-19 | 武汉精鸿电子技术有限公司 | Aging test equipment |
| CN111551839B (en) * | 2020-04-23 | 2022-09-23 | 武汉精测电子集团股份有限公司 | High-low temperature aging test equipment for semiconductor memory |
| CN111707933A (en) * | 2020-08-20 | 2020-09-25 | 浙江杭可仪器有限公司 | Aging test cabinet for memory |
| CN111830401B (en) * | 2020-09-14 | 2020-12-08 | 武汉精鸿电子技术有限公司 | Semiconductor test equipment |
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| CN208903668U (en) * | 2018-10-19 | 2019-05-24 | 武汉精鸿电子技术有限公司 | A kind of high/low temperature burn-in test rack structure |
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2018
- 2018-10-19 CN CN201811221808.7A patent/CN109119128B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20090027281A (en) * | 2007-09-12 | 2009-03-17 | 미래산업 주식회사 | Test handler and method of testing semiconductor devices using the same |
| CN202650549U (en) * | 2012-04-27 | 2013-01-02 | 海太半导体（无锡）有限公司 | High-low temperature and high-low voltage simulation test system for internal memory |
| CN203101553U (en) * | 2013-02-05 | 2013-07-31 | 重庆佩特电气有限公司 | Ageing room used for testing heating type products |
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