CN109116901A - A kind of linear voltage-stabilizing circuit and integrated circuit - Google Patents
A kind of linear voltage-stabilizing circuit and integrated circuit Download PDFInfo
- Publication number
- CN109116901A CN109116901A CN201811289153.7A CN201811289153A CN109116901A CN 109116901 A CN109116901 A CN 109116901A CN 201811289153 A CN201811289153 A CN 201811289153A CN 109116901 A CN109116901 A CN 109116901A
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- Prior art keywords
- nmos tube
- circuit
- voltage
- linear voltage
- stabilizing circuit
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Classifications
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/461—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using an operational amplifier as final control device
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/468—Regulating voltage or current wherein the variable actually regulated by the final control device is dc characterised by reference voltage circuitry, e.g. soft start, remote shutdown
Abstract
This application discloses a kind of linear voltage-stabilizing circuit and integrated circuits, the linear voltage-stabilizing circuit is applied to integrated circuit, operational amplifier circuit, first resistor, second resistance, the first NMOS tube, the second NMOS tube, PMOS tube, filter capacitor and charge pump are specifically included, and is attached in the way of response.Compared to traditional circuit, first NMOS tube, the second NMOS tube and PMOS tube constitute quick response loop in linear voltage-stabilizing circuit provided by the present application, to obtain changing lesser output voltage, and the stabilization time of the output voltage is shorter when there is big load jump.
Description
Technical field
This application involves technical field of integrated circuits, more specifically to a kind of linear voltage-stabilizing circuit and integrated circuit.
Background technique
Linear voltage regulator is simple with circuit structure, chip occupying area is small and low noise advantages, it has also become power supply pipe
Manage the important component in chip.It is increasing to the supply current requirement of linear voltage regulator with the development of science and technology, to negative
The requirement for carrying response is also higher, specially when big load jump, needs to change lesser output voltage and shorter
Stablize the time.
Summary of the invention
In view of this, the application provides a kind of linear voltage-stabilizing circuit and integrated circuit, for there is larger jump in load
When, it provides and changes output voltage smaller and that the stabilization time is shorter.
To achieve the goals above, it is proposed that scheme it is as follows:
A kind of linear voltage-stabilizing circuit, is applied to integrated circuit, and the linear voltage-stabilizing circuit includes operational amplifier circuit, the first electricity
Resistance, second resistance, the first NMOS tube, the second NMOS tube, PMOS tube, filter capacitor and charge pump, in which:
Anti-phase input termination reference voltage, the output end of the operational amplifier circuit are connected with the grid of the PMOS tube;
The grid of first NMOS tube is connected with the drain electrode of the charge pump, second NMOS tube, draining is used for
Connect one end of driving voltage, source electrode and the grid of second NMOS tube, one end of the first resistor, the filter capacitor
It is connected, and as the voltage output end of linear voltage-stabilizing circuit anode;
The source electrode of second NMOS tube is connected with the source electrode of the PMOS tube;
The other end of the first resistor is connected with one end of the inverting input terminal of the operational amplifier circuit, the second resistance
It connects;
The other end of the second resistance is connected with the other end of the drain electrode of the PMOS tube, the filter capacitor, and
As the voltage output end cathode of the linear voltage-stabilizing circuit, and it is grounded.
Optionally, first NMOS tube and second NMOS tube are the NMOS tube of same type.
Optionally, first NMOS tube, second NMOS tube and the PMOS tube constitute quick response loop.
Optionally, the voltage output end cathode passes through the power ground of the integrated circuit.
A kind of integrated circuit, which is characterized in that be provided with linear voltage-stabilizing circuit as described above.
It can be seen from the above technical scheme that this application discloses a kind of linear voltage-stabilizing circuit and integrated circuit, the line
Property voltage regulator circuit be applied to integrated circuit, specifically include operational amplifier circuit, first resistor, second resistance, the first NMOS tube, second
NMOS tube, PMOS tube, filter capacitor and charge pump, and be attached in the way of response.Compared to traditional circuit, the application is mentioned
The first NMOS tube, the second NMOS tube and PMOS tube constitute quick response loop in the linear voltage-stabilizing circuit of confession, thus occurring greatly
Load jump when, can obtain changing lesser output voltage, and the stabilization time of the output voltage is shorter.
Detailed description of the invention
In order to illustrate the technical solutions in the embodiments of the present application or in the prior art more clearly, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
Some embodiments of application for those of ordinary skill in the art without creative efforts, can be with
It obtains other drawings based on these drawings.
Fig. 1 is a kind of circuit diagram of linear voltage-stabilizing circuit provided by the embodiments of the present application;
Fig. 2 is a kind of load response figure of linear voltage-stabilizing circuit provided by the embodiments of the present application.
Specific embodiment
Below in conjunction with the attached drawing in the embodiment of the present application, technical solutions in the embodiments of the present application carries out clear, complete
Site preparation description, it is clear that described embodiments are only a part of embodiments of the present application, instead of all the embodiments.It is based on
Embodiment in the application, it is obtained by those of ordinary skill in the art without making creative efforts every other
Embodiment shall fall in the protection scope of this application.
Embodiment one
Fig. 1 is a kind of circuit diagram of linear voltage-stabilizing circuit provided by the embodiments of the present application.
As shown in Figure 1, linear voltage-stabilizing circuit provided in this embodiment is applied in the chip of integrated circuit, for being integrated
Circuit provides voltage driving, wherein the linear voltage-stabilizing circuit includes operational amplifier circuit A1, first resistor R1, second resistance R2, first
NMOS tube M1, the second NMOS tube M2, PMOS tube M3, filter capacitor C0 and charge pump Chargepump.
The inverting input terminal of operational amplifier circuit is for meeting reference voltage VREF, output end is connected with the grid of PMOS tube.Here
Reference voltage provided by the reference voltage circuit in integrated circuit.
The grid of first NMOS tube is connected with the drain electrode of charge pump, the second NMOS tube, and drain electrode is for connecting driving electricity
Press Vdd, source electrode is connected with the grid of second NMOS tube, one end of first resistor, one end of filter capacitor, and conduct
The voltage output end anode of linear voltage-stabilizing circuit.
The source electrode of second NMOS tube is connected with the source electrode of PMOS tube;The other end of first resistor and the reverse phase of operational amplifier circuit
Input terminal, second resistance one end be connected;The other end of second resistance and the drain electrode of PMOS tube, the other end phase of filter capacitor
Connection, and the voltage output end cathode as linear voltage-stabilizing circuit, and be grounded by the power ground of integrated circuit.
The first NMOS tube and the second NMOS tube in the present embodiment are the NMOS tube of same type.
First resistor and second resistance are the divider resistance of the output voltage of linear voltage-stabilizing circuit, for output voltage is anti-
It is fed to the normal phase input end of amplifier A1, the negative-feedback regu- lation effect of the linear voltage-stabilizing circuit operational amplifier circuit and the first NMOS tube makes
Forward voltage is equal to the voltage V of inverting input terminalREF, therefore VOUT=VREF* (1+R1/R2), can be obtained and not become with load current
That changes stabilizes the output voltage VOUT.Charge pump provides the gate drive voltage of the first NMOS tube.
When big load Iload variation, output voltage decline, by first resistor and second resistance partial pressure feedback
To the time t1 of operational amplifier circuit, the time t2 for making gate pmos pole tension be lower, the response of PMOS tube are responded by computing circuit
Time t3, charge pump drive the raised time t4 of grid voltage of M1 pipe, so that VOUT is drawn high by M1 adjustment pipe, entirely respond
Journey time T=t1+t2+t3+t4, in this process the drop-out voltage approximate representation of VOUT beΔV=(T*Iload/C0) is born
It is bigger to carry electric current, C0 more small voltage decline is more.
Here the first NMOS tube, the second NMOS tube and PMOS tube constitute quick response circuit, defeated when Iload is got higher from low
Voltage declines out, declines the voltage of the grid of the second NMOS tube, antedating response, and charge pump is allowed to drive the first NMOS tube adjustment pipe
Grid increases, to draw high output voltage.It can save the response time of t1 and t2, T is approximately t3+t4, to reduceΔV=
(T*Iload/C0), so that the response speed of linear voltage-stabilizing circuit significantly improves.Its specific response curve is as shown in Figure 2.
It can be seen from the above technical proposal that a kind of linear voltage-stabilizing circuit is present embodiments provided, the linear voltage-stabilizing circuit
Applied to integrated circuit, operational amplifier circuit, first resistor, second resistance, the first NMOS tube, the second NMOS tube, PMOS are specifically included
Pipe, filter capacitor and charge pump, and be attached in the way of response.It is provided by the present application linear steady compared to traditional circuit
The first NMOS tube, the second NMOS tube and PMOS tube constitute quick response loop in volt circuit, thus there is big load jump
When, it can obtain changing lesser output voltage, and the stabilization time of the output voltage is shorter.
Embodiment two
A kind of integrated circuit is present embodiments provided, which is provided with linear voltage stabilization provided by an embodiment
Circuit.The linear voltage-stabilizing circuit specifically include operational amplifier circuit, first resistor, second resistance, the first NMOS tube, the second NMOS tube,
PMOS tube, filter capacitor and charge pump, and be attached in the way of response.Compared to traditional circuit, line provided by the present application
Property voltage regulator circuit in the first NMOS tube, the second NMOS tube and PMOS tube constitute quick response loop, thus there is big load
When jump, it can obtain changing lesser output voltage, and the stabilization time of the output voltage is shorter, so as to make to collect
The better voltage driving of quality is obtained at circuit, is worked more stable.
All the embodiments in this specification are described in a progressive manner, the highlights of each of the examples are with
The difference of other embodiments, the same or similar parts between the embodiments can be referred to each other.
It should be understood by those skilled in the art that, the embodiments of the present application may be provided as method, apparatus or calculating
Machine program product.Therefore, the embodiment of the present application can be used complete hardware embodiment, complete software embodiment or combine software and
The form of the embodiment of hardware aspect.Moreover, the embodiment of the present application can be used one or more wherein include computer can
With in the computer-usable storage medium (including but not limited to magnetic disk storage, CD-ROM, optical memory etc.) of program code
The form of the computer program product of implementation.
The embodiment of the present application is referring to according to the method for the embodiment of the present application, terminal device (system) and computer program
The flowchart and/or the block diagram of product describes.It should be understood that flowchart and/or the block diagram can be realized by computer program instructions
In each flow and/or block and flowchart and/or the block diagram in process and/or box combination.It can provide these
Computer program instructions are set to general purpose computer, special purpose computer, Embedded Processor or other programmable data processing terminals
Standby processor is to generate a machine, so that being held by the processor of computer or other programmable data processing terminal devices
Capable instruction generates for realizing in one or more flows of the flowchart and/or one or more blocks of the block diagram
The device of specified function.
These computer program instructions, which may also be stored in, is able to guide computer or other programmable data processing terminal devices
In computer-readable memory operate in a specific manner, so that instruction stored in the computer readable memory generates packet
The manufacture of command device is included, which realizes in one side of one or more flows of the flowchart and/or block diagram
The function of being specified in frame or multiple boxes.
These computer program instructions can also be loaded into computer or other programmable data processing terminal devices, so that
Series of operation steps are executed on computer or other programmable terminal equipments to generate computer implemented processing, thus
The instruction executed on computer or other programmable terminal equipments is provided for realizing in one or more flows of the flowchart
And/or in one or more blocks of the block diagram specify function the step of.
Although preferred embodiments of the embodiments of the present application have been described, once a person skilled in the art knows bases
This creative concept, then additional changes and modifications can be made to these embodiments.So the following claims are intended to be interpreted as
Including preferred embodiment and all change and modification within the scope of the embodiments of the present application.
Finally, it is to be noted that, herein, relational terms such as first and second and the like be used merely to by
One entity or operation are distinguished with another entity or operation, without necessarily requiring or implying these entities or operation
Between there are any actual relationship or orders.Moreover, the terms "include", "comprise" or its any other variant meaning
Covering non-exclusive inclusion, so that process, method, article or terminal device including a series of elements not only wrap
Those elements are included, but also including other elements that are not explicitly listed, or further includes for this process, method, article
Or the element that terminal device is intrinsic.In the absence of more restrictions, being wanted by what sentence "including a ..." limited
Element, it is not excluded that there is also other identical elements in process, method, article or the terminal device for including the element.
Technical solution provided herein is described in detail above, specific case used herein is to this Shen
Principle and embodiment please is expounded, the present processes that the above embodiments are only used to help understand and its
Core concept;At the same time, for those skilled in the art, according to the thought of the application, in specific embodiment and application
There will be changes in range, in conclusion the contents of this specification should not be construed as limiting the present application.
Claims (5)
1. a kind of linear voltage-stabilizing circuit is applied to integrated circuit, which is characterized in that the linear voltage-stabilizing circuit includes amplifier electricity
Road, first resistor, second resistance, the first NMOS tube, the second NMOS tube, PMOS tube, filter capacitor and charge pump, in which:
Anti-phase input termination reference voltage, the output end of the operational amplifier circuit are connected with the grid of the PMOS tube;
The grid of first NMOS tube is connected with the drain electrode of the charge pump, second NMOS tube, drains for connecting
Driving voltage, source electrode are connected with one end of the grid of second NMOS tube, one end of the first resistor, the filter capacitor
It connects, and as the voltage output end of linear voltage-stabilizing circuit anode;
The source electrode of second NMOS tube is connected with the source electrode of the PMOS tube;
The other end of the first resistor is connected with one end of the inverting input terminal of the operational amplifier circuit, the second resistance;
The other end of the second resistance is connected with the other end of the drain electrode of the PMOS tube, the filter capacitor, and conduct
The voltage output end cathode of the linear voltage-stabilizing circuit, and be grounded.
2. linear voltage-stabilizing circuit as described in claim 1, which is characterized in that first NMOS tube and second NMOS tube
For the NMOS tube of same type.
3. linear voltage-stabilizing circuit as described in claim 1, which is characterized in that first NMOS tube, second NMOS tube
Quick response loop is constituted with the PMOS tube.
4. linear voltage-stabilizing circuit as described in claim 1, which is characterized in that the voltage output end cathode passes through described integrated
The power ground of circuit.
5. a kind of integrated circuit, which is characterized in that be provided with linear voltage-stabilizing circuit as claimed in any one of claims 1 to 3.
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CN201811289153.7A CN109116901B (en) | 2018-10-31 | 2018-10-31 | Linear voltage stabilizing circuit and integrated circuit |
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CN201811289153.7A CN109116901B (en) | 2018-10-31 | 2018-10-31 | Linear voltage stabilizing circuit and integrated circuit |
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CN109116901B CN109116901B (en) | 2023-09-15 |
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Cited By (1)
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CN110262610A (en) * | 2019-07-10 | 2019-09-20 | 上海艾为电子技术股份有限公司 | A kind of linear voltage regulator of power tube |
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