CN109100671A - The monitoring method and monitoring system of test macro are directed in integrated circuit electronic component testing - Google Patents
The monitoring method and monitoring system of test macro are directed in integrated circuit electronic component testing Download PDFInfo
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- CN109100671A CN109100671A CN201810732830.1A CN201810732830A CN109100671A CN 109100671 A CN109100671 A CN 109100671A CN 201810732830 A CN201810732830 A CN 201810732830A CN 109100671 A CN109100671 A CN 109100671A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R35/00—Testing or calibrating of apparatus covered by the other groups of this subclass
Abstract
The present invention provides a kind of in integrated circuit electronic component testing is directed to the monitoring method and monitoring system of test macro, comprising steps of A, before the test of integrated circuit electronic component volume production, initialization process is carried out to test macro；B, the fault type and failure grade information for defining the test macro, into the volume production test phase to integrated circuit electronic component；C, it is based on the defined fault type and failure grade information, to carry out fault type differentiation, continue test if fault-free terminates the working condition of test macro described in real-time detection up to testing, and otherwise enters step D；D, judge whether the fault level is critical failure, if then stopping testing, otherwise return step C.By upper, test macro is monitored in real time in volume production test process, monitors the generation of failure in time, and stop testing, to avoid continuing to produce under nonserviceabling, the damage of tested IC device is utmostly reduced, while monitoring process not influence testing efficiency.
Description
Technical field
The present invention relates to electric test technical fields, and especially one kind is in integrated circuit electronic component testing for survey
The monitoring method and monitoring system of test system.
Background technique
In the test of integrated circuit (IC, Integrated Circuit) electronic component, whether the hardware of test macro
Normally, it can be monitored and control by many technology and methods, such as system boot self-test, system calibration, system accuracy inspection
Survey etc..Those above means are implemented together, can ensure that IC test macro hardware before starting IC volume production and testing is in substantially
Normal condition.
But above method is all the means that could implement before the test of IC volume production, once into the volume production test phase of IC,
How to ensure that IC test macro after breaking down suddenly, can be monitored in time and arrive, thus avoid under nonserviceabling after
Continuous production, it could even be possible to leading to the damage of tested IC device due to IC test macro failure.Based on this, surveyed in IC test
The monitoring of test system is imperative.
In addition, the test program of IC test macro is the mode that user oriented takes open programming.User passes through programming,
The various test programs of manipulation hardware can directly be write.And in programming, due to various reasons, such as to hardware driving function
Be unfamiliar with or human negligence or fault and write the test program to make mistake, also result in test macro work it is non-just
Normal state.
There are two types of traditional failure exception localization methods: one is software issue, problems can be by generating log
Mode position；It in addition is exactly hardware problem, localization method is according to phenomenon of the failure, gradually analyzes, retrodicts and lead to problem
There may be the reason of.
And in hardware fault position fixing process, sometimes positioning event could must be gradually determined by external various instrument again
Hinder reason.And in some occasions, there is no extraneous instrument.It is monitored, also needs IC test equipment with instrument even if having ready conditions
Cabinet, apparatus lid opening, extension instrument could be accessed.This hardware fault positioning method, i.e., it is inconvenient, it is also dangerous, even more
Inefficiency.
Application No. is CN201410230062.1 " a kind of hardware device based on domestic operating system monitors automatically is
System " gives a kind of monitoring thinking, and monitoring principle is to be examined successively according to predefined sequence by active poll
The state of the various hardware of server.But if above-mentioned polling mode is used in IC test, and test macro needs response and test same
Shi Jinhang will have the hidden danger of hardware conflicts, but will influence the testing efficiency of IC test.
Summary of the invention
The main purpose of the present invention is to provide a kind of in integrated circuit electronic component testing for test macro
Monitoring method and monitoring system solve above-mentioned technical problem with corresponding
It is described in integrated circuit electronic component testing for test macro monitoring method comprising steps of
A, before the test of integrated circuit electronic component volume production, initialization process is carried out to test macro；
B, the fault type and failure grade information for defining the test macro, into integrated circuit electronic component
Volume production test phase；
C, the defined fault type and failure grade information, the work shape of test macro described in real-time detection are based on
To carry out fault type differentiation, continue test if fault-free terminates state up to testing, and otherwise enters step D；
D, judge whether the fault level is critical failure, if then stopping testing, otherwise return step C.
By upper, test macro is monitored in real time in volume production test process, the hair of failure can be monitored in time
Raw, failure occurs to stop test process, to avoid continuing to produce under nonserviceabling, utmostly reduces tested IC device
Damage, while monitoring process and do not influence testing efficiency.
Wherein, before the working condition of test macro described in the real-time detection described in step C is to carry out fault type differentiation,
Further include:
The step of judging test parameter validity in the received test function of the test macro, if test parameter is default
In range, then effectively；Otherwise invalid, stop detection.
By upper, evade the test function due to caused by tester is careless and write mistake, and ensure that tested integrated circuit electricity
The test safety of sub- component.
Wherein, in step C, the working condition of test macro described in real-time detection includes: to carry out fault type differentiation
Using different detection circuits, the working condition of test macro described in parallel detection；
The identification of type is carried out to each detection circuit working condition detected.
By upper, can be evaded using different fault detection circuits could must gradually be determined using external various instrument
The case where orientation problem reason.Especially there is no the case where extension instrument in some occasions.In addition, parallel using test and monitoring
Mode, it can be ensured that the testing time will not due to monitoring system presence and increase, improve testing efficiency.Meanwhile once occurring
Any one failure can be reacted accordingly immediately.
Wherein, described to use different detection circuits, the working condition of test macro described in parallel detection includes at least following
One of:
Using clamp detection circuit, the working condition for detecting the test macro includes: to judge the test macro
Whether the output of the source V/I is clamping in clamping range set by detection circuit；
Using undervoltage detection circuit, the working condition for detecting the test macro includes: to judge the test macro institute
Whether the voltage of output is less than reference voltage set by undervoltage detection circuit；
Using Temperature and Humidity circuit, the working condition for detecting the test macro includes: the detection test macro
Temperature and humidity whether be more than Threshold of Temperature And Humidity set by Temperature and Humidity circuit；
Using detection circuit is outranged, the working condition for detecting the test macro includes: the detection test macro
Range whether be more than to outrange the set range threshold value of detection circuit detection；
Using over-current detection circuit, the working condition for detecting the test macro includes: the detection test macro
Whether electric current is more than current threshold set by over-current detection circuit.
By upper, by the way that each running parameter of test macro to be compared with threshold value, fault condition is judged, for test
The failure not of the same race being likely to occur of system, can be detected simultaneously, not influence testing efficiency.
Wherein, after step D, further include the steps that recording the fault type and failure grade information.
It, can intuitively quick fault location, failure mode and event when conveniently being safeguarded to test macro by upper
Barrier degree.
Corresponding, the present invention also provides a kind of in integrated circuit electronic component testing for the monitoring system of test macro
System, including sequentially connected testing control module, Test driver module and test macro；
Further include:
Information definition module, for setting and exporting the fault type and failure grade information of test macro；
Running parameter detection module is connect with the test macro, in the integrated circuit electronic component volume production stage
Detect the working condition of the test macro；
Exception information processing module is connect with information definition module and the running parameter detection module respectively, for according to
The failure is differentiated according to the fault type and failure grade information, when reaching critical failure, to the testing and control
Module output stops test instruction.
It, compared with the prior art, can be in the test process to integrated circuit electronic component, by fault detection by upper
Module is in real time monitored test macro, once critical failure occurs in test macro, exception information processing module be can control
Testing control module stops testing immediately, guarantees the safety of test.
Wherein, the running parameter detection module includes at least the following one for parallel detection: clamp detection circuit,
Undervoltage detection circuit, outranges detection circuit and over-current detection circuit at Temperature and Humidity circuit.
By upper, for the failure not of the same race being likely to occur of test macro, can be detected.
Wherein, the clamp fault detection circuit includes:
Non-inverting input terminal one end of positive clamping amplifier and back clamping amplifier, positive clamping amplifier receives clamp
Upper-limit information, other end series connection first resistor R6, the non-inverting input terminal that back clamping amplifier is connected to after second resistance R7；Institute
State input terminal of the public connecting end of first resistor R6, second resistance R7 as clamp circuit；
The inverting input terminal of inverting input terminal one end connection back clamping amplifier of positive clamping amplifier, the forward direction
The inverting input terminal other end of clamped amplifier is connected after 3rd resistor R5, the clamp control terminal being connected in test macro；
The connecting pin of the inverting input terminal of the 3rd resistor R5 and the positive clamping amplifier, is also connected with the 4th resistance
It is grounded after R4；
After the output end of positive clamping amplifier connects a backward dioded, the clamp control that is connected in the test macro
End processed and the exception information processing module；
The non-inverting input terminal of back clamping amplifier, which receives, clamps lower limit information, after output end connects a forward diode,
The clamp control terminal and the exception information processing module being connected in the test macro.
By upper, when receiving the voltage V (or electric current I) of test macro within the scope of the upper and lower limit of the setting clamp,
The output diode of two clamped amplifiers is in reverse-biased, and entirely clamp route will not work at this time.
When receiving the voltage V (or electric current I) of test macro beyond within the scope of the upper and lower limit of the setting clamp,
In clamped amplifier (if positive clamping, the effect of positive clamping amplifier, back clamping then make by back clamping amplifier
With) output diode can enter positive skewness, the control of test macro transfer to clamp circuit management, realize to voltage V (or
Electric current I) clamp control, and export clamp failure.
Wherein, the under-voltage fault detection circuit, outrange fault detection circuit or over current fault detection circuit is wrapped respectively
It includes:
Comparator, two input terminals are separately connected a bleeder circuit；
Actual voltage value, range value or the current value of one input end reception test macro；Another input terminal receives electricity
The threshold value of pressure value, range value or current value；
Comparator output terminal is connected to exception information processing module.
By upper, by the way that the voltage value of test macro, range value or current value to be compared with threshold value, comparison result is defeated
(or low) level high out is fault condition, so as to detect to different faults.
Detailed description of the invention
Fig. 1 is in integrated circuit electronic component testing for the flow chart of the monitoring method of test macro；
Fig. 2 is in integrated circuit electronic component testing for the schematic illustration of the monitoring system of test macro；
Fig. 3 is the circuit theory schematic diagram for clamping detection circuit；
Fig. 4 is the circuit theory schematic diagram of undervoltage detection circuit；
The monitoring information schematic diagram that Fig. 5 is recorded by exception information processing module.
Specific embodiment
Test macro is directed in integrated circuit electronic component testing to of the present invention referring to FIG. 1 to FIG. 5
Monitoring method and monitoring system be described in detail.
It is as shown in Figure 1 monitoring method flow chart, comprising the following steps:
S101: before the test of integrated circuit electronic component volume production, initialization process is carried out to test macro.
Before the test of integrated circuit electronic component volume production, the initialization process for test macro includes that test macro is opened
The processes such as machine self-test, test macro calibration and test macro accuracy detection.Above-mentioned initialization procedure with it is existing in background technique
Technology is identical, without repeating.
S102: testing control module exports test parameter.
By this step, into the volume production test process of integrated circuit electronic component.Monitoring system as shown in connection with fig. 2
System is illustrated, and defines the exception information of activation bit and test macro in information definition module 201 in advance.The exception
Information includes the various fault types and fault degree grade separation of each device in test macro.Fault type includes hereinafter will
The clamp failure that can address, over-voltage fault, temperature and humidity failure etc., fault level includes regular prompt information, warning message, cause
Order error message etc..
Information definition module 201 will drive parameter definition to be sent to testing control module 202, and be eventually sent to connect with it
The Test driver module 203 connect.In addition, the exception information of test macro is sent to exception information processing module 205.
It include multiple equipment, such as eight channels floating voltage current source module 2041 described hereinafter in test macro
(FOVI), binary channels floating voltage current source module 2042 (FPVI) and four-way full floating differential voltage table module 2043
(QVM) etc., test target (test object in selection test macro) is selected by testing control module 202, by testing and control
Module 202 exports the test parameter.The test parameter includes but is not limited to following several classes: voltage value, current value, sampling
Depth value, sample frequency value and clamp value.
S103: exception information processing module 205 judges the validity of the test parameter, when judgement effectively then enters step
Otherwise S104 enters step S112 and stops test.
In this step, the judgement for test parameter validity includes judging to test gear and test parameter in test function
Whether match.
By taking test parameter is voltage value as an example: when selecting voltage gear position for 10V voltage gear, the exportable voltage of constant pressure source
Range is [- 10V, 10V], if test parameter is the voltage of 20V, test parameter is invalid value at this time.It is deep to sample again
For angle value: if the gear of its sampling depth value is 2K, the sampling depth value of measurement parameter is then invalid beyond 2K.
The selection of above-mentioned voltage gear and test parameter are write by the test function of early period, by joining for test
Whether wrong the judgement of number validity, can detecte out test function.When exception information processing module 205 judges test parameter
When effective, an authorization message is fed back to testing control module 202.Otherwise when judging that test parameter is invalid, directly output stops
Control instruction to testing control module 202, pause is tested.
It can find that test function writes the problem of mistake, the programming to human negligence or fault in time through the above steps
Mistake can be found in time, it is avoided to cause test errors.
S104: test macro response test parameter tests integrated circuit electronic component.
The received test target of institute is issued to Test driver module 203 connected to it by testing control module 202, is being surveyed
After trying the progress alignment processing of drive module 203, the test target movement in test macro 204 is driven.
In the process that test macro 204 tests integrated circuit electronic component, running parameter detection module
The working status parameter of 206 real-time detection test macros 204 will test result and be sent to exception information processing module 205, with reality
When discriminating test system 204 whether work normally.The running parameter detection module 206 includes at least following one: clamp event
Barrier detection circuit, temperature and humidity abnormal failure detection circuit, outranges fault detection circuit and overcurrent event at under-voltage fault detection circuit
Hinder detection circuit.
S105~S108 of subsequent step is parallel procedure, is described one by one below.
S105: clamp detection circuit judges whether to clamp, and when clamping, enters step S109, otherwise enters
Step S110.
Fig. 3 show the circuit theory schematic diagram of clamp detection circuit, and top half is test macro circuit, lower half portion
For clamp circuit.
By taking test macro circuit is eight channel floating voltage current source module 2041 (FOVI) in aforementioned test macro as an example,
Including sequentially connected Null amplifier (corresponding to Null AMP in Fig. 3) and integral amplifier.The homophase input of Null amplifier
End ground connection, inverting input terminal one end connect eight channel floating voltage electric current source ports, and subsequent abbreviation V/I source port is (shown in Fig. 3
For V/I DAC), the other end connects operating mode control terminal (being V/I Mode shown in Fig. 3).Operating mode control terminal is for selecting
The state for selecting V/I source port is pincers stream mode or pincers die pressing type.
The output end of Null amplifier is connected to the inverting input terminal of integral amplifier, the non-inverting input terminal of integral amplifier
Ground connection.
Clamp circuit includes positive clamping amplifier+and back clamping amplifier-, positive clamping amplifier+it is same mutually defeated
Enter to hold one end to connect the port Clamp+DAC, is connected to the same mutually defeated of back clamping amplifier-after other end series resistance R6, R7
Enter end；Input terminal (Fig. 3 shown in be V/I Back) of the public connecting end of described resistance R6, R7 as clamp detection circuit；
Control terminal of the public connecting end of described diode D1, D2 as voltage clamping system, while it is connected to exception information processing module
205。
Positive clamping amplifier+inverting input terminal one end connection back clamping amplifier-inverting input terminal, positive pincers
Position amplifier+the inverting input terminal other end connect after a resistance R5, be connected to aforementioned Null amplifier and integral amplifier
Public connecting end.
Resistance R5 with the positive clamping amplifier+the connecting pin that connect of inverting input terminal, be also connected with a resistance R4
After be grounded.
Positive clamping amplifier+output end connect a backward dioded D1 after, be connected to aforementioned Null amplifier and product
Divide the public connecting end of amplifier.
The non-inverting input terminal of back clamping amplifier-is additionally coupled to the port Clamp-DAC, positive two poles of output end connection one
After pipe D2, it is connected to the public connecting end of aforementioned Null amplifier and integral amplifier.
Clamp circuit effect is the DC level that the top of periodically variable waveform or bottom are maintained to a certain determination
On.In foregoing circuit, the port Clamp+DAC and the port Clamp-DAC are respectively used to the upper and lower limit information that setting clamps, and work as V/
The port I Back received voltage V (or electric current I) it is described setting clamp upper and lower limit within the scope of when, two clamped amplifiers
Output diode be in reverse-biased, at this time entirely clamp route will not work.
When the port V/I Back received voltage V (or electric current I) beyond it is described setting clamp upper and lower limit within the scope of
When, (if positive clamping, positive clamping amplifier+effect, then back clamping amplifies back clamping one of clamped amplifier
Device-effect) output diode can enter positive skewness, and have a clamp current by the diode replace Null amplifier it is defeated
Integration current controls integral amplifier out, and Null amplifier will not work at this time, and the control in the source V/I transfers to clamp circuit pipe
Reason realizes the clamp control to voltage V (or electric current I), clamps the waveform top of the output end control source the V/I output of detection circuit
Portion or bottom are maintained in the DC level of a certain determination, while being exported to exception information processing module 205.
It should be noted that in the above example, the public connecting end of Null amplifier and integral amplifier is as the electricity
The clamp control terminal on road.Specifically in other circuits, the position for clamping control terminal may be different, is subject to physical circuit,
Herein without limiting.
S106: when undervoltage detection circuit detection occurs under-voltage, S109 is entered step, S110 is otherwise entered step.
It is still that eight channel floating voltage current source modules 2041 (FOVI) are in aforementioned test macro with test macro circuit
Example outputs it end and is known as the source VI.It is illustrated in figure 4 the circuit theory schematic diagram of undervoltage detection circuit, including a comparator
P1, one input end are the port V+, receive the actual voltage value in the source VI；Another input terminal is the port FVDD, receives benchmark electricity
Pressure (or being threshold voltage).Output end (ALARM_V+ shown in Fig. 4) is exported to exception information processing module 205.
Between the port V+ and the input terminal and the port FVDD and the input terminal of comparator of comparator, also
It is connected with bleeder circuit.
When comparator P1 exports high level, indicate that generation is under-voltage, on the contrary then expression is normally.
S107: Temperature and Humidity circuit detects data of the Temperature and Humidity module, when being higher than threshold value, enters step S109, otherwise enters
Step S110.
The temperature and humidity fault detection circuit is realized using Temperature Humidity Sensor.The Temperature Humidity Sensor is surveyed for detecting
The temperature and humidity of test system work.A Threshold of Temperature And Humidity is preset, when the data of the Temperature and Humidity module detected is higher than the threshold value, i.e.,
Expression is possible to temperature and humidity exception occur, and the data of the Temperature and Humidity module that will be above threshold value is exported to exception information processing module 205.
When S108: outranging detection circuit and outranging occurs in over-current detection circuit detection or overcurrent, S109 is entered step,
Otherwise S110 is entered step.
The principle of above-mentioned two circuit is identical as aforementioned under-voltage fault detection circuit, is to use comparator that institute is received
The source (test macro is exported) VI actual value is compared with threshold value, thus judge whether to occur outranging or overcurrent condition,
When present, it will test data to export to exception information processing module 205.This will not be detailed here.
S109: exception information processing module 205 judges that running parameter detection module 206 detects whether as critical failure,
When belonging to critical failure, enters step S112 and stop test, otherwise enter step S110.
Exception information processing module 205 detects running parameter based on exception information set by information definition module 201
The detection data of module 206 is recognized, and is confirmed whether it is critical failure.The recognition results include following four classes failure classes
Type: one, regular prompt information (Normal Messages) does not influence the operation of test macro；Two, warning message
(Warning Messages) may have an impact to the operation of test macro；Three, error message (Failures) is to test system
The operation of system has an impact；Four, fatal message (Fatal Errors), has an impact to the operation of test macro, and will cause
The collapse of test macro.
When belonging to four classes, a control instruction is exported to testing control module 202, enters step S112 stopping
Test.
Otherwise when belonging to other non-four classes, S110 is entered step, continues to keep test mode, while recording monitoring letter
Breath.As shown in figure 5, the monitoring information recorded includes at least following one: 1. fault type；2. information source indicates acquisition letter
The source of breath connects eight channel floating voltage current source modules 2041, binary channels floating voltage current source module 2042
(FPVI) or the physical channel of the modules such as four-way full floating differential voltage table module 2043；3. function name indicates detection test
Test function title used in system operational parameters；4. parameter name indicates the test parameter that test function is included；5. failure
Information explanation, illustrates specific fault message；6. the fault message time records fault message generation time；7. failure label；8. wrong
Accidentally label indicates the label that current test is broken down.
S110: test mode is kept.
When the judging result in step S109 is fault-free or failure does not influence test, then test mode is kept, continued
Test.
S111: judgement tests whether to terminate, and S112 is entered step if terminating and stops test, otherwise return step S110.
The foregoing is merely presently preferred embodiments of the present invention, is not intended to limit the invention, it is all in spirit of the invention and
Within principle, any modification, equivalent replacement, improvement and so on be should all be included in the protection scope of the present invention.
Claims (9)
1. a kind of monitoring method for being directed to test macro in integrated circuit electronic component testing, which is characterized in that including step
It is rapid:
A, before the test of integrated circuit electronic component volume production, initialization process is carried out to test macro；
B, the fault type and failure grade information for defining the test macro, into the integrated circuit electronic component
Volume production test phase；
C, the defined fault type and failure grade information are based on, the working condition of test macro described in real-time detection with
Fault type differentiation is carried out, continue test if fault-free terminates up to testing, and otherwise enters step D；
D, judge whether the fault level is critical failure, if then stopping testing, otherwise return step C.
2. the method according to claim 1, wherein the work of test macro described in the real-time detection described in step C
Before making state to carry out fault type differentiation, further includes:
The step of judging test parameter validity in the received test function of the test macro, if test parameter is in preset range
It is interior, then effectively；Otherwise invalid, stop detection.
3. the method according to claim 1, wherein in step C, the work shape of test macro described in real-time detection
State with carry out fault type differentiation include:
Using different detection circuits, the working condition of test macro described in parallel detection；
The identification of type is carried out to each detection circuit working condition detected.
4. according to the method described in claim 3, it is characterized in that, described use different detection circuits, survey described in parallel detection
The working condition of test system includes at least one:
Using clamp detection circuit, the working condition for detecting the test macro includes: to judge the source V/I of the test macro
Whether output is clamping in clamping range set by detection circuit；
Using undervoltage detection circuit, the working condition for detecting the test macro includes: to judge that the test macro is exported
Voltage whether be less than reference voltage set by undervoltage detection circuit；
Using Temperature and Humidity circuit, the working condition for detecting the test macro includes: to detect the temperature of the test macro
Whether humidity is more than Threshold of Temperature And Humidity set by Temperature and Humidity circuit；
Using detection circuit is outranged, the working condition for detecting the test macro includes: to detect the amount of the test macro
Whether journey is more than to outrange the set range threshold value of detection circuit detection；
Using over-current detection circuit, the working condition for detecting the test macro includes: to detect the electric current of the test macro
It whether is more than current threshold set by over-current detection circuit.
5. the method according to claim 1, wherein further including recording the fault type and event after step D
The step of hindering class information.
6. a kind of monitoring system for being directed to test macro in integrated circuit electronic component testing, including sequentially connected test
Control module (202), Test driver module (203) and test macro (204)；
It is characterized by further comprising:
Information definition module (201), for setting and exporting the fault type and failure grade information of test macro；
Running parameter detection module (206) is connect with the test macro (204), in integrated circuit electronic component amount
The production stage detects the working condition of the test macro；
Exception information processing module (205), respectively with information definition module (201) and the running parameter detection module (206)
Connection, for differentiating according to the fault type and failure grade information to the failure, when reaching critical failure, to institute
It states testing control module (202) output and stops test instruction.
7. system according to claim 6, which is characterized in that the running parameter detection module (206), which includes at least, to be used
In the following one of parallel detection: clamp detection circuit, Temperature and Humidity circuit, outranges detection circuit at undervoltage detection circuit
And over-current detection circuit.
8. system according to claim 7, which is characterized in that the clamp fault detection circuit includes:
Positive clamping amplifier and back clamping amplifier, non-inverting input terminal one end of positive clamping amplifier receive the clamp upper limit
Information, other end series connection first resistor R6, the non-inverting input terminal that back clamping amplifier is connected to after second resistance R7；Described
Input terminal of the public connecting end as clamp circuit of one resistance R6, second resistance R7；
The inverting input terminal of inverting input terminal one end connection back clamping amplifier of positive clamping amplifier, the positive clamping
The inverting input terminal other end of amplifier is connected after 3rd resistor R5, the clamp control terminal being connected in test macro；
The connecting pin of the inverting input terminal of the 3rd resistor R5 and the positive clamping amplifier, after being also connected with the 4th resistance R4
Ground connection；
After the output end of positive clamping amplifier connects a backward dioded, the clamp control terminal that is connected in the test macro
With exception information processing module (205)；
The non-inverting input terminal of back clamping amplifier, which receives, clamps lower limit information, after output end connects a forward diode, connection
Clamp control terminal and exception information processing module (205) in the test macro.
9. system according to claim 7, which is characterized in that the under-voltage fault detection circuit outranges fault detection
Circuit or over current fault detection circuit respectively include:
Comparator, two input terminals are separately connected a bleeder circuit；
Actual voltage value, range value or the current value of one input end reception test macro；Another input terminal reception voltage value,
The threshold value of range value or current value；
Comparator output terminal is connected to exception information processing module (205).
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN113866595A (en) * | 2021-09-09 | 2021-12-31 | 安徽亿普拉斯科技有限公司 | Integrated circuit test equipment and test system |
| WO2022052231A1 (en) * | 2020-09-13 | 2022-03-17 | 南京宏泰半导体科技有限公司 | Efficient real-time status detection device for test system |
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