CN109100620B - System and method for verifying suppression effect of suppression guide wire on VFTO of GIS transformer substation - Google Patents
System and method for verifying suppression effect of suppression guide wire on VFTO of GIS transformer substation Download PDFInfo
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- CN109100620B CN109100620B CN201810588548.0A CN201810588548A CN109100620B CN 109100620 B CN109100620 B CN 109100620B CN 201810588548 A CN201810588548 A CN 201810588548A CN 109100620 B CN109100620 B CN 109100620B
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Abstract
The invention provides a system and a method for verifying the suppression effect of a suppression guidance wire on Very Fast Transient Overvoltage (VFTO) of a Gas Insulated Switchgear (GIS) substation, wherein the system comprises the following steps: the high-frequency overvoltage protection device comprises two GIS sleeves BG1 and BG2, two isolating switches DS1 and DS2, a circuit breaker CB, an alternating current power supply AC used for simulating a power supply side generating high-frequency overvoltage and a direct current power supply DC used for simulating residual charges on a load side influencing the high-frequency overvoltage, wherein the alternating current power supply AC and the direct current power supply DC are sequentially connected with the sleeve BG1, the isolating switch DS1, the circuit breaker CB and the sleeve BG2 in series through a restraining lead, another branch is led out from a connecting point C1 between the sleeve BG1 and the isolating switch DS1, and the isolating switch DS2 is connected to the branch through the restraining lead. The system and the method simulate the suppression effect of the suppression lead on the VFTO in different modes by adjusting the state of the isolating switch and changing the lengths of L1, L2, L3 and L4 in a test loop through direct-current voltage, and provide a foundation for the examination of the isolating switch.
Description
Technical Field
The invention relates to the field of power system power grid cases and protection application, in particular to a system and a method for verifying the suppression effect of a suppression guide wire on VFTO of a GIS substation.
Background
Gas Insulated Switchgear (GIS) equipment is almost completely adopted in an ultra-high voltage alternating current transmission system in China, and the Gas Insulated Switchgear (GIS) equipment has the advantages of compact structure, small occupied area, easiness in maintenance and the like, but Very Fast Transient Overvoltage (VFTO) caused by the operation of an isolating switch can bring harm to equipment insulation and normal operation of secondary equipment. The existing VFTO suppression measures mainly comprise the installation of an isolating switch damping resistor, a magnetic ring, a suppression lead and the like. The damping resistor is an effective device which is verified by theory and practice, but the damping resistor has high manufacturing cost, high failure rate and poor economical efficiency. For the magnetic ring and the suppression lead, the suppression effect is lack of true test verification.
Disclosure of Invention
In order to solve the technical problem that a true test is lacked to verify the suppression effect of a suppression wire on VFTO in the prior art, the invention provides a system for verifying the suppression effect of the suppression wire on a very fast transient overvoltage VFTO of a Gas Insulated Switchgear (GIS) substation, which comprises the following steps:
two GIS bushings BG1 and BG2, two disconnectors DS1 and DS2, a circuit breaker CB, an alternating current source AC for simulating the source side generating a high-frequency overvoltage and a direct current source DC for simulating the residual charge on the load side affecting the high-frequency overvoltage, the alternating current power supply AC and the direct current power supply DC are sequentially connected in series with a sleeve BG1, a disconnecting switch DS1, a breaker CB and a sleeve BG2 through a suppression lead, another branch is led out from a connecting point C1 between the sleeve BG1 and the disconnecting switch DS1, the branch is connected with a disconnecting switch DS2 through the suppression lead, and the length between the connection point C1 and the end point of the sleeve B1 close to the end of C1 is L1, the length between the connection point C1 and the end point of the disconnecting switch DS1 close to the end of C1 is L2, the length between the disconnecting switch DS1 and the circuit breaker CB is L3, and the length between the connection point C1 and the end point of the disconnecting switch DS2 close to the end of C1 is L4.
Further, the system also comprises a voltage measuring device for measuring VFTO in the system.
Further, the length L1 in the system ranges from 8 to 10 meters, L2 and L3 ranges from 3 to 5 meters, and L4 ranges from 8 to 12 meters.
Further, the number of the voltage measuring devices in the system is 4, and the voltage measuring devices are respectively positioned between the sleeve BG1 and the disconnecting switch DS1 and are adjacent to the sleeve BG1 and the disconnecting switch DS1, between the disconnecting switch DS1 and the circuit breaker CB and are adjacent to the disconnecting switch DS1, and between the connecting point C1 and the disconnecting switch DS2 and are adjacent to the disconnecting switch DS 2.
Further, the voltage measuring device is a voltage sensor.
According to another aspect of the invention, the invention provides a method for verifying the suppression effect of a guidance wire on VFTO of a GIS substation, which comprises the following steps:
according to the GIS substation structure for verifying the suppression effect of the suppression guide wire on the VFTO, determining a test loop for verifying the suppression effect of the suppression guide wire on the VFTO, wherein the test loop comprises two GIS sleeves BG1 and BG2, two isolating switches DS1 and DS2, a circuit breaker CB, an alternating current power supply AC for simulating a power supply side generating high-frequency overvoltage and a direct current power supply DC for simulating residual charges on a load side influencing the high-frequency overvoltage, the alternating current power supply AC and the direct current power supply DC are sequentially connected in series with the sleeve BG1, the isolating switch DS1, the circuit breaker CB and a sleeve BG2 through the suppression guide wire, another branch is led out from a connecting point C1 between the sleeve BG1 and the isolating switch DS1, the branch is connected with the isolating switch DS2 through the suppression guide wire, the length between the connecting point C1 and an end point close to one end of the sleeve B1C 1 is L1, the length between the connecting point C1 and an end point close to the end of the isolating switch DS1 close to the C1 is L2, the length between the disconnecting switch DS1 and the circuit breaker CB is L3, and the length between the connecting point C1 and the end point of the disconnecting switch DS2, which is close to one end of the C1, is L4;
adopting simulation software to calculate the length ranges of L1, L2, L3 and L4 when the maximum high-frequency overvoltage amplitude is generated on the power supply side and the load side of the test loop, and determining an optimal test loop;
determining a measuring point for measuring VFTO on the optimal test loop, and mounting a voltage measuring device on the measuring point;
verifying the inhibition effect by simulating residual charge on the optimal test loop through a Direct Current (DC) power supply;
different grounding capacitance values are simulated through the opening and closing states of the isolating switch DS2 on the optimal test loop so as to verify the inhibition effect under different parameters;
varying the lengths of L1, L2, L3 and L4 in the optimal test loop verifies the inhibitory effect at different lengths.
Further, the simulation software adopted by the method is power system electromagnetic transient analysis (EMTP) simulation software.
Further, the voltage measuring device mounted on the measuring point is a voltage sensor.
Further, the method determines an optimal test loop length L1 in the range of 8 to 10 meters, L2 and L3 in the range of 3 to 5 meters, and L4 in the range of 8 to 12 meters.
Further, the number of points determined on the optimal test loop to measure VFTO is 4, which are adjacent to bushing BG1 and adjacent to disconnector DS1 between bushing BG1 and disconnector DS1, adjacent to disconnector DS1 between disconnector DS1 and circuit breaker CB, and adjacent to disconnector DS2 between connection point C1 and disconnector DS2, respectively.
The system and the method for verifying the suppression effect of the guide wire on the VFTO of the GIS substation accurately simulate the actual wiring mode of the GIS substation, add a circuit breaker on a test loop, adjust the length of a branch bus of the test loop, adjust the state of an isolating switch through direct current voltage, and change the lengths of L1, L2, L3 and L4 in the test loop to simulate the suppression effect of the guide wire on the VFTO in different modes, and provide a basis for the examination of the isolating switch.
Drawings
A more complete understanding of exemplary embodiments of the present invention may be had by reference to the following drawings in which:
fig. 1 is a schematic structural diagram for verifying the suppression effect of a suppression guidance wire on a GIS substation VFTO according to a preferred embodiment of the present invention;
fig. 2 is a flowchart of a method for verifying the suppression effect of a suppression guidance wire on a GIS substation VFTO according to a preferred embodiment of the present invention;
Detailed Description
The exemplary embodiments of the present invention will now be described with reference to the accompanying drawings, however, the present invention may be embodied in many different forms and is not limited to the embodiments described herein, which are provided for complete and complete disclosure of the present invention and to fully convey the scope of the present invention to those skilled in the art. The terminology used in the exemplary embodiments illustrated in the accompanying drawings is not intended to be limiting of the invention. In the drawings, the same units/elements are denoted by the same reference numerals.
Unless otherwise defined, terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. Further, it will be understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense.
Fig. 1 is a schematic structural diagram for verifying the suppression effect of a suppression guidance wire on a GIS substation VFTO according to the preferred embodiment of the present invention. As shown in fig. 1, a system 100 for verifying the suppression effect of a suppression wire on a very fast transient overvoltage VFTO of a Gas Insulated Switchgear (GIS) substation according to the preferred embodiment includes:
two GIS bushings BG1 and BG2, two disconnectors DS1 and DS2, a circuit breaker CB, an alternating current source AC for simulating the source side generating a high-frequency overvoltage and a direct current source DC for simulating the residual charge on the load side affecting the high-frequency overvoltage, the alternating current power supply AC and the direct current power supply DC are sequentially connected in series with a sleeve BG1, a disconnecting switch DS1, a breaker CB and a sleeve BG2 through a suppression lead, another branch is led out from a connecting point C1 between the sleeve BG1 and the disconnecting switch DS1, the branch is connected with a disconnecting switch DS2 through the suppression lead, and the length between the connection point C1 and the end point of the sleeve B1 close to the end of C1 is L1, the length between the connection point C1 and the end point of the disconnecting switch DS1 close to the end of C1 is L2, the length between the disconnecting switch DS1 and the circuit breaker CB is L3, and the length between the connection point C1 and the end point of the disconnecting switch DS2 close to the end of C1 is L4.
Preferably, the system further comprises a voltage measuring device for measuring VFTO in the system.
Preferably, the length L1 in the system is in the range of 8 to 10 meters, L2 and L3 in the range of 3 to 5 meters, and L4 in the range of 8 to 12 meters.
Preferably, the number of the voltage measuring devices in the system is 4, and the voltage measuring devices are respectively positioned between the sleeve BG1 and the disconnecting switch DS1 and are adjacent to the sleeve BG1 and the disconnecting switch DS1, between the disconnecting switch DS1 and the circuit breaker CB and are adjacent to the disconnecting switch DS1, and between the connecting point C1 and the disconnecting switch DS2 and are adjacent to the disconnecting switch DS 2.
Preferably, the voltage measuring device is a voltage sensor.
Fig. 2 is a flowchart of a method for verifying the suppression effect of a suppression guidance wire on the VFTO of the GIS substation according to the preferred embodiment of the present invention. As shown in fig. 2, in the method for verifying the effect of suppressing the guidance wire on the VFTO of the GIS substation according to the preferred embodiment, the method 200 starts with step 201.
In step 201, according to the GIS substation structure which is intended to verify the suppression effect of the suppression guide wire on the VFTO, determining a test loop for verifying the suppression effect of the suppression guide wire on the VFTO, wherein the test loop comprises two GIS sleeves BG1 and BG2, two isolation switches DS1 and DS2, a circuit breaker CB, an alternating current power AC for simulating a power source side generating a high-frequency overvoltage and a direct current power DC for simulating a residual charge on a load side affecting the high-frequency overvoltage, the alternating current power AC and the direct current power DC are connected in series through the suppression guide wire on the sleeve BG1, an isolation switch DS1, the circuit breaker CB and a sleeve BG2 in sequence, another branch is led out from a connection point C1 between the sleeve BG1 and the isolation switch DS1, the branch is connected with the isolation switch DS2 through the suppression guide wire, the length between the connection point C1 and an end point of the sleeve B1 close to the C1 is L1, the length between the connection point C1 and an end point of the isolation switch DS1 close to the C1 is L2, the length between the disconnecting switch DS1 and the circuit breaker CB is L3, and the length between the connecting point C1 and the end point of the disconnecting switch DS2, which is close to one end of C1, is L4.
In step 202, simulation software is adopted to calculate the length ranges of L1, L2, L3 and L4 when the maximum high-frequency overvoltage amplitude is generated on the power supply side and the load side of the test loop, and an optimal test loop is determined.
In the simulation calculation of the preferred embodiment, the following simulation calculation parameters of the 550kV project are used, as shown in table 1.
TABLE 1 Equipment code and its inlet capacitance
In the preferred embodiment, the effect of sleeve BG1 to bus distance L1 on maximum VFTO is shown in table 2.
TABLE 2 Effect of L1 length on maximum VFTO in test loop
It can be seen that the overvoltage value is large when L1 is 8 to 10 meters.
In the preferred embodiment, the effect of length L2 between the bus bar to the disconnector DS1 on the maximum VFTO when L1 is of different lengths is shown in tables 3 to 7.
Table 3 test loop effect of L2 length on maximum VFTO (L1 ═ 6 meters)
Table 4 effect of L2 length on maximum VFTO in test loop (L1 ═ 7 meters)
Table 5 effect of L2 length on maximum VFTO in test loop (L1 ═ 8 meters)
Table 6 test loop the effect of L2 length on maximum VFTO (L1 ═ 9 meters)
Table 7 effect of L2 length on maximum VFTO in test loop (L1 ═ 10 meters)
As can be seen from tables 2 to 7, when L1 is different in length, the overvoltage value is large when L2 ranges from 3 to 5 meters.
In the present preferred embodiment, when L1 and L2 take different lengths, the effect of the length L3 between the disconnector DS1 and the circuit breaker CB on the maximum VFTO is shown in tables 8 to 11.
Table 8 test loop the effect of L2 length on maximum VFTO (L1 ═ 9 m, L2 ═ 3 m)
Table 9 effect of L2 length on maximum VFTO in test loop (L1 ═ 9 m, L2 ═ 4 m)
Table 10 effect of L2 length on maximum VFTO in test loop (L1 ═ 10 m, L2 ═ 3 m)
TABLE 111 Effect of L2 length on maximum VFTO in test loop (L1 ═ 10 m, L2 ═ 4 m)
As can be seen from tables 8 to 11, when L1 and L2 are different lengths, the overvoltage value is large when L3 ranges from 3 to 5 meters.
In the present preferred embodiment, when L1, L2, and L3 take different lengths, the effect of the length L4 of the branch bus on the maximum VFTO is shown in tables 12 to 14.
Table 12 effect of L2 length on maximum VFTO in test loop (L1 ═ 9 m, L2 ═ 3 m, L3 ═ 3 m)
Table 13 test loop the effect of L2 length on maximum VFTO (L1 ═ 9 m, L2 ═ 4 m, L3 ═ 3 m)
Table 14 effect of L2 length on maximum VFTO in test loop (L1 ═ 9 m, L2 ═ 3 m, L3 ═ 4 m)
As can be seen from tables 12 to 14, when L1, L2, and L3 are different lengths, the overvoltage value is large when L4 ranges from 8 to 12 meters.
At step 203, a measuring point for measuring VFTO is determined on the optimal test loop, and a voltage measuring device is installed on the measuring point.
In step 204, the suppression effect is verified by simulating the residual charge on the optimal test loop through the direct current power supply DC.
In step 205, different ground capacitance values are simulated through the switching-on and switching-off states of the disconnecting switch DS2 on the optimal test loop to verify the suppression effect under different parameters.
At step 206, varying the lengths of L1, L2, L3, and L4 in the optimal test loop verifies the inhibition effect at different lengths.
Preferably, the simulation software adopted by the method is power system electromagnetic transient analysis (EMTP) simulation software.
Preferably, the voltage measuring device mounted at the measuring point is a voltage sensor.
Preferably, the method determines an optimum test loop length L1 in the range of 8 to 10 meters, L2 and L3 in the range of 3 to 5 meters, and L4 in the range of 8 to 12 meters.
Preferably, the number of points determined on the optimal test loop to measure VFTO is 4, respectively between bushing BG1 and disconnector DS1 adjacent bushing BG1 and adjacent disconnector DS1, between disconnector DS1 and circuit breaker CB adjacent disconnector DS1, and between connection point C1 and disconnector DS2 adjacent disconnector DS 2.
The invention has been described with reference to a few embodiments. However, other embodiments of the invention than the one disclosed above are equally possible within the scope of the invention, as would be apparent to a person skilled in the art from the appended patent claims.
Generally, all terms used in the claims are to be interpreted according to their ordinary meaning in the technical field, unless explicitly defined otherwise herein. All references to "a/an/the [ device, component, etc ]" are to be interpreted openly as referring to at least one instance of said device, component, etc., unless explicitly stated otherwise. The steps of any method disclosed herein do not have to be performed in the exact order disclosed, unless explicitly stated.
Claims (7)
1. A system for verifying the suppression effect of a suppression wire on Very Fast Transient Overvoltage (VFTO) of a Gas Insulated Switchgear (GIS) substation is characterized by comprising the following steps:
two GIS bushings BG1 and BG2, two disconnectors DS1 and DS2, a circuit breaker CB, an alternating current source AC for simulating the source side generating a high-frequency overvoltage and a direct current source DC for simulating the residual charge on the load side affecting the high-frequency overvoltage, the alternating current power supply AC and the direct current power supply DC are sequentially connected in series with a sleeve BG1, a disconnecting switch DS1, a breaker CB and a sleeve BG2 through a suppression lead, another branch is led out from a connecting point C1 between the sleeve BG1 and the disconnecting switch DS1, the branch is connected with a disconnecting switch DS2 through the suppression lead, the length between the connection point C1 and the end point of the bushing B1 close to the end of C1 is L1, the length between the connection point C1 and the end point of the disconnecting switch DS1 close to the end of C1 is L2, the length between the disconnecting switch DS1 and the circuit breaker CB is L3, and the length between the connection point C1 and the end point of the disconnecting switch DS2 close to the end of C1 is L4;
and 4 voltage measuring devices are used for measuring the VFTO in the system, wherein the voltage measuring devices are respectively positioned between the bushing BG1 and the isolating switch DS1 and adjacent to the bushing BG1 and adjacent to the isolating switch DS1, between the isolating switch DS1 and the circuit breaker CB and adjacent to the isolating switch DS1, and between the connecting point C1 and the isolating switch DS2 and adjacent to the isolating switch DS 2.
2. The system of claim 1, wherein the length L1 ranges from 8 to 10 meters, L2 and L3 ranges from 3 to 5 meters, and L4 ranges from 8 to 12 meters.
3. The system of claim 1, wherein the voltage measuring device is a voltage sensor.
4. A method for verifying the suppression effect of a guidance suppression wire on VFTO of a GIS substation is characterized by comprising the following steps:
according to the GIS substation structure for verifying the suppression effect of the suppression guide wire on the VFTO, determining a test loop for verifying the suppression effect of the suppression guide wire on the VFTO, wherein the test loop comprises two GIS sleeves BG1 and BG2, two isolating switches DS1 and DS2, a circuit breaker CB, an alternating current power supply AC for simulating a power supply side generating high-frequency overvoltage and a direct current power supply DC for simulating residual charges on a load side influencing the high-frequency overvoltage, the alternating current power supply AC and the direct current power supply DC are sequentially connected in series with the sleeve BG1, the isolating switch DS1, the circuit breaker CB and a sleeve BG2 through the suppression guide wire, another branch is led out from a connecting point C1 between the sleeve BG1 and the isolating switch DS1, the branch is connected with the isolating switch DS2 through the suppression guide wire, the length between the connecting point C1 and an end point close to one end of the sleeve B1C 1 is L1, the length between the connecting point C1 and an end point close to the end of the isolating switch DS1 close to the C1 is L2, the length between the disconnecting switch DS1 and the circuit breaker CB is L3, and the length between the connecting point C1 and the end point of the disconnecting switch DS2, which is close to one end of the C1, is L4;
adopting simulation software to calculate the length ranges of L1, L2, L3 and L4 when the maximum high-frequency overvoltage amplitude is generated on the power supply side and the load side of the test loop, and determining an optimal test loop;
determining measuring points for measuring VFTO on the optimal test loop, and installing voltage measuring devices on the measuring points, wherein the number of the measuring points for measuring VFTO is 4, and the measuring points are respectively adjacent to a sleeve BG1 and an isolating switch DS1 between a sleeve BG1 and an isolating switch DS1, adjacent to an isolating switch DS1 between an isolating switch DS1 and a circuit breaker CB, and adjacent to an isolating switch DS2 between a connecting point C1 and an isolating switch DS 2;
verifying the inhibition effect by simulating residual charge on the optimal test loop through a Direct Current (DC) power supply;
different grounding capacitance values are simulated through the opening and closing states of the isolating switch DS2 on the optimal test loop so as to verify the inhibition effect under different parameters;
varying the lengths of L1, L2, L3 and L4 in the optimal test loop verifies the inhibitory effect at different lengths.
5. The method according to claim 4, wherein the simulation software adopted by the method is power system electromagnetic transient analysis (EMTP) simulation software.
6. A method according to claim 4, characterised in that the voltage measuring device mounted at the measuring station is a voltage sensor.
7. The method of claim 4, wherein the method determines an optimal test loop length L1 in the range of 8 to 10 meters, L2 and L3 in the range of 3 to 5 meters, and L4 in the range of 8 to 12 meters.
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