CN109075796B - Phase locking method, device and equipment - Google Patents
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Abstract
A phase locking method, a device and equipment are provided, wherein the method comprises the following steps: circularly sampling power grid voltage information in a quarter period of a power grid voltage signal wave; setting an array with the length L, wherein the L is determined by the frequency of the grid voltage and the sampling frequency; setting a first variable S1 and a second variable S2, wherein S2 is S1+ 1; generating a first signal wave Ua according to the first variable S1 and a second signal wave Ub according to the second variable S2; and carrying out voltage Park conversion on the first signal wave Ua and the second signal wave Ub to realize phase locking. The phase difference free component is obtained by using the array, the phase angle tracking is realized by combining Park transformation, the calculation amount is small, and the reliability is high.
Description
Technical Field
The present application relates to the field of power electronic control, and in particular, to a phase locking method, apparatus, and device.
Background
With the development of modern industry, the wide application of power electronic devices and nonlinear loads generates a large amount of harmonic waves, so that harmonic current components in a power system are rapidly increased, current waveform distortion is caused, line loss and consumption of electric equipment are increased, system power factors are sharply reduced, and the power quality of a power grid is seriously influenced.
Due to the fact that a Pulse Width Modulation (PWM) rectifier can realize sine of current on a network side and operate in a unit power factor state, and the PWM rectifier has a bidirectional energy feedback function. Therefore, the PWM rectifier is widely applied to occasions of alternating current conversion and direct current conversion.
One important performance criterion of a PWM rectifier is to achieve unity power factor at the ac input side. However, due to the detection error of hardware delay, voltage input harmonic, phase and frequency fluctuation, the general phase-locking method is difficult to realize real-time effective tracking of phase, and has slow dynamic response speed and poor disturbance resistance. Therefore, in order to realize the unit power factor, the real-time tracking of the input current of the power grid to the input voltage of the power grid is realized, namely, the same frequency and the same phase of the input current and the input voltage are realized. Furthermore, since the single-phase grid has only one degree-of-freedom component, the dq coordinate transformation cannot be performed directly for single-phase PWM rectification, as in three-phase PWM rectification. If the phase locking is continued by dq coordinate transformation in single-phase PWM rectification, another virtual free component with 90-degree phase difference is needed, and the phase angle tracking is processed by using voltage Park transformation, but the method is large in calculation amount and poor in accuracy.
Disclosure of Invention
The embodiment of the application provides a phase locking method, a phase locking device and phase locking equipment, and aims to provide the phase locking method suitable for single-phase PWM rectification, which is small in calculation amount and high in precision.
A first aspect of an embodiment of the present application provides a phase locking method, including:
circularly sampling the power grid voltage signal in a quarter period of the power grid voltage signal wave;
setting an array with the length L, wherein the L is determined by the frequency of the power grid voltage and the sampling frequency; setting a first variable S1 and a second variable S2, wherein S2 is S1+ 1;
generating a first signal wave Ua according to the first variable S1 and a second signal wave Ub according to the second variable S2;
and carrying out voltage Park conversion on the first signal wave Ua and the second signal wave Ub to realize phase locking.
With reference to the first aspect of the embodiment of the present application, in a first implementation manner of the first aspect of the embodiment of the present application, before the setting an array with a length of L, the method further includes: the value of the array length L is determined.
With reference to the first implementation manner of the first aspect of the embodiment of the present application, in a second implementation manner of the first aspect of the embodiment of the present application, the determining a value of the array length L includes:
determining the period of the signal wave according to the frequency of the power grid voltage signal wave;
determining the time length occupied by the quarter period of the signal wave according to the period of the signal wave;
determining the sampling period according to the sampling frequency;
and determining the number of sampling points in the quarter period of the signal wave, namely the value of the length L according to the time length occupied by the quarter period of the signal wave and the sampling period.
With reference to the first aspect of the embodiment of the present application, in a third implementation manner of the first aspect of the embodiment of the present application, the generating a first signal wave Ua according to the first variable S1 and generating a second signal wave Ub according to the second variable S2 includes:
circularly sampling the first variable S1 in a quarter period of the signal wave, and buffering element information sampled by the first variable S1;
according to the cyclic sampling of the first variable S1, caching the element information sampled by the second variable S2;
a first signal wave Ua is generated according to the element information sampled by the first variable S1, and a second signal wave Ub is generated according to the element information sampled by the second variable S2.
With reference to the first aspect of the embodiment of the present application, in a fourth implementation manner of the first aspect of the embodiment of the present application, the element information at least includes angle information and voltage value information.
A second aspect of the embodiments of the present application provides a phase-locking device, including:
the sampling module is used for circularly sampling the power grid voltage signal in a quarter period of the power grid voltage signal wave;
the system comprises a first setting module, a second setting module and a control module, wherein the first setting module is used for setting an array with the length of L, and the L is determined by the frequency of the grid voltage and the sampling frequency;
a second setting module, configured to set a first variable S1 and a second variable S2, where S2 is S1+ 1;
a generating module, configured to generate a first signal wave Ua according to the first variable S1, and generate a second signal wave Ub according to the second variable S2;
and the conversion module is used for performing voltage Park conversion on the first signal wave Ua and the second signal wave Ub to realize phase locking.
With reference to the second aspect of the embodiment of the present application, in a first implementation manner of the second aspect of the embodiment of the present application, the apparatus further includes a determining module, configured to determine a value of the length L of the array before the first setting module sets the array with the length L.
With reference to the first implementation manner of the second aspect of the embodiment of the present application, in a second implementation manner of the second aspect of the embodiment of the present application, the determining module includes:
the first determining unit is used for determining the period of the signal wave according to the frequency of the power grid voltage signal wave;
the second determining unit is used for determining the time length occupied by the quarter cycle of the signal wave according to the cycle of the signal wave;
a third determining unit, configured to determine the sampling period according to the sampling frequency;
and the fourth determining unit is used for determining the number of sampling points in the quarter period of the signal wave, namely the value of the length L, according to the time length occupied by the quarter period of the signal wave and the sampling period.
With reference to the second aspect of the embodiment of the present application, in a third implementation manner of the second aspect of the embodiment of the present application, the generating module includes:
a first buffer unit, configured to cyclically sample the first variable S1 in a quarter period of the signal wave, and buffer element information sampled by the first variable S1;
a second buffering unit, configured to buffer the element information sampled by the second variable S2 according to the cyclic sampling of the first variable S1;
a generating unit, configured to generate a first signal wave Ua according to the element information sampled by the first variable S1, and generate a second signal wave Ub according to the element information sampled by the second variable S2.
With reference to the second aspect of the present embodiment, in a fourth implementation manner of the second aspect of the present embodiment, the element information at least includes angle information and voltage value information.
A third aspect of embodiments of the present application provides a phase-locking device, including:
a memory for storing phase lock program instructions;
and the processor is configured to call the phase locking program instruction and execute the phase locking method in any implementation manner of the first aspect or the first aspect of the embodiment of the present application.
By implementing the embodiment of the application, the power grid voltage signal can be circularly sampled in a quarter period of the power grid voltage signal wave; meanwhile, an array with the length of L is set according to the frequency of the power grid voltage and the sampling frequency; setting a first variable S1 and a second variable S2, wherein S2 is S1+ 1; generating a first signal wave Ua according to the first variable S1 and a second signal wave Ub according to the second variable S2; and performing voltage Park conversion on the first signal wave Ua and the second signal wave Ub to realize phase locking, so that the phase locking method disclosed by the embodiment of the application has the advantages of small calculated amount and high reliability.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a flowchart of a phase locking method according to an embodiment of the present disclosure;
fig. 2 is a flowchart of a method for generating a first signal wave and a second signal wave according to an embodiment of the present disclosure;
FIG. 3 is a flowchart of a phase locking method according to another embodiment of the present application;
fig. 4 is a flowchart of an L value determination method provided in an embodiment of the present application;
fig. 5 is a structural diagram of a phase locking device according to an embodiment of the present disclosure;
fig. 6 is a structural diagram of a phase locking device according to another embodiment of the present application;
FIG. 7 is a block diagram of a determination module provided in an embodiment of the present application;
fig. 8 is a block diagram of a generating module provided in the embodiment of the present application;
fig. 9 is a structural diagram of a phase locking device according to an embodiment of the present application.
Detailed Description
The terms "comprising" and "having," and any variations thereof, as appearing in the specification, claims and drawings of this application, are intended to cover non-exclusive inclusions. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements listed, but may alternatively include other steps or elements not listed, or inherent to such process, method, article, or apparatus.
The following description will first describe a flowchart that may be used in embodiments of the present application with reference to the accompanying drawings.
As shown in fig. 1, fig. 1 illustrates a phase locking method provided in an embodiment of the present application, which at least includes the following steps:
s101: and circularly sampling the power grid voltage information in a quarter period of the power grid voltage signal wave.
Specifically, the frequency of the power grid voltage is 50Hz +/-0.2 Hz, the signal wave can be a sine signal or a cosine signal, and the frequency is 47-63 Hz. The sampling range is one fourth of the period of the grid voltage signal.
S102: an array of length L is set.
Specifically, the L is determined by the frequency of the grid voltage and the sampling frequency.
Specifically, according to a preset sampling frequency, L signal points are acquired in a quarter cycle of the grid voltage signal. The L signal points are stored in the array in sequence.
S103: a first variable S1 and a second variable S2 are set, where S2 is S1+ 1.
In particular, the first variable S1 may be a pointer to the current grid voltage sample value stored in the array. The second variable S2 may be a pointer, and the element pointed to by the variable S2 is the element pointed to by S1+ 1. For example, when S1 points to the first element, S2 points to the second element; when S1 points to the Lth element, S2 points to the first element. And circularly storing the sampled power grid voltage data in the array, namely storing the next sampled data at the head end of the array if the current sampled data is stored at the tail end of the array. It can be appreciated that the Nth element, designated S1, is always 90 out of phase with the Nth element, designated S2, where 1. ltoreq. N.ltoreq.L.
S104: a first signal wave Ua is generated from the first variable S1 and a second signal wave Ub is generated from the second variable S2.
Specifically, the first variable S1 and the second variable S2 may be pointers. Since S2 is S1+1, the nth element designated by S1 is always 90 ° out of phase with the nth element designated by S2. Therefore, the phase difference between the first signal wave Ua generated according to the first variable S1 and the second signal wave Ub generated according to the second variable S2 is 90 °.
Referring to fig. 2, fig. 2 is a method for generating a first signal wave and a second signal wave, which at least includes the following steps:
s1041: cyclically sampling the first variable S1 for a quarter period of the signal wave, and buffering element information sampled by the first variable S1.
Specifically, the first variable S1 is sampled cyclically in a quarter period of the signal wave, and when the L-th point is sampled, the first sampling point is returned, the sampling is continued, and the element information of all the elements sampled by the first variable S1 is buffered.
Specifically, the element information may include at least angle information and corresponding voltage value information corresponding to the element.
S1042: according to the cyclic sampling of the first variable S1, buffering the element information sampled by the second variable S2.
Specifically, the first variable S1 always points to the current element (i.e., the sampled value of the current grid voltage) stored in the array, S2 is S1+1, and the variable S2 points to the element S1+ 1. In particular, when S1 points to the last element in the array, S2 now points to the first element in the array. The element information for each element in the array pointed to by the second variable S2 is cached.
S1043: a first signal wave Ua is generated according to the element information sampled by the first variable S1, and a second signal wave Ub is generated according to the element information sampled by the second variable S2.
Specifically, the angle information of the element indicated by the first variable S1 differs by 90 ° from the angle information of the element indicated by the second variable S2, and remains unchanged. For example, it is assumed that the angle information of the element indicated by the first variable S1 is α, and the angle information of the element indicated by the second variable S2 is β. Then the angle information β of the element referred to by the second variable S2 is-90 ° when the angle information α of the element referred to by the first variable S1 is 0 °; then, when the angle information α of the element referred to by the first variable S1 is 90 °, the angle information β of the element referred to by the second variable S2 is 0 °.
Specifically, the element information sampled by the first variable S1 constitutes a digital signal, and generates an analog signal Ua from the digital signal; the element information sampled by the second variable S2 constitutes a digital signal, and an analog signal Ub is generated from the digital signal.
Specifically, since S2 is S1+1, the nth element denoted by S1 is always 90 ° out of phase with the nth element denoted by S2. Therefore, the phase difference between the first signal wave Ua generated from the first variable S1 and the second signal wave Ub generated from the second variable S2 is 90 °.
S105: and carrying out voltage Park conversion on the first signal wave Ua and the second signal wave Ub to realize phase locking.
Specifically, the phase difference between the first signal wave Ua and the second signal wave Ub is 90 °, and Park transformation is performed on Ua and Ub to convert into Ud and Uq components in a dq coordinate system, so as to realize phase angle tracking.
By implementing the embodiment of the application, the power grid voltage signal can be circularly sampled in a quarter period of the power grid voltage signal wave; meanwhile, an array with the length of L is set according to the frequency of the power grid voltage and the sampling frequency; setting a first variable S1 and a second variable S2, wherein S2 is S1+ 1; generating a first signal wave Ua according to the first variable S1 and a second signal wave Ub according to the second variable S2; and performing voltage Park conversion on the first signal wave Ua and the second signal wave Ub to realize phase locking, so that the phase locking method disclosed by the embodiment of the application has the advantages of small calculation amount and high reliability.
As shown in fig. 3, fig. 3 is a phase locking method according to another embodiment of the present application, which at least includes the following steps:
s201: and circularly sampling the power grid voltage signal in a quarter period of the power grid voltage signal wave.
Consistent with S101, no further description is provided herein.
S202: the value of the array length L is determined.
Specifically, the value of L is determined by the frequency of the grid voltage and the sampling frequency. According to shannon's sampling theorem, the sampling frequency should be no less than twice the highest frequency in the analog signal spectrum for undistorted recovery of the analog signal. The sinusoidal signal of the power grid voltage is known to be an analog signal, the frequency of the sinusoidal signal is 47-63 Hz, a certain adaptive frequency range needs to be expanded, the frequency range is expanded to 40-70 Hz in the application, so that when the frequency of the sinusoidal signal is 40Hz, the undistorted recovered analog signal can be ensured when the sampling frequency is not less than 80Hz, and when the frequency of the sinusoidal signal is 70Hz, the undistorted recovered analog signal can be ensured when the sampling frequency is not less than 140 Hz. The higher the sampling frequency, the higher the accuracy of the acquisition of the analog signal. In the present embodiment, the sampling frequency is set to 30kHz, and the frequency of the signal wave is assumed to be 40 Hz.
Please refer to fig. 4. Fig. 4 is a method for determining an L value according to an embodiment of the present application, which may include at least the following steps:
s2021: and determining the period of the signal wave according to the frequency of the power grid voltage signal wave.
Specifically, the frequency fs of the grid voltage signal wave is 40Hz, and the period of the grid voltage signal wave is 25 ms.
S2022: and determining the time length occupied by the quarter period of the signal wave according to the period of the signal wave.
Specifically, the period of the grid voltage signal wave is 25ms, and the duration of the quarter period is 6250 us.
S2023: determining the sampling period according to the sampling frequency.
Specifically, the sampling frequency is set to 30kHz, and the sampling period is 33.33 us.
S2024: and determining the number of sampling points in the quarter period of the signal wave, namely the value of the length L according to the time length occupied by the quarter period of the signal wave and the sampling period.
Specifically, the duration of the quarter period is 6250us, the sampling period is 33.33us, and the number of sampling points in the quarter period of the signal wave is at least 6250us/33.33 us-188. Therefore, the length L may have a value greater than 188.
It is known that the higher the frequency of the signal wave, the smaller the period. The fewer the number of sampling points within a quarter period of the signal wave at a fixed sampling frequency. Therefore, the sampling point number under the condition that the signal wave frequency is the lowest is calculated, and the sampling condition in the whole frequency range can be covered.
S203: an array of length L is set.
Consistent with S102, no further description is provided herein.
S204: a first variable S1 and a second variable S2 are set, where S2 is S1+ 1.
Consistent with S103, no further description is provided herein.
S205: a first signal wave Ua is generated from the first variable S1 and a second signal wave Ub is generated from the second variable S2.
Consistent with S104, no further description is provided herein.
S206: and carrying out voltage Park conversion on the first signal wave Ua and the second signal wave Ub to realize phase locking.
Consistent with S105, no further description is provided herein.
By implementing the embodiment of the application, the power grid voltage signal can be circularly sampled in a quarter period of the power grid voltage signal wave; meanwhile, an array with the length of L is set according to the frequency of the power grid voltage and the sampling frequency; setting a first variable S1 and a second variable S2, wherein S2 is S1+ 1; generating a first signal wave Ua according to the first variable S1 and a second signal wave Ub according to the second variable S2; and performing voltage Park conversion on the first signal wave Ua and the second signal wave Ub to realize phase locking, so that the phase locking method, the phase locking device and the phase locking equipment disclosed by the embodiment of the application have the advantages of small calculation amount and high reliability.
The embodiment of the application correspondingly provides a phase locking device. As shown in fig. 5, the phase-locking apparatus 10 at least includes a sampling module 110, a first setting module 120, a second setting module 130, a generating module 140, and a transforming module 150, wherein:
and the sampling module 110 is used for circularly sampling the grid voltage information in a quarter period of the grid voltage signal wave.
The first setting module 120 is configured to set an array having a length L, where L is determined by a frequency of the grid voltage and a sampling frequency.
The second setting module 130 is configured to set a first variable S1 and a second variable S2, wherein S2 is S1+ 1.
A generating module 140, configured to generate a first signal wave Ua according to the first variable S1, and generate a second signal wave Ub according to the second variable S2.
And the conversion module 150 is configured to perform voltage Park conversion on the first signal wave Ua and the second signal wave Ub to implement phase locking.
In one possible embodiment, as shown in fig. 6, the phase-locking apparatus 10 may further include, in addition to the sampling module 110, the first setting module 120, the second setting module 130, the generating module 140, and the transforming module 150: a determining module 160, configured to determine a value of the length L of the array before the first setting module 120 sets an array with the length L.
In one possible embodiment, the determination module 160 may include a first determination unit 1610, a second determination unit 1620, a third determination unit 1630, and a fourth determination unit 1640, as shown in fig. 7.
A first determining unit 1610 configured to determine a period of the signal wave according to a frequency of the grid voltage signal wave;
a second determining unit 1620, configured to determine, according to the cycle of the signal wave, a time duration occupied by a quarter cycle of the signal wave;
a third determining unit 1630, configured to determine the sampling period according to the sampling frequency;
a fourth determining unit 1640 is configured to determine the number of sampling points in the quarter period of the signal wave, that is, the value of the length L, according to the duration occupied by the quarter period of the signal wave and the sampling period.
In one possible embodiment, the generation module 140 may include a first cache unit 1410, a second cache unit 1420, and a generation unit 1430, as shown in fig. 8.
A first buffer unit 1410, configured to cyclically sample the first variable S1 in a quarter period of the signal wave, and buffer element information sampled by the first variable S1.
A second buffering unit 1420, configured to buffer the element information sampled by the second variable S2 according to the cyclic sampling of the first variable S1.
A generating unit 1430, configured to generate a first signal wave Ua according to the element information sampled by the first variable S1, and generate a second signal wave Ub according to the element information sampled by the second variable S2.
In one possible embodiment, the element information includes at least angle information and voltage value information.
It can be understood that the functions of the functional modules of the phase-locking device 10 of the present embodiment can be specifically implemented according to the method in the foregoing method embodiment, and are not described herein again.
By implementing the embodiment of the application, the power grid voltage information can be circularly sampled in a quarter period of a power grid voltage signal wave; meanwhile, an array with the length of L is set according to the frequency of the power grid voltage and the sampling frequency; setting a first variable S1 and a second variable S2, wherein S2 is S1+ 1; generating a first signal wave Ua according to the first variable S1 and a second signal wave Ub according to the second variable S2; and performing voltage Park conversion on the first signal wave Ua and the second signal wave Ub to realize phase locking, so that the phase locking method disclosed by the embodiment of the application has the advantages of small calculation amount and high reliability.
The embodiment of the application correspondingly provides the phase-locking equipment. As shown in fig. 9, the phase-locking device 20 may include at least:
a memory 210 for storing a phase locking program;
a processor 220, configured to invoke the phase locking procedure stored in the memory 210, and perform:
circularly sampling power grid voltage information in a quarter period of a power grid voltage signal wave;
setting an array with the length L, wherein the L is determined by the frequency of the grid voltage and the sampling frequency;
setting a first variable S1 and a second variable S2, wherein S2 is S1+ 1;
generating a first signal wave Ua according to the first variable S1 and a second signal wave Ub according to the second variable S2;
and carrying out voltage Park conversion on the first signal wave Ua and the second signal wave Ub to realize phase locking.
In one possible embodiment, before setting an array of length L, the processor 220 is further configured to: the value of the array length L is determined.
In one possible embodiment, processor 220 determines a value for array length L, including:
determining the period of the signal wave according to the frequency of the power grid voltage signal wave;
determining the time length occupied by a quarter period of the signal wave according to the period of the signal wave;
determining the sampling period according to the sampling frequency;
and determining the number of sampling points in the quarter period of the signal wave, namely the value of the length L according to the time length occupied by the quarter period of the signal wave and the sampling period.
In one possible embodiment, the processor 220 generates a first signal wave Ua according to the first variable S1 and a second signal wave Ub according to the second variable S2, including:
circularly sampling the first variable S1 in a quarter period of the signal wave, and buffering element information sampled by the first variable S1;
according to the cyclic sampling of the first variable S1, caching the element information sampled by the second variable S2;
a first signal wave Ua is generated according to the element information sampled by the first variable S1, and a second signal wave Ub is generated according to the element information sampled by the second variable S2.
In a possible embodiment, the element information includes at least angle information and voltage value information.
By implementing the embodiment of the application, the power grid voltage information can be circularly sampled in a quarter period of a power grid voltage signal wave; meanwhile, an array with the length of L is set according to the frequency of the power grid voltage and the sampling frequency; setting a first variable S1 and a second variable S2, wherein S2 is S1+ 1; generating a first signal wave Ua according to the first variable S1 and a second signal wave Ub according to the second variable S2; and performing voltage Park conversion on the first signal wave Ua and the second signal wave Ub to realize phase locking, so that the phase locking method, the phase locking device and the phase locking equipment disclosed by the embodiment of the application have the advantages of small calculation amount and high reliability.
The steps in the method of the embodiment of the application can be sequentially adjusted, combined and deleted according to actual needs.
The modules in the device can be merged, divided and deleted according to actual needs.
The above-mentioned embodiments are only used for illustrating the technical solutions of the present invention, and not for limiting the same; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.
Claims (7)
1. A phase locking method, comprising:
circularly sampling power grid voltage information in a quarter period of a power grid voltage signal wave;
setting an array with length L, wherein the length L is determined by the frequency of the grid voltage and the sampling frequency; wherein the frequency range of the signal waves is expanded to 40-70 Hz; when the frequency of the signal wave is 40Hz, the sampling frequency is not less than 80 Hz; when the frequency of the signal wave is 70Hz, the sampling frequency is not less than 140 Hz;
setting a first variable S1 and a second variable S2, wherein S2= S1+ 1; the first variable S1 points to the current grid voltage sample value stored in the array;
generating a first signal wave Ua according to the first variable S1 and a second signal wave Ub according to the second variable S2;
performing voltage Park conversion on the first signal wave Ua and the second signal wave Ub to realize phase locking;
before the setting an array with length L, the method further comprises:
determining the period of the signal wave according to the frequency of the grid voltage signal wave;
determining the time length occupied by a quarter period of the signal wave according to the period of the signal wave;
determining a sampling period according to the sampling frequency;
and determining the number of sampling points in the quarter period of the signal wave, namely the value of the length L according to the time length occupied by the quarter period of the signal wave and the sampling period.
2. The method of claim 1, wherein generating a first signal wave Ua according to the first variable S1 and a second signal wave Ub according to the second variable S2 comprises:
circularly sampling the first variable S1 in a quarter period of the signal wave, and buffering element information sampled by the first variable S1;
according to the cyclic sampling of the first variable S1, caching the element information sampled by the second variable S2;
a first signal wave Ua is generated according to the element information sampled by the first variable S1, and a second signal wave Ub is generated according to the element information sampled by the second variable S2.
3. The method of claim 2, wherein the element information includes at least angle information and voltage value information.
4. A phase lock device, comprising:
the sampling module is used for circularly sampling the power grid voltage information in a quarter period of a power grid voltage signal wave;
the system comprises a first setting module, a second setting module and a control module, wherein the first setting module is used for setting an array with the length L, and the length L is determined by the frequency of the grid voltage and the sampling frequency; wherein the frequency range of the signal waves is expanded to 40-70 Hz; when the frequency of the signal wave is 40Hz, the sampling frequency is not less than 80 Hz; when the frequency of the signal wave is 70Hz, the sampling frequency is not less than 140 Hz;
a second setting module, configured to set a first variable S1 and a second variable S2, where S2= S1+ 1; the first variable S1 points to the current grid voltage sample value stored in the array;
a generating module, configured to generate a first signal wave Ua according to the first variable S1, and generate a second signal wave Ub according to the second variable S2;
the conversion module is used for performing voltage Park conversion on the first signal wave Ua and the second signal wave Ub to realize phase locking;
the device also comprises a determining module, a judging module and a judging module, wherein the determining module is used for determining the value of the length L of the array before the first setting module sets the array with the length L;
the determining module comprises:
the first determining unit is used for determining the period of the signal wave according to the frequency of the grid voltage signal wave;
the second determining unit is used for determining the time length occupied by the quarter period of the signal wave according to the period of the signal wave;
a third determining unit, configured to determine a sampling period according to the sampling frequency;
a fourth determining unit, configured to determine the number of sampling points in the quarter cycle of the signal wave, that is, the value of the length L, according to the duration occupied by the quarter cycle of the signal wave and the sampling period.
5. The apparatus of claim 4, wherein the generating module comprises:
a first buffer unit, configured to cyclically sample the first variable S1 in a quarter period of the signal wave, and buffer element information sampled by the first variable S1;
a second buffering unit, configured to buffer the element information sampled by the second variable S2 according to the cyclic sampling of the first variable S1;
a generating unit, configured to generate a first signal wave Ua according to the element information sampled by the first variable S1, and generate a second signal wave Ub according to the element information sampled by the second variable S2.
6. The apparatus of claim 5, wherein the element information includes at least angle information and voltage value information.
7. A phase-locking device, comprising:
a memory for storing phase lock program instructions;
a processor for invoking the phase locking program instructions and executing the phase locking method according to any one of claims 1-3.
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