CN109075071A - The manufacturing method and program of substrate processing device, semiconductor devices - Google Patents
The manufacturing method and program of substrate processing device, semiconductor devices Download PDFInfo
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- CN109075071A CN109075071A CN201780014442.3A CN201780014442A CN109075071A CN 109075071 A CN109075071 A CN 109075071A CN 201780014442 A CN201780014442 A CN 201780014442A CN 109075071 A CN109075071 A CN 109075071A
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- 239000000758 substrate Substances 0.000 title claims abstract description 149
- 238000012545 processing Methods 0.000 title claims abstract description 100
- 238000004519 manufacturing process Methods 0.000 title claims description 13
- 239000004065 semiconductor Substances 0.000 title claims description 11
- 230000008878 coupling Effects 0.000 claims abstract description 6
- 238000010168 coupling process Methods 0.000 claims abstract description 6
- 238000005859 coupling reaction Methods 0.000 claims abstract description 6
- 238000000034 method Methods 0.000 claims description 92
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- 150000002500 ions Chemical class 0.000 claims description 11
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- 229910052760 oxygen Inorganic materials 0.000 description 18
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 17
- 230000006978 adaptation Effects 0.000 description 13
- 238000003851 corona treatment Methods 0.000 description 13
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- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 12
- 239000001257 hydrogen Substances 0.000 description 12
- 229910052739 hydrogen Inorganic materials 0.000 description 12
- 238000003860 storage Methods 0.000 description 11
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- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 6
- 230000000694 effects Effects 0.000 description 6
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- 230000009471 action Effects 0.000 description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 4
- 229910052782 aluminium Inorganic materials 0.000 description 4
- 238000010438 heat treatment Methods 0.000 description 4
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- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- 239000004411 aluminium Substances 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
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- 239000006185 dispersion Substances 0.000 description 2
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- GPRLSGONYQIRFK-UHFFFAOYSA-N hydron Chemical compound [H+] GPRLSGONYQIRFK-UHFFFAOYSA-N 0.000 description 1
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- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/32715—Workpiece holder
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/50—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
- C23C16/505—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using radio frequency discharges
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/458—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
- C23C16/4582—Rigid and flat substrates, e.g. plates or discs
- C23C16/4583—Rigid and flat substrates, e.g. plates or discs the substrate being supported substantially horizontally
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/52—Controlling or regulating the coating process
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
- H01J37/32082—Radio frequency generated discharge
- H01J37/321—Radio frequency generated discharge the radio frequency energy being inductively coupled to the plasma
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
- H01J37/32082—Radio frequency generated discharge
- H01J37/321—Radio frequency generated discharge the radio frequency energy being inductively coupled to the plasma
- H01J37/3211—Antennas, e.g. particular shapes of coils
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
- H01J37/32082—Radio frequency generated discharge
- H01J37/32174—Circuits specially adapted for controlling the RF discharge
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/3244—Gas supply means
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/32532—Electrodes
- H01J37/32568—Relative arrangement or disposition of electrodes; moving means
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
- H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
- H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
- H01L21/02238—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/02252—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by plasma treatment, e.g. plasma oxidation of the substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
- H01L21/68742—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a lifting arrangement, e.g. lift pins
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05H—PLASMA TECHNIQUE; PRODUCTION OF ACCELERATED ELECTRICALLY-CHARGED PARTICLES OR OF NEUTRONS; PRODUCTION OR ACCELERATION OF NEUTRAL MOLECULAR OR ATOMIC BEAMS
- H05H1/00—Generating plasma; Handling plasma
- H05H1/24—Generating plasma
- H05H1/46—Generating plasma using applied electromagnetic fields, e.g. high frequency or microwave energy
Abstract
The present invention provides substrate processing device, has: substrate processing chambers, with plasma generating space and substrate processing space；It is configured to the substrate mounting table of staging substrates；Inductance coupling structure has the coil being arranged in a manner of the periphery for being wound in plasma generating space, and the electrical length of coil is the integral multiple for being supplied to the wavelength of RF power of coil, and the diameter of coil is configured to the diameter greater than substrate；It is configured to make the substrate supporting station lifting unit of the substrate mounting table lifting；Plasma generates the gas supply part of space supply processing gas；And control unit, control substrate supporting station lifting unit is consisted of, so that when handling substrate, being placed in the position of height of the substrate of substrate mounting table positioned at the lower end than coil on the lower.As a result, when handling substrate, the deviation that can reduce the density of the plasma generated on the face of substrate improves the inner evenness of substrate processing.
Description
Technical field
The present invention relates to the manufacturing methods and program of substrate processing device, semiconductor devices.
Background technique
In recent years, the semiconductor devices such as flash memory have highly integrated trend.Along with this, pattern dimension is by significant fine
Change.When forming above-mentioned pattern, as a process of manufacturing process, implement sometimes at substrate progress oxidation processes, nitridation
The process of processing as defined in reason etc..
For example, Patent Document 1 discloses use the processing gas through plasma exciatiaon and to formed on substrate
Patterned surfaces carries out modifying process.
Patent document 1: Japanese Unexamined Patent Publication 2014-75579 bulletin
Summary of the invention
However, when handling and by processing gas plasma exciatiaon substrate, if raw on the face of substrate
At plasma density in terms of generate deviation, then sometimes can not in the face of substrate equably implementation handle, by the lining
The aspect of performance of the semiconductor devices of bottom manufacture generates uneven.
The present invention provides one kind when handling and by processing gas plasma exciatiaon substrate, reduces substrate
Deviation, the technology of the inner evenness of raising substrate processing of the density of the plasma generated on face.
Means for solving the problems
According to one method of the present invention, provide a kind of substrate processing device, have: substrate processing chambers, having will
The plasma generating space of processing gas plasma exciatiaon and the substrate processing being connected to the plasma generating space
Space；Substrate mounting table is set in the substrate processing space and is configured to staging substrates；Inductance coupling structure,
Have the coil (coil) being arranged in a manner of the periphery for being wound in the plasma generating space, and the electricity of the coil
Length is the integral multiple for being supplied to the wavelength of RF power of the coil, and the diameter of the coil is configured to be greater than the lining
The diameter at bottom；Substrate supporting station lifting unit, consisting of goes up and down the substrate mounting table；Gas supply part, to described etc.
Gas ions generate space and supply the processing gas；And control unit, the substrate supporting station lifting unit is controlled, so that when place
When managing the substrate, it is placed in height of the substrate of the substrate mounting table positioned at the lower end than the coil on the lower
Position.
Detailed description of the invention
[Fig. 1] be one embodiment of the present invention relates to substrate processing device summary section.
[Fig. 2] is that the plasma generating principle for the substrate processing device being related to embodiments of the present invention is illustrated
Explanatory diagram.
[Fig. 3] be show one embodiment of the present invention relates to substrate processing device control unit (control means)
The figure of composition.
[Fig. 4] be show one embodiment of the present invention relates to substrate processing process flow chart.
[Fig. 5] be one embodiment of the present invention relates to substrate processing process in it is processed, be formed with slot (ditch
Slot) substrate explanatory diagram.
[Fig. 6] is to show in verifying example, setting in plasma generating space 201a and substrate processing space 201b
Probe height and position figure.
[Fig. 7] is the figure of the setting position of the respective probe of height and position (a)~(d) show in verifying example, each.
[Fig. 8] be show verifying example in, the distribution of height and position (a)~(d) plasma density is measured
Obtained from value figure.
[Fig. 9] is being shown in verifying example with chart (graph), to height and position (a)~(d) plasma density
The figure of result obtained from distribution is measured.
Specific embodiment
<first embodiment of the invention>
(1) composition of substrate processing device
Hereinafter, using Fig. 1 and Fig. 2, to the first embodiment of the present invention is related to substrate processing device be illustrated.This
The substrate processing device that embodiment is related to is configured to mainly carry out oxidation processes to the film being formed in substrate surface.
(process chamber)
Processing unit 100 has the treatment furnace 202 that corona treatment is carried out to chip 200.In treatment furnace 202, if
It is equipped with the process container 203 for constituting process chamber 201.Process container 203 has the upper container of the dome type as the first container
210 and the bowl-type as second container lower container 211.By the way that upper container 210 is placed on lower container 211,
To form process chamber 201.Upper container 210 is by such as aluminium oxide (Al2O3) or quartz (SiO2) etc. nonmetallic materials formed,
Lower container 211 is formed by such as aluminium (Al).
In addition, being provided with gate valve 244 in the lower sides of lower container 211.Gate valve 244 is configured to when open can
Chip 200 is moved in into process chamber 201 via carrying-in/carrying-out mouth 245, to outside process chamber 201 using transport mechanism (not shown)
Move out chip 200.Gate valve 244 is configured to become the separator valve for keeping the air-tightness in process chamber 201 upon closing.
Process chamber 201 includes the plasma generating space 201a that surrounding is provided with coil 212；It is given birth to with plasma
It is connected at space 201a and enables the processed substrate processing space 201b of chip 200.Plasma generating space 201a is
Generate plasma space, refer to process chamber internal ratio coil 212 lower end against the top and on the lower than the upper end of coil 212
The space of side.On the other hand, substrate processing space 201b is the space that substrate is handled using plasma, refers to and compares coil
The space of 212 lower end on the lower.In the present embodiment, plasma generating space 201a and substrate processing space 201b
The diameter of horizontal direction is configured to roughly the same.
(susceptor (susceptor))
In the bottom side of process chamber 201 center, the susceptor 217 as substrate mounting portion configured with mounting chip 200.Lining
Support device 217 is formed by nonmetallic materials such as such as aluminium nitride (AlN), ceramics, quartz, and is configured to mitigate relative in crystalline substance
The metallic pollution of the film formed on piece 200 etc..
In the inside of susceptor 217, integrally embedment has the heater 217b as heating mechanism.Heater 217b is constituted
If 200 surface of chip can be heated to such as 25 DEG C to 750 DEG C or so to be supplied to electric power.
Susceptor 217 is electrically insulated with lower container 211.For impedance adjusts electrode 217c, in order to further increase
The uniformity of the density of the plasma generated on the chip 200 for being placed in susceptor 217 is set in susceptor 217
Portion, and be grounded via the impedance variable mechanism 275 as impedance adjustment portion.Impedance variable mechanism 275 by coil, can power transformation
Container is constituted, and is configured to by the inductance and resistance of control coil and the capacitance of variable condenser, to make
Impedance changes in the range of the parasitic impedance value of about 0 Ω to process chamber 201.Thereby, it is possible to adjust electrode 217c via impedance
And susceptor 217, and control the current potential (bias voltage) of chip 200.It should be noted that in the present embodiment, such as hereinafter
It is described, the uniformity of the density due to can be improved the plasma generated on chip 200, in the plasma
Density uniformity in the case where desired range, do not implement using impedance adjust electrode 217c carry out bias voltage
Control.In addition, being also configured to electrode not be arranged on susceptor 217 in the case where not implementing bias voltage control
217c.But in order to further increase the uniformity, bias voltage control also can be implemented.
On susceptor 217, it is provided with the susceptor elevating mechanism 268 for having the driving mechanism for going up and down susceptor.Separately
Outside, it is provided with through hole 217a in susceptor 217, and the bottom surface of lower container 211 is provided with wafer lift pin 266.
At through hole 217a and 266 relative position of wafer lift pin, at least each setting 3.Utilizing susceptor elevator
Structure 268 and make susceptor 217 decline when, wafer lift pin 266 be configured to susceptor 217 be it is non-contact in the state of pass through
Through hole 217a.
Mainly by constituting substrate mounting portion of the present embodiment by susceptor 217 and heater 217b, electrode 217c.
(gas supply part)
In the top of process chamber 201, the i.e. top of upper container 210, it is provided with gas supply head 236.Gas supply head
236 have the lid 233 of hat shape；Gas introduction port 234；Surge chamber 237；Opening 238；Barricade 240；With gas blow-off outlet
239, and it is configured to the supply response gas into process chamber 201.Surge chamber 237 have will utilize gas introduction port 234
And the function as dispersion space of imported reaction gas dispersion.
On gas introduction port 234, the oxygen (O as oxygen-containing gas is supplied2) gas oxygen-containing gas supply pipe 232a
Hydrogen (the H of downstream, supply as hydrogen-containing gas2) gas hydrogen-containing gas supply pipe 232b downstream, with supply as non-
The non-active gas supply pipe 232c of argon (Ar) gas of active gases is connected in a manner of collaborating.In oxygen-containing gas supply pipe
On 232a, O is disposed with from upstream side2Gas supply source 250a, the mass flow controller as volume control device
(MFC) the 252a and valve 253a as open and close valve.On hydrogen-containing gas supply pipe 232b, H is disposed with from upstream side2
Gas supply source 250b, MFC252b, valve 253b.On non-active gas supply pipe 232c, Ar is disposed with from upstream side
Gas supply source 250c, MFC252c, valve 253c.Oxygen-containing gas supply pipe 232a, hydrogen-containing gas supply pipe 232b with it is nonactive
The downstream side that gas supply pipe 232c has collaborated is provided with valve 243a, and is connected to the upstream end of gas introduction port 234.It constitutes
To adjust each gas using MFC252a, 252b, 252c so as to one side by the way that valve 253a, 253b, 253c, 243a to be opened and closed
Flow, supply oxygen-containing gas via gas supply pipe 232a, 232b, 232c and into process chamber 201 on one side, hydrogen contains
The processing gas such as gas, non-active gas.
Mainly by gas supply head 236 (lid 233, gas introduction port 234, surge chamber 237, opening 238, barricade
240, gas blow-off outlet 239), oxygen-containing gas supply pipe 232a, hydrogen-containing gas supply pipe 232b, non-active gas supply pipe
232c, MFC252a, 252b, 252c, valve 253a, 253b, 253c, 243a constitute gas supply part (gas of the present embodiment
Body feed system).
In addition, constituting this implementation by gas supply head 236, oxygen-containing gas supply pipe 232a, MFC252a, valve 253a, 243a
The oxygen-containing gas feed system that mode is related to.In addition, by gas supply head 236, hydrogen-containing gas supply pipe 232b, MFC252b, valve
253b, 243a constitute hydrogen feed system of the present embodiment.In addition, being supplied by gas supply head 236, non-active gas
Non-active gas feed system of the present embodiment is constituted to pipe 232c, MFC252c, valve 253c, 243a.
It should be noted that substrate processing device of the present embodiment is configured to by from oxygen-containing gas feed system
Supply the O as oxygen-containing gas2Gas also can replace oxygen-containing gas feed system to implement oxidation processes, and be arranged
To the nitrogenous gas feed system for supplying nitrogenous gas in process chamber 201.By the substrate processing device constituted in this way,
It can replace the oxidation processes of substrate and implement nitrogen treatment.In this case, instead of O2Gas supply source 250a and example is set
N such as nitrogenous gas supply source2Gas supply source, oxygen-containing gas supply pipe 232a structure as nitrogenous gas supply pipe
At.
(exhaust portion)
In the side wall of lower container 211, it is provided with the gas exhaust port 235 for being vented reaction gas out of process chamber 201.
The upstream end of gas exhaust pipe 231 is connected on gas exhaust port 235.On gas exhaust pipe 231, from upstream side successively
It is provided with the APC (Auto Pressure Controller) 242 as pressure regulator (pressure regulating part), as open and close valve
Valve 243b and vacuum pump 246 as vacuum pumping hardware.
Row of the present embodiment is mainly constituted by gas exhaust port 235, gas exhaust pipe 231, APC242, valve 243b
Gas portion.It should be noted that vacuum pump 246 can also be included in exhaust portion.
(plasma generating unit)
In the outside of the peripheral part of process chamber 201, the i.e. side wall of upper container 210, in a manner of around process chamber 201,
It is provided with as first electrode, spiral helicine resonance coil 212.On resonance coil 212, RF sensor 272, high frequency are connected
Power supply 273 implements matched adaptation 274 to the impedance of high frequency electric source 273, output frequency.
High frequency electric source 273 is the component to 212 supply high frequency electric power of resonance coil (RF electric power).RF sensor 272 is arranged
It in the outlet side of high frequency electric source 273, and is the portion monitored to the advancing wave of the high frequency supplied, the information of back wave
Part.It is input to adaptation 274 by the power of reflected wave that RF sensor 272 is monitored, adaptation 274 is to be based on passing from RF
Sensor 272 input back wave information and so that back wave become least way come control high frequency electric source 273 impedance,
The component of the frequency of the RF power exported.
High frequency electric source 273 has: power supply control means (control circuit) comprising for providing frequency of oscillation and output
High-frequency oscillating circuits and preamplifier；With amplifier (output circuit), it is used to be amplified to defined output.Power supply control
Means control amplifier based on the output condition relevant to frequency and electric power for first passing through operation panel setting in advance.Amplifier warp
Certain RF power is supplied to resonance coil 212 by transmission line.
For resonance coil 212, in order to form the standing wave of defined wavelength, setting winding diameter, winding spacing, volume
Winding number is so that with certain wavelength resonances.That is, the electrical length of resonance coil 212 is set to be supplied with from high frequency electric source 273
The comparable length of integral multiple (1 times, 2 times ...) of 1 wavelength in the assigned frequency for the RF power given.
Specifically, investigating applied electric power, generated magnetic field strength or application for resonance coil 212
Device shape etc., generated with the RF power for example, by 800kHz~50MHz, 0.5~5KW 0.01~10 Gauss a left side
The mode in right magnetic field, is set to 50~300mm2Effective sectional area and 200~500mm coil diameter, and in shape
At 2~60 circle left and right of peripheral side winding of the chamber of plasma generating space 201a.
As suitable embodiment, for example, the length of 1 wavelength is about 22 meters in the case where frequency is 13.56MHz,
In the case that frequency is 27.12MHz, the length of 1 wavelength is about 11 meters, and the electrical length of resonance coil 212 is set as becoming above-mentioned 1
The length (1 times) of wavelength.In the present embodiment, the frequency of RF power is set as 27.12MHz, by resonance coil 212
Electrical length is set as the length (about 11 meters) of 1 wavelength.The winding spacing of resonance coil 212 is with such as interval 24.5mm and to become
Equally spaced mode is arranged.In addition, the winding diameter (diameter) of resonance coil 212 is set greater than the diameter of chip 200.At this
In embodiment, the diameter of chip 200 is set as 300mm, the winding diameter of resonance coil 212 is set as more straight than chip 200
Diameter is big and becomes 500mm.
As constitute resonance coil 212 material, can be used copper pipe, the thin plate of copper, aluminum pipe, aluminium sheet, in polymer belt
Material obtained from upper copper steam-plating or aluminium etc..Resonance coil 212 is made of insulating material for tabular, and by vertical
It is erected on multiple brackets (not shown) of the upper surface of bottom plate 248 and is supported.
Resonance coil 212 both ends electrical ground, in order to when device is initially set or when exception processes condition to this
The electrical length of resonance coil is finely adjusted, and at least one end in above-mentioned both ends is grounded via movable tap 213.Mark in Fig. 1
Note 214 indicates the dead earth of the other side.Movable tap 213 so that resonance coil 212 resonance characteristics and high frequency electric source 273
Roughly equal mode adjusting position.In addition, in order to when device is initially set or change treatment conditions when to resonance line
The impedance of circle 212 is finely adjusted, and between the both ends of the ground connection of resonance coil 212, is passed through movable tap 215 and is constituted power supply
Portion.
By making resonance coil 212 have type variable grounding parts and type variable power supply, as described later, to process chamber
During 201 resonant frequency and load impedance is adjusted, can more easily it be adjusted.
In addition, in such a way that phase and antiphase electric current are symmetrically flowed relative to the electric midpoint of resonance coil 212,
The waveform adjustment circuit that one end (or the other end or both ends) insertion of resonance coil 212 is formed by coil and shielding case (is not schemed
Show).For waveform adjustment circuit, by being set as connectorless state by the end of resonance coil 212 or being set as electricity etc.
Effect state is to constitute open circuit.It should be noted that the end of resonance coil 212 can be by choke coil series resistance without connecing
Ground, and direct current is connected to fixed reference current potential.
In order to shield resonance coil 212 outside electric field and between resonance coil 212 formed for constitute altogether
Vibration circuit for necessary capacitive component (C ingredient) and barricade 223 is set.Barricade 223 is led usually using aluminium alloy etc.
Electric material and be configured to cylindric.Barricade 223 separates 5~150mm or so from the periphery of resonance coil 212 and configures.It is logical
Often, barricade 223 is grounded in the mode equal with the current potential at the both ends of resonance coil 212, but in order to correctly set resonance
The resonance number of coil 212, the one or both ends of barricade 223 are configured to adjust tap position.Alternatively, in order to correctly set
Resonate number, can also be inserted between resonance coil 212 and barricade 223 trimmer (trimming capacitance).
It is raw that plasma of the present embodiment is mainly made of resonance coil 212, RF sensor 272, adaptation 274
At portion.It should be noted that also may include high frequency electric source 273 as plasma generating unit.
Here, using Fig. 2, to the plasma generating principle and plasma generated of device of the present embodiment
The property of body is illustrated.
The plasma generation circuit being made up of resonance coil 212 is made of the tank circuit of RLC.From height
In the wavelength situation identical with the electrical length of resonance coil 212 for the RF power that frequency power 273 supplies, resonance coil 212
Resonance condition is following conditions: being offseted, is formed by the reactive component that the capacitive component of resonance coil 212, inductance ingredient are formed
For pure resistance.However, in above-mentioned plasma generation circuit, in the case where producing plasma, due to resonance coil
Capacity coupled variation, plasma generating space 201a between 212 voltage portion and plasma and between plasma
Variation, the excited state of plasma of inductive coupling etc., actual resonant frequency slight variations.
Therefore, in the present embodiment, with following function: for the resonance line when source side plasma generates
The offset of resonance in circle 212 compensates, to the resonance coil 212 when generating from plasma in RF sensor 272
Power of reflected wave detected, adaptation 274 corrects the defeated of high frequency electric source 273 based on detected power of reflected wave
Out.
Specifically, based on it is being detected in RF sensor 272, from plasma generate when resonance coil 212
Power of reflected wave, adaptation 274 makes the impedance or output of high frequency electric source 273 so that power of reflected wave becomes least way
Frequency increases or decreases.In the case where controlling impedance, adaptation 274 is variable by being modified to the impedance preset
Capacitor control circuit is constituted, and in the case where controlling frequency, adaptation 274 is using to preset high frequency electric source 273
The frequency control circuit that frequency of oscillation is modified is constituted.It should be noted that high frequency electric source 273 and adaptation 274 can also be with
It is constituted in the form of one.
Using the composition, as shown in Fig. 2, in resonance coil 212 in present embodiment, due to based on including plasma
The actual resonant frequency of the resonance coil of body and be supplied to RF power (alternatively, with the resonance comprising plasma
The mode that the actual impedance of coil matches is supplied to RF power), therefore form phase voltage and antiphase voltage always
The standing wave of the state of counteracting.Under the electrical length of resonance coil 212 and the identical situation of the wavelength of RF power, in the electricity of coil
Highest phase current is generated at midpoint (node that voltage is zero).Thus, near electric midpoint, almost without with process chamber
Capacitive coupling between wall, susceptor 217 forms the extremely low circular induction plasma of potential.
(control unit)
Controller 221 as control unit is configured to control APC242, valve 243b and vacuum pump by signal wire A respectively
246, susceptor elevating mechanism 268 is controlled by signal wire B, heater power regulating mechanism 276 and resistance are controlled by signal wire C
Anti- changeable mechanism 275, by signal wire D control gate valve 244, by signal wire E control RF sensor 272, high frequency electric source 273 and
Adaptation 274 controls MFC252a~252c and valve 253a~253c, 243a by signal wire F.
As shown in figure 3, as the controller 221 of control unit (control means) to have CPU (Central Processing
Unit) the shape of the computer of 221a, RAM (Random Access Memory) 221b, storage device 221c, I/O port 221d
Formula is constituted.RAM221b, storage device 221c, I/O port 221d are configured to via internal bus 221e and and CPU221a
Carry out data exchange.On controller 221, it is connected with such as the input and output constituted in form touch panel, display
Device 222.
Storage device 221c is made of such as flash memory, HDD (Hard Disk Drive) etc..In storage device 221c, with
The mode that can be read is stored with the control program controlled to the movement of substrate processing device, records aftermentioned substrate processing
The step of, the program processing procedure of condition etc. etc..Manufacturing process is execute controller 221 in aftermentioned substrate processing process
What each step and the mode for obtaining defined result were composed, it is functioned as program.Hereinafter, also by the program system
Journey controls the general names such as program and referred to as program.It should be noted that in the present specification when having used this term of program
In the case of, the case where including the case where independent program processing procedure, control program independent situation or the two.In addition,
RAM221b is temporarily to keep being made of the form of the storage region (workspace) of the read procedure, data of CPU221a etc..
The port I/O 221d is connected to above-mentioned MFC252a~252c, valve 253a~253c, 243a, 243b, gate valve 244, APC
Valve 242, vacuum pump 246, RF sensor 272, high frequency electric source 273, adaptation 274, susceptor elevating mechanism 268, impedance variable
Mechanism 275, heater power regulating mechanism 276 etc..
CPU221a is configured to read and execute the control program from storage device 221c, and according to defeated from inputting
Out input of the operational order of device 222 etc. and from storage device 221c read manufacturing process.In addition, CPU221a be configured to
The aperture regulation of APC valve 242 is controlled by the port I/O 221d and signal wire A according to the content of read manufacturing process
The starting of movement, the on-off action of valve 243b and vacuum pump 246 stops, and susceptor elevating mechanism is controlled by signal wire B
268 lifting action is controlled using the progress of heater power regulating mechanism 276 by signal wire C to heater 217b's
The amount of supplying electric power adjusting is acted (temperature adjusting movement), is acted using the impedance value adjusting that impedance variable mechanism 275 carries out, and is passed through
Signal wire D carrys out the on-off action of control gate valve 244, and RF sensor 272, adaptation 274 and high-frequency electrical are controlled by signal wire E
The movement in source 273, controlled by signal wire F using MFC252a~252c carry out various gases flow adjusting movement and
The on-off action of valve 253a~253c, 243a；Deng.
Controller 221 can be by that will be stored in external memory (for example, tape；The disks such as floppy disk, hard disk；CD,DVD
Equal CDs；The photomagneto disks such as MO；The semiconductor memories such as USB storage, storage card) above procedure in 223 is mounted on computer
In and constitute.Storage device 221c, external memory 223 are constituted in the form of computer-readable recording medium.Hereinafter,
Also by their general names and referred to as recording medium.It is sometimes single in the case where this term of usage record medium in this specification
Both solely individually include comprising external memory 223 or sometimes comprising storage device 221c, sometimes.It needs to illustrate
It is that providing program to computer can also come without using external memory 223 via means of communication such as network, special circuits
Implement.
(2) substrate processing process
Next, being mainly illustrated using Fig. 4 to substrate processing process of the present embodiment.Fig. 4 is to show this
The flow chart for the substrate processing process that embodiment is related to.One work of the manufacturing process as semiconductor devices such as such as flash memories
Sequence, substrate processing process of the present embodiment are implemented using above-mentioned processing unit 100.In the following description, composition is handled
The movement in each portion of device 100 is controlled by controller 221.
It should be noted that for example as shown in figure 5, the chip handled in substrate processing process of the present embodiment
On 200 surface, it is pre-formed at least surface and is made of the layer of silicon and the groove 301 with the high bump of aspect ratio.?
In present embodiment, for the silicon layer of the inner wall exposing in groove 301, oxidation processes are carried out as the place for having used plasma
Reason.For groove 301, for example, formed on chip 200 be subjected to as defined in pattern mask layer 302, and by chip 200
Surface is etched to prescribed depth to be formed.
(substrate moves in process S110)
Firstly, above-mentioned chip 200 is moved in process chamber 201.Specifically, susceptor elevating mechanism 268 makes to set off
Device 217 drops to the conveying position of chip 200, and wafer lift pin 266 is made to penetrate through the through hole 217a of susceptor 217.As a result, brilliant
Piece lift pin 266 is in only from the state of the amount of the prominent defined height in 217 surface of susceptor.
Next, opening gate valve 244, from the vacuum carrying room adjacent with process chamber 201, (not using wafer transfer mechanism
Diagram) chip 200 is moved in into process chamber 201.The chip 200 being moved to is supported in flat-hand position from susceptor 217
On the wafer lift pin 266 outstanding of surface.After moving in chip 200 into process chamber 201, make wafer transfer mechanism to process chamber
Keep out of the way outside 201, closing gate valve 244 is thus will be closed in process chamber 201.In addition, susceptor elevating mechanism 268 makes susceptor 217
Rise, chip 200 is supported in the upper surface of susceptor 217 as a result,.
(heating vacuum evacuation process S120)
Next, implementing the heating for the chip 200 being moved in process chamber 201.Heater 217b is pre-heated, and is passed through
Chip 200 is kept on the susceptor 217 of embedment having heaters 217b, so that chip 200 is heated to such as 150~750 DEG C
In the range of specified value.Here, it is heated in such a way that the temperature of chip 200 becomes 600 DEG C.In addition, implementing chip
During 200 heating, it will be vacuum-evacuated in process chamber 201 using vacuum pump 246 via gas exhaust pipe 231, make process chamber
Pressure in 201 becomes defined value.It is moved out before process S160 terminates at least aftermentioned substrate, vacuum pump 246 is made to work.
(reaction gas supply step S130)
Next, being initially supplied the O as oxygen-containing gas as reaction gas2Gas and H as hydrogen-containing gas2Gas
Body.Specifically, opening valve 253a and 253b, while carrying out flow control by MFC252a and 252b, start to processing
O is supplied in room 2012Gas and H2Gas.At this point, making O2The flow of gas become such as 20~2000sccm, preferably 20~
Specified value in the range of 1000sccm.In addition, making H2The flow of gas become such as 20~1000sccm, preferably 20~
Specified value in the range of 500sccm.As more suitable example, it is preferred that make O2Gas and H2Total flow of gas at
For 1000sccm, flow-rate ratio is set as O2/H2≥950/50。
In addition, adjusting the aperture of APC242 to control the exhaust in process chamber 201, so that the pressure in process chamber 201
Power is as authorized pressure, the even more preferably about 150Pa in the range of such as 1~250Pa, preferably 50~200Pa.Like this,
It will be moderately vented in process chamber 201 on one side, continue to supply O on one side2Gas and H2Gas, until aftermentioned corona treatment
When process S140 terminates.
(plasma treatment operation S140)
In process chamber 201 pressure stablize after, since high frequency electric source 273 via RF sensor 272 and to resonance line
Circle 212 applies RF power.In the present embodiment, the high frequency of 27.12MHz is supplied from high frequency electric source 273 to resonance coil 212
Electric power.Defined electric power in the range of being such as 100~5000W to the RF power that resonance coil 212 supplies, preferably
100~3500W, even more preferably about 3500W.In the case where electric power is lower than 100W, it is difficult to steadily carry out plasma discharge.
It is being supplied to O as a result,2Gas and H2High-frequency electric field is formed in the plasma generating space 201a of gas, utilizes institute
Electric field is stated, in the comparable height and position in electric midpoint with resonance coil 212 of plasma generating space, is inspired with highest
The circular induction plasma of plasma density.The O of plasma shape2Gas and H2Gas dissociates, to generate
Wrap the reactions kinds such as oxygen containing oxygen radical (oxygen activity kind), oxonium ion, hydroperoxyl radical (hydrogen activity kind), hydrogen ion comprising hydrogen.
As it was noted above, under the electrical length of resonance coil 212 and the identical situation of the wavelength of RF power, in plasma
Body generates in the 201a of space, near the electric midpoint of resonance coil 212, almost without with process chamber wall, substrate mounting table
Capacitive coupling, therefore the extremely low circular induction plasma of potential at excitation.Due to generating the extremely low plasma of potential
Therefore body can prevent from generating sheath shell (sheath) on the wall, susceptor 217 of plasma generating space 201a.Therefore,
In the present embodiment, the ion in plasma will not be accelerated.
It is held in substrate processing space 201b on the chip 200 on susceptor 217, utilizes induction plasma institute
The free radical of generation is supplied uniformly across with the ion in the state of not being accelerated to slot 301.The free radical that is supplied and from
Son is equably reacted with side wall 301a and 301b, to modifying the silicon layer on surface for the good silicon oxide layer of step coverage rate.
In addition, the acceleration since ion can be prevented, it is able to suppress chip 200 and is damaged because of the ion accelerated
Wound, in addition it is possible to inhibit plasma generate space peripheral wall sputtering effect, will not plasma generate space
The peripheral wall of 201a causes to damage.
In addition, incidental adaptation 274 is in 273 side of high frequency electric source to by resonance coil 212 on high frequency electric source 273
Power of reflected wave caused by the mismatch of the impedance of middle generation compensates, to mend to the reduction of Payload electric power
It fills, therefore, the RF power of initial level can be effectively always supplied to resonance coil 212, plasma stability can be made.
Thus, it is possible to be handled with certain rate and equably to the chip 200 kept in substrate processing space 201b.
Here, in this case, susceptor elevating mechanism 268 is controlled such that corona treatment
Position in the vertical direction of chip 200 in process is located at the lower end away from resonance coil 212 and separates 38mm's or more downwards
Position.By setting the position of the chip 200 in plasma treatment operation in this way, as described later, can with
The circular induction plasma formed in plasma generating space 201a is fully kept at a distance, therefore, in chip 200
Face on the density of plasma that generates in face direction (horizontal direction) become uniformly, can make in the face of chip 200 should
Corona treatment is equably implemented.That is, can be improved in the face of chip 200, being formed by layer by the corona treatment
The uniformity of the thickness of (being silicon oxide layer in present embodiment).
As in this embodiment, it is configured to bigger than the diameter of chip 200 in the winding diameter (diameter) of resonance coil 212
The case where (for example, for the diameter 300mm of chip 200, the winding diameter of resonance coil 212 is 500mm) under, due to
Circular induction plasma will not be generated in the surface of chip 200, therefore, generated on the face of chip 200 it is equal from
Daughter density is not likely to produce unevenness, and can be improved the uniformity of the corona treatment in the face of chip 200, therefore more excellent
Choosing.
It should be noted that in the present embodiment, since chip 200 to be supported on to the upper surface of susceptor 217, because
This, it is desirable to increase susceptor 217, so that the position in the vertical direction of chip 200 becomes than wafer lift pin
The high position in 266 front end.
In addition, if the position in the vertical direction of the chip 200 in plasma treatment operation is away under resonance coil 212
End excessively separates downwards, then is inactivated using plasma free radical generated, ion, therefore, processing speed is sometimes less than
Practical value.Thus, position in the vertical direction of the chip 200 in plasma treatment operation need at least utilize etc. from
The position that daughter free radical generated, ion do not inactivate.According to the verifying of inventor, confirm in present embodiment
In, when in the range of within the lower end away from resonance coil 212 downwards 138mm, practical processing speed can maintained
In the state of, fully ensure the uniformity of the corona treatment in wafer face.
Later, after defined processing time, such as 10~300 seconds, stopping from 273 output power of high frequency electric source,
Stop the plasma discharge in process chamber 201.In addition, closing valve 253a and 253b, stop supplying O into process chamber 2012Gas
Body and H2Gas.Using the above operation, plasma treatment operation S140 terminates.
(vacuum evacuation process S150)
Stop O2Gas and H2After the supply of gas, it will be vacuum-evacuated in process chamber 201 via gas exhaust pipe 231.By
This, by the O in process chamber 2012Gas, H2Gas, exhaust etc. caused by the reaction of these gases are to 201 outlet of process chamber
Gas.Hereafter, the pressure in process chamber 201 is adjusted to the vacuum carrying room adjacent with process chamber 201 by the aperture for adjusting APC242
(the conveying destination of chip 200.It is not shown) uniform pressure (such as 100Pa).
(substrate moves out process S160)
After pressure as defined in reaching in process chamber 201, susceptor 217 is made to drop to the conveying position of chip 200, it will be brilliant
Piece 200 is supported on wafer lift pin 266.In addition, gate valve 244 is opened, using wafer transfer mechanism by chip 200 to process chamber
It is moved out outside 201.Using the above operation, terminate substrate processing process of the present embodiment.
It should be noted that in the present embodiment, showing O2Gas and H2Gas carry out plasma exciatiaon to
Implement the example of the corona treatment of substrate, but not limited to this, for example, it is also possible to instead of O2Gas and into process chamber 201
Supply N2Gas, by N2Gas and H2Gaseous plasma excitation is to execute nitrogen treatment to substrate.It in this case, can generation
For above-mentioned oxygen-containing gas feed system, and use the processing unit 100 for having above-mentioned nitrogenous gas feed system.
(effect of present embodiment)
For the effect of present embodiment, the verification result implemented based on inventor is illustrated.In this verifying, by
The rule in plasma generating space 201a and substrate processing space 201b in substrate processing device of the present embodiment
Place is set in positioning, and the probe being measured to the electron density at the position is arranged, thus plasma generation space 201a and
(hreinafter referred to as " plasma is close for the density of the reactions kinds such as plasma, free radical, ion in substrate processing space 201b
Degree ") distribution be measured.Plasma generation condition when implementing this measurement is as described below.It should be noted that when measurement
When, naked silicon wafer is loaded on susceptor 217.
Supply gas flow: O2Gas=950sccm, H2Gas=50sccm
Chamber pressure: 150Pa
RF frequency: 27.12MHz
RF electric power: 3500W
Fig. 6 is the height position for showing the probe being arranged in plasma generating space 201a and substrate processing space 201b
The figure set.In this verifying, it is directed to height and position (a)~(d) respectively, in the horizontal direction probe at each setting five.That is, this verifying
In, probe is set amounting to, the distribution of plasma density is measured at 20.
Height and position (b) is the lower end position of resonance coil 212.Hereinafter, with height and position (b) for benchmark position (0mm),
Height and position (a) (c) (d) is illustrated.Height and position (a) is the middle position of the top and bottom of resonance coil 212, and
It and is position away from the lower end of resonance coil 212 above 100mm.And it is near the electric midpoint of resonance coil 212, and has
The position that the circular induction plasma of highest plasma density is excited.Height and position (c) is away from resonance coil
Position below 212 lower end 38mm.Height and position (d) is the position away from the lower end of resonance coil 212 below 88mm.
In addition, being placed with naked silicon wafer at than height and position (d) more on the lower 50mm.
Fig. 7 is the figure for showing the setting position of the respective probe of height and position (a)~(d).The probe of each height and position
Setting position it is all identical.Front position (the survey of plasma density of probe is shown respectively in M, L1, L2, R1, R2 in figure
Positioning is set).M is the comparable position in center with placed chip.L1 is the position that probe is moved to the left to 30 ° from M.
L2 is that probe is moved to the left 60 ° of position from M and is the comparable position in an outer edge with chip.R1 is by probe
It moves right 30 ° of position from M.L2 be by probe from M move right 60 ° position and be another outer rim with chip
The comparable position in portion.That is, by being measured to the plasma density at M, L1, L2, R1, R2, thus to wafer face direction
Plasma density distribution in (horizontal direction) is measured.
Fig. 8 is to indicate under above-mentioned plasma generation condition, height and position (a)~(d) plasma density
The table of result obtained from distribution is measured respectively.In addition, Fig. 9 is to be indicated the value of result shown in Fig. 8 with chart
Figure.In this figure, with every 1cm3The number (electron density) of electronics indicate plasma density.On height and position (a),
The circular induction plasma with highest plasma density is inspired, therefore, near resonance coil 212 (i.e.
The outer edge of chip), plasma density is got higher, at the central part in the winding diameter direction of resonance coil 212, plasma
Density is opposite to be lower.
In addition, in resonance coil 212 in the present embodiment, the height and position in the lower end as resonance coil
(b) place also inspires circular induction plasma.Therefore, at height and position (b), it may have in resonance coil 212
Nearby plasma density is got higher, at the central part in the winding diameter direction of resonance coil 212 at (i.e. the outer edge of chip)
The opposite trend being lower of plasma density.
As described above, the lower end of resonance coil 212 and the height and position (a) being located above compared with lower end extremely
(b) between, in terms of the plasma density on wafer face direction there are deviation (that is, with the process object film in wafer face
Deviation is generated in terms of the density of the reaction kind of reaction), it is known that, it is difficult at above-mentioned height and position in the face for keeping chip uniformly
Property while implement substrate corona treatment.
On the other hand, the place any one of in height and position (c) and (d), almost without discovery on wafer face direction
Deviation is generated in the distribution of plasma density.That is, if considering height and position (c) and (d) point of the plasma density at place
Cloth, then when being at least than height and position (c) position on the lower, it is assumed that the plasma on the face direction of chip is close
Degree aspect does not generate deviation substantially.It will be appreciated that, it is preferred that using substrate processing device of the present embodiment
In corona treatment, due to that can ensure the inner evenness of chip, away from height and position (c), i.e. resonance coil 212
Lower end downwards separate 38mm or more height and position at chip is handled.
It should be noted that as described above, if the position of the chip in plasma treatment operation is away from resonance coil 212
Lower end and downwards excessively separate, then using plasma exciatiaon free radical generated, ion will inactivate, therefore, processing speed
Rate is sometimes less than practical value.Thus, the position in the vertical direction of the chip 200 in plasma treatment operation needs at least
In the position not inactivated using plasma free radical generated, ion.According to using lining of the present embodiment
Bottom processing unit other verifying, it is known that, be placed in this verifying the bare chip on susceptor 217 height and position, i.e. away from
The lower end of resonance coil 212 separates at the height and position below 138mm, still equally with height and position (c) (d), energy can be obtained
Enough realize the distribution of the higher plasma density of the degree of practical processing speed.Thus, in substrate of the present embodiment
In processing unit, by least handling in the position of the range of 38~138mm away from the lower end of resonance coil 212 chip,
So as to while keeping the inner evenness of the chip in plasma treatment procedure, the processing speed that realization is practical.
In addition, inventor also implements verifying to following situations: for the item for implementing above-mentioned verifying as other verifyings
Part changes the power value of the RF electric power supplied in practical range (such as 3000W, 2500W).In this case confirm
It arrives, power value is bigger, then throughout the entire surface direction of chip 200 plasma density is increased, in the face of chip sometimes
It also changes in terms of the deviation of plasma density on direction, but then, in the range of above-mentioned height, chip
There is no big variations in terms of the trend of the deviation of plasma density on the direction of face.That is, it could be speculated that in above-mentioned height
In range, even if can also ensure that in plasma treatment procedure in the case where changing the power value of supplied RF electric power
The inner evenness of chip.
In addition, similarly, as other verifyings, inventor is confirmed, for the condition for implementing above-mentioned verifying, make to handle
In the case that room pressure changes (such as 50Pa) in practical range, plasma density is in the entire surface side for spreading chip
Variation (for example, for the case where compared with 150Pa, in the case where 50Pa, plasma density increases) in the range of, and it is another
Aspect does not generate significant change in terms of the trend of the deviation of the plasma density on the face direction of chip.That is, can push away
Survey, in the range of above-mentioned height, even make supplied RF electric power power value, chamber pressure variation the case where
Under, it can also ensure that the inner evenness of the chip for corona treatment.
In addition, being O what is involved is supply gas in above-mentioned verifying2Gas and H2The embodiment party of the mixed gas of gas
Formula, but according to other verifyings of inventor, it confirms and is using N2Gas and H2In the case where the mixed gas of gas, above-mentioned
In altitude range, the inner evenness of the chip for corona treatment can also ensure that.
According to other verifyings of inventor, it could be speculated that making gas flow, resonance for the condition for implementing above-mentioned verifying
The altitude range of coil becomes in the range of winding the parameters such as spacing, the frequency of winding number, the RF power supplied in practical
In the case where change, for the relationship between the uniformity of plasma density and height and position, it also can be obtained and similarly test
Demonstrate,prove result.
In addition, it is believed that the relationship between the uniformity and height and position of plasma density depends on plasma
The composition of generating unit.Thus, above-mentioned plasma in the present embodiment, be configured to from the top for being set to process chamber 201
Gas supply head 236 supply processing gas, but speculate, for process chamber import processing gas introducing port shape,
In the case that position is different, same verification result also can be obtained.
In addition, height and position (a) according to Fig. 9 and (b) distribution of the plasma density at place are it is found that in this implementation
In the case where mode, on the face direction of chip, in the region of 30 ° of the range in center away from chip or so, in plasma
Big deviation is not generated in terms of density.That is, by being placed in chip on the direction relative to 212 center of resonance coil sufficiently
Separated defined region, can also ensure that the inner evenness of the chip in corona treatment.In other words, so that resonance line
The mode that the winding diameter of circle 212 becomes prescribed level sufficiently big for the diameter of chip is constituted.Alternatively, making
With the chip with sufficiently small specified diameter for the winding diameter of resonance coil 212.For example, in this implementation
In mode, the range for for the resonance coil 212 of the winding diameter with 500mm, falling into 30 ° away from center or so is used
Interior chip, i.e. diameter about 127mm chip below.
Wherein, for increasing the winding diameter of resonance coil 212, consider that there are poles from viewpoints such as cost, spaces
Limit.In addition, larger chip cannot be handled using having the chip for providing following diameter.Thus, in order to
It is handled in the case where not increasing the winding diameter of resonance coil 212, to the chip of larger diameter, it is further preferred that constituting
For the lower end away from resonance coil 212 downwards as defined in range (in present embodiment, be 38~138mm range) position
Place handles chip.For example, being greater than about in the resonance coil 212 using the winding diameter with 500mm to diameter
In the case that the chip of 127mm is handled, it is preferred that lower end away from resonance coil 212 downwards as defined in range
Chip is handled at position.
It should be noted that in the present embodiment, show the lower end away from resonance coil 212 downwards 38~
The example that the position of the range of 138mm handles chip, but it is not limited to above range, as long as control is set off in the following manner
The height of device 217 (substrate mounting portion): make chip 200 be located at than resonance coil 212 lower end position on the lower and
It is that the deviation (deviation in face) of the plasma density on the face direction in wafer face is in the height in defined permissible range
Position.For example, the plasma obtained at multiple height and positions for the lower end position of resonance coil 212 in advance is close
Deviation in the face of degree.Then, according to the permissible range according to deviation in face set by each processing carried out to chip, so that
It obtains chip 200 and is located at the mode for falling into the height and position of deviation in the face in the face in the permissible range of deviation that becomes, control lining
Hold in the palm the height of device 217.At this point, plasma density has the lower end position plasma closer to resonance coil 212 close
Higher trend is spent, therefore, from the viewpoint of processing speed raising, it is further preferred that chip 200 is made to be located at the deviation in face
Permissible range in closest to resonance coil 212 lower end position position.
Furthermore, it is contemplated that when change is supplied to the power value of RF electric power of resonance coil 212, plasma density
Deviation changes in face, susceptor 217 can also be controlled according to the power value of RF electric power so that chip 200 height position
It sets optimal.For example, being obtained for the lower end position of resonance coil 212 in advance according to the power value of each RF electric power
Deviation in the face of plasma density at multiple height and positions.Then, according to the power value of set RF electric power, control lining
The height of device 217 is held in the palm so that chip 200 is located at the height and position for becoming deviation in allowed face.At this point, from processing speed
From the viewpoint of raising, it is further preferred that make chip 200 be located in face in the permissible range of deviation closest to resonance coil
The position of 212 lower end position.Similarly, from the viewpoint of improving processing speed, in general, the bigger plasma density the more excellent
Choosing, therefore, it is appropriate, that being set as the power value of RF electric power in the face of plasma density in the permissible range of deviation
As highest.
<other embodiments of the invention>
In the above-described embodiment, for use plasma to substrate surface implement oxidation processes, the example of nitrogen treatment
Son is illustrated, but is not limited to these processing, can be suitable for implementing substrate using plasma all technologies of processing.
For example, can be applied to modifying process implemented using plasma, that the film that is formed in substrate surface is carried out, doping treatment,
The reduction treatment of oxidation film, to the film carry out etching process, resist ashing processing, etc..
Industrial availability
According to the present invention, when being handled and processing gas is carried out plasma exciatiaon substrate, can subtract
The deviation of the density of the plasma generated on the face of small substrate improves the inner evenness of substrate processing.
Description of symbols
100... processing unit 200... chip 201... process chamber 212... resonance coil 217... susceptor
Claims (10)
1. substrate processing device has:
Substrate processing chambers, have by processing gas carry out plasma exciatiaon plasma generating space and with it is described etc.
Gas ions generate the substrate processing space of space connection；
Substrate mounting table is set in the substrate processing space and is configured to staging substrates；
Inductance coupling structure has the coil being arranged in a manner of the periphery for being wound in the plasma generating space, and
And the electrical length of the coil is the integral multiple for being supplied to the wavelength of RF power of the coil, the diameter structure of the coil
As the diameter for being greater than the substrate；
Substrate supporting station lifting unit, consisting of goes up and down the substrate mounting table；
Gas supply part supplies the processing gas to the plasma generating space；With
Control unit, the control unit are configured to control the substrate supporting station lifting unit, so that when handling the substrate, quilt
It is placed in the position of height of the substrate of the substrate mounting table positioned at the lower end than the coil on the lower.
2. substrate processing device according to claim 1, wherein the control unit is configured to control the substrate supporting station
Lifting unit, so that the substrate for being placed in the substrate mounting table is located at from the coil when handling the substrate
Lower end downwards separate 38mm or more height position.
3. substrate processing device according to claim 2, wherein the control unit is configured to control the substrate supporting station
Lifting unit, so that the substrate for being placed in the substrate mounting table is located at from the coil when handling the substrate
The lower end height within 138mm downwards position.
4. substrate processing device according to claim 3, wherein the diameter of the substrate is about 300mm, the coil
Diameter is 500mm or more.
5. substrate processing device according to claim 4, wherein the coil has the 1 of the wavelength of the RF power
Electrical length again.
6. the manufacturing method of semiconductor devices, with following processes:
Substrate is moved in into the process in substrate processing room, wherein the substrate processing chambers, which have, carries out plasma for processing gas
The plasma generating space of body excitation and the substrate processing space being connected to the plasma generating space；
The substrate is placed in the process for the substrate mounting table being set in the substrate processing space；
Go up and down the substrate mounting table, so that the substrate for being placed in the substrate mounting table is located at than under coil
The process of the position of the height of end on the lower, wherein the coil is wound in the diameter mode bigger than the diameter of the substrate
The periphery of the plasma generating space；
The process that the processing gas is supplied to the plasma generating space；
To the coil supply high frequency electric power to make the coil resonate, it will be supplied to the plasma as a result, and generate
The process that the processing gas in space carries out plasma exciatiaon；With
The process that the substrate for being placed in the substrate mounting table is handled using the plasma being excited.
7. the manufacturing method of semiconductor devices according to claim 6, wherein in the work for making the substrate mounting table lifting
In sequence, go up and down the substrate mounting table so that the substrate be located at separated downwards from the lower end of the coil 38mm with
On height position.
8. the manufacturing method of semiconductor devices according to claim 7, wherein in the work for making the substrate mounting table lifting
In sequence, go up and down the substrate mounting table, so that the substrate is located within the lower end of the coil downwards 138mm
The position of height.
9. the manufacturing method of the semiconductor devices according to any one of claim 8, wherein the diameter of the substrate is about
300mm, the diameter of the coil are 500mm or more.
10. program makes substrate processing device execute following step using computer:
The step of substrate is moved in substrate processing room, wherein the substrate processing chambers, which have, carries out plasma for processing gas
The plasma generating space of body excitation and the substrate processing space being connected to the plasma generating space；
The step of substrate is placed in the substrate mounting table being set in the substrate processing space；
Go up and down the substrate mounting table, so that the substrate for being placed in the substrate mounting table is located at than under coil
The step of position of the height of end on the lower, wherein the coil is wound in the diameter mode bigger than the diameter of the substrate
The periphery of the plasma generating space；
The step of processing gas is supplied to the plasma generating space；
To the coil supply high frequency electric power to make the coil resonate, it will be supplied to the plasma as a result, and generate
The processing gas in space carries out the step of plasma exciatiaon；With
The step of substrate for being placed in the substrate mounting table is handled using the plasma being excited.
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
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| JP2016084506 | 2016-04-20 | ||
| JP2016-084506 | 2016-04-20 | ||
| JP2016-214304 | 2016-11-01 | ||
| JP2016214304 | 2016-11-01 | ||
| PCT/JP2017/012666 WO2017183401A1 (en) | 2016-04-20 | 2017-03-28 | Substrate processing device, manufacturing method of semiconductor device and program |
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| CN109075071A true CN109075071A (en) | 2018-12-21 |
| CN109075071B CN109075071B (en) | 2023-11-07 |
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| US (2) | US11155922B2 (en) |
| JP (1) | JP6649473B2 (en) |
| KR (4) | KR102287835B1 (en) |
| CN (1) | CN109075071B (en) |
| SG (1) | SG11201808206WA (en) |
| WO (1) | WO2017183401A1 (en) |
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| CN111739778A (en) * | 2019-03-25 | 2020-10-02 | 株式会社国际电气 | Substrate processing apparatus, method for manufacturing semiconductor device, recording medium, and program |
| CN112117176A (en) * | 2019-06-20 | 2020-12-22 | 中微半导体设备(上海)股份有限公司 | Plasma processing apparatus and plasma processing system including the same |
| CN113544825A (en) * | 2019-03-19 | 2021-10-22 | 株式会社国际电气 | Method for manufacturing semiconductor device, substrate processing apparatus, and program |
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| KR102253808B1 (en) * | 2019-01-18 | 2021-05-20 | 주식회사 유진테크 | Apparatus for processing substrate |
| JP6883620B2 (en) * | 2019-07-30 | 2021-06-09 | 株式会社Ｋｏｋｕｓａｉ Ｅｌｅｃｔｒｉｃ | Substrate processing equipment, semiconductor equipment manufacturing methods and programs |
| CN114788419A (en) * | 2020-03-11 | 2022-07-22 | 株式会社国际电气 | Substrate processing apparatus, method of manufacturing semiconductor device, and program |
| WO2023095374A1 (en) | 2021-11-26 | 2023-06-01 | 株式会社Kokusai Electric | Substrate processing apparatus, semiconductor device manufacturing method, and substrate processing method |
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Also Published As
| Publication number | Publication date |
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| KR102454251B1 (en) | 2022-10-14 |
| US20220010433A1 (en) | 2022-01-13 |
| KR102606168B1 (en) | 2023-11-29 |
| CN109075071B (en) | 2023-11-07 |
| US20190032217A1 (en) | 2019-01-31 |
| JPWO2017183401A1 (en) | 2018-12-06 |
| KR20220143145A (en) | 2022-10-24 |
| KR102287835B1 (en) | 2021-08-10 |
| KR20210099197A (en) | 2021-08-11 |
| SG11201808206WA (en) | 2018-10-30 |
| KR20180118693A (en) | 2018-10-31 |
| WO2017183401A1 (en) | 2017-10-26 |
| US11905596B2 (en) | 2024-02-20 |
| US11155922B2 (en) | 2021-10-26 |
| KR20230162155A (en) | 2023-11-28 |
| JP6649473B2 (en) | 2020-02-19 |
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