CN109064903A - Display panel and electronic device - Google Patents
Display panel and electronic device Download PDFInfo
- Publication number
- CN109064903A CN109064903A CN201811106808.2A CN201811106808A CN109064903A CN 109064903 A CN109064903 A CN 109064903A CN 201811106808 A CN201811106808 A CN 201811106808A CN 109064903 A CN109064903 A CN 109064903A
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- China
- Prior art keywords
- signal lead
- signal
- metal layer
- layer
- display panel
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Classifications
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
- G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
Abstract
Present applicant proposes a kind of display panel and electronic device, the display panel includes neighboring area, and the neighboring area includes substrate and the signal lead layer on the substrate, and the signal lead layer includes the signal lead of at least two insulation sets；Wherein, the signal lead layer includes that at least two metal layers, first signal lead is located in second metal layer, and the second signal cabling includes the first part in the second metal layer and the second part on the first metal layer；Orthographic projection of the second part of the second signal cabling on the first metal layer is Chong Die with part first signal lead.The application, using at least double layer of metal layer arrangement peripheral signal cabling, reduces the spacing of display area to outer rim, realizes the design of narrow frame by being stacked the signal lead in display panel periphery region.
Description
Technical field
This application involves field of display, in particular to a kind of display panel and electronic device.
Background technique
With the development of display industry technology, user is higher and higher to the design requirement of display panel, such as narrow side
The design of frame.And existing display panel generally comprises display area and positioned at the neighboring area of the display area periphery, it is described
Neighboring area is provided with GOA signal wire, VDD signal line and VSS signal wire.
Fig. 1 is that the cabling of existing display panel side non-luminous region 10 is laid out schematic diagram, and the neighboring area includes a plurality of
Side by side and the signal wire of insulation set, the distance of the display area AA to side frame (not shown) are L1；Fig. 2 show existing
The cabling of display panel bottom edge non-luminous region 20 is laid out schematic diagram, and the neighboring area includes a plurality of letter arranged side by side and insulation set
Number line, the distance of the display area to lower frame (not shown) are L2.
Therefore, existing display panel is difficult to take into account the design of narrow frame while guaranteeing resolution ratio.The application is based on this
Background technique proposes a kind of display panel narrow frame design.
Summary of the invention
The application provides a kind of display panel and electronic device, is asked with solving the biggish technology of existing display floater frame
Topic.
To solve the above problems, technical solution provided by the present application is as follows:
The application provides a kind of display panel, which is characterized in that including display area and is located at the display area periphery
Neighboring area, the neighboring area includes:
A kind of display panel, which is characterized in that including display area and positioned at the peripheral region of the display area periphery
Domain, the neighboring area include:
Substrate；
Signal lead layer on the substrate, the signal lead layer include that the signal of at least two insulation sets is walked
Line；
Wherein, the signal lead layer includes that at least two metal layers, first signal lead is located at second metal layer
On, the second signal cabling includes the first part in the second metal layer and is located on the first metal layer
Second part；
Orthographic projection of the second part of the second signal cabling on the first metal layer and part first letter
Number walk line overlap.
In the display panel of the application, the neighboring area further includes being set to the first metal layer and described second
The one one insulating layer between metal layer.
In the display panel of the application, the signal lead layer further includes the first via hole, and first via hole runs through institute
State the first insulating layer, the first part of the second signal cabling pass through first via hole and the second signal cabling the
The electrical connection of two parts.
In the display panel of the application, the neighboring area includes the non-hair in side that the display area periphery is arranged in
Light region and bottom edge non-luminous region.
It is described in the side non-luminous region and the bottom edge non-luminous region in the display panel of the application
Signal lead layer includes:
At least two first signal leads, adjacent two first signal lead side by side and insulation set.
It is described in the side non-luminous region and the bottom edge non-luminous region in the display panel of the application
Signal lead layer further include: at least two second signal cablings, adjacent two second conducting wire side by side and insulation set.
In the display panel of the application, the signal lead layer further includes third signal lead, three signal lead
First part including being located on the third metal layer and the second part on the first metal layer；
Wherein, orthographic projection of the second part of the third signal lead on the first metal layer and part described the
The overlapping of one signal lead；Or
Orthographic projection of the second part of the third signal lead in the second metal layer and part second letter
The second part overlapping of number cabling.
In the display panel of the application, the neighboring area further includes being set to the third metal layer and described second
Second insulating layer between metal layer；
Wherein, the signal lead layer further includes the second via hole, and second via hole runs through first insulating layer and institute
State second insulating layer, the first part of the third signal lead pass through first via hole and the third signal lead the
The electrical connection of two parts.
In the display panel of the application, the signal lead is that VSS signal lead, VDD signal cabling or GOA signal are walked
One of line.
According to the one aspect of the application, a kind of electronic device is additionally provided, including above-mentioned display panel.
The utility model has the advantages that the application is utilized at least two layers by the way that the signal lead in display panel periphery region to be stacked
Metal layer arrangement peripheral signal cabling, reduces the spacing of display area to outer rim, realizes the design of narrow frame.
Detailed description of the invention
It, below will be to embodiment or the prior art in order to illustrate more clearly of embodiment or technical solution in the prior art
Attached drawing needed in description is briefly described, it should be apparent that, the accompanying drawings in the following description is only some of invention
Embodiment for those of ordinary skill in the art without creative efforts, can also be attached according to these
Figure obtains other attached drawings.
Fig. 1 is that the cabling of existing display panel side non-luminous region is laid out schematic diagram；
Fig. 2 is that the cabling of existing display panel bottom edge non-luminous region is laid out schematic diagram；
Fig. 3 is the floor map of the application display panel；
Fig. 4 is the film layer structure figure of one display panel signal lead of the embodiment of the present application；
Fig. 5 is the Wiring structure figure of the application display panel side non-luminous region；
Fig. 6 is the cabling layout of the application display panel bottom edge non-luminous region；
Fig. 7 is the sectional view of two display panel signal lead layer of the embodiment of the present application.
Specific embodiment
The explanation of following embodiment is referred to the additional illustration, the particular implementation that can be used to implement to illustrate the application
Example.The direction term that the application is previously mentioned, such as [on], [under], [preceding], [rear], [left side], [right side], [interior], [outer], [side]
Deng being only the direction with reference to annexed drawings.Therefore, the direction term used be to illustrate and understand the application, rather than to
Limit the application.The similar unit of structure is with being given the same reference numerals in the figure.
Referring to Fig. 3, Fig. 3 is the floor map of the application display panel.
The display panel includes display area A and the neighboring area positioned at the periphery display area A.The peripheral region
Domain includes the side non-luminous region 10 and bottom edge non-luminous region 20 that the periphery the display area A is arranged in.The side is non-
Light emitting region 10 is located at the left and right sides of display area A, and bottom edge non-luminous region 20 is located at the downside of display area A.
The neighboring area includes substrate and the signal lead layer on the substrate, and the signal lead layer includes
At least signal lead of two insulation sets.
In one embodiment, the signal lead can be but be not limited to VSS signal lead, VDD signal cabling or
One of GOA signal lead.
Referring to Fig. 3, the signal lead is located at and display panel bottom when the signal lead is GOA signal lead
The side non-luminous region 10 that side non-luminous region 20 is connected.When the signal lead is VDD signal cabling, the VDD
Signal wire is located at bottom edge non-luminous region 20；When the signal lead is VSS signal lead, the signal lead is located at and shows
Show the side non-luminous region 10 and bottom edge non-luminous region 20 that panel bottom edge non-luminous region 20 is connected.
In one embodiment, signal lead layer includes the first signal lead and second signal cabling, first signal
Cabling and the second signal cabling are side by side and insulation set.
The signal lead layer includes at least two metal layers, is provided with insulating layer between two metal layers.
Referring to Fig. 4, Fig. 4 is the film layer structure figure of one display panel signal lead of the embodiment of the present application.
In the display panel of the application, the application is designed by double-level-metal cabling, i.e., will be in the signal lead layer
The signal wire be layered setting.
The signal lead layer includes the first metal layer 102 being formed on the substrate 101 and is formed in described first
Second metal layer 103 on metal layer 102.
First signal lead 104 is located in second metal layer 103, and the second signal cabling 105 includes being located at institute
State the first part 1051 in second metal layer 103 and the second part 1052 on the first metal layer 103.It is described
The second part 1052 that the first part 1051 of second signal cabling passes through first via hole 112 and the second signal cabling
Electrical connection.
Referring to Fig. 5, Fig. 5 is the Wiring structure figure of the application display panel side non-luminous region.
The signal lead layer includes at least two first signal leads 104 and at least two second signal cablings
105。
In one embodiment, the signal lead layer includes two first signal leads 104.For convenience hereafter
This two articles first signal leads 104 are named as privates 109, the 5th conducting wire 110 by narration.
The signal lead layer further includes three second signal cablings 105, hereinafter described for convenience, by this three
The second signal cabling 105 is named as the first conducting wire 106, the second conducting wire 107, privates 108.
In one embodiment, first conducting wire 106, second conducting wire 107 and the privates 108 are arranged
In in the second metal layer 103.The first part of the privates 109 and the first part of the 5th conducting wire 110 set
It is placed in the second metal layer 103, the second part of the second part of the privates 109 and the 5th conducting wire 110
It is set on the first metal layer 102；
In one embodiment, it is additionally provided between the first metal layer 102 and the second metal layer 103 and Fig. 4
In identical first insulating layer 111.First insulating layer 111 can be in silicon nitride, silica, silicon oxynitride etc.
At least one inorganic matter.
Further include at least one first via hole 112 on first insulating layer 111, makes the first of the privates 109
Part is electrically connected by first via hole 112 with the second part of the privates 109.Similarly, the 5th conducting wire 110
First part be electrically connected with the second part of the 5th conducting wire 110 by first via hole 112.
In one embodiment, the second part of the privates 109 be set to second conducting wire 107 just under
Side.Orthographic projection of the second part of the part privates 109 in the second metal layer 103 and second conducting wire
107 overlappings.The second part of 5th conducting wire 110 is set to the underface of first conducting wire 106, and part the described 5th is led
Orthographic projection of the second part of line 110 in the second metal layer 103 is Chong Die with first conducting wire 106.
Referring to Fig. 1, in the prior art, the border width of side non-luminous region 10 is L1, i.e., including 5 signal lines
Width.Referring to Fig. 5, double layer design of the application by signal lead, so that only existing 3 letters in side non-luminous region 10
The width of number line, i.e. the border width M1 of the side non-luminous region 10 of the application are less than L1, have reached the design of narrow frame.
Referring to Fig. 6, Fig. 6 show the cabling layout of the application display panel bottom edge non-luminous region 20.
Signal lead layer on the bottom edge non-luminous region 20 includes a plurality of signal wire.
In one embodiment, the signal lead layer include the first conducting wire 206, the second conducting wire 207, privates 208,
Privates 209, the 5th conducting wire 210 and the 6th conducting wire 213.Compared with the prior art in Fig. 2, in the present embodiment described
One conducting wire 206, second conducting wire 207 and the privates 208 are set in the second metal layer 203.Described
The first part of the first part of four conducting wires 209, the 5th conducting wire 210 and the 6th conducting wire 213 is set to second gold medal
Belong on layer, the second part of the second part of the privates 209, the 5th conducting wire 210 and the 6th conducting wire 213 is set to
On the first metal layer on the substrate.
In one embodiment, similar with the wire laying mode of side non-luminous region 10, the first of the privates 209
Part is electrically connected by first via hole 212 with the second part of the privates 209.Similarly, the 5th conducting wire 210
It is similar with the privates 209 with the electric connection mode of the 6th conducting wire 213.
Referring to Fig. 4, the second part of the privates 209 is set to the underface of first conducting wire 206, part
Orthographic projection of the second part of the privates 209 in the second metal layer is Chong Die with first conducting wire 206.
The second part of 5th conducting wire 210 is set to the underface of second conducting wire 207, and part the described 5th is led
Orthographic projection of the second part of line 210 in the second metal layer is Chong Die with second conducting wire 207.
The second part of 6th conducting wire 213 is set to the underface of the privates 208, and part the described 6th is led
Orthographic projection of the second part of line 213 in the second metal layer is Chong Die with the 6th conducting wire 213.
Fig. 6 and Fig. 2 are please referred to, it is the privates 209, described since signal wire is finally electrically connected with driving chip 217
The second part of 5th conducting wire 210 and the 6th conducting wire 213 is set to first metal by first via hole 212
On.Therefore, in the layout of signal lead, guaranteeing that the driving chip 217 is constant to the spacing between the signal wire
Under the premise of, the spacing of lower frame of the display area A to the display panel will reduce, i.e. spacing L2 in Fig. 2 is greater than Fig. 6
In spacing M2.
Referring to Fig. 7, Fig. 7 is the sectional view of two display panel signal lead layer of the embodiment of the present application.
The signal lead layer further includes third signal lead 314.The third signal lead 314 includes being located at described the
First part 3141 on three metal layers 315 and the second part 3142 on the first metal layer 302.
Wherein, first signal lead 304 is located at the third metal layer 315, and the second signal cabling 305 includes
First part 3151 on third metal layer 315 and the second part 3052 in the second metal layer 303.
In one embodiment, the second part 3142 of the third signal lead 314 is on the third metal layer 302
Orthographic projection it is Chong Die with part first signal lead 304.Alternatively, the second part 3142 of the third signal lead 314
Orthographic projection in the second metal layer 303 is Chong Die with the second part 3152 of the part second signal cabling 305.
In one embodiment, the neighboring area further includes being set to the third metal layer 315 and second gold medal
Belong to the second insulating layer 316 between layer 303.
The signal lead layer further includes the second via hole 318, and second via hole 318 runs through first insulating layer 311
With the second insulating layer 316.The first part 3141 of the third signal lead passes through second via hole 318 and described the
The second part 3142 of three signal leads is electrically connected.
According to the one aspect of the application, a kind of electronic device is additionally provided, the electronic device includes the display surface
Plate.The electronic device includes but is not limited to mobile phone, tablet computer, computer display, game machine, television set, display screen
Curtain, wearable device and other living electric apparatus or household electrical appliance having a display function etc..
Present applicant proposes a kind of display panel and electronic device, the display panel includes neighboring area, the periphery
Region includes substrate and the signal lead layer on the substrate, and the signal lead layer includes at least two insulation sets
Signal lead；Wherein, the signal lead layer includes that at least two metal layers, first signal lead is located at the first metal layer
On, the second signal cabling includes the first part on the first metal layer and is located in the second metal layer
Second part；Orthographic projection of the second part of the second signal cabling on the first metal layer and part described first
Signal lead overlapping.The application utilizes at least double layer of metal by the way that the signal lead in display panel periphery region to be stacked
Layer arrangement peripheral signal cabling, reduces the spacing of display area to outer rim, realizes the design of narrow frame.
Although above preferred embodiment is not to limit in conclusion the application is disclosed above with preferred embodiment
The application processed, those skilled in the art are not departing from spirit and scope, can make various changes and profit
Decorations, therefore the protection scope of the application subjects to the scope of the claims.
Claims (10)
1. a kind of display panel, which is characterized in that including display area and positioned at the neighboring area of the display area periphery,
The neighboring area includes:
Substrate；
Signal lead layer on the substrate, the signal lead layer include the signal lead of at least two insulation sets；
Wherein, the signal lead layer includes that at least two metal layers, first signal lead is located in second metal layer, institute
Stating second signal cabling includes the first part in the second metal layer and second on the first metal layer
Part；
Orthographic projection of the second part of the second signal cabling on the first metal layer is walked with part first signal
Line overlap.
2. display panel according to claim 1, which is characterized in that the neighboring area further includes being set to described first
The one one insulating layer between metal layer and the second metal layer.
3. display panel according to claim 2, which is characterized in that the signal lead layer further includes the first via hole, institute
The first via hole is stated through first insulating layer, the first part of the second signal cabling by first via hole with it is described
The second part of second signal cabling is electrically connected.
4. display panel according to claim 1, which is characterized in that the neighboring area includes being arranged in the viewing area
The side non-luminous region and bottom edge non-luminous region on domain periphery.
5. display panel according to claim 4, which is characterized in that on the side non-luminous region and the bottom edge
Non-luminous region, the signal lead layer include:
At least two first signal leads, adjacent two first signal lead side by side and insulation set.
6. display panel according to claim 5, which is characterized in that on the side non-luminous region and the bottom edge
Non-luminous region, the signal lead layer further include: at least two second signal cablings, adjacent two second conducting wire is simultaneously
Column and insulation set.
7. display panel according to claim 1, which is characterized in that the signal lead layer further includes that third signal is walked
Line, three signal lead include the first part on the third metal layer and second on the first metal layer
Part；
Wherein, orthographic projection of the second part of the third signal lead on the third metal layer and part first letter
Number walk line overlap；Or
Orthographic projection of the second part of the third signal lead in the second metal layer is walked with the part second signal
The second part of line is overlapped.
8. display panel according to claim 7, which is characterized in that the neighboring area further includes being set to the third
Second insulating layer between metal layer and the second metal layer；
Wherein, the signal lead layer further includes the second via hole, and second via hole is through first insulating layer and described the
The first part of two insulating layers, the third signal lead passes through first via hole and second of the third signal lead
Divide electrical connection.
9. display panel according to claim 1, which is characterized in that the signal lead is VSS signal lead, VDD letter
One of number cabling or GOA signal lead.
10. a kind of electronic device, which is characterized in that including such as described in any item display panels of claim 1-9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811106808.2A CN109064903A (en) | 2018-09-21 | 2018-09-21 | Display panel and electronic device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811106808.2A CN109064903A (en) | 2018-09-21 | 2018-09-21 | Display panel and electronic device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN109064903A true CN109064903A (en) | 2018-12-21 |
Family
ID=64763468
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201811106808.2A Pending CN109064903A (en) | 2018-09-21 | 2018-09-21 | Display panel and electronic device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN109064903A (en) |
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| CN109767692A (en) * | 2019-01-09 | 2019-05-17 | 昆山国显光电有限公司 | A kind of display panel |
| CN111210731A (en) * | 2020-03-06 | 2020-05-29 | 昆山国显光电有限公司 | Display panel |
| CN112305794A (en) * | 2019-08-01 | 2021-02-02 | 瀚宇彩晶股份有限公司 | Display panel |
| WO2021120323A1 (en) * | 2019-12-18 | 2021-06-24 | 武汉华星光电半导体显示技术有限公司 | Display panel and testing method therefor |
| CN113571021A (en) * | 2021-06-30 | 2021-10-29 | 上海中航光电子有限公司 | Display panel and display device |
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Application publication date: 20181221 |