CN109062511A - A kind of method and relevant apparatus of reading data - Google Patents
A kind of method and relevant apparatus of reading data Download PDFInfo
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- CN109062511A CN109062511A CN201810836125.6A CN201810836125A CN109062511A CN 109062511 A CN109062511 A CN 109062511A CN 201810836125 A CN201810836125 A CN 201810836125A CN 109062511 A CN109062511 A CN 109062511A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/061—Improving I/O performance
- G06F3/0613—Improving I/O performance in relation to throughput
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
- G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
Abstract
The embodiment of the invention discloses a kind of methods of reading data, comprising: when reading data failure, main control chip obtains data by management module and reads instruction again；The main control chip reads instruction determining first reference voltage value from default stressed sequence again according to the data, wherein the default stressed sequence is stored in the rear module of the main control chip；The main control chip reads target data according to first reference voltage value from flash chip.The embodiment of the invention also discloses a kind of reading data devices.The embodiment of the invention provides a kind of methods to realize in the case that data need to read again, reduces the bandwidth that the data communication between management module and rear module occupies, improves user to the reading efficiency of data.
Description
Technical field
The present invention relates to data reading techniques field more particularly to the methods and relevant apparatus of a kind of reading data.
Background technique
In human lives, with the development and extensive use of the technologies such as internet, cloud computing, Internet of Things, big data, often
When per quarter all handled and stored in the mass data of generation, therefore higher want is proposed to the performance of storage system
It asks.Solid state hard disk (solid state drives, SSD) has the characteristics that read or write speed is fast, low energy consumption because of it, and extensive
Application.SSD is to dodge with nand-type by front end (front end), main control chip and flash chip, the type of usual flash chip
(nand flash) composition is deposited, the data communication between host is responsible in front end, and main control chip is responsible for the management inside SSD,
It include rear module and management module in middle main control chip, rear module is responsible for indicating reading, write-in and the wiping of flash chip
It is operated except equal, management module is responsible for managing flash chip, and flash chip is responsible for storing data.
Different from conventional hard, the use of SSD has the service life, with the increase of erasable quantity, reaches certain erasable
The case where quantity, read error, can increase therewith.Reading-retry (read-retry, Read-Retry) is to solve SSD read error
The prefered method of problem, in traditional Read-Retry technology, in the case where there is read error, management module can rear end mould
Block sends reference voltage value, and rear module reads the data on flash chip according to the reference voltage value.
When the case where obtaining multiple reference voltage value occurs needing in rear module, between management module and rear module
The data communication of reference voltage value can occupy a large amount of bandwidth, reduce user to the reading efficiency of data.
Summary of the invention
The embodiment of the invention provides a kind of method of reading data and relevant apparatus, realize what data needed to read again
In the case of, the bandwidth that the data communication between management module and rear module occupies is reduced, reading of the user to data is improved
Efficiency.
In view of this, first aspect present invention provides a kind of method of reading data, comprising:
When reading data failure, main control chip obtains data by management module and reads instruction again；
The main control chip reads instruction determining first reference voltage value from default stressed sequence again according to the data,
In, the default stressed sequence is stored in the rear module of the main control chip；
The main control chip reads target data according to first reference voltage value from flash chip.
In conjunction with the embodiment of the present invention in a first aspect, in the first possible implementation of the first aspect, the master
It controls chip and the target data is read from the flash chip according to first reference voltage value, comprising:
First reference voltage value is sent to the flash chip by the main control chip；
The flash chip generates the first reference voltage according to first reference voltage value；
The flash chip reads the target data according to first reference voltage.
In conjunction with the first possible implementation of the first aspect of the embodiment of the present invention, second in first aspect can
In the implementation of energy, the flash chip is read according to first reference voltage after the target data, further includes:
If the flash chip reads target data success according to first reference voltage；
The flash chip reads to main control chip transmission and successfully instructs, and described read in successfully instruction carries
State target data；
If the flash chip reads target data failure according to first reference voltage；
The flash chip sends to the main control chip and reads failure command.
In conjunction with second of possible implementation of the first aspect of the embodiment of the present invention, the first party of the embodiment of the present invention
In the third possible implementation in face, the flash chip to the main control chip send the reading failure command it
Afterwards, further includes:
The main control chip obtains the reading failure command by the management module, and is unsuccessfully referred to according to the reading
It enables and generates the stressed instruction of the data；
The main control chip reads instruction determining second reference voltage value from default stressed sequence again according to the data,
In, the default stressed sequence also includes multiple reference voltage values；
The main control chip reads the target data according to second reference voltage value from the flash chip.
In conjunction with the embodiment of the present invention first aspect to first aspect any one of the third possible implementation
Implementation, in the 4th kind of possible implementation of the first aspect of the embodiment of the present invention, the main control chip passes through described
Management module obtains before the stressed instruction of the data, further includes:
The main control chip sends read request to the rear module by the management module, and the read request is for referring to
Show that the rear module reads the target data in the flash chip.
Second aspect of the present invention provides a kind of reading data device, and the reading data device includes:
Module is obtained, for data being obtained by management module and reading instruction again when reading data failure；
Determining module, the data for being obtained according to the acquisition module, which are read again, to be instructed from default stressed sequence really
Fixed first reference voltage value, wherein the default stressed sequence is stored in the rear module of the main control chip；
Read module, first reference voltage value for being determined according to the determining module are read from flash chip
Data.
One is provided in the first possible embodiment of second aspect in conjunction with the second aspect of the embodiment of the present invention
Kind reading data device, comprising:
Sending module, specifically for first reference voltage value is sent to the flash memory core according to the main control chip
Piece；
Generation module is specifically used for generating the first reference voltage according to first reference voltage value；
Read module is specifically used for reading the target data according to first reference voltage.
In conjunction with the first possible embodiment of the second aspect of the embodiment of the present invention, second of second aspect is possible
In embodiment, a kind of reading data device is provided, comprising:
Sending module is also used to the flash chip according to first reference voltage and reads the target data success
Afterwards, it reads to main control chip transmission and successfully instructs, described read in successfully instruction carries the target data；
Sending module is also used to the flash chip according to first reference voltage reading target data and fails it
Afterwards, it is sent to the main control chip and reads failure command.
In conjunction with second of possible embodiment of the second aspect of the embodiment of the present invention, the third of second aspect is possible
In embodiment, a kind of reading data device is provided, comprising:
Module is obtained, is also used to obtain the reading failure command by the management module, and lose according to the reading
It loses instruction and generates the stressed instruction of the data；
Determining module is also used to read again instruction according to the data and determines the second reference voltage from default stressed sequence
Value, wherein the default stressed sequence also includes multiple reference voltage values；
Read module is also used to read the number of targets from the flash chip according to second reference voltage value
According to.
In conjunction with the embodiment of the present invention second aspect to second aspect any one of the third possible implementation
Implementation, reading data device described in the 4th kind of possible implementation of the second aspect of the embodiment of the present invention, comprising:
Sending module is also used to send read request to the rear module, and the read request is used to indicate the rear end mould
Block reads the target data in the flash chip.
As can be seen from the above technical solutions, the embodiment of the present invention has the advantage that
In the embodiment of the present invention, a kind of method of reading data is provided, when reading data failure, main control chip passes through
Management module obtains data and reads instruction again；Main control chip reads instruction determining first reference from default stressed sequence again according to data
Voltage value, wherein default stressed sequence is stored in the rear module of main control chip；Main control chip is according to the first reference voltage value
Target data is read from flash chip.By the above-mentioned means, when rear module occurs needing to obtain multiple reference voltage value
When situation, the available reference voltage value for being stored in of rear module itself is avoided and is produced between rear module and management module
The raw data communication for occupying a large amount of bandwidth, improves user to the reading efficiency of data.
Detailed description of the invention
Fig. 1 is the schematic diagram of the SSD of the method for reading data in the embodiment of the present invention；
Fig. 2 is a flow diagram of reading data in application scenarios of the present invention；
Fig. 3 is one embodiment schematic diagram of the method for reading data in the embodiment of the present invention；
Fig. 4 is one embodiment schematic diagram of reading data device in the embodiment of the present invention；
Fig. 5 is another embodiment schematic diagram of reading data device in the embodiment of the present invention.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, those skilled in the art's every other implementation obtained without creative efforts
Example, shall fall within the protection scope of the present invention.
Description and claims of this specification and term " first ", " second ", " third ", " in above-mentioned attached drawing
The (if present)s such as four " are to be used to distinguish similar objects, without being used to describe a particular order or precedence order.It should manage
The data that solution uses in this way are interchangeable under appropriate circumstances, so that the embodiments described herein can be in addition to illustrating herein
Or the sequence other than the content of description is implemented.In addition, term " includes " and " having " and their any deformation, it is intended that
Cover it is non-exclusive include, for example, containing the process, method, system, product or equipment of a series of steps or units need not limit
In step or unit those of is clearly listed, but may include be not clearly listed or for these process, methods, produce
The other step or units of product or equipment inherently.
The embodiment of the invention provides a kind of method of reading data and relevant apparatus, realize what data needed to read again
In the case of, the bandwidth that the data communication between management module and rear module occupies is reduced, reading of the user to data is improved
Efficiency.
It should be understood that present invention is mainly applied in the reading data of solid state hard disk (solid state drives, SSD),
Wherein the flash type of SSD be with NOT-AND flash (not and flash, Nand Flash), in order to make it easy to understand, please referring to figure
1, Fig. 1 is the schematic diagram of the SSD of the method for reading data in the embodiment of the present invention, and the embodiment of the present invention is the number applied to SSD
According to the method for reading, explanation is unfolded below with reference to Fig. 1.
As shown in Figure 1, two parts, respectively main control chip and flash chip can be divided into SSD, wherein master control core
Piece includes rear module and management module, rear end in main control chip for running the operational order including the firmware of SSD
Module is responsible for indicating the operation such as reading, write-in and erasing of flash chip, and management module is responsible for managing flash chip, flash memory core
Piece is responsible for storing data.Flash chip is for storing target data, and wherein flash chip is Nand type flash memory, according to electronic unit
The difference of density, Nand type flash memory is further divided into single-layer type storage unit (single-level cell, SLC), multiple field is deposited
Storage unit (multi-level cell, MLC) and three-layer type storage unit (trinary-level cell, TLC), herein not
The type of Nand type flash memory is limited, in SSD, generally comprises the battle array being made of 8,16 or 32 pieces of Nand type flash chips
Column.
Wherein, the storage basic unit of Nand type flash chip is floating transistor, by the control layer on upper layer, middle layer it is floating
Polysilicon oxide layer in grid layer, take be under grid layer tunnel oxidation layer and lower layer substrate (substrate) composition.Control electricity
When pressing very high, quantum tunneling effect can be generated, from substrate, oxide layer of passing through tunnel saves electronics into floating gate
Come, just complete write operation, charges.Conversely, adding very strong negative voltage in control layer, electronics just from floating gate quantum tunneling, is returned
To substrate, this operation is called erasing.When voltage is not added in control layer, still there is an electric field to generate in oxide layer, cry
Do intrinsic electrical field, it be by floating gate inside electronics generate.Under the action of this electric field, electrons are slowly let out from floating gate
Dew, with the increase of erasing period (program/erase cycle, P/E cycle) number, correct programming (Program) is needed
Voltage more higher than threshold voltage, meanwhile, voltage accuracy when programming becomes worse, since threshold voltage has occurred that
Offset still goes to read when reading with normal reading voltage, and mistake will occur for data.
Therefore, there is a kind of error correction method that reading data is carried out using reference voltage: Read-Retry.When flash memory core
Piece reads target data and remains as failure by error checking and after correcting (error correcting code, ECC) processing
When, flash chip is sent to main control chip reads failure command, and main control chip executes Read- after receiving reading failure command
Retry operation, main control chip send preset reference voltage value to flash chip, and flash chip is according to the reference voltage received
Value generates corresponding reference voltage, and reads target data using the reference voltage, when this reads failure, main control chip to
Flash chip sends another preset reference voltage value, and flash chip generates corresponding reference according to the reference voltage value received
Voltage, and target data is read using the reference voltage, successfully then sentence until reference voltage value use still fails to read when finishing
It is disconnected to read failure.
In order to make it easy to understand, the present invention is introduced below in conjunction with Fig. 1 and Fig. 2, referring to Fig. 2, Fig. 2 is present invention application
A flow diagram of reading data in scene, as shown, specifically:
After solid state hard disk receives the reading data command of system transmission, the management module on main control chip is according to the reading
Data command generates read request, and the read request is sent in rear module, and the read request this time sent is that normal reading is asked
It asks (normal read), main control chip reads the target data in flash chip by rear module, when flash chip passes through
When after ECC processing to read failure, main control chip obtains data by management module and reads instruction again, and main control chip is according to data weight
Reading instruction determines the first reference voltage value from default stressed sequence, wherein after default stressed sequence is stored in main control chip
In end module；Main control chip reads target data according to the first reference voltage value from flash chip.Pass through ECC when this reads
When remaining as reading failure after processing, main control chip obtains data by management module and reads instruction again, and main control chip is according to data
It reads instruction again and determines the second reference voltage value from default stressed sequence, main control chip is according to the second reference voltage value from flash memory core
Target data is read in piece.And so on, until N herein is the integer greater than 2, the specific number of N when n-th reads failure
Value depends on and is stored in the default stressed sequence in the rear module of main control chip, presets stressed sequence by producing Nand flash memory core
The manufacturer of piece formulates, for one have N number of array at table, generally be made of 8,10 or 12 numbers, output reading fails
Instruction.When being read as successfully after ECC processing, then exports to read and successfully instruct and export the target data read.
The method of reading data in the present invention is introduced below, referring to Fig. 3, reading data in the embodiment of the present invention
Method one embodiment schematic diagram, comprising:
101, main control chip obtains data by management module and reads instruction again；
In the present embodiment, when flash chip reads data failure, flash chip is to after running in SSD main control chip
End module, which is sent, reads failure command, and management module of the rear module into main control chip in main control chip forwards the instruction,
Management module generates data according to the instruction and reads instruction again, and the stressed instruction of data is used to indicate SSD and executes Read-Retry operation.
102, main control chip reads instruction determining first reference voltage value from default stressed sequence again according to data；
In the present embodiment, main control chip reads instruction again according to the data that management module generates, from default stressed sequence really
Fixed first reference voltage value, default stressed sequence are stored in rear module, and there is also multiple with reference to electricity in default stressed sequence
Pressure value, the format of reference voltage value are hexadecimal data.
103, main control chip reads target data according to the first reference voltage value from flash chip.
In the present embodiment, the rear module in main control chip is according to identified first reference voltage value from flash chip
Read target data.
In the embodiment of the present invention, a kind of method of reading data is provided, firstly, main control chip is obtained by management module
Data read instruction again, and then, main control chip, which is read again to instruct according to data, determines the first reference voltage value from default stressed sequence,
Finally, main control chip reads target data according to the first reference voltage value from flash chip.By the above-mentioned means, working as rear end mould
When the case where obtaining reference voltage value occurs needing in block, the available reference voltage value for being stored in of rear module itself is avoided
The data communication for occupying a large amount of bandwidth is generated between rear module and management module, improves user and the reading of data is imitated
Rate.
Optionally, on the basis of Fig. 3 corresponding embodiment, the method for second of reading data provided in an embodiment of the present invention
Embodiment in, main control chip reads target data according to the first reference voltage value from flash chip, comprising:
First reference voltage value is sent to flash chip by main control chip；
Flash chip generates the first reference voltage according to the first reference voltage value；
Flash chip reads target data according to the first reference voltage.
In the present embodiment, the first reference voltage value is sent in flash chip by rear module in the main control chip on SSD,
First reference voltage workable for flash chip generates flash chip according to the first reference voltage value received, flash chip root
Target data is read according to the first reference voltage.
In the embodiment of the present invention, when the rear module in main control chip is determining in local default stressed sequence from being stored in
After first reference voltage value, which is sent in flash chip, flash chip is according to first received
Reference voltage value generates the first reference voltage that can be used for reading data, and reads number of targets according to the first reference voltage of generation
According to.In order to the expansion of subsequent step, the feasibility of the scheme of promotion.
Optionally, on the basis of above-mentioned Fig. 3 corresponding embodiment, the method for reading data provided in an embodiment of the present invention
Third embodiment in, flash chip according to the first reference voltage read target data after, further includes:
If flash chip reads target data success according to the first reference voltage；
Flash chip reads to main control chip transmission and successfully instructs, and reads in successfully instruction and carries target data；
If flash chip reads target data failure according to the first reference voltage；
Flash chip sends to main control chip and reads failure command.
In the present embodiment, when flash chip reads target success according to the first reference voltage, flash chip is to master control core
Piece transmission, which is read, successfully to be instructed, and is read in successfully instruction and is carried target data；When flash chip is read according to the first reference voltage
Target data, when remaining as unsuccessfully by ECC processing, flash chip sends to main control chip and reads failure command, to indicate to lead
It controls chip and executes Read-Retry operation.
In the embodiment of the present invention, a kind of after flash chip reads target data using the first reference voltage, sudden strain of a muscle is provided
The execution method for depositing chip, when reading failure, flash chip is avoided by the reading failure command sent to main control chip
Failure is once read using reference voltage just to be terminated to read, and improves reading success rate.
Optionally, on the basis of above-mentioned Fig. 2 corresponding embodiment, the method for reading data provided in an embodiment of the present invention
The 4th embodiment in, flash chip to main control chip send read failure command after, further includes:
Main control chip is obtained by management module reads failure command, and refers to according to reading failure command and generating data and read again
It enables；
Main control chip reads instruction determining second reference voltage value from default stressed sequence again according to data, wherein default
Stressed sequence also includes multiple reference voltage values；
Main control chip reads target data according to the second reference voltage value from flash chip.
In the present embodiment, main control chip is obtained by management module reads failure command, and raw according to failure command is read
Instruction is read again at data, main control chip, which is read again to instruct according to data, determines the second reference voltage value from default stressed sequence,
In, presetting stressed sequence also includes multiple reference voltage values, and main control chip is read from flash chip according to the second reference voltage value
Take target data.
The step of embodiment of the present invention provides after reading failure using the first reference voltage, and main control chip end executes,
Improve the feasibility of scheme.
Optionally, on the basis of any one of corresponding first to fourth embodiment of above-mentioned Fig. 2, the embodiment of the present invention
In the 5th alternative embodiment of method of the reading data of offer, main control chip obtains data by management module and reads instruction again
Before, method further include:
By management module, end module sends read request to main control chip backward, and read request, which is used to indicate rear module and reads, dodges
Deposit the target data in chip.
In the present embodiment, main control chip receives the data read request that ambient systems are sent, master control core by management module
The read request is sent in rear module by piece by management module, which is used to indicate rear module and reads in flash memory
Target data.
In the embodiment of the present invention, provide the source of data read request and in main control chip read request processing side
Formula improves the feasibility of scheme.
Reading data device in the present invention is described in detail below, referring to Fig. 4, Fig. 4 is in the embodiment of the present invention
One embodiment schematic diagram of reading data device, one embodiment of reading data device 20 provided in an embodiment of the present invention
In, reading data device 20 includes:
Module 201 is obtained, for data being obtained by management module and reading instruction again when reading data failure；
Determining module 202, for determining the from default stressed sequence according to obtaining the data that module obtains and read instruction again
One reference voltage value, wherein default stressed sequence is stored in the rear module of main control chip；
Read module 203, the first reference voltage value for being determined according to determining module read data from flash chip.
In the present embodiment, module 201 is obtained, for data being obtained by management module and being read again when reading data failure
Instruction；Determining module 202, for reading instruction determining first ginseng from default stressed sequence again according to the data for obtaining module acquisition
Examine voltage value, wherein default stressed sequence is stored in the rear module of main control chip；Read module 203, for according to determination
The first reference voltage value that module determines reads data from flash chip.
In the embodiment of the present invention, a kind of reading data device is provided, firstly, main control chip obtains number by management module
According to stressed instruction, then, main control chip reads instruction determining first reference voltage value from default stressed sequence again according to data, most
Afterwards, main control chip reads target data according to the first reference voltage value from flash chip.By the above-mentioned means, working as rear module
When appearance needs the case where obtaining reference voltage value, the available reference voltage value for being stored in of rear module itself is avoided
The data communication for occupying a large amount of bandwidth is generated between rear module and management module, improves user and the reading of data is imitated
Rate.
Optionally, on the basis of above-mentioned Fig. 4 corresponding embodiment, referring to Fig. 5, data provided in an embodiment of the present invention
In second embodiment of reading device 20, reading data device 20 further includes sending module 204 and generation module 205；
Sending module 204, specifically for the first reference voltage value is sent to flash chip according to main control chip；
Generation module 205 is specifically used for generating the first reference voltage according to the first reference voltage value；
Read module 203 is specifically used for reading target data according to the first reference voltage.
In the embodiment of the present invention, when the rear module in main control chip is determining in local default stressed sequence from being stored in
After first reference voltage value, which is sent in flash chip, flash chip is according to first received
Reference voltage value generates the first reference voltage that can be used for reading data, and reads number of targets according to the first reference voltage of generation
According to.In order to the expansion of subsequent step, the feasibility of the scheme of promotion.
Optionally, on the basis of above-mentioned Fig. 5 corresponding embodiment, reading data device 20 provided in an embodiment of the present invention
Third embodiment in,
Sending module 204, after being also used to flash chip according to the reading target data success of the first reference voltage, to master control
Chip transmission, which is read, successfully to be instructed, and is read in successfully instruction and is carried target data；
Sending module 204, after being also used to flash chip according to the reading target data failure of the first reference voltage, to master control
Chip, which is sent, reads failure command.
In the embodiment of the present invention, a kind of after flash chip reads target data using the first reference voltage, sudden strain of a muscle is provided
The execution method for depositing chip, when reading failure, flash chip is avoided by the reading failure command sent to main control chip
Failure is once read using reference voltage just to be terminated to read, and improves reading success rate.
Optionally, on the basis of the third embodiment of the reading data device 20 provided in the embodiments of the present invention,
In 4th embodiment of reading data device 20 provided in an embodiment of the present invention,
Module 201 is obtained, is also used to obtain by management module to read failure command, and generate according to failure command is read
Data read instruction again；
Determining module 202 is also used to read again instruction according to data and determines the second reference voltage value from default stressed sequence,
Wherein, presetting stressed sequence also includes multiple reference voltage values；
Read module 203 is also used to read target data from flash chip according to the second reference voltage value.
The step of embodiment of the present invention provides after reading failure using the first reference voltage, and main control chip end executes,
Improve the feasibility of scheme.
Optionally, any in first to the 4th embodiment of the corresponding reading data device 20 of above-mentioned Fig. 4 to Fig. 5
On the basis of, in the 5th embodiment of reading data device 20 provided in an embodiment of the present invention,
Sending module 204 is also used to end module backward and sends read request, and read request is used to indicate rear module and reads flash memory
Target data in chip.
In the embodiment of the present invention, provide the source of data read request and in main control chip read request processing side
Formula improves the feasibility of scheme.
It is apparent to those skilled in the art that for convenience and simplicity of description, the system of foregoing description,
The specific work process of device and unit, can refer to corresponding processes in the foregoing method embodiment, and details are not described herein.
In several embodiments provided by the present invention, it should be understood that disclosed system, device and method can be with
It realizes by another way.For example, the apparatus embodiments described above are merely exemplary, for example, the division of unit,
Only a kind of logical function partition, there may be another division manner in actual implementation, such as multiple units or components can be with
In conjunction with or be desirably integrated into another system, or some features can be ignored or not executed.Another point, it is shown or discussed
Mutual coupling, direct-coupling or communication connection can be through some interfaces, the INDIRECT COUPLING of device or unit or
Communication connection can be electrical property, mechanical or other forms.
The unit as illustrated by the separation member may or may not be physically separated, aobvious as unit
The component shown may or may not be physical unit, it can and it is in one place, or may be distributed over multiple
In network unit.It can select some or all of unit therein according to the actual needs to realize the mesh of this embodiment scheme
's.
It, can also be in addition, the functional units in various embodiments of the present invention may be integrated into one processing unit
It is that each unit physically exists alone, can also be integrated in one unit with two or more units.Above-mentioned integrated list
Member both can take the form of hardware realization, can also realize in the form of software functional units.
If the integrated unit is realized in the form of SFU software functional unit and sells or use as independent product
When, it can store in a computer readable storage medium.Based on this understanding, technical solution of the present invention is substantially
The all or part of the part that contributes to existing technology or the technical solution can be in the form of software products in other words
It embodies, which is stored in a storage medium, including some instructions are used so that a computer
Equipment (can be personal computer, server or the network equipment etc.) executes the complete of each embodiment the method for the present invention
Portion or part steps.And storage medium above-mentioned include: USB flash disk, mobile hard disk, read-only memory (read-only memory,
ROM), random access memory (random access memory, RAM), magnetic or disk etc. are various can store program
The medium of code.
The above, the above embodiments are merely illustrative of the technical solutions of the present invention, rather than its limitations；Although referring to before
Stating embodiment, invention is explained in detail, those skilled in the art should understand that: it still can be to preceding
Technical solution documented by each embodiment is stated to modify or equivalent replacement of some of the technical features；And these
It modifies or replaces, the spirit and scope for technical solution of various embodiments of the present invention that it does not separate the essence of the corresponding technical solution.
Claims (10)
1. a kind of method of reading data characterized by comprising
When reading data failure, main control chip obtains data by management module and reads instruction again；
The main control chip reads instruction determining first reference voltage value from default stressed sequence again according to the data, wherein
The default stressed sequence is stored in the rear module of the main control chip；
The main control chip reads target data according to first reference voltage value from flash chip.
2. the method according to claim 1, wherein the main control chip according to first reference voltage value from
The target data is read in the flash chip, including
First reference voltage value is sent to the flash chip by the main control chip；
The flash chip generates the first reference voltage according to first reference voltage value；
The flash chip reads the target data according to first reference voltage.
3. according to the method described in claim 2, it is characterized in that, the flash chip is read according to first reference voltage
After the target data, the method also includes:
If the flash chip reads target data success according to first reference voltage；
The flash chip reads to main control chip transmission and successfully instructs, and described read in successfully instruction carries the mesh
Mark data；
If the flash chip reads target data failure according to first reference voltage；
The flash chip sends to the main control chip and reads failure command.
4. according to the method described in claim 3, it is characterized in that, the flash chip sends the reading to the main control chip
After taking failure command, the method also includes:
The main control chip obtains the reading failure command by the management module, and raw according to the reading failure command
Instruction is read again at the data；
The main control chip reads instruction determining second reference voltage value from default stressed sequence again according to the data, wherein
The default stressed sequence also includes multiple reference voltage values；
The main control chip reads the target data according to second reference voltage value from the flash chip.
5. method according to claim 1 to 4, which is characterized in that the main control chip passes through the management
Before module obtains the stressed instruction of the data, the method also includes:
The main control chip sends read request to the rear module by the management module, and the read request is used to indicate institute
It states rear module and reads the target data in the flash chip.
6. a kind of reading data device characterized by comprising
Module is obtained, for data being obtained by management module and reading instruction again when reading data failure；
Determining module, the data for being obtained according to the acquisition module read instruction again and determine the from default stressed sequence
One reference voltage value, wherein the default stressed sequence is stored in the rear module of the main control chip；
Read module, first reference voltage value for being determined according to the determining module read target from flash chip
Data.
7. reading data device according to claim 6, which is characterized in that
Sending module, specifically for first reference voltage value is sent to the flash chip according to the main control chip；
Generation module is specifically used for generating the first reference voltage according to first reference voltage value；
Read module is specifically used for reading the target data according to first reference voltage.
8. reading data device according to claim 7, which is characterized in that
Sending module, after being also used to the flash chip according to first reference voltage reading target data success,
It reads to main control chip transmission and successfully instructs, described read in successfully instruction carries the target data；
Sending module, after being also used to the flash chip according to first reference voltage reading target data failure,
It is sent to the main control chip and reads failure command.
9. reading data device according to claim 8, which is characterized in that
Module is obtained, is also used to obtain the reading failure command by the management module, and unsuccessfully refer to according to the reading
It enables and generates the stressed instruction of the data；
Determining module is also used to read again instruction according to the data and determines the second reference voltage value from default stressed sequence,
In, the default stressed sequence also includes multiple reference voltage values；
Read module is also used to read the target data from the flash chip according to second reference voltage value.
10. reading data device according to any one of claims 6 to 9,
Sending module is also used to send read request to the rear module, and the read request is used to indicate the rear module and reads
Take the target data in the flash chip.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112947841A (en) * | 2019-11-26 | 2021-06-11 | 珠海零边界集成电路有限公司 | Method, device, equipment and storage medium for reading embedded flash memory data |
| WO2021121132A1 (en) * | 2019-12-19 | 2021-06-24 | 江苏芯盛智能科技有限公司 | Solid state drive data read retry method and apparatus, and solid-state hard disk |
Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101622595A (en) * | 2006-12-06 | 2010-01-06 | 弗森多系统公司（dba弗森-艾奥） | Apparatus, system, and method for storage space recovery in solid-state storage |
| US20150188575A1 (en) * | 2013-12-27 | 2015-07-02 | Silicon Motion, Inc. | Data Storage Device and Error Correction Method Thereof |
| CN106251903A (en) * | 2015-06-05 | 2016-12-21 | 爱思开海力士有限公司 | Storage system and operational approach thereof |
| US20170075574A1 (en) * | 2014-03-24 | 2017-03-16 | Hitachi, Ltd. | Non-volatile memory device, and storage apparatus having non-volatile memory device |
| CN106843771A (en) * | 2017-01-26 | 2017-06-13 | 合肥兆芯电子有限公司 | Memory reads method, memorizer control circuit unit and memory storage apparatus again |
| CN107240418A (en) * | 2016-03-28 | 2017-10-10 | 爱思开海力士有限公司 | Accumulator system and its operating method |
| CN107240411A (en) * | 2016-03-29 | 2017-10-10 | 爱思开海力士有限公司 | Storage system and its operating method |
| US20180046527A1 (en) * | 2016-08-15 | 2018-02-15 | Sandisk Technologies Llc | Memory system with a weighted read retry table |
-
2018
- 2018-07-26 CN CN201810836125.6A patent/CN109062511B/en active Active
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101622595A (en) * | 2006-12-06 | 2010-01-06 | 弗森多系统公司（dba弗森-艾奥） | Apparatus, system, and method for storage space recovery in solid-state storage |
| US20150188575A1 (en) * | 2013-12-27 | 2015-07-02 | Silicon Motion, Inc. | Data Storage Device and Error Correction Method Thereof |
| US20170075574A1 (en) * | 2014-03-24 | 2017-03-16 | Hitachi, Ltd. | Non-volatile memory device, and storage apparatus having non-volatile memory device |
| CN106251903A (en) * | 2015-06-05 | 2016-12-21 | 爱思开海力士有限公司 | Storage system and operational approach thereof |
| CN107240418A (en) * | 2016-03-28 | 2017-10-10 | 爱思开海力士有限公司 | Accumulator system and its operating method |
| CN107240411A (en) * | 2016-03-29 | 2017-10-10 | 爱思开海力士有限公司 | Storage system and its operating method |
| US20180046527A1 (en) * | 2016-08-15 | 2018-02-15 | Sandisk Technologies Llc | Memory system with a weighted read retry table |
| CN106843771A (en) * | 2017-01-26 | 2017-06-13 | 合肥兆芯电子有限公司 | Memory reads method, memorizer control circuit unit and memory storage apparatus again |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112947841A (en) * | 2019-11-26 | 2021-06-11 | 珠海零边界集成电路有限公司 | Method, device, equipment and storage medium for reading embedded flash memory data |
| WO2021121132A1 (en) * | 2019-12-19 | 2021-06-24 | 江苏芯盛智能科技有限公司 | Solid state drive data read retry method and apparatus, and solid-state hard disk |
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|---|---|
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