CN109039045A - LDO parallel current-equalizing circuit - Google Patents
LDO parallel current-equalizing circuit Download PDFInfo
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- CN109039045A CN109039045A CN201811020754.8A CN201811020754A CN109039045A CN 109039045 A CN109039045 A CN 109039045A CN 201811020754 A CN201811020754 A CN 201811020754A CN 109039045 A CN109039045 A CN 109039045A
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- ldo
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- parallel
- ldo circuit
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Continuous-Control Power Sources That Use Transistors (AREA)
Abstract
The invention discloses LDO parallel current-equalizing circuit, LDO parallel current-equalizing circuit further includes a sharing control loop including two LDO circuit U1 and U2 in parallel, and the input terminal of two LDO circuit U1 and U2 in parallel is arranged in sharing control loop；The sharing control loop is made of an operational amplifier A, two detection resistances R1, R2 and an adjusting resistance R3, two detection resistances R1, R2 are connected with the input terminal of operational amplifier A, and the output end of operational amplifier A is adjusted resistance and is connected with the output feedback pin FB of LDO circuit U1.Compared to the prior art, design is simple, precision is high, it can be achieved that load current when two LDO parallel operations is balanced for a kind of LDO parallel current-equalizing circuit provided by the invention, ensures that power supply is reliable.
Description
Technical field
The present invention relates to low pressure difference linear voltage regulator technical field, specifically a kind of LDO parallel current-equalizing circuit.
Background technique
In electronic system DC/DC power-supply service, most common is Switching Power Supply and LDO.Switch power efficiency is high, defeated
Electric current is big out, but due to its switching characteristic, output voltage ripple noise is larger.Low pressure difference linear voltage regulator (Low Dropout
Regulator, abbreviation LDO) it the output voltage through overregulating can be generated provides power supply for chip, it is now widely used for system
In grade chip (System-on-a-Chip, abbreviation SoC).Whether low pressure difference linear voltage regulator needs shunt capacitance can be with according to it
It is divided into plain edition LDO circuit and without capacitive LDO circuit (capacitorless LDO), plain edition LDO circuit generally requires one
A or two shunt capacitances, and shunt capacitance is not needed generally without capacitive LDO circuit.Tradition is general without capacitive LDO circuit
It is made of the part such as difference amplifier, power MOS pipe and resistance, what difference amplifier, power MOS pipe and resistance formed feeds back to
Road is used to keep the stabilization of output voltage.Common, traditional LDO circuit further includes the compensation resistance for realizing compensation effect
Guarantee the stability of LDO circuit with Miller capacitance.
LDO circuit has many advantages, such as that ultra low voltage noise, interference are small, obtains in high-precision, low noise power supply occasion extensive
Using, but LDO low efficiency, calorific value are big, are generally only applicable to the lesser occasion of load current, typically less than 1A, this is lacked
Point greatly limits its application.
The advantages of in order to play LDO circuit low noise, realizes that it, can be by LDO simultaneously in the application of larger current power supply occasion
Connection, which makes always to export electric current, to be doubled.But there are the problem of it is as follows: LDO parallel operation needs to solve load current equalization problem, no
Then difference intrinsic between LDO, the LDO that output voltage can be made slightly higher share bigger electric current, into unbalanced working condition, until
Overcurrent protection or Thermal shutdown occurs and fails.
Summary of the invention
Technical assignment of the invention is place against the above deficiency, provides a kind of LDO parallel current-equalizing circuit, for high-precision, big
In the occasion of electric current output.
The technical solution adopted by the present invention to solve the technical problems is: LDO parallel current-equalizing circuit, including two parallel connections
LDO circuit U 1 and U2, further include a sharing control loop, two LDO circuits in parallel are arranged in sharing control loop
The input terminal of U1 and U2；The sharing control loop is by an operational amplifier A, two detection resistances R1, R2 and a tune
Economize on electricity resistance R3 is constituted, and two detection resistances R1, R2 are connected with the input terminal of operational amplifier A, the output end of operational amplifier A
It is adjusted resistance and is connected with the output feedback pin FB of LDO circuit U 1.
Further, preferred structure be further include two groups of feed circuits；In two LDO circuit Us 1 and U2 in parallel
One group of feed circuit is respectively arranged in output end, and the resistance of two groups of feed circuits is identical, and one group of feed circuit includes
Feedback resistance R4 and R5, another group of feed circuit include feedback resistance R6 and R7, and the resistance value and feedback resistance of feedback resistance R4
R6 is identical, and the resistance value of feedback resistance R5 is identical as feedback resistance R7.
Further, preferred structure is to be arranged between the output feedback pin FB of operational amplifier A and LDO circuit U 1
Have and adjusts resistance R3.
Further, preferred structure is that the input terminal of the LDO parallel circuit is grounded by capacitor C1.
Further, preferred structure is that detection resistance is the smart power resistance that precision is 1% or more, detection resistance
Resistance value is less than 30 milliohms.
Further, preferred structure is that the resistance value of adjusting resistance R3 is 10-20 kilo-ohms.
A kind of design method of LDO parallel circuit, method includes two detection resistances R1 and R2 of setting, for constantly respectively
Detect the deviation of LDO circuit U1 and LDO circuit U2 load current；It is defeated that the deviation voltage that will test is sent into operational amplifier A
Enter end, adjusts output voltage by adjusting the feedback signal of resistance dynamic regulation LDO circuit using operational amplifier A, thus
Realize the equilibrium of load current between LDO circuit U1 and U2 in parallel.
Further, the specific method is as follows:
When LDO circuit U1 output voltage is higher than the output voltage of LDO circuit U2, the load current of LDO circuit U1 is larger,
To which the electric current for flowing through detection resistance R1 is bigger than the electric current for flowing through detection resistance R2, lead to the cathode voltage ratio of operational amplifier A
Cathode voltage is high, drives voltage at the output feedback pin FB of LDO circuit U1 to increase, LDO circuit U1 internal regulatory mechanisms are rung
Feedback pin FB signal should be exported to increase to reduce the output voltage of LDO circuit U1, to realize the load of LDO circuit U1
Electric current reduces；
When LDO circuit U1 output voltage is lower than the output voltage of LDO circuit U2, the load current of LDO circuit U1 is smaller,
To which the electric current for flowing through detection resistance R1 is smaller than the electric current for flowing through detection resistance R2, lead to the cathode voltage ratio of operational amplifier A
Negative electricity forces down, and drives voltage at the output feedback pin FB of LDO circuit U1 to reduce, LDO circuit U1 internal regulatory mechanisms are rung
Feedback pin FB signal, which should be exported, to be reduced to increase the output voltage of LDO circuit U1, to realize the load of LDO circuit U1
Electric current increases；
Under load balancing state, LDO circuit U1 output voltage is close with the output voltage of LDO circuit U2, the load of the two
Electric current is identical, then sharing control loop circuit state is stablized constant.
Compared to the prior art LDO parallel current-equalizing circuit of the invention, has the beneficial effect that:
1, the present invention provides a kind of LDO parallel operation sharing control scheme, and design is simple, precision is high, it can be achieved that two LDO parallel connections
Load current when work is balanced, ensures that power supply is reliable；
2, high-precision, High-current output may be implemented, can be applied to radio frequency, audio, ADC conversion etc. and need high-precision, super-low noise
In the system design of sound power supply；
3, using the linear output character in the bias voltage ranges of operational amplifier, by dynamic regulation LDO feedback signal come
Output voltage is adjusted, realizes the equilibrium of load current between parallel connection LDO.
Detailed description of the invention
The following further describes the present invention with reference to the drawings.
Attached drawing 1 is existing LDO parallel circuit figure.
Attached drawing 2 is improved double LDO parallel current-equalizing circuit figures.
Specific embodiment
The present invention will be further explained below with reference to the attached drawings and specific examples.
The present invention is LDO parallel current-equalizing circuit, and when LDO is used in parallel, being directly simply connected in parallel two LDO is not
Desirable.Although two LDO models are identical, its internal component (such as error amplifier, MOSFET) is inevitably
There are nuance, these differences can only reduce as far as possible, cannot but completely eliminate.
As shown in Fig. 1, two LDO U1 and U2 parallel operations, input, output end are respectively connected with, and are used identical
Feed circuit, but its own property difference still can be such that its output voltage is slightly different.The higher LDO of output voltage can account for leading
More electric currents are shared in status, cause load imbalance, or even can reach current limit protection or Thermal shutdown occurs.
Embodiment 1:
LDO parallel current-equalizing circuit further includes a sharing control loop, flows including two LDO circuit Us 1 and U2 in parallel
The input terminal of two LDO circuit Us 1 and U2 in parallel is arranged in control loop；The sharing control loop is put by an operation
Big device A, two detection resistances R1, R2 and an adjusting resistance R3 are constituted, and wherein detection resistance can carry larger current, should select
Power resistor selects smart power resistance of the precision 1% or more, and the resistance value of detection resistance should not mistake to control precision
Greatly, the resistance value of detection resistance is selected to be less than or equal to 30 milliohms.
Two detection resistances R1, R2 are connected with the input terminal of operational amplifier A, the output end and LDO of operational amplifier A
The output feedback pin FB of circuit U 1 is connected.It is arranged between the output feedback pin FB of operational amplifier A and LDO circuit U 1
Have and adjusts resistance R3.The resistance value for adjusting resistance R3 is 10-20 kilo-ohms.
As shown in Fig. 2, when wherein circuit works, the load current of two LDO U1 and U2 flow separately through detection resistance R1
And R2 can form pressure difference if two LDO load currents are different between detection resistance rear end a point and b point, voltage difference is sent into
Operational amplifier, driving amplifier output end voltage change, and change U1 feedback end c point voltage, adjust U1 output, cut down two
The electric current of LDO distributes deviation.Under this design, U2 is fixed as main LDO, output voltage, and U1 connects as auxiliary LDO, output voltage
It is adjusted by real-time control and dynamic.
It further include two groups of feed circuits；In the output end of two LDO circuit Us 1 and U2 in parallel, one group of feedback is respectively set
Circuit, one group of feed circuit include feedback resistance R4 and R5, and another group of feed circuit includes feedback resistance R6 and R7, i.e., two groups anti-
The resistance of current feed circuit answers identical, i.e. R4=R6, R5=R7, it is contemplated that resistance itself error should select 1% high precision electro
Resistance.
The input terminal of the LDO parallel circuit is grounded by capacitor C1.
Wherein, due to the purpose of the present invention is make LDO export more high current, according to the power dissipation formula of LDO: PLOSS=
(VIN-VOUT)×IOUT, in output electric current IOUTIn biggish situation guarantee power consumption it is not exceeded, should be used as much as possible allow it is lower
The LDO of input-output voltage difference.
For the small voltage difference that can accurately respond detection resistance end, the input offset voltage of operational amplifier should be as far as possible
It is small.Generally, detection resistance and load current are all smaller, the voltage deviation of amplifier input terminal also very little, if amplifier biased electrical
It presses through greatly, cannot respond to small voltage difference, then do not have adjustment effect.
Resistance R3 connection amplifier output end and U2 feedback end are adjusted, determines the adjusting amplitude to feedback voltage, and then determine
U2 output voltage fluctuation scope, resistance value should be designed carefully.If R3 resistance value is too small, adjustment effect is too strong, and U2 output voltage becomes
Dynamic range is excessive, may cause job insecurity；If R3 resistance value is excessive, adjustment effect is weak, then can not effectively control U2 output electricity
Pressure.Under normal circumstances, R3 takes 15K Ω or so, and U1, U2 output voltage bias maximum 4% can obtain relatively good regulating effect.
A kind of design method of LDO parallel circuit, method includes two detection resistances R1 and R2 of setting, for constantly respectively
Detect the deviation of LDO circuit U1 and LDO circuit U2 load current；It is defeated that the deviation voltage that will test is sent into operational amplifier A
Enter end, output voltage is adjusted by the feedback signal of dynamic regulation LDO circuit using operational amplifier A, to realize parallel connection
The equilibrium of load current between LDO circuit U1 and U2.
When LDO circuit U1 output voltage is higher than the output voltage of LDO circuit U2, the load current of LDO circuit U1 compared with
Greatly, so that the electric current for flowing through detection resistance R1 is bigger than the electric current for flowing through detection resistance R2, lead to the cathode voltage of operational amplifier A
It is higher than cathode voltage, drive voltage at the output feedback pin FB of LDO circuit U1 to increase, LDO circuit U1 internal regulatory mechanisms
Response output feedback pin FB signal increases to reduce the output voltage of LDO circuit U1, to realize that LDO circuit U1's is negative
Electric current is carried to reduce；
When LDO circuit U1 output voltage is lower than the output voltage of LDO circuit U2, the load current of LDO circuit U1 is smaller,
To which the electric current for flowing through detection resistance R1 is smaller than the electric current for flowing through detection resistance R2, lead to the cathode voltage ratio of operational amplifier A
Negative electricity forces down, and drives voltage at the output feedback pin FB of LDO circuit U1 to reduce, LDO circuit U1 internal regulatory mechanisms are rung
Feedback pin FB signal, which should be exported, to be reduced to increase the output voltage of LDO circuit U1, to realize the load of LDO circuit U1
Electric current increases；
Under load balancing state, LDO circuit U1 output voltage is close with the output voltage of LDO circuit U2, the load of the two
Electric current is identical, then sharing control loop circuit state is stablized constant.
In conclusion the present invention is constituted and is flowed by an operational amplifier, two detection resistances and an adjusting resistance
Control loop, detection resistance constantly detects the deviation of each LDO load current, and deviation voltage is sent into operational amplifier input
End, using linear output character of the operational amplifier in bias voltage ranges, is adjusted by dynamic regulation LDO feedback signal
Output voltage realizes the equilibrium of load current between parallel connection LDO.Design method structure of the invention is simple, precision is high, it can be achieved that
Load current when two LDO parallel operations is balanced, ensures that power supply is reliable.
The technical personnel in the technical field can readily realize the present invention with the above specific embodiments,.But it answers
Work as understanding, the present invention is not limited to above-mentioned several specific embodiments.On the basis of the disclosed embodiments, the technology
The technical staff in field can arbitrarily combine different technical features, to realize different technical solutions.
Claims (7)
1.LDO parallel current-equalizing circuit, including two LDO circuit Us 1 and U2 in parallel, which is characterized in that further include one and flow
The input terminal of two LDO circuit Us 1 and U2 in parallel is arranged in control loop, sharing control loop；The sharing control ring
An operational amplifier A, two detection resistances R1, R2 and adjusting resistance R3 is routed to constitute, two detection resistances R1, R2 with
The input terminal of operational amplifier A is connected, and the output that the output end of operational amplifier A is adjusted resistance and LDO circuit U 1 is fed back
Pin FB is connected.
2. LDO parallel current-equalizing circuit according to claim 1, which is characterized in that further include two groups of feed circuits；At two
One group of feed circuit, the resistance of two groups of feed circuits is respectively arranged in the output end of LDO circuit U 1 and U2 in parallel
Identical, one group of feed circuit includes feedback resistance R4 and R5, and another group of feed circuit includes feedback resistance R6 and R7, and feeds back electricity
The resistance value for hindering R4 is identical as feedback resistance R6, and the resistance value of feedback resistance R5 is identical as feedback resistance R7.
3. LDO parallel current-equalizing circuit according to claim 1, which is characterized in that the resistance value for adjusting resistance R3 is 10-20k
Ω。
4. LDO parallel current-equalizing circuit according to claim 1, which is characterized in that the input of the LDO parallel circuit
End is grounded by capacitor C1.
5. LDO parallel current-equalizing circuit according to claim 1, which is characterized in that detection resistance is smart power resistance, inspection
The resistance value of measuring resistance is less than 30m Ω.
6. a kind of design method of LDO parallel circuit, which is characterized in that method includes two detection resistances R1 and R2 of setting, is used
In the deviation for constantly detecting LDO circuit U1 and LDO circuit U2 load current respectively；The deviation voltage that will test is sent into operation
Amplifier A input terminal adjusts output voltage by the feedback signal of dynamic regulation LDO circuit using operational amplifier A, thus
Realize the equilibrium of load current between LDO circuit U1 and U2 in parallel.
7. a kind of design method of LDO parallel circuit according to claim 6, which is characterized in that the specific method is as follows:
When LDO circuit U1 output voltage is higher than the output voltage of LDO circuit U2, the load current of LDO circuit U1 is larger,
To which the electric current for flowing through detection resistance R1 is bigger than the electric current for flowing through detection resistance R2, lead to the cathode voltage ratio of operational amplifier A
Cathode voltage is high, drives voltage at the output feedback pin FB of LDO circuit U1 to increase, LDO circuit U1 internal regulatory mechanisms are rung
Feedback pin FB signal should be exported to increase to reduce the output voltage of LDO circuit U1, to realize the load of LDO circuit U1
Electric current reduces；
When LDO circuit U1 output voltage is lower than the output voltage of LDO circuit U2, the load current of LDO circuit U1 is smaller,
To which the electric current for flowing through detection resistance R1 is smaller than the electric current for flowing through detection resistance R2, lead to the cathode voltage ratio of operational amplifier A
Negative electricity forces down, and drives voltage at the output feedback pin FB of LDO circuit U1 to reduce, LDO circuit U1 internal regulatory mechanisms are rung
Feedback pin FB signal, which should be exported, to be reduced to increase the output voltage of LDO circuit U1, to realize the load of LDO circuit U1
Electric current increases；
Under load balancing state, LDO circuit U1 output voltage is close with the output voltage of LDO circuit U2, the load of the two
Electric current is identical, then sharing control loop circuit state is stablized constant.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811020754.8A CN109039045A (en) | 2018-09-03 | 2018-09-03 | LDO parallel current-equalizing circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811020754.8A CN109039045A (en) | 2018-09-03 | 2018-09-03 | LDO parallel current-equalizing circuit |
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| CN109039045A true CN109039045A (en) | 2018-12-18 |
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| CN201811020754.8A Pending CN109039045A (en) | 2018-09-03 | 2018-09-03 | LDO parallel current-equalizing circuit |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111309089A (en) * | 2020-04-21 | 2020-06-19 | 深圳市鼎阳科技股份有限公司 | Linear voltage-stabilized power supply |
| CN111443652A (en) * | 2020-03-24 | 2020-07-24 | 深圳市紫光同创电子有限公司 | Power supply structure of CP L D logic unit array |
| CN111736683A (en) * | 2020-06-19 | 2020-10-02 | 浪潮电子信息产业股份有限公司 | Server, circuit board and power supply system thereof |
| CN111966203A (en) * | 2020-08-18 | 2020-11-20 | 浪潮商用机器有限公司 | Server and chip power supply device thereof |
| CN112202159A (en) * | 2020-09-28 | 2021-01-08 | 努比亚技术有限公司 | Balanced current circuit, charger and mobile terminal |
| CN114415772A (en) * | 2022-01-12 | 2022-04-29 | 西安超越申泰信息科技有限公司 | Low dropout regulator circuit design method |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201690362U (en) * | 2009-11-16 | 2010-12-29 | 深圳市同洲电子股份有限公司 | Flow equalizing circuit for parallel connection of power supplies |
| CN202364119U (en) * | 2011-11-20 | 2012-08-01 | 合肥华耀电子工业有限公司 | Novel low-cost parallel-connection flow equalizing circuit of switching-mode power supply |
| US20150359040A1 (en) * | 2014-06-04 | 2015-12-10 | Ricoh Company, Ltd. | Control unit, control method, and recording medium storing a control program |
| CN206164366U (en) * | 2016-11-14 | 2017-05-10 | 广州视源电子科技股份有限公司 | Switching power supply system of flow equalizing that connects in parallel |
| CN106972745A (en) * | 2017-05-17 | 2017-07-21 | 成都微泰科技有限公司 | Power supply sharing control system |
-
2018
- 2018-09-03 CN CN201811020754.8A patent/CN109039045A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201690362U (en) * | 2009-11-16 | 2010-12-29 | 深圳市同洲电子股份有限公司 | Flow equalizing circuit for parallel connection of power supplies |
| CN202364119U (en) * | 2011-11-20 | 2012-08-01 | 合肥华耀电子工业有限公司 | Novel low-cost parallel-connection flow equalizing circuit of switching-mode power supply |
| US20150359040A1 (en) * | 2014-06-04 | 2015-12-10 | Ricoh Company, Ltd. | Control unit, control method, and recording medium storing a control program |
| CN206164366U (en) * | 2016-11-14 | 2017-05-10 | 广州视源电子科技股份有限公司 | Switching power supply system of flow equalizing that connects in parallel |
| CN106972745A (en) * | 2017-05-17 | 2017-07-21 | 成都微泰科技有限公司 | Power supply sharing control system |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111443652A (en) * | 2020-03-24 | 2020-07-24 | 深圳市紫光同创电子有限公司 | Power supply structure of CP L D logic unit array |
| CN111309089A (en) * | 2020-04-21 | 2020-06-19 | 深圳市鼎阳科技股份有限公司 | Linear voltage-stabilized power supply |
| CN111309089B (en) * | 2020-04-21 | 2022-05-10 | 深圳市鼎阳科技股份有限公司 | Linear voltage-stabilized power supply |
| CN111736683A (en) * | 2020-06-19 | 2020-10-02 | 浪潮电子信息产业股份有限公司 | Server, circuit board and power supply system thereof |
| CN111736683B (en) * | 2020-06-19 | 2022-06-17 | 浪潮电子信息产业股份有限公司 | Server, circuit board and power supply system thereof |
| CN111966203A (en) * | 2020-08-18 | 2020-11-20 | 浪潮商用机器有限公司 | Server and chip power supply device thereof |
| CN111966203B (en) * | 2020-08-18 | 2023-12-26 | 浪潮商用机器有限公司 | Server and chip power supply device thereof |
| CN112202159A (en) * | 2020-09-28 | 2021-01-08 | 努比亚技术有限公司 | Balanced current circuit, charger and mobile terminal |
| CN114415772A (en) * | 2022-01-12 | 2022-04-29 | 西安超越申泰信息科技有限公司 | Low dropout regulator circuit design method |
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Application publication date: 20181218 |