CN109037310B - A superjunction power device terminal structure and preparation method thereof - Google Patents

Abstract

A superjunction power device terminal structure and a preparation method thereof belong to the technical field of power semiconductors. The invention includes a substrate, an epitaxial layer, a cut-off ring and a multi-layer graded doping region; the multi-layer graded doping region is arranged from top to bottom in the lateral direction in the epitaxial layer of the terminal region, and its doping concentration and extension depth are adjusted. gradient. Along the lateral direction of the device, the surface doping concentration reaches the lowest in the direction close to the channel cut-off ring, which effectively reduces the electric field peak at the junction edge. At the same time, the depth of the graded doping region extends from the body to the surface along the lateral direction, which is conducive to alleviating the curvature of the junction edge. The influence of the effect on the breakdown voltage; along the longitudinal direction of the device, the doping concentration in the silicon body is lower than that on the surface, which is conducive to the expansion of the space charge region in the body to the side of the graded doping region. The invention improves the sensitivity of the breakdown voltage of the terminal region to the charge imbalance, and improves the withstand voltage capability of the terminal.

Description

A superjunction power device terminal structure and preparation method thereof

technical field

The invention belongs to the technical field of power semiconductors, and in particular relates to a terminal structure of a superjunction power device and a preparation method thereof.

Background technique

Power semiconductor devices are semiconductor devices for power processing, which combine microelectronics technology and power electronics technology to form the foundation and core of power electronics technology. The main development direction of power devices has been along the two aspects of increasing frequency and increasing power. As an important power device in the field of medium and high voltage, the basic structure of superjunction devices is composed of alternately arranged p-columns and n-columns, and the p-columns and n-columns follow the basic principle of charge balance. The proposal of this structure breaks through the "silicon limit" and thus becomes a major milestone in the development history of power devices. Superjunction MOSFETs are widely used in power systems by introducing a superjunction structure into the drift region of conventional power MOSFETs because they significantly improve the trade-off between breakdown voltage and on-resistance in power MOSFETs. In the blocking state of the device, the p-column and n-column in the superjunction structure are completely depleted from each other, and the longitudinal electric field of the device tends to be uniformly distributed under the modulation of the lateral electric field in the drift region. Therefore, in the superjunction structure, the p-column and the n-column are completely depleted of each other, and the drift region is equivalent to an intrinsic layer. In theory, the breakdown voltage (withstand voltage) of the superjunction device only depends on the thickness of the drift region, which is different from the drift region. Region doping concentration is irrelevant. In this way, under the same breakdown voltage, the doping concentration of the drift region can be appropriately increased, thereby effectively reducing the on-resistance of the device.

In the actual application process, since the bending of the pn junction in the terminal region of the device will increase the electric field strength (that is, the electric field will be concentrated near the junction), fixed charges will be introduced on the surface of the device during the process, which will affect the breakdown voltage and make the device The actual breakdown voltage of is lower than that of an ideal planar pn junction. Therefore, the terminal structure design of the device has always been a key technology to improve the breakdown voltage of the device. The developed high voltage termination structures include electric field confinement ring technology, field plate technology, surface forming technology, etc. Among them, the electric field confinement ring technology improves the breakdown voltage of the device by reducing the surface electric field at the main junction. The fabrication process is compatible with cell fabrication and does not require additional process steps. However, the terminal area of the electric field confinement ring structure is Occupy large. To this end, researchers have proposed many improved structures based on the electric field confinement ring, such as a lightly doped field confinement ring with a P+ offset region, a shallow trench field confinement ring, and a 3D RESURF field confinement ring. In 1977 Temple proposed the JTE (Junction Termination Extension) structure, which is a method of obtaining a lightly doped P-type region by ion implantation near the heavily doped main junction, but in fact, JTE requires precise control of the ion implantation dose. For the purpose of reducing sensitivity to implantation dose, in 1985 R. Stengl et al. proposed a Varied Lateral Doping (VLD) termination structure. VLD gradually reduced the mask window to allow ions to be implanted at one time. The annealing forms a controllable graded impurity distribution region. Compared with the field limiting ring structure, the VLD terminal structure can achieve a higher planar junction breakdown voltage while occupying a smaller terminal area, so that the breakdown voltage of the terminal is improved.

Because superjunction devices have special cell structures and manufacturing processes, as well as the characteristics of small drift region thickness and high doping concentration, the common terminal structure of high-voltage power devices cannot be applied to superjunction devices. At present, the terminal structure of the widely used superjunction device is the same as its cell structure, which adopts p-pillars and n-pillars alternately arranged, and also follows the basic principle of charge balance. However, the breakdown voltage of superjunction devices is very sensitive to charge imbalance, and process deviations such as the width, spacing, and concentration of the doping pillars in the terminal region may cause the surface electric field of the terminal to increase, and the device terminal will break down in advance and be damaged. . In summary, the conventional terminal structure is not only difficult to manufacture, but also greatly affected by the charge imbalance. Therefore, it is necessary to develop a superjunction power device terminal structure that can reduce the influence of the charge imbalance and is simple to manufacture.

SUMMARY OF THE INVENTION

In view of the above, the present invention provides a super junction power device termination structure in view of the problems that the reliability of the existing super terminal structure is greatly affected by the charge imbalance and the manufacturing difficulty A multi-layer graded doping region with a doping concentration that decreases sequentially and is arranged laterally is arranged at the bottom, so that the extension depth of the multi-layer graded doping region along the lateral direction of the device decreases sequentially from top to bottom, and the multi-layer graded doping region is arranged along the device. The doping concentration of the positions with the same extension depth in the lateral direction decreases sequentially from top to bottom. Therefore, the sensitivity of the breakdown voltage of the terminal region to the charge imbalance is improved, and the withstand voltage capability of the terminal is improved; in addition, the present invention also provides a preparation method of the terminal structure, which is simple and controllable, and has strong compatibility, which is conducive to the realization of Industrial production.

In order to achieve the above object, the present invention adopts the following technical solutions:

In one aspect, the present invention provides a superjunction power device terminal structure, comprising a first conductive type semiconductor substrate 1 and a first conductive type semiconductor epitaxial layer 2 located on the upper surface of the first conductive type semiconductor substrate 1; the first conductive type semiconductor epitaxial layer 2 is provided. One end of the top layer of the conductive type semiconductor epitaxial layer 2 is provided with a first conductive type semiconductor cut-off ring 3, which is characterized in that: the other end of the top layer of the first conductive type semiconductor epitaxial layer 2 is provided with multiple layers of the second conductive type semiconductor gradient from top to bottom. Doping region 4, the extension depth of the multi-layer second conductive type semiconductor graded doping region 4 along the lateral direction of the device decreases sequentially from top to bottom, and the doping concentration of the second conductive type semiconductor graded doping region 4 increases with The lateral distance from the first conductive type semiconductor cut-off ring 3 decreases in sequence, and the multi-layer second conductive type semiconductor graded doping region 4 has the same vertical distance from the first conductive type semiconductor cut-off ring 3. The doping concentration of the position decreases sequentially from top to bottom; by adjusting the doping distribution of the multi-layer second conductive type semiconductor graded doping region 4, when the reverse withstand voltage reaches the breakdown voltage, the multi-layer second conductive type semiconductor graded doping Zone 4 is completely depleted.

Further, in the present invention, any two adjacent second-conductivity-type semiconductor graded doped regions 4 are in contact with each other or are separated by the first-conductivity-type semiconductor epitaxial layer 2 .

Further, in the present invention, each second conductive type semiconductor graded doping region 4 has a first conductive type semiconductor graded doping adjustment region 5 inside, and the first conductive type semiconductor graded doping adjustment region 5 has a doping concentration. It is smaller than the doping concentration of the corresponding second conductivity type semiconductor graded doping region 4 .

Further, in the present invention, the first conductive type semiconductor is an N-type semiconductor, and the second conductive type semiconductor is a P-type semiconductor, so that the terminal structure is used as the terminal structure of the N-channel superjunction device; or the first conductive type semiconductor is A P-type semiconductor, the second conductivity type semiconductor is an N-type semiconductor, so that the termination structure is used as a termination structure of a P-channel superjunction device.

On the other hand, the present invention provides a method for preparing a terminal structure of a superjunction power device, which is characterized by comprising the following steps:

Select the first conductive type semiconductor substrate 1, and epitaxially grow the first conductive type semiconductor epitaxial layer 2 on the first conductive type semiconductor substrate 1; use a mask on the first conductive type semiconductor epitaxial layer 2 in the terminal region The mask plate includes a plurality of windows, and the second conductivity type semiconductor impurity ions are implanted into the first conductivity type semiconductor epitaxial layer 2 through the mask plate window to form a doped region; and ion implantation, reasonably adjust the number, size and ion implantation energy and dose of the mask window, and finally form a multi-layer second conductivity type semiconductor from top to bottom on the top layer of the first conductivity type semiconductor epitaxial layer 2 through an annealing process. The graded doped region 4; and the extension depth of the multilayered second conductive type semiconductor graded doped region 4 along the lateral direction of the device decreases sequentially from top to bottom, and for each layer of the second conductive type semiconductor graded doped region 4, its doping The impurity concentration gradually decreases with its lateral extension, and at the same time, for the second conductive type semiconductor graded doping region 4 with the same lateral extension depth, the doping concentration gradually decreases from the device surface to the body; finally, in the first conductive type semiconductor epitaxial layer 2 The other end of the top layer of the first conductive type semiconductor stop ring 3 is formed by ion implantation and annealing process using a mask.

Compared with the prior art, the beneficial effects of the present invention are:

In the present invention, a graded doping region of a multi-layer structure is designed inside the epitaxial layer of the terminal region of the super junction power device, thereby forming a three-dimensional graded doping terminal structure with a concentration gradient along the lateral direction and a longitudinal direction of the device and a depth gradient along the lateral direction of the device. . The invention improves the sensitivity of the breakdown voltage of the terminal region to the charge imbalance while not affecting the electrical performance of the super junction device, reduces the technological difficulty of fabricating the terminal structure, and improves the reliability of the terminal structure.

Description of drawings

1 is a schematic structural diagram of a terminal structure of a superjunction power device provided in Embodiment 1 of the present invention;

2 is a schematic diagram of lateral and vertical concentration distributions of a superjunction power device termination structure provided in Embodiment 1 of the present invention;

3 is a schematic structural diagram of a terminal structure of a superjunction power device according to Embodiment 2 according to Embodiment 2 of the present invention;

4 is a schematic structural diagram of a terminal structure of a superjunction power device according to Embodiment 3 according to Embodiment 3 of the present invention;

FIG. 5 is an application example of the superjunction power device termination structure of the present invention in a superjunction planar gate device.

6 to 14 are schematic structural diagrams of a process manufacturing process of a superjunction power device termination structure provided in Embodiment 5.

In the figure, 1 is the first conductive type semiconductor substrate, 2 is the first conductive type semiconductor epitaxial layer, 3 is the cut-off ring, 41 is the second conductive type semiconductor graded doping region 1, 42 is the second conductive type semiconductor graded doping area Impurity region two, 43 is the second conductive type semiconductor graded doping region three, 4n is the second conductive type semiconductor graded doping region n, 51 is the first conductive type semiconductor graded doping adjustment region one, 52 is the first conductive type The semiconductor graded doping adjustment area 2, 53 is the first conductive type semiconductor graded doping adjustment area 3, 5n is the first conductive type semiconductor graded doping adjustment area n, 6 is the second conductive type semiconductor column area, and 7 is the second The conductive type semiconductor body region, 8 is the first conductive type semiconductor heavily doped source region, 9 is the gate oxide layer, and 10 is the polysilicon gate.

Detailed ways

In order to make the content and principle of the present invention clearer, the technical solutions of the present invention are described in detail below with reference to the accompanying drawings and specific embodiments.

Example 1:

This embodiment provides a superjunction power device terminal structure as shown in FIG. 1 , including a first conductive type semiconductor substrate 1 and a first conductive type semiconductor epitaxial layer 2 located on the upper surface of the first conductive type semiconductor substrate 1; One end of the top layer of the first conductive type semiconductor epitaxial layer 2 has a heavily doped first conductive type semiconductor cut-off ring 3, which is characterized in that: the other end of the top layer of the first conductive type semiconductor epitaxial layer 2 is arranged sequentially from top to bottom There are a second conductive type semiconductor graded doping region one 41, a second conductive type semiconductor graded doping region 2 42, a second conductive type semiconductor graded doping region 3 43... a second conductive type semiconductor graded doping region 4n; n The extending depths of the second conductive type semiconductor graded doping regions 41 , 42 , 43 . The lateral distance decreases in sequence, and the n second conductive type semiconductor graded doping regions 41 , 42 , 43 . . . Decrease sequentially from top to bottom; by adjusting the doping distribution of the n second conductive type semiconductor graded doping regions 41, 42, 43...4n, when the reverse withstand voltage applied to the terminal structure reaches the breakdown voltage , the n second conductive type semiconductor graded doped regions 41 , 42 , 43 . . . 4n are completely depleted.

This paper takes the terminal structure of the N-channel superjunction power device as an example to further illustrate the principle in combination with Embodiment 1. Those skilled in the art can obtain the principle of the terminal structure of the N-channel superjunction power device according to the following disclosure.

The terminal structure of traditional superjunction power devices adopts the alternate arrangement of p-columns and n-columns to achieve the rated breakdown voltage. However, since the breakdown voltage is more sensitive to charge balance, the width, spacing and doping concentration of the p-columns in the termination region are limited. A slight deviation in the process will lead to charge imbalance, thereby increasing the electric field on the surface of the terminal structure, and the phenomenon that the terminal structure of the device is prematurely broken down and damaged. It is precisely because the breakdown voltage is sensitive to the charge balance that the traditional superjunction power device terminal structure has very high requirements on the technological level, and the reliability of the terminal structure is also limited due to the influence of the charge imbalance. To this end, the present invention provides n-layer P-type graded doping regions 41, 42, 43... Both are graded doping and the extension depth along the lateral direction of the device is graded, thereby forming a three-dimensional graded structure. The doping concentrations of the n-layer P-type graded doping regions 41, 42, 43...4n gradually decrease from left to right on the same horizontal line, and on the same vertical line, the n-layer P-type graded doping The doping concentrations of the regions 41, 42, 43...4n gradually decrease from top to bottom; and the extension depths of the n-layer P-type graded doping regions 41, 42, 43...4n along the lateral direction of the device gradually decrease from top to bottom Small. The concentration distribution diagram of the three-dimensional gradient structure of the present invention is shown in Figure 2, AA' represents the lateral direction (from the transition region to the terminal region), and BB' represents the vertical direction (from the silicon surface to the body). The direction close to the channel stop ring 3 reaches the lowest level, effectively reducing the electric field peak value at the edge of the junction; further, the depth of the P-type graded doping region from the body to the surface along the lateral direction of the device gradually increases to achieve the boundary of the surface depletion layer Widening to the side of the cut-off ring 3 is beneficial to alleviate the influence of the curvature effect of the junction edge on the breakdown voltage; from the longitudinal point of view, the doping concentration in the semiconductor body at the same vertical distance from the cut-off ring 3 is smaller than that of the semiconductor surface, which is conducive to the space charge in the body The region extends to the side of the graded doped region. When the reverse withstand voltage applied to the termination structure is close to the breakdown voltage, the n-layer P-type graded doping regions 41, 42, 43...4n will be completely depleted, forming a large depletion region to withstand more High reverse withstand voltage. Compared with the conventional superjunction device terminal structure in which p-pillars and n-pillars are alternately arranged, the superjunction power terminal with three-dimensional graded doping proposed in the present invention alleviates the influence of charge imbalance caused by process deviation on breakdown voltage. Therefore, the three-dimensional gradient terminal structure proposed by the present invention improves the sensitivity of the breakdown voltage of the terminal region to the charge imbalance and improves the terminal withstand voltage without affecting the electrical performance of the superjunction device.

Example 2:

The difference between the embodiment of the present invention and the embodiment 1 lies in that the n mutually contacting second conductivity type semiconductor graded doped regions 41 , 42 , 43 . . . 4n are replaced by n mutually isolated second conductivity type semiconductor graded doped regions The impurity regions 41 , 42 , 43 . . . 4n provide a termination structure with discontinuous graded doping regions as shown in FIG. 3 . In this embodiment, there is a first conductive type semiconductor epitaxial layer 2 between any two adjacent second conductive type semiconductor graded doping regions, and other structures are the same as those in Embodiment 1.

As in Embodiment 1, the doping concentrations of the n mutually isolated second conductive type semiconductor graded doping regions 41, 42, 43, . . . 4n gradually decrease from left to right on the same horizontal line. window to achieve its graded doping.

Example 3:

This embodiment provides a terminal structure with two ion implantations as shown in FIG. 4 , by introducing a plurality of first conductive type semiconductor graded doping regions 41 , 42 , 43 . . . 4n in contact with each other respectively The conductive type semiconductor graded doping adjustment regions 51 , 52 , 53 .

Each layer of the second conductive type semiconductor graded doped regions 41 , 42 , 43 . . . 4n is formed by epitaxial growth and ion implantation once, and then thermally diffused through annealing treatment, and this embodiment requires an additional primary ion The implantation step, whereby the first conductive type semiconductor impurities are doped into each of the second conductive type semiconductor graded doping regions, and the first conductive type semiconductor doping adjustment regions 51 , 52 , 53 . . . 5n are formed by thermal diffusion through annealing treatment . Compared with Embodiment 1, the doping concentration of the structure after two implants in this embodiment can be well adjusted, which increases the flexibility of device design without increasing the process complexity and cost.

Example 4:

The present invention can be used as a terminal structure of many kinds of superjunction power devices. This embodiment provides an application example in a planar gate superjunction device, as shown in FIG. 5 , which includes a first conductive type semiconductor substrate 1 and a The first conductive type semiconductor epitaxial layer 2 disposed on the first conductive type semiconductor substrate 1, the first conductive type semiconductor epitaxial layer 2 includes an active region (ie, a cell region) and a terminal region. The structure is the structure provided in Embodiment 1, and the active region includes: a first conductive type semiconductor substrate 1, a first conductive type semiconductor epitaxial layer 2, a second conductive type semiconductor pillar region 6, and a second conductive type semiconductor The configuration of the body region 7 , the first conductive type semiconductor heavily doped source region 8 , the gate oxide layer 9 and the polysilicon gate 10 is the prior art, which will not be repeated in the embodiment.

Example 5:

This embodiment provides a process manufacturing process for a terminal structure of a superjunction power device, and takes Embodiment 1 (taking the terminal structure of an N-channel superjunction device as an example) for description, and the specific process steps are as follows:

The first step: single crystal silicon substrate preparation and epitaxial layer growth:

As shown in FIG. 6 , an N-type heavily doped single crystal silicon substrate 1 is used, and an N-type epitaxial layer 2 with a certain thickness and doping concentration is grown by vapor phase epitaxy on the upper surface of the substrate.

Step 2: Ion Implantation:

As shown in FIG. 7, a mask is used on the surface of the N-type epitaxial layer 2, and P-type impurity ions are implanted into the left side of the top layer of the N-type epitaxial layer 2. The size of the mask window and the energy and dose of the ion implantation can be carried out as required. Adjustment;

The third step: epitaxial growth and ion implantation again:

As shown in Figure 8, repeat the steps of growing epitaxy and ion implanting P-type impurities in the above two steps. The size of the mask window and the energy and dose of ion implantation can be adjusted as needed. It is necessary to ensure that the P-type impurities formed in this step after annealing are The impurity region is laterally graded doping, and its doping concentration decreases sequentially from left to right, and its extension depth along the lateral direction of the device is larger than that of the P-type doped region formed in the second step, and the extension depth along the lateral direction of the device is the same position The P-type impurity doping concentration is higher than that of the P-type doping region formed in the second step;

Step 4: Multiple epitaxial growth and ion implantation:

As shown in Figures 9 to 12, the process of the third step is repeated several times. Each epitaxial growth is followed by ion implantation. The size of the mask window and the energy and dose of ion implantation can be adjusted as needed. Ensure that annealing is performed. The P-type doped region formed in the latter step is not only laterally graded doping, but also has a larger extension depth along the lateral direction of the device than the P-type doped region formed in the second step. The impurity doping concentration is higher than the P-type doping region formed in the second step, and finally multi-layer P-type graded doping regions 41, 42, 43...4n are formed;

Step 5: High temperature annealing:

As shown in Figure 13, the silicon wafer after multiple epitaxial growth and ion implantation is subjected to high temperature annealing to activate the impurities while making the discontinuous P-type region continuous and the concentration distribution more uniform. complex terminal structure;

Step 5: Form Channel Stop Ring 3:

As shown in FIG. 14 , a mask ion is used to implant low-dose and high-dose N-type impurities, and after rapid thermal annealing, a channel stop ring 3 is formed at the upper end of the N-type epitaxial layer 2 . This step may be formed with the N+ source contact region of the cell region.

The manufacturing process of the terminal structure of the super junction power device provided by the present invention is compatible with the process of the cell of the super junction device, the three-dimensional gradient doping structure in the terminal region can be formed together with the doping column region of the cell region, and the channel stop ring 3 may be formed with the cell source contact area. The manufacturing process of the present invention is compatible with the existing cell area manufacturing process, no additional process steps are required, and the process difficulty of terminal manufacturing is reduced.

The embodiments of the present invention have been described in detail above in conjunction with the accompanying drawings, but the present invention is not limited to the above-mentioned specific embodiments. The above-mentioned specific embodiments are only illustrative rather than restrictive. Under the inspiration of the present invention, many modifications can be made without departing from the spirit of the present invention and the protection scope of the claims, which all belong to the protection of the present invention.

Claims (7)

1. A terminal structure of a super junction power device comprises a first conduction type semiconductor substrate (1) and a first conduction type semiconductor epitaxial layer (2) located on the upper surface of the first conduction type semiconductor substrate (1); first conductivity type semiconductor stop ring (3) is provided with to first conductivity type semiconductor epitaxial layer (2) top layer one end, its characterized in that: the other end of the top layer of the first conductive type semiconductor epitaxial layer (2) is provided with a plurality of layers of second conductive type semiconductor gradient doped regions from top to bottom, the plurality of layers of second conductive type semiconductor gradient doped regions are sequentially decreased from top to bottom along the extension depth of the device in the transverse direction, the doping concentrations of the plurality of layers of second conductive type semiconductor gradient doped regions are sequentially decreased along with the decrease of the transverse distance from the first conductive type semiconductor stop ring (3), and the doping concentrations of the positions, at which the transverse distances between the plurality of layers of second conductive type semiconductor gradient doped regions and the first conductive type semiconductor stop ring (3) are the same, are sequentially decreased from top to bottom; the doping distribution of the multiple layers of second conductive type semiconductor gradient doping areas is adjusted, so that the multiple layers of second conductive type semiconductor gradient doping areas are completely exhausted when the reverse withstand voltage reaches the breakdown voltage, a first conductive type semiconductor gradient doping adjusting area is arranged inside each second conductive type semiconductor gradient doping area, and the doping concentration of the first conductive type semiconductor gradient doping adjusting area is smaller than that of the corresponding second conductive type semiconductor gradient doping area.

2. The termination structure of the super junction power device according to claim 1, wherein any two adjacent second conductivity type semiconductor graded doping regions are in contact with each other or are separated by a first conductivity type semiconductor epitaxial layer (2).

3. The termination structure of claim 1, wherein the first conductivity type semiconductor is an N-type semiconductor and the second conductivity type semiconductor is a P-type semiconductor.

4. The termination structure of claim 1, wherein the first conductivity type semiconductor is a P-type semiconductor and the second conductivity type semiconductor is an N-type semiconductor.

5. A method for preparing a super junction power device terminal structure is characterized by comprising the following steps:

selecting a first conductive type semiconductor substrate (1), and epitaxially growing a first conductive type semiconductor epitaxial layer (2) on the first conductive type semiconductor substrate (1); using a mask plate on a first conductive type semiconductor epitaxial layer (2) of a terminal region, wherein the mask plate comprises a plurality of windows, and injecting second conductive type semiconductor impurity ions into the first conductive type semiconductor epitaxial layer (2) through the mask plate windows to form a doped region; repeating the steps, reasonably adjusting the number and size of the windows of the mask plate, the ion implantation energy and dosage through multiple times of epitaxy and ion implantation, and forming a plurality of layers of second conductivity type semiconductor gradient doped regions on the top layer of the first conductivity type semiconductor epitaxial layer (2) from top to bottom through an annealing process; the extension depth of the multiple layers of second conductive type semiconductor gradient doped regions along the transverse direction of the device is sequentially reduced from top to bottom, the doping concentration of each layer of second conductive type semiconductor gradient doped region is gradually reduced along with the transverse extension of the second conductive type semiconductor gradient doped region, and the doping concentration of the second conductive type semiconductor gradient doped regions with the same transverse extension depth is sequentially reduced from the surface of the device to the inside of the device; and finally, forming a first conductive type semiconductor stopping ring (3) at the other end of the top layer of the first conductive type semiconductor epitaxial layer (2) by using a mask plate through ion implantation and annealing process, wherein a first conductive type semiconductor gradient doping adjusting region is arranged in each second conductive type semiconductor gradient doping region, and the doping concentration of the first conductive type semiconductor gradient doping adjusting region is smaller than that of the corresponding second conductive type semiconductor gradient doping region.

6. The method for manufacturing a termination structure of a super junction power device according to claim 5, wherein the first conductivity type semiconductor is an N-type semiconductor, and the second conductivity type semiconductor is a P-type semiconductor.

7. The method for manufacturing a termination structure of a super junction power device according to claim 5, wherein the first conductivity type semiconductor is a P-type semiconductor and the second conductivity type semiconductor is an N-type semiconductor.

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