CN108985424A - A kind of clutch state monitoring circuit and the electronic tag using the circuit - Google Patents

Abstract

The invention discloses a kind of clutch state monitoring circuit and using the electronic tag of clutch state monitoring circuit.The clutch state monitoring circuit includes: PMOS tube, NAND gate, the first phase inverter, level conversion unit and latch, and the level conversion unit includes the second phase inverter and third phase inverter again.Clutch state of the invention monitors the relatively existing lockup clutch state collecting circuit of circuit, can be used and realizes that circuit structure is simple, and power consumption is lower, thus can integrate inside electronic label chip with the integrated circuit device of electronic label chip same process.The electronic tag of clutch state monitoring circuit is integrated with as container in logistic industry, the Internet of Things monitoring node of safety box circulation, can timely monitoring containers, safety box clutch state, ensure that the safety that container, safety box circulate.

Description

A kind of clutch state monitoring circuit and the electronic tag using the circuit

The invention belongs to electronic circuit technology field, in particular to a kind of clutch state monitors circuit and using the circuit Electronic tag.

Radio frequency identification (RFID, Radio Frequency Identification) technology is remote using radio frequency method Communication with reach the identification of article, tracking, positioning and management the purpose of.Radio Frequency Identification Technology is in industrial automation, commercially certainly Dynamicization, communications and transportation control management, the various fields such as anti-fake or even military use are with a wide range of applications, have drawn at present Extensive concern is played.

It is widely used using the electronic tag and reader of Radio Frequency Identification Technology production, especially as Internet of Things The electronic tag of node, can effectively store the various information of accompanying article and by the communications with reader this A little information.In the logistic industries such as container transportation and management, safety box, it is desirable to by adhering to electronics on container The behavior of container or safety box is opened in the clutch of mode effective monitoring (opening and closing) status information of label, monitoring.

The applicant proposes two kinds of lock clutch state acquisition electricity in publication number CN101915025A and CN101916353A Road, in electronic tag, can achieve the function of monitoring clutch state, but both Acquisition Circuits used it is more Discrete component, and have bipolar transistor and DC-DC voltage conversion chip in Acquisition Circuit, and electronic label chip is complete Realize that the two manufacturing process is different, so that Acquisition Circuit is unfavorable for being collected with electronic tag using cmos device in portion At, and power consumption is excessive, therefore the node for being not suitable for being combined as Internet of Things with electronic tag uses.

It is low the purpose of the present invention is to solve the integrated level of existing lockup clutch state collecting circuit and power consumption is excessive The shortcomings that, propose a kind of clutch state monitoring circuit.

The technical scheme is that a kind of clutch state for electronic tag monitors circuit, comprising: PMOS tube, with NOT gate, the first phase inverter, level conversion unit and latch, wherein the first input end of the NAND gate, PMOS pipe Source electrode and the input terminal of the latch link together, the clutch state signal as clutch state monitoring circuit it is defeated Enter end；The body end of the PMOS tube is connected to external power-supply battery；The second input terminal and the first phase inverter of the NAND gate Output end connection；The output end of the NAND gate and the enable end of latch connect；The positive output end of the latch with The grid of PMOS tube connects；The drain electrode of the PMOS tube exports supply voltage to the electronic tag；The level conversion unit It is used to be input to the state of the digital baseband processor of the electronic tag for being converted to the drain voltage of the PMOS tube Signal；The input terminal of first phase inverter inputs the voltage control signal of the digital baseband processor of the electronic tag.

As a preferable scheme, the level conversion unit includes the second phase inverter and third phase inverter, and described the The input terminal of two phase inverters is connected as the input terminal of the level conversion unit with the drain electrode of the PMOS tube, and described second The output end of phase inverter is connected with the input terminal of the third phase inverter；The output end of the third phase inverter is as the electricity Digital baseband processor output status signal of the output end of flat converting unit to electronic tag.

It is another object of the present invention to propose a kind of use to solve the difficulty that electronic tag monitors clutch state The electronic tag of clutch state monitoring circuit.

To achieve the goals above, a kind of electronic tag using clutch state monitoring circuit, the electronics mark are provided Label include antenna, rf analog front-end and digital baseband processor, and the rf analog front-end includes reference voltage-stabilizing circuit, institute Stating digital baseband processor includes state control machine module, which is characterized in that the electronic tag further includes clutch state monitoring The state control machine module connection of circuit, the clutch state monitoring circuit and digital baseband processor simultaneously controls machine to state Module output status signal, while the voltage control signal of reception state control machine module input, the clutch state monitoring electricity The connection of the reference voltage-stabilizing circuit of road and rf analog front-end simultaneously provides supply voltage to reference voltage-stabilizing circuit.

Beneficial effects of the present invention: the relatively existing lock clutch state acquisition electricity of clutch state monitoring circuit of the invention Road can be used and realize that circuit structure is simple, and power consumption is lower with the integrated circuit device of electronic label chip same process, Thus it can integrate inside electronic label chip.The electronic tag of clutch state monitoring circuit is integrated with as logistic industry Middle container, safety box circulation Internet of Things monitor node, can timely monitoring containers, safety box clutch state, guarantee Container, safety box circulation safety.It has been taken into account using the electronic tag of clutch state monitoring circuit general in radiofrequency field The function of logical passive ultrahigh frequency electronic tag, and no matter it is extraneous whether there is or not radiofrequency fields can complete the record for clutch state, The consumption and volume in kind that power consumption can also effectively be reduced, reduce the dependence for external power supply, enhance for each The practicability of kind particular application.

Fig. 1 is clutch state monitor circuit structure schematic diagram of the present invention.

Fig. 2 is the Electronic Tag Structure schematic diagram using clutch state monitoring circuit of the invention.

Description of symbols: clutch signaling switch S1, the first phase inverter G1, the second phase inverter G2, third phase inverter G3, PMOS tube T1, power-supply battery B1, latch D1, NAND gate C1, decoder module 101, cyclic check module 102, the pre- place of input Manage module 103, state control machine module 104, output preprocessing module 105, coder module 106, memory access control mould Block 107, pseudorandom number generator module 108, collision counter module 109, timer conter module 110, clock generation module 111, generation module 112, MTP memory 113, rectification circuit 201, reference voltage-stabilizing circuit 202, modulation circuit 203, solution are resetted Adjust circuit 204, reset circuit 205, clock circuit 206.

The present invention is described further in the following with reference to the drawings and specific embodiments.

As shown in Figure 1, the circuit structure of clutch state monitoring circuit is as follows: including the first phase inverter G1, the second phase inverter G2, third phase inverter G3, PMOS tube T1, latch D1, NAND gate C1.Here clutch signaling switch S1 and power-supply battery B1 makees The appendage of circuit external is monitored for clutch state.

In conjunction with Fig. 1, the connection type of each device and port is as follows:

The first input end c of the NAND gate C1, the PMOS tube T1 source electrode connected with the input terminal D of the latch D1 Together, the input terminal as the clutch state signal of clutch state monitoring circuit；The body end of the PMOS tube T1 is connected to outer The power-supply battery B1 in portion is connected with the anode of external power-supply battery B1；The second input terminal d of the NAND gate C1 and The output end of one phase inverter G1 connects；The enable end EN connection of the output end and latch of the NAND gate C1；The latch Positive output end Q connect with the grid of PMOS tube T1；The drain electrode of the PMOS tube T1 exports power supply electricity to the electronic tag Pressure；The level conversion unit is used to be input to the electronic tag for being converted to the drain voltage of the PMOS tube T1 Digital baseband processor status signal switch_on；The input terminal of first phase inverter G1 inputs the number of the electronic tag The voltage control signal power_control of word baseband processor.

In the present embodiment, clutch state signal is characterized by clutch signaling switch S1, and external power-supply battery B1 is just Pole is connected with the first end a of clutch signaling switch S1, cathode ground connection, the second end b and clutch shape of clutch signaling switch S1 The input terminal that state monitors the clutch state signal of circuit is connected.

As a preferable scheme of the present embodiment, level conversion unit includes the second phase inverter G2 and third phase inverter The input terminal of G3, the second phase inverter G2 are as the input terminal of the level conversion unit and the drain electrode of the PMOS tube T1 It is connected, the output end of the second phase inverter G2 is connected with the input terminal of the third phase inverter G3；The third phase inverter The output end of G3 as the level conversion unit digital baseband processor output status signal from output end to electronic tag switch_on。

Here, power-supply battery B1 can use the button cell of 3V.

In conjunction with Fig. 1, the clutch state monitoring circuit course of work is as follows, for ease of description, with the clutch state of electronic lock For.

When lock is closed, switch S1 is disconnected, and power-supply battery B1 does not power to label chip, status signal switch_on and electricity Voltage-controlled signal power_control processed is low level.

Lock open when, clutch signaling switch S1 closure, the end c of NAND gate C1, the end D of latch D1, PMOS tube T1 source Pole connect high voltage, at this time voltage control signal power_control be low level, after the first phase inverter G1, to it is non- The end the d input high level of door C1, so that the enable end EN of latch D1 is low level, latch D1 output end Q is low level, PMOS tube T1 conducting, power-supply battery B1 are opened to electronic label with power, and third phase inverter G3 exports the status signal of high level Switch_on, digital baseband processor dual lock behavior count.

When lockset keeps open state, the digital baseband processor of electronic tag is by voltage control signal Power_control draws high as high level, at this point, NAND gate C1 exports high level, the end Q of latch D1 exports high level, PMOS tube T1 cut-off, power-supply battery B1 stop to electronic label with power, status signal switch_on and voltage control signal Power_control is changed into low level, and the enable end end EN of latch D1 is 0, and the positive output end Q of latch D1 is protected High level is held, PMOS tube T1 keeps off state, and power-supply battery B1 is not to electronic label with power.

When lock is again switched off, clutch signaling switch S1 is disconnected, and power-supply battery B1 is not to electronic label with power.

Using clutch state monitoring circuit electronic tag structure as shown in Fig. 2, include antenna, rf analog front-end and Digital baseband processor, the rf analog front-end include reference voltage-stabilizing circuit, and the digital baseband processor includes state control Machine module processed, the electronic tag further include clutch state monitoring circuit, and the clutch state monitors at circuit and digital baseband It manages the state control machine module connection of device and controls 104 output status signal switch_on of machine module to state, receive simultaneously State controls the voltage control signal power_control that machine module 104 inputs, the clutch state monitoring circuit and radio frequency The reference voltage-stabilizing circuit 202 of AFE(analog front end) connects and provides supply voltage to reference voltage-stabilizing circuit 202.

The rf analog front-end specific structure of above-mentioned electronic tag includes rectification circuit 201, reference voltage-stabilizing circuit 202, adjusts Circuit 203 processed, demodulator circuit 204, reset circuit 205, clock circuit 206, the antenna pass through ESD (antistatic protection electricity Road) interface PAD and rectification circuit 201, modulation circuit 203 and demodulator circuit 204 be directly connected to, rectification circuit 201 is by day The radiofrequency signal that line receives is converted into that DC power supply is divided into rectification low-voltage and rectification high voltage is supplied to benchmark pressure stabilizing electricity Road 202, reference voltage-stabilizing circuit 202 to power supply carry out pressure stabilizing, for electronic tag digital baseband part provide low supply voltage 1V with High power supply voltage 1.8V provides 1.8V operating voltage for modulation circuit 203, is demodulator circuit 204, clock circuit 206 and reset Circuit 205 provides 1V operating voltage, and reference voltage-stabilizing circuit 202 is simultaneously also with clutch state monitoring circuit output to electronics mark The supply voltage of label is connected, when lockset open when, if rectification circuit 201 not to reference voltage-stabilizing circuit 202 power when if by from Conjunction state monitors circuit and powers to reference voltage-stabilizing circuit 202；Demodulator circuit 204 recovers the number of radio frequency identification from radiofrequency signal Adjusting data is solved needed for word baseband processor；Modulation circuit 203 is using the method for backscattered modulation to electronic tag digital baseband The modulation data of processor output is modulated, and the data for realizing electronic tag to reader are transmitted；Clock circuit 206 is number Word baseband processor provides stable clock signal of system, and reset circuit 205 provides required reset for digital baseband processor Signal.

The baseband processor specific structure of above-mentioned electronic tag includes that digital baseband part includes state control machine module 104, decoder module 101, coder module 106, cyclic check module 102, memory access control module 107, input are pre- Processing module 103, output preprocessing module 105, pseudorandom number generator module 108, collision counter module 109, timing ga(u)ge Number device module 110, resets generation module 112 and MTP memory 113 at clock generation module 111.The decoder module 101 Preprocessing module 103 is inputted respectively and cyclic check module 102 connects；The cyclic check module 103 and output pretreatment mould Block 105, coder module 106 connect；The memory access control module 107 is connect with output preprocessing module 105；Institute After stating the solution adjusting data of the offer of demodulator circuit 204 that decoder module 101 receives rf analog front-end, through decoder module 101 Decoding exports decoding data, and decoding data divides two-way, arrives input preprocessing module 103 all the way, arrives cyclic check all the way Module 102；The input preprocessing module 103 is completed to pre-process the input of decoding data, generate pending data and to Processing order is output to state control machine module 104；Cyclic check module 103 completes the circulation school to decoding data simultaneously After testing, generates cyclic check result and be output to state control machine module 104；State controls machine module 104 and detects clutch signal It is that switch_on and cyclic check module 102 input as a result, and according to executing clutch record the case where inspection or receive wait locate Data and order to be processed are managed, if clutch signal switch_on is that (high level value is 1V, low level value to high level herein It for 0V), indicates that clutch state is to open, then executes unlocking record, after at state control 104 analysis of machine module, generate address Signal is written and read the related memory cell of storage unlocking record to memory access control module 107, and is holding The voltage control signal power_control that will enter into clutch state monitoring circuit after row draws high as high level, if holding Row data and command process generate five tunnels control signal and arrive puppet respectively then after state control machine module 104 analysis and processing Randomizer module 108, collision counter module 109, timer conter module 110, clock generation module 111 and multiple Position generation module 112 generates address signal to memory access control module 107, and exports pseudo random number to be sent to output Preprocessing module 105；Memory access control module 107 is accessed according to address signal by MTP memory input output interface MTP memory 113 simultaneously exports memory data to be sent to output preprocessing module；The output preprocessing module 105 connects Pseudo random number to be sent and memory data to be sent are received, transmits data to cyclic check through output preprocessing module generation is pending Module 102；Cyclic check module 102 is completed to encode the cyclic code of data to be sent, generates data to be encoded and is output to volume Code device module 106；The coder module 106 completes the coding of data to be encoded, generates data to be modulated and is output to radio frequency mould The modulation circuit 203 of quasi- front end；The system that the clock generation module 111 inputs the clock circuit 206 of rf analog front-end Clock signal carries out clock signal needed for frequency dividing generates modules, resets generation module 112 and answers rf analog front-end The reset signal that position circuit 205 inputs synchronizes processing and generates the letter of reset needed for modules in digital baseband processor Number.Digital baseband processor provides 1.8V high level and the low level work of 1V by the reference voltage-stabilizing circuit 202 of rf analog front-end Make supply voltage.

The course of work of the electronic tag using clutch state monitoring circuit is described in detail below, for the ease of saying It is bright, here, by taking the clutch state of electronic lock as an example.

In conjunction with Fig. 2, know when the electronic tag (hereinafter referred to as electronic tag) using clutch state monitoring circuit is in radio frequency When in other field, the course of work is as follows:

Step (a): electronic tag enters radio frequency identification field, and the rf analog front-end of electronic tag works on power, benchmark pressure stabilizing mould Block 202 provides low level operating voltage and high level operating voltage (the present embodiment low level and height electricity for digital baseband processor Divide other value 1V, 1.8V equally), it resets generation module 112 and state control machine module 104 is resetted, demodulator circuit 204 is opened Begin to demodulate the radiofrequency signal that antenna receives, clutch state monitors the clutch state of circuit acquisition lockset；

Step (b): state controls machine module 104 and detects clutch state monitoring circuit, when status signal swith_on is high level When (herein high level value be 1V, low level value be 0V), i.e., expression lockset clutch state be open, be transferred to step (c)；Otherwise clutch state is to close, and is transferred to step (d)；

Step (c): state controls machine control module 104 and generates address signal to memory access control module 107, to storage The related memory cell recorded of unlocking is written and read, more new recorded data, and will enter into clutch state monitoring circuit Voltage control signal power_control draws high as high level, if power supply power supply terminates to be transferred to step (m) and is otherwise transferred to step (d)；

Step (d) state controls machine module 104 to decoder module 101, cyclic check module 102, and coder module 106 is defeated Enter preprocessing module 103, exports preprocessing module 105, memory access control module 107, pseudorandom number generator module 108, collision counter module 109, timer conter module 110, clock generation module 111 resetted, and reads MTP storage Data in device 113 calculate the cyclic check CRC result of data；

Step (e) state controls machine module 104 and detects clutch state monitoring circuit, when status signal swith on is high level When, i.e. the clutch state of expression lockset is to open, and is transferred to step (c), is otherwise transferred to step (f)；

Step (f): state controls machine module 104 and opens decoder module 101, is then powered off state control machine module 104 itself Clock, state control machine module 104 in a dormant state；

Step (g): decoder module 101 starts to detect the solution adjusting data inputted from the demodulator circuit 204 of rf analog front-end, When detect available frame count according to when, 101 wake-up states of decoder module control machine module 104；

Step (h): state controls machine module 104 and opens input preprocessing module 103 and cyclic check module 102, decoder mould The reception of block 101 has solved adjusting data, decodes through decoder module, exports decoding data, decoding data divides two-way, arrives all the way Preprocessing module 103 is inputted, arrives cyclic check module 102 all the way；Preprocessing module 103 is inputted to complete to decoding data Input pretreatment, generates pending data and order to be processed is output to state control machine module 104；Cyclic check mould simultaneously Block 102 completes the cyclic check to decoding data, generates cyclic check result and is output to state control machine module 104；

Step (i): when state control machine module 104 detects that cyclic check module 102 is complete to the cyclic check of decoding data Cheng Shi, state control machine module 104 and turn off decoder module 101, input preprocessing module 103 and cyclic check module 102, The machine module 104 of state control simultaneously receives pending data and order to be processed, after state control machine module analysis and processing Control signal is generated, and according to the unlatching of control signal and determine pseudorandom number generator module 108, collision counter module 109 Hour counter module carries out operation 110, and pseudorandom number generator module 108, collision counter mould are closed after the completion of operation Block 109 and timer conter module 110；

Step (j): state controls machine module 104 and opens output preprocessing module 105 and memory access control module 107, shape State controls 104 output address signal of machine module to memory access control module 107, and exports pseudo random number to be sent to defeated Preprocessing module 105 out；Memory access control module is visited according to address signal by 113 input/output port of MTP memory It asks MTP memory, exports memory data to be sent to output preprocessing module 105；

Step (k): state controls machine module 104 and opens cyclic check code module 102 and coder module 106, output pretreatment Module 105 receives pseudo random number to be sent and memory data to be sent, is exported preprocessing module 105 and generates number to be sent According to arrive cyclic check module 102；Cyclic check module 102 is completed to encode the cyclic code of data to be sent, and cyclic code is compiled Data to be encoded after code are output to coder module 106；Coder module 106 is completed to be encoded after cyclic code coding The coding of data, export data to be modulated to rf analog front-end modulation circuit；Rf analog front-end modulation circuit is to data After being modulated, the communication between reader is realized by antenna.

Step (l): after the completion of the coding of coder module 106, state controls machine module 104 and closes output preprocessing module 105, cyclic check module 102, memory access control module 107 and coder module 106, state control machine module 104 and examine Look into power supply whether power down, power down is transferred to step (m), is otherwise transferred to step (e)；

Step (m): power supply power-fail, all module from service.

When using clutch state monitoring circuit electronic tag be in radio frequency identification it is over-the-counter when, the course of work is as follows:

Step (A): when lockset is opened, clutch state monitors circuit to the reference voltage-stabilizing circuit of electronic tag rf analog front-end 202 output direct current supply voltages, rf analog front-end work on power, and the reset generation module 112 of baseband processor is to state control Machine module 104 processed is resetted, the clutch state of clutch state monitor circuit monitors lockset；

Step (B): state controls machine module 104 and detects clutch state monitoring circuit, when status signal swith on is high level When (herein high level value be 1V, low level value be 0V), i.e., expression lockset clutch state be open, be transferred to step (C)；Otherwise clutch state is to close, and is transferred to step (D)；

Step (C): state controls machine control module 104 and generates address signal to memory access control module 107, to storage The related memory cell recorded of unlocking is written and read, more new recorded data, and will enter into clutch state monitoring circuit Voltage control signal power_control draws high as high level；

Step (D): clutch state monitors the power supply power-fail of circuit, and clutch state monitoring circuit stops to rf analog front-end Reference voltage-stabilizing circuit 202 is powered, and electronic tag stops working.

To sum up, it since clutch state of the invention monitors the relatively existing lockup clutch state collecting circuit of circuit, can be used Realize that circuit structure is simple, and power consumption is lower with the integrated circuit device of electronic label chip same process, thus can be with It is integrated in inside electronic label chip.Be integrated with the electronic tag of clutch state monitoring circuit as container in logistic industry, The Internet of Things of safety box circulation monitors node, can timely monitoring containers, safety box clutch state, ensure that container, The safety of safety box circulation；It is super that ordinary passive in radiofrequency field has been taken into account using the electronic tag of clutch state monitoring circuit simultaneously The function of ultra high frequency IC tag, while no matter the external world can complete the record for clutch state number whether there is or not radiofrequency field.Due to The present invention can also effectively reduce the consumption and volume in kind of power consumption, reduce using passive ultrahigh frequency electronic tag Dependence for external power supply, enhances the practicability for various particular applications.

Those of ordinary skill in the art will understand that the embodiments described herein, which is to help reader, understands this hair Bright principle, it should be understood that protection scope of the present invention is not limited to such specific embodiments and embodiments.This field Those of ordinary skill disclosed the technical disclosures can make according to the present invention and various not depart from the other each of essence of the invention The specific variations and combinations of kind, these variations and combinations are still within the scope of the present invention.

Claims (3)

1. a kind of clutch state for electronic tag monitors circuit characterized by comprising PMOS tube, NAND gate, first Phase inverter, level conversion unit and latch, wherein the first input end of the NAND gate, the source electrode of the PMOS tube and institute The input terminal for stating latch links together, the input terminal of the clutch state signal as clutch state monitoring circuit；It is described The body end of PMOS tube is connected to external power-supply battery；Second input terminal of the NAND gate and the output end of the first phase inverter Connection；The output end of the NAND gate and the enable end of latch connect；The positive output end of the latch and PMOS pipe Grid connection；The drain electrode of the PMOS tube exports supply voltage to the electronic tag；The level conversion unit is used for institute The drain voltage for stating PMOS tube is converted to the status signal of the digital baseband processor for being input to the electronic tag；Institute State the first phase inverter input terminal input the electronic tag digital baseband processor voltage control signal.

2. clutch state according to claim 1 monitors circuit, which is characterized in that the level conversion unit includes Second phase inverter and third phase inverter, input terminal and institute of the input terminal of second phase inverter as the level conversion unit The drain electrode for stating PMOS tube is connected, and the output end of second phase inverter is connected with the input terminal of the third phase inverter；Described The output end of three phase inverters exports shape to the digital baseband processor of electronic tag as the output end of the level conversion unit State signal.

3. a kind of electronic tag using clutch state of any of claims 1 or 2 monitoring circuit, the electronic tag include Antenna, rf analog front-end and digital baseband processor, the rf analog front-end include reference voltage-stabilizing circuit, the number Baseband processor includes state control machine module, which is characterized in that and the electronic tag further includes clutch state monitoring circuit, The state control machine module connection of the clutch state monitoring circuit and digital baseband processor is simultaneously defeated to state control machine module Do well signal, while the voltage control signal of reception state control machine module input, the clutch state monitor circuit and penetrate The reference voltage-stabilizing circuit of frequency AFE(analog front end) connects and provides supply voltage to reference voltage-stabilizing circuit.