CN101916353B - Lock clutch state acquisition circuit and radio frequency identification device using same - Google Patents
Lock clutch state acquisition circuit and radio frequency identification device using same Download PDFInfo
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- CN101916353B CN101916353B CN 201010246844 CN201010246844A CN101916353B CN 101916353 B CN101916353 B CN 101916353B CN 201010246844 CN201010246844 CN 201010246844 CN 201010246844 A CN201010246844 A CN 201010246844A CN 101916353 B CN101916353 B CN 101916353B
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Abstract
The invention relates to a lock clutch state acquisition circuit and a radio frequency identification device using the same. The lock clutch state acquisition circuit comprises a lock clutch signal switch (S1), a first resistor (R1), a second resistor (R2), a third resistor (R3), a fourth resistor (R4), a PMOS tube (T1), a triode (T2), a fifth NMOS tube (T3), a power supply battery (B1), a trigger (D1) and a direct current-direct current (DC-DC) voltage conversion chip. The invention has the advantages that: the lock clutch state acquisition circuit has the advantages of low power consumption and interference resistance and can be integrated into an electronic tag, so the lock clutch state acquisition circuit can easily combined with the electronic tag to be used as a monitor node for Internet of things of flowing containers and safety boxes in the logistics industry, can timely monitor the lock clutch state of the containers and safety boxes, and ensures the flowing safety of the containers and safety boxes.
Description
Technical field
The invention belongs to the electronic circuit technology field, relate in particular to the lockup clutch state collecting circuit of lockset and adopt the rfid device of this circuit.
Background technology
Radio-frequency (RF) identification (RFID, Radio Frequency Identification) technology is to utilize the RF-wise purposes such as identification, tracking, location and management of communication to reach article at a distance.REID is in industrial automation, business automation, and the communications and transportation control and management, the various fields such as false proof, even military use is with a wide range of applications, and has caused at present widely to pay close attention to.
Utilize electronic tag and the reader that REID is made to be used widely, particularly as the electronic tag of the node of Internet of Things, can effectively store accompanying article various information and by with these information of communications of reader.In the logistic industries such as container transportation and management, proof box, people wish and can effectively monitor lock clutch (opening and closing) status information, the behavior of monitoring unlatching container or proof box by the mode of adhering to electronic tag on container.
The function that most electronic lock of the prior art only possesses is antitheft, report to the police, only have the standby lock clutch state acquisition function of small part electric lockset, and these locksets with lockup clutch state collecting circuit adopt generally magnetic device to coordinate the method realization of relay to the collection of lock clutch state.But, the lockup clutch state collecting circuit of this lockset has following shortcoming: 1. because relay consumption power consumption is large, if use external power source to have the large shortcoming of small product size, if use battery, exist battery power consumption too fast, product continues short shortcoming service time.2. owing to having adopted magnetic device, lockset easily is subject to the interference of external environment under the environment of strong magnetic and forceful electric power, thus the clutch state of wrong judgement lock.
Because there is above-mentioned shortcoming in existing lockset with lockup clutch state collecting circuit, the node that therefore is not suitable for being combined with electronic tag as Internet of Things uses.
Summary of the invention
The objective of the invention is to have the excessive shortcoming with being subject to outside electromagnetic interference of power consumption in order to overcome existing lockset with lock clutch state acquisition function, proposed a kind of lockup clutch state collecting circuit.
to achieve these goals, a kind of lockup clutch state collecting circuit is provided, comprise lock clutch signaling switch (S1), the first resistance (R1), the second resistance (R2), the 3rd resistance (R2), the 4th resistance (R4), PMOS manages (T1), triode (T2), the 5th NMOS pipe (T3), power-supply battery (B1), trigger (D1) and DC-to-dc (DC-DC) voltage transitions chip, described the first resistance (R1) is connected with the first end (a) of lock clutch signaling switch (S1), the second resistance (R2) is connected with second end (b) of lock clutch signaling switch (S1), described triode (T2) base stage is connected (T1) drain electrode and is connected by the 3rd resistance (R3) with PMOS, the source electrode of described PMOS pipe (T1) is connected the 4th resistance (R4) and connects with grid, described PMOS pipe (T1) source electrode is connected with power-supply battery (B1) is anodal, described PMOS pipe (T1) source electrode connects by the first resistance (R1) with the first end of being connected clutch signaling switch (S1) (a), second end (b) of described lock clutch signaling switch (S1) is connected to ground by the second resistance (R2), described triode (T2) collector is connected (T1) grid and is connected with PMOS, described triode (T2) base stage is managed (T3) drain electrode with the 5th NMOS and is connected, described the 5th NMOS pipe (T3) source electrode is connected to ground, described triode (T2) base stage is connected to ground by the second resistance (R2), described power-supply battery (B1) negative pole is connected to ground, described the 5th NMOS pipe (T3) grid is connected with the data output end (Q) of trigger (D1), the data input pin (D) of described trigger (D1) is connected with lock clutch signaling switch (S1), the voltage control signal (power_control) of the digital baseband processor of input end of clock (CP) the input radio frequency identification electronic tag of described trigger (D1), the power end (VDD) of described trigger (D1) is connected with second end (b) of lock clutch signaling switch (S1), described DC-to-dc (DC-DC) voltage transitions chip voltage input end (I) is connected to PMOS pipe (T1) drain electrode, described DC-to-dc (DC-DC) voltage transitions chip ground connection input end (J) is connected to ground, described DC-to-dc (DC-DC) voltage transitions chip to rf analog front-end output low level operating voltage and the high level operating voltage of radio frequency recognizing electronic label, is locked clutch signal (key_opened) to the digital baseband processor output first lock clutch signal (switch_on) and second of radio frequency recognizing electronic label respectively.
Another object of the present invention is in order to solve radio frequency recognizing electronic label to the difficulty of lock clutch state monitoring, proposed a kind of rfid device that adopts lockup clutch state collecting circuit, can be easy to radio frequency recognizing electronic label is arrived in the lock clutch state information acquisition of lockset.
to achieve these goals, a kind of rfid device that adopts lockup clutch state collecting circuit is provided, described device comprises radio frequency recognizing electronic label, described radio frequency recognizing electronic label comprises antenna, rf analog front-end and digital baseband processor, described rf analog front-end comprises reference voltage-stabilizing circuit, described digital baseband processor comprises state controller module, it is characterized in that, described device also comprises lockup clutch state collecting circuit, described lockup clutch state collecting circuit is connected with the state controller module of digital baseband processor and exports the first lock clutch state signal and the second lock clutch state signal to state controller module, the voltage control signal (power_control) of while accepting state controller module input, described lockup clutch state collecting circuit is connected with the reference voltage-stabilizing circuit of rf analog front-end and provides high level operating voltage and low level operating voltage to reference voltage-stabilizing circuit.
Beneficial effect of the present invention: the relatively existing lockup clutch state collecting circuit of lockup clutch state collecting circuit of the present invention has low-power consumption and jamproof advantage, and the various electrical connection ports that are connected with radio frequency recognizing electronic label are provided, therefore lockup clutch state collecting circuit can be relatively easy to electronic tag in conjunction with the Internet of Things monitor node as container, proof box circulation in logistic industry, the lock clutch state of monitoring containers, proof box, guaranteed the security that container, proof box circulate timely.Adopt simultaneously the rfid device of lockup clutch state collecting circuit to take into account the function of ordinary passive ultrahigh frequency electronic tag in the radio-frequency field, simultaneously no matter the extraneous radio-frequency field that has or not all can be completed record for unlocking times.What adopt due to the present invention is passive ultrahigh frequency electronic tag, can also effectively reduce consumption and the volume in kind of power consumption, has reduced the dependence for external power source, has strengthened the practicality for various particular application.
Description of drawings
Fig. 1 is that the present invention locks clutch Acquisition Circuit schematic diagram.
Fig. 2 is the rfid device circuit theory diagrams that adopt lock clutch Acquisition Circuit of the present invention.
description of reference numerals: lock clutch signaling switch S1, the first resistance R 1, the second resistance R 2, the 3rd resistance R 2, the 4th resistance R 4, PMOS manages T1, triode T2, the 5th NMOS pipe T3, power-supply battery B1, trigger D1, decoder module 101, cyclic check module 102, input pretreatment module 103, state controller module 104, output pretreatment module 105, coder module 106, memory access control module 107, pseudorandom number generator module 108, collision counter module 109, timer conter module 110, clock generating module 111, reset generation module 112, MTP storer 113.Rectification circuit 201, reference voltage-stabilizing circuit 202, modulation circuit 203, demodulator circuit 204, reset circuit 205, clock circuit 206.
Embodiment
The present invention is described further below in conjunction with accompanying drawing and concrete specific embodiment:
As shown in Figure 1, a kind of lockup clutch state collecting circuit, comprise lock clutch signaling switch S1, the first resistance R 1, the second resistance R 2, the 3rd resistance R 2, the 4th resistance R 4, PMOS pipe T1, triode T2, the 5th NMOS pipe T3, power-supply battery B1, trigger D1 and DC-to-dc (DC-DC) voltage transitions chip, described the first resistance R 1 is connected with the first end a of lock clutch signaling switch S1, and the second resistance R 2 is connected with the second end b of lock clutch signaling switch S1; Described triode T2 base stage is connected the T1 drain electrode and is connected by the 3rd resistance R 3 with PMOS; The source electrode of described PMOS pipe T1 is connected the 4th resistance R 4 and connects with grid; Described PMOS pipe T1 source electrode is connected with power-supply battery B1 is anodal; Described PMOS pipe T1 source electrode connects by the first resistance R 1 with the first end a that is connected clutch signaling switch S1; The second end b of described lock clutch signaling switch S1 is connected to ground by the second resistance R 2; Described triode T2 collector is connected the T1 grid and is connected with PMOS; Described triode T2 base stage connects with the 5th NMOS pipe T3 drain electrode; Described the 5th NMOS pipe T3 source electrode is connected to ground; Described triode T2 base stage is connected to ground by the second resistance R 2; Described power-supply battery B1 negative pole is connected to ground; Described the 5th NMOS pipe T3 grid is connected with the data output end Q of trigger D1; The data input pin D of described trigger D1 is connected with lock clutch signaling switch S1; The voltage control signal (power_control) of the digital baseband processor of the input end of clock CP input radio frequency identification electronic tag of described trigger D1; The power end VDD of described trigger D1 is connected with the second end b of lock clutch signaling switch S1; Described DC-to-dc (DC-DC) voltage transitions chip voltage input end I is connected to PMOS pipe T1 drain electrode; Described DC-to-dc (DC-DC) voltage transitions chip ground connection input end J is connected to ground; (low level of the present embodiment and high level are got respectively 1V and 1.8V to described DC-to-dc (DC-DC) voltage transitions chip to the rf analog front-end output low level of radio frequency recognizing electronic label and high level respectively, those of ordinary skill in the art also can arrange according to the actual electric property of components and parts high level and the low level of other numerical value), to digital baseband processor output the first lock clutch signal (switch_on) and the second lock clutch signal (key_opened) of radio frequency recognizing electronic label; Described battery B1 negative pole is connected to ground.
as shown in Figure 1, the below introduces the course of work of lockup clutch state collecting circuit in detail: when lockset is opened, the on off state of lockset can pass through approach switch, the modes such as mechanical switch pass to lock clutch signaling switch S1 and make its closure, the power end VDD of trigger D1 and data input pin D connect high voltage, trigger D1 starts working, triode T2 base stage is carried out dividing potential drop by the first resistance R 1 and the second resistance R 2, the conducting of triode T2 collector and emitter, PMOS pipe T1 grid is conducting to ground by triode T2, PMOS pipe T1 pipe source electrode and drain electrode conducting, power-supply battery B1 manages T1 by PMOS DC-to-dc (DC-DC) voltage transitions chip is powered, simultaneously, PMOS pipe T1 source voltage feeds back to triode T2 base stage through the 3rd resistance R 2.DC-to-dc (DC-DC) voltage transitions chip carries out the direct current conversion to the voltage by voltage input end I input, (the low level value is 1V herein to the rf analog front-end output low level operating voltage of radio frequency recognizing electronic label and high level operating voltage, the high level value is 1.8V), simultaneously to the radio frequency baseband processor output first lock clutch signal (switch_on) of radio frequency recognizing electronic label and the lock clutch state of the second current lockset of lock clutch signal (key_opened) indication, when the clutch signal is high level, (the high level value is 1V herein when the first lock clutch signal and second is locked, the low level value is 0V), represent that namely the lock clutch state of lockset is for opening, otherwise lock clutch state is for closing.
when lockset keeps opening, the digital baseband processor of radio frequency recognizing electronic label is drawn high the voltage control signal power_control of the input end of clock CP of the trigger D1 of lockup clutch state collecting circuit input and is high level, trigger D1 detects the rising edge of voltage control signal power_control, the data output end Q output high level of trigger D1 is given the 5th NMOS pipe T3 source electrode and drain electrode conducting, triode T2 base stage is conducting to ground, PMOS pipe T1 source electrode and drain electrode cut-off, power-supply battery B1 stops DC-to-dc (DC-DC) voltage transitions chip is powered, DC-to-dc (DC-DC) voltage transitions chip quits work, thereby radio frequency recognizing electronic label is quit work, the baseband processor of radio frequency recognizing electronic label rear automatically voltage control signal power_control being dragged down that quit work is low level, but this moment, the data output end Q of trigger D1 still kept exporting high level, DC-to-dc (DC-DC) voltage transitions chip still is in the state of quitting work.When lockset cut out, lock clutch signaling switch S1 disconnected, and lockup clutch state collecting circuit quits work.
Because the volume of the main components of above-mentioned lockup clutch state collecting circuit such as resistance and DC-to-dc (DC-DC) voltage transitions chip is larger, therefore can't be integrated in radio frequency recognizing electronic label, therefore lockup clutch state collecting circuit be constituted with external mode and radio frequency recognizing electronic label the rfid device that adopts lockup clutch state collecting circuit and use.
as shown in Figure 2, a kind of rfid device that adopts lockup clutch state collecting circuit, comprise radio frequency recognizing electronic label, described radio frequency recognizing electronic label comprises antenna, rf analog front-end and digital baseband processor, described rf analog front-end comprises reference voltage-stabilizing circuit, described digital baseband processor comprises state controller module, it is characterized in that, also comprise lockup clutch state collecting circuit, the voltage control signal of described lockup clutch state collecting circuit (power_control) input port, the first lock clutch signal output port be connected lock clutch signal output port and be connected respectively the state controller module of digital baseband processor with electronic tag and connect, high level supply voltage output port is connected with low level power Voltage-output port and is connected the reference voltage-stabilizing circuit of rf analog front-end with radio frequency recognizing electronic label and connects.
the rf analog front-end concrete structure of above-mentioned radio frequency recognizing electronic label comprises rectification circuit 201, reference voltage-stabilizing circuit 202, modulation circuit 203, demodulator circuit 204, reset circuit 205, clock circuit 206, described antenna is by interface PAD and the rectification circuit 201 of ESD (anti-static protection circuit), modulation circuit 203 is connected with demodulator circuit directly and is connected, the radiofrequency signal that rectification circuit 201 gets off antenna reception is converted into that direct supply is divided into the rectification low-voltage and the rectification high voltage offers reference voltage-stabilizing circuit 202, 202 pairs of power supplys of reference voltage-stabilizing circuit carry out voltage stabilizing, for the radio frequency recognizing electronic label digital baseband part provides low supply voltage 1V and high power supply voltage 1.8V, for modulation circuit 203 provides the 1.8V operating voltage, be demodulator circuit 204, clock circuit 206 and reset circuit 205 provide the 1V operating voltage, also low level operating voltage and the high level operating voltage of DC-to-dc (DC-DC) the voltage transitions chip by lockup clutch state collecting circuit are attached thereto simultaneously for reference voltage-stabilizing circuit 202, when lockset is opened, if powered to reference voltage-stabilizing circuit 202 by DC-to-dc (DC-DC) voltage transitions chip when rectification circuit 201 is powered to reference voltage-stabilizing circuit 202, demodulator circuit 204 recovers the required demodulating data of digital baseband processor of radio-frequency (RF) identification from radiofrequency signal, modulation circuit 203 adopts the method for backscattered modulation that the modulating data of radio frequency recognizing electronic label digital baseband processor output is modulated, and realizes that radio frequency recognizing electronic label is to the data transmission of reader, clock circuit 206 provides stable clock signal of system for digital baseband processor, and reset circuit 205 provides required reset signal for digital baseband processor.
The baseband processor concrete structure of above-mentioned radio frequency recognizing electronic label comprises that digital baseband part comprises state controller module 104, decoder module 101, coder module 106, cyclic check module 102, memory access control module 107, input pretreatment module 103, output pretreatment module 105, pseudorandom number generator module 108, collision counter module 109, timer conter module 110, clock generating module 111, reset generation module 112 and MTP storer 113.described decoder module 101 is inputted respectively pretreatment module 103 and is connected connection with the cyclic check module, described cyclic check module 103 be connected pretreatment module 105, coder module 106 and connect, described memory access control module 107 is connected with output pretreatment module 105, after the demodulating data that the demodulator circuit 204 of described decoder module 101 received RF AFE (analog front end) provides, through decoder module 101 decodings, export decoded data, decoded data divides two-way, one the road to input pretreatment module 103, a road to cyclic check module 102, described input pretreatment module 103 is completed the input pre-service of decoded data, generates pending data and pending order and outputs to state controller module 104, after simultaneously cyclic check module 103 was completed cyclic check to decoded data, the generation cycle check results outputed to state controller module 104, state controller module 104 detects the first lock clutch signal switch_on, the result of the second lock clutch signal key_opened and 102 inputs of cyclic check module, and carry out lock clutch record or receive pending data and pending order according to situation about checking, if the first lock clutch signal switch_on, the second lock clutch signal key_opened is high level, and (the high level value is 1V herein, the low level value is 0V), the lock clutch state of expression lockset is for opening, carry out the record of unblanking, after 104 analyses place of state controller module, the calculated address signal is to memory access control module 107, the related memory cell that storage is unblanked to record carries out read-write operation, and after being finished, the voltage control signal power_control of the trigger D1 of lockup clutch state collecting circuit is drawn high and be high level, if executing data and command process, after state controller module 104 is analyzed and is processed, generating five tunnel control signals divides and is clipped to pseudorandom number generator module 108, collision counter module 109, timer conter module 110, clock generating module 111 and reset generation module 112, the calculated address signal is to memory access control module 107, and export pseudo random number to be sent to output pretreatment module 105, memory access control module 107 is accessed MTP storer 113 by MTP storer IO interface and exports memory data to be sent to the output pretreatment module according to address signal, described output pretreatment module 105 receives pseudo random number to be sent and memory data to be sent, generates data to be sent to cyclic check module 102 through the output pretreatment module, cyclic check module 102 is completed the reflected code coding to data to be sent, generates data to be encoded and outputs to coder module 106, described coder module 106 is completed the coding of data to be encoded, generates and treats that modulating data outputs to the modulation circuit 203 of rf analog front-end, the clock signal of system of clock circuit 206 inputs of 111 pairs of rf analog front-ends of described clock generating module carries out frequency division and produces the required clock signal of modules, and the reset signal of reset circuit 205 inputs of 112 pairs of rf analog front-ends of reset generation module is carried out synchronous the processing and produced the required reset signal of modules in digital baseband processor.Digital baseband processor provides 1.8V high level and the low level working power voltage of 1V by the reference voltage-stabilizing circuit 202 of rf analog front-end.
The below is described in detail the control method of the rfid device of employing lockup clutch state collecting circuit:
In conjunction with Fig. 2, when the rfid device (hereinafter to be referred as rfid device) that adopts lockup clutch state collecting circuit was in the radio-frequency (RF) identification field, its control method comprised step:
Step (a): rfid device enters the radio-frequency (RF) identification field, the rf analog front-end of radio frequency recognizing electronic label works on power, benchmark Voltage stabilizing module 202 provides low level operating voltage and high level operating voltage (the present embodiment low level and high level be value 1V, 1.8V respectively) for digital baseband processor, 112 pairs of state controller modules 104 of reset generation module reset, the radiofrequency signal that demodulator circuit 204 beginning demodulation antenna receptions get off, lockup clutch state collecting circuit gathers the lock clutch state of lockset;
Step (b): state controller module 104 detects lockup clutch state collecting circuit, when the clutch signal is high level, (the high level value is 1V herein when the first lock clutch signal and second is locked, the low level value is 0V), represent that namely the lock clutch state of lockset for opening, changes step (c) over to; Otherwise lock clutch state changes step (d) over to for closing;
Step (c): state controller control module 104 calculated address signals are to memory access control module 107, the related memory cell that storage is unblanked to record carries out read-write operation, new recorded data more, and the voltage control signal power_control of the trigger D1 of lockup clutch state collecting circuit is drawn high be high level, if Power supply finishes change step (m) over to otherwise change step (d) over to;
104 pairs of decoder module 101 of step (d) state controller module, cyclic check module 102, coder module 106, input pretreatment module 103, output pretreatment module 105, memory access control module 107, pseudorandom number generator module 108, collision counter module 109, timer conter module 110, clock generating module 111 resets, and reads the data in MTP storer 113, the cyclic check of computational data (CRC result;
Step (e) state controller module 104 detects lockup clutch state collecting circuit, when the first lock clutch signal and the second lock clutch signal are high level, represent that namely the lock clutch state of lockset for opening, changes step (c) over to, otherwise changes step (f) over to;
Step (f): state controller module 104 is opened decoder module 101, off state controller module 104 self clock then, and state controller module 104 is in dormant state;
Step (g): decoder module 101 begins to detect from the demodulating data of demodulator circuit 204 inputs of rf analog front-end, when detect available frame count according to the time, decoder module 101 wake-up states controller modules 104;
Step (h): state controller module 104 is opened input pretreatment module 103 and cyclic check module 102, decoder module 101 receives demodulating data, decode through decoder module, export decoded data, decoded data divides two-way, one the road to input pretreatment module 103, a road to cyclic check module 102; Input pretreatment module 103 is completed the input pre-service of decoded data, generates pending data and pending order and outputs to state controller module 104; The module of cyclic check simultaneously 102 is completed the cyclic check of decoded data, and the generation cycle check results outputs to state controller module 104;
step (i): when state controller module 104 detects 102 pairs of cyclic check modules the cyclic check of decoded data has been completed, state controller module 104 is turn-offed decoder module 101, input pretreatment module 103 and cyclic check module 102, state controller module 104 receives pending data and pending order simultaneously, generate control signal through state controller module analysis with after processing, according to the control signal unlatching and to pseudorandom number generator module 108, collision counter module 109 and timer conter module operate 110, and after completing, operation closes pseudorandom number generator module 108, collision counter module 109 and timer conter module 110,
Step (j): state controller module 104 is opened output pretreatment module 105 and memory access control module 107, state controller module 104 OPADD signals arrive memory access control module 107, and export pseudo random number to be sent to output pretreatment module 105; The memory access control module by MTP storer 113 input/output port access MTP storeies, is exported memory data to be sent to output pretreatment module 105 according to address signal;
Step (k): state controller module 104 ON cycle check code module 102 and coder module 106, output pretreatment module 105 receives pseudo random number to be sent and memory data to be sent, generates data to be sent to cyclic check module 102 through output pretreatment module 105; Cyclic check module 102 is completed the reflected code coding to data to be sent, and the data to be encoded after the reflected code coding are outputed to coder module 106; Coder module 106 is completed the coding to the data to be encoded after the reflected code coding, and output treats that modulating data is to the modulation circuit of rf analog front-end; After the rf analog front-end modulation circuit is modulated data, by antenna realize and read write line between communication.
Step (l): after coder module 106 codings are completed, state controller module 104 is closed output pretreatment module 105, cyclic check module 102, memory access control module 107 and coder module 106, state controller module 104 checks whether power down of power supplys, power down changes step (m) over to, otherwise changes step (e) over to;
Step (m): power supply power-fail, all modules quit work.
When the rfid device that adopts lockup clutch state collecting circuit is in radio-frequency (RF) identification outside the venue the time, its control method comprises step:
Step (A): when lockset is opened, lockup clutch state collecting circuit is started working, the DC-to-dc voltage transitions chip of lockup clutch state collecting circuit provides low level operating voltage and high level operating voltage (the present embodiment low level and high level be value 1V, 1.8V respectively) to the reference voltage-stabilizing circuit 202 of rf analog front-end, rf analog front-end works on power, 112 pairs of state controller modules 104 of the reset generation module of baseband processor reset, and lockup clutch state collecting circuit gathers the lock clutch state of lockset;
Step (B): state controller module 104 detects lockup clutch state collecting circuit, when the clutch signal is high level, (the high level value is 1V herein when the first lock clutch signal and second is locked, the low level value is 0V), represent that namely the lock clutch state of lockset for opening, changes step (C) over to; Otherwise lock clutch state changes step (D) over to for closing;
Step (C): state controller control module 104 calculated address signals are to memory access control module 107, the related memory cell that storage is unblanked to record carries out read-write operation, new recorded data more, and the voltage control signal power_control of the trigger D1 of lockup clutch state collecting circuit is drawn high be high level;
Step (D): the power supply power-fail of lockup clutch state collecting circuit, the DC-to-dc voltage transitions chip of lockup clutch state collecting circuit stop reference voltage-stabilizing circuit 202 power supplies to rf analog front-end, and rfid device quits work.
In sum, because the relatively existing lockup clutch state collecting circuit of lockup clutch state collecting circuit of the present invention has low-power consumption and jamproof advantage, and the various electrical connection ports that are connected with electronic tag are provided, therefore lockup clutch state collecting circuit can be relatively easy to electronic tag in conjunction with the Internet of Things monitor node as container, proof box circulation in logistic industry, the lock clutch state of monitoring containers, proof box, guaranteed the security that container, proof box circulate timely.Adopt simultaneously the rfid device of lockup clutch state collecting circuit to take into account the function of ordinary passive ultrahigh frequency electronic tag in the radio-frequency field, simultaneously no matter the extraneous radio-frequency field that has or not all can be completed record for unlocking times.What adopt due to the present invention is passive ultrahigh frequency electronic tag, can also effectively reduce consumption and the volume in kind of power consumption, has reduced the dependence for external power source, has strengthened the practicality for various particular application.
Those of ordinary skill in the art will appreciate that, embodiment described here is in order to help reader understanding's principle of the present invention, should to be understood to that protection scope of the present invention is not limited to such special statement and embodiment.Those of ordinary skill in the art can make various other various concrete distortion and combinations that do not break away from essence of the present invention according to these technology enlightenments disclosed by the invention, and these distortion and combination are still in protection scope of the present invention.
Claims (2)
1. lockup clutch state collecting circuit, comprise lock clutch signaling switch (S1), the first resistance (R1), the second resistance (R2), the 3rd resistance (R3), the 4th resistance (R4), PMOS manages (T1), triode (T2), the 5th NMOS pipe (T3), power-supply battery (B1), trigger (D1) and DC-to-dc voltage transitions chip, described the first resistance (R1) is connected with the first end (a) of lock clutch signaling switch (S1), the second resistance (R2) is connected with second end (b) of lock clutch signaling switch (S1), described triode (T2) base stage is connected (T1) drain electrode and is connected by the 3rd resistance (R3) with PMOS, the source electrode of described PMOS pipe (T1) is connected the 4th resistance (R4) and connects with grid, described PMOS pipe (T1) source electrode is connected with power-supply battery (B1) is anodal, described PMOS pipe (T1) source electrode connects by the first resistance (R1) with the first end of being connected clutch signaling switch (S1) (a), second end (b) of described lock clutch signaling switch (S1) is connected to ground by the second resistance (R2), described triode (T2) collector is connected (T1) grid and is connected with PMOS, described triode (T2) base stage is managed (T3) drain electrode with the 5th NMOS and is connected, described the 5th NMOS pipe (T3) source electrode is connected to ground, described triode (T2) base stage is connected to ground by the second resistance (R2), described power-supply battery (B1) negative pole is connected to ground, described the 5th NMOS pipe (T3) grid is connected with the data output end (Q) of trigger (D1), the data input pin (D) of described trigger (D1) is connected with second end (b) of lock clutch signaling switch (S1), the voltage control signal of the digital baseband processor of input end of clock (CP) the input radio frequency identification electronic tag of described trigger (D1), the power end (VDD) of described trigger (D1) is connected with second end (b) of lock clutch signaling switch (S1), described DC-to-dc voltage transitions chip voltage input end (I) is connected to PMOS pipe (T1) drain electrode, described DC-to-dc voltage transitions chip ground connection input end (J) is connected to ground, described DC-to-dc voltage transitions chip to rf analog front-end output low level operating voltage and the high level operating voltage of radio frequency recognizing electronic label, is locked the clutch signal to the digital baseband processor output first lock clutch signal and second of radio frequency recognizing electronic label respectively.
2. rfid device that adopts lockup clutch state collecting circuit as claimed in claim 1, described device comprises radio frequency recognizing electronic label, described radio frequency recognizing electronic label comprises antenna, rf analog front-end and digital baseband processor, described rf analog front-end comprises reference voltage-stabilizing circuit, described digital baseband processor comprises state controller module, it is characterized in that, described lockup clutch state collecting circuit is connected with the state controller module of digital baseband processor and locks the clutch signal to state controller module output the first lock clutch signal and second, the voltage control signal of while accepting state controller module input, described lockup clutch state collecting circuit is connected with the reference voltage-stabilizing circuit of rf analog front-end and provides high level operating voltage and low level operating voltage to reference voltage-stabilizing circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201010246844 CN101916353B (en) | 2010-08-06 | 2010-08-06 | Lock clutch state acquisition circuit and radio frequency identification device using same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201010246844 CN101916353B (en) | 2010-08-06 | 2010-08-06 | Lock clutch state acquisition circuit and radio frequency identification device using same |
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| Publication Number | Publication Date |
|---|---|
| CN101916353A CN101916353A (en) | 2010-12-15 |
| CN101916353B true CN101916353B (en) | 2013-05-08 |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1303983A (en) * | 1999-12-13 | 2001-07-18 | 闵瑜 | Acquisition method of locking and unlocking signals of electronic lock and its equipment |
| CN101170313A (en) * | 2006-10-25 | 2008-04-30 | 英华达(上海)电子有限公司 | Electronic device based on the mobile phone and its control method |
| CN201219253Y (en) * | 2008-06-17 | 2009-04-08 | 麦建明 | Electronic switch of radio frequency electronic lock |
| JP2009269705A (en) * | 2008-05-07 | 2009-11-19 | Toppan Forms Co Ltd | Article control system |
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| CN101915025B (en) * | 2010-08-06 | 2012-11-07 | 电子科技大学 | Lock clutch state acquisition circuit and radio frequency identification electronic tag integrating same |
| CN101942936B (en) * | 2010-08-06 | 2012-11-07 | 电子科技大学 | Control method of lockup clutch state collecting circuit |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1303983A (en) * | 1999-12-13 | 2001-07-18 | 闵瑜 | Acquisition method of locking and unlocking signals of electronic lock and its equipment |
| CN101170313A (en) * | 2006-10-25 | 2008-04-30 | 英华达(上海)电子有限公司 | Electronic device based on the mobile phone and its control method |
| JP2009269705A (en) * | 2008-05-07 | 2009-11-19 | Toppan Forms Co Ltd | Article control system |
| CN201219253Y (en) * | 2008-06-17 | 2009-04-08 | 麦建明 | Electronic switch of radio frequency electronic lock |
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