CN108984108A - For dispatching the method and solid storage device of I/O command - Google Patents
For dispatching the method and solid storage device of I/O command Download PDFInfo
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- CN108984108A CN108984108A CN201710411782.1A CN201710411782A CN108984108A CN 108984108 A CN108984108 A CN 108984108A CN 201710411782 A CN201710411782 A CN 201710411782A CN 108984108 A CN108984108 A CN 108984108A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
- G06F3/0659—Command handling arrangements, e.g. command buffers, queues, command scheduling
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/061—Improving I/O performance
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
- G06F3/0658—Controller construction arrangements
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
- G06F3/0674—Disk device
Abstract
Disclose the method and solid storage device for dispatching I/O command.The method of disclosed processing I/O command, comprising: there are read commands to be processed for identification high-priority queue；In response to thering is program command or erasing order handling in the logic unit of read command access, suspend the program command or the erasing order；And it is obtained from high-priority queue and handles the read command.
Description
Technical field
This application involves the I/O command processing in technical field of memory more particularly to Media Interface Connector controller.
Background technique
NVM (nonvolatile storage, Non-Volatile Memory) has non-volatile spy for realizing store function
Point.Fig. 1 is the block diagram of solid storage device, and solid storage device 102 is coupled with host, for providing storage energy for host
Power.Host can be coupled in several ways between solid storage device 102, coupled modes include but is not limited to for example, by
SATA (SerialAdvanced Technology Attachment, Serial Advanced Technology Attachment), SCSI (Small
Computer System Interface, small computer system interface), (SerialAttached SCSI, serially connects SAS
Meet SCSI), IDE (Integrated Drive Electronics, integrated drive electronics), USB (Universal Serial
Bus, universal serial bus), (Peripheral Component Interconnect Express, PCIe, high speed are outer by PCIE
Enclose component interconnection), NVMe (NVM Express, high speed non-volatile memory), Ethernet, optical-fibre channel, cordless communication network etc. even
Connect host and solid storage device 102.Host can be the information processing that can be communicated through the above way with storage equipment
Equipment, for example, personal computer, tablet computer, server, portable computer, the network switch, router, cellular phone,
Personal digital assistant etc..Store equipment 102 include interface 103, control unit 104, one or more NVM chip 105 and
DRAM (Dynamic RandomAccess Memory, dynamic RAM) 110.
Nand flash memory, phase transition storage, FeRAM (Ferroelectric RAM, ferroelectric memory), MRAM (Magnetic
RandomAccess Memory, magnetoresistive memory), RRAM (Resistive RandomAccess Memory, resistance-change memory
Device) etc. be common NVM.
Interface 103 can be adapted to for example, by the side such as SATA, IDE, USB, PCIE, NVMe, SAS, Ethernet, optical-fibre channel
Formula and host exchanging data.
The data that control unit 104 is used to control between interface 103, NVM chip 105 and firmware memory 110 pass
It is defeated, it is also used to storage management, host logical address to flash memory physical address map, erasure balance, bad block management etc..Control unit
104 can be realized by the various ways of software, hardware, firmware or combinations thereof, for example, control unit 104 can be FPGA
(Field-programmable gate array, field programmable gate array), ASIC (Application Specific
Integrated Circuit, application specific integrated circuit) or a combination thereof form；Control unit 104 also may include place
Device or controller are managed, software is executed in processor or controller and carrys out the hardware of manipulation and control component 104 to handle IO
(Input/Output) it orders；Control unit 104 is also coupled to DRAM 110, and may have access to the data of DRAM 110；?
DRAM can store the data of the I/O command of FTL table and/or caching.
Memory target (Target) is that the shared chip in the encapsulation of flash memory particle 105 enables (CE, Chip Enable) letter
Number one or more logic units (Logic Unit), each logic unit have logical unit number (LUN, Logic
UnitNumber).It may include one or more tube cores (Die) in nand flash memory encapsulation.Typically, logic unit corresponds to single
Tube core.Logic unit may include multiple planes (Plane).Multiple planes in logic unit can be with parallel access, and NAND
Multiple logic units in flash chip can execute order and report state independently of one another.In http: //
" the Open NAND Flash that www.onfi.org/~/media/ONFI/specs/ONFI_3_2%20Gold.pdf is obtained
In Interface Specification (Revision 3.2) ", provide about target (target), logic unit, LUN,
The meaning of plane (Plane), and also provide the order of operation NVM chip.
Data are usually stored and read on storage medium by page.And data are erased in blocks.Block includes multiple pages.Storage
Page (referred to as Physical Page) on medium has fixed size, such as 17664 bytes.Physical Page also can have other rulers
It is very little.
In solid storage device, safeguarded using FTL (Flash Translation Layer, flash translation layer (FTL)) from
Map information of the logical address to physical address.Logical address constitutes the solid-state that the upper layer software (applications)s such as operating system are perceived and deposits
Store up the memory space of equipment.Physical address is the address for accessing the physical memory cell of solid storage device.In existing skill
Also implement address of cache using intermediate address form in art.Such as logical address is mapped as intermediate address, and then will be intermediate
Address is further mapped as physical address.
Wherein, the table structure for storing the map information from logical address to physical address is referred to as FTL table.FTL table is
Important metadata in solid storage device.The data item of usual FTL table has recorded in solid storage device with data page as list
The address mapping relation of position.
FTL table includes multiple FTL table clauses (or list item).In one example, one is had recorded in each FTL table clause
The corresponding relationship of a logical page address and a Physical Page.In another example, it is had recorded in each FTL table clause continuous
The corresponding relationship of multiple logical page addresses and continuous multiple Physical Page.In another example, recorded in each FTL table clause
The corresponding relationship of logical block address and physical block address.In still another embodiment, logical block address is recorded in FTL table
With the mapping relations and/or logical page address of physical block address and the mapping relations of physical page address.
When handling read command from host, solid storage device is using the logical address carried in read command from FTL
Obtain corresponding physical address in table, and issue read request to NVM chip according to physical address, and receive NVM chip in response to
The data of read request output.When handling the write order from host, solid storage device is write order allocated physical address,
In FTL table record write order logical address and distribution physical address corresponding relationship, and according to the physical address of distribution to
NVM chip issues write request.
It include multiple NVM chips in solid storage device.Each NVM chip includes one or more tube cores (DIE) or patrols
It collects unit (LUN, Logic UNit).Read-write operation can be responded between tube core or logic unit parallel.In same tube core or patrol
Multiple reading and writing or the erasing operation sequence collected on unit execute.
Fig. 2 shows the schematic diagrames of bulk.Bulk includes the physical block from each of multiple logic units.Preferably,
Each logic unit provides a physical block for bulk.As an example, bulk is constructed on every 16 logic units (LUN).Often
A bulk includes 16 physical blocks, comes from 16 logic units (LUN) each.In the example in figure 2, bulk 0 includes coming
From the physical block 0 of each of 16 logic units (LUN), and bulk 1 includes the physical block 1 from each logic unit (LUN).
Bulk can also be constructed there are many other modes.
As a kind of optional mode, page band, each interior same physical address of logic unit (LUN) are constructed in bulk
Physical Page constitute " page band ".In Fig. 2, Physical Page 0-0, Physical Page 0-1 ... and Physical Page 0-x constitute page band 0,
Wherein Physical Page 0-0, Physical Page 0-1 ... Physical Page 0-14 are for storing user data, and Physical Page 0-15 is for storing root
The verification data being calculated according to all customer data in band.Similarly, in Fig. 2, Physical Page 2-0, Physical Page 2-1 ...
Page band 2 is constituted with Physical Page 2-x.Optionally, appointing in page band can be located at for storing the Physical Page of verification data
Meaning position.
One or more physical blocks in bulk may be bad block.Data should not be written to bad block.It thus can in page band
The amount of user data of receiving, the bad number of blocks dependent on the bulk where page band.Physical Page includes one or more data sheets
Member.The valid data element number of page band, the quantity of the data cell by user data can be accommodated in finger page band.As act
Example will be removed in page band by the Physical Page that bad block provides, and removal is for storing the Physical Page of verification data, remaining object
The data cell quantity of page is managed, is the valid data element number of page band.
For data are written to page band, the control unit (104) (referring to Fig. 1) of solid storage device provides verification data meter
Calculate unit.To calculate verification data instance using xor operation, for the page band including N+1 Physical Page, to N number of Physical Page
User data calculate exclusive or (for example, (P0-1) XOR (P0-1) XOR (P0-2) XOR ... XOR (P0-15)), and by calculated result
It is written as a page Physical Page (such as P0-X) for band storage verification data.Optionally, multiple schools are provided in control unit (104)
Data Computation Unit (for example, M) are tested, data are written to M page band simultaneously.
Summary of the invention
In the prior art, read-write operation can be responded between tube core or logic unit parallel, in a storage unit (logic
Unit or tube core etc.), read command, program command and erasing order must be performed serially, although the processing of the read command of flash memory
Delay will be significantly less than the processing delay of program command, but read command such as may need at the programming of same memory cell to be visited
Order or erasing order could be processed after completing.This can cause the processing of read command to postpone by program command/erasing life
The influence of order causes read command processing delay to rise appreciably.This can also significantly affect service quality.
Although priority processing read command helps to reduce the processing delay of read command relative to program command.However it programs
Order is also required to be deposited by priority processing to reduce the occupancy to the resource of the verification data for calculating page band and increase solid-state
Store up the handling capacity (oncurrent processing ability) of equipment.The resource that verification data for calculating page band calculate includes testing data to calculate
Unit and/or XOR caching.XOR be buffered in page band be written data when, to calculate verification data.For the page item of N+1 structure
Band can just calculate verification data after obtaining N number of page of data.Thus start to page band the 1st page data of write-in, school
It is i.e. occupied to test Data Computation Unit, after N page data is written to page band, verification Data Computation Unit can just be calculated
The N+1 pages of the verification data for page band.Thus the quantity of verification Data Computation Unit limits in solid storage device
The quantity of the program command of concurrent processing.Further, the increase of the delay of program command, so that completing the place of page band write-in
Reason delay increases, and further increases the occupancy to verification Data Computation Unit, reduces the concurrent processing energy to program command
Power.
It needs to reduce the processing delay of I/O command, reduce the occupancy to processor resource, and improve solid storage device
Oncurrent processing ability.
When abnormal power failure occurs, solid storage device using stand-by power supply of short duration time back-up job scene, with
It is able to scene of resuming work when next time powers on, and continues with I O access.For back-up job scene, program command needs preferential
Processing, and the importance of read command and erasing order reduces, it is existing to meet back-up job to need the processing method for improving I/O command
The demand of field.
According to a first aspect of the present application, the method according to the first of the application first aspect the processing I/O command is provided,
It include: that there are read commands to be processed for identification high-priority queue；In response to having volume in the logic unit of read command access
Journey order or erasing order are being handled, and suspend the program command or the erasing order；And it is obtained from high-priority queue
It takes and handles the read command.
According to the method for the first of the application first aspect the processing I/O command, the according to the application first aspect is provided
The method of two processing I/O commands, further includes: restore the program command being suspended or the erasing order；And described in processing
Program command or the erasing order.
According to the method that the first or second of the application first aspect handles I/O command, provide according to the application first party
The method of the third processing I/O command in face, further includes: obtain I/O command from Low Priority Queuing；And the IO life that processing is acquired
It enables.
According to the first of the application first aspect to third processing I/O command one of method, provide according to the application the
The method of the fourth process I/O command of one side, further includes: meet in response to specified requirements, pause is obtained from high-priority queue
Read command, and handle the program command being suspended or erasing order；Or meet in response to specified requirements, pause is preferential from height
Grade queue obtains read command, and obtains from Low Priority Queuing and handle I/O command.
According to the method for the fourth process I/O command of the application first aspect, according to the application first aspect is provided
The method of five processing I/O commands, wherein not compiled in response to the read command of continuous processing specified quantity, or at the appointed time
Journey order is processed, and specified requirements is set as meeting.
According to the method for the 4th or the 5th of the application first aspect the processing I/O command, provide according to the application first party
The method of the 6th processing I/O command in face, further includes: the foundation whether setting specified requirements meets.
According to one of the method for the 4th to the 6th of the application first aspect the processing I/O command, provide according to the application the
The method of 7th processing I/O command of one side, further includes: be set as meeting by specified requirements；And in response to continuous processing
The program command of specified quantity, or it is within a specified time processed without read command, specified requirements is set as being unsatisfactory for.
According to one of the method for the first to the 7th of the application first aspect the processing I/O command, provide according to the application the
The method of 8th processing I/O command of one side, further includes: in response to being abnormal power down, cancel the erasing order handled
Or the erasing order being suspended.
According to one of the method for the 8th of the application first aspect the processing I/O command, provide according to the application first aspect
The 9th processing I/O command method, further includes: abandon read command or erasing order to be processed.
According to one of the method for the first to the 9th of the application first aspect the processing I/O command, provide according to the application the
The method of tenth processing I/O command of one side, further includes: in response to being abnormal power down, handled if having in logic unit
The first program command, wait the first program command execute completion.
According to one of the method for the 8th to the tenth of the application first aspect the processing I/O command, provide according to the application the
The method of the fourth process I/O command of ten one side, further includes: restore the program command being suspended；And/or it obtains and handles volume
Journey order.
According to a second aspect of the present application, it provides and is abnormal the IO after power down according to the first of the application second aspect
Command handling method, comprising: cancel the erasing order handled or the erasing order being suspended；Abandon reading life to be processed
Order or erasing order；If there is the first program command handled in logic unit, the first program command is waited to execute completion；With
And it obtains and handles program command.
According to the third aspect of the application, the first solid storage device according to the application third aspect is provided, including
Control unit and NVM chip；The control unit is for executing according to one of the application first aspect and the method for second aspect.
According to the first solid storage device of the application third aspect, provide solid according to the second of the application third aspect
State stores equipment, wherein the Media Interface Connector controller of the control unit is for executing according to the application first aspect and second party
One of the method in face.
According to the fourth aspect of the application, provides and be situated between according to the first of the application fourth aspect the storage including program
Matter, when described program, which is loaded into processor, to be executed, so that the processor is executed according to the application first aspect and second party
One of the method in face.
Detailed description of the invention
In order to illustrate the technical solutions in the embodiments of the present application or in the prior art more clearly, will be described below to embodiment
Needed in attached drawing be briefly described, it should be apparent that, the accompanying drawings in the following description is only some of the application
Embodiment for those of ordinary skill in the art without creative efforts, can also be attached according to these
Figure obtains other attached drawings.
Fig. 1 is the schematic diagram of solid storage device in the prior art；
Fig. 2 is the organigram of page band；
Fig. 3 is the schematic diagram of the control unit of the solid storage device of the embodiment of the present application；
Fig. 4 is the schematic diagram of the Media Interface Connector controller of the embodiment of the present application；
Fig. 5 is the schematic diagram of the Media Interface Connector controller of the embodiment of the present application；
Fig. 6 is the flow chart that the I/O command of the embodiment of the present application is handled；
Fig. 7 is the flow chart according to the I/O command processing method of the embodiment of the present application；And
Fig. 8 is the flow chart of the I/O command processing method after being occurred according to the powered-off fault of the embodiment of the present application.
Specific embodiment
Below in conjunction with the attached drawing in the embodiment of the present application, technical solutions in the embodiments of the present application carries out clear, complete
Site preparation description, it is clear that described embodiment is some embodiments of the present application, instead of all the embodiments.Based on this Shen
Please in embodiment, every other implementation obtained by those of ordinary skill in the art without making creative efforts
Example, shall fall in the protection scope of this application.
Fig. 3 is the block diagram according to the control unit of the solid storage device of the embodiment of the present application.The control of solid storage device
It include host interface 310, front end processing block 320, flash memory management module 330 and one or more media in component 104 processed
Interface controller 340.Host interface 310 is used for host exchange command and data.Flash memory management module 330 provides logical address
To functions such as physical address map, abrasion equilibrium, garbage reclamations, and generates I/O command and be sent to Media Interface Connector controller 340.It is situated between
Matter interface controller is coupled to NVM chip 105.Media Interface Connector controller has one or more, and each interface controller is coupled to
Respective NVM chip 105.Media Interface Connector controller receive I/O command, and according to I/O command to NVM chip issue I/O command (read,
Programming, pause, reads the order such as feature (feature) and/or setting feature at erasing).
It provides in Chinese patent application CN201610009789.6 and CN201510253428.1 for Media Interface Connector
The microcommand of controller executes method and apparatus, and Chinese patent application CN 201610861793.5 provides microinstruction sequence
Dispatching method and device, its full text is incorporated herein.Media Interface Connector controller is usually coupled to multiple NVM chips, NVM chip
Including multiple LUN (Logic UNit, logic unit) or tube core, multiple LUN and tube core can respond and access parallel NVM life
It enables.
Optionally, Media Interface Connector controller may include one or more CPU, receive and process IO life by running program
It enables.
In one example, Media Interface Connector controller provide have different priorities multiple queues (such as queue 342 with
Queue 344, wherein queue 342 is high-priority queue and queue 344 is Low Priority Queuing) receive I/O command.Flash memory pipe
Module 330 is managed by the high-priority queue of read command filling interface controller, makes Media Interface Connector controller priority processing read command.
And program command, erasing order and/or read command (such as the read command for not requiring processing to postpone) filling Media Interface Connector are controlled
The Low Priority Queuing of device.Order in Media Interface Connector controller meeting priority processing high-priority queue 342, and with low priority
Handle the order in queue 344.It is to be appreciated that other kinds of I/O command can also be inserted high priority by flash memory management module
Queue.
According to an embodiment of the present application, under normal circumstances, in Media Interface Connector controller priority processing high-priority queue
I/O command, and with the I/O command in low priority processing Low Priority Queuing.
According to one embodiment of the application, postpone to reduce the processing of I/O command of solid storage device, if patrolling
Collecting on unit (L1) has the program command (P1) being carrying out or erasing order (E1), and to be handled in high-priority queue
Read command (R1).It should be pointed out that read command R1 and program command P1 accesses identical logic unit (L1).Then medium connects
Mouth controller issues pause command to logic unit (L1), suspends the processing of program command (P1) or erasing order (E1), and
It handles read command (R1).And after the completion of read command (R1) processing, issued to logic unit (L1) and restore order, restore to volume
Journey order (P1) or the processing of erasing order (E1).
It is to be appreciated that the I/O command in high-priority queue/Low Priority Queuing is ordered with the IO for being sent to logic unit
Order can have a different forms, but with the instruction of identical label (R1, P1, E1 etc.) in different phase, with different shape but
The identical same order of meaning.
According to another embodiment of the application, the discovery of Media Interface Connector controller is pending in high-priority queue
Read command (R2), and the pending program command (P2) in Low Priority Queuing.Media Interface Connector controller is not first to handle
Read command (R2), but first handle the program command (P2) in Low Priority Queuing.Programming life is being issued to logic unit (L2)
After enabling (P2), if read command (R2) and program command (P2) access identical logic unit (L2), and then to logic unit
(L2) pause command is issued, to suspend the processing to program command (P2).And the processing of Media Interface Connector controller is from high preferential
The read command (R2) of grade queue issues read command (R2) to logic unit (L2), and after the completion of read command (R2) processing, to patrolling
It collects unit (L2) and issues and restore order, to restore the processing to program command (P2).If read command (R2) and program command (P2)
Different logic units is accessed, then directly handles read command (R2), without suspending program command (P2).
According to another embodiment of the application, Media Interface Connector controller finds pending reading life in high-priority queue
It enables (R3), and the pending erasing order (E3) in Low Priority Queuing.Media Interface Connector controller is not that first life is read in processing
(R3) is enabled, but first handles the erasing order (E3) in Low Priority Queuing.Erasing order is being issued to logic unit (L3)
(E3) after, if read command (R3) and erasing order (E3) access identical logic unit (L3), and then to logic unit
(L3) pause command is issued, to suspend the processing to erasing order (E3).And the processing of Media Interface Connector controller is from high preferential
The read command (R3) of grade queue issues read command (R3) to logic unit (L3), and after the completion of read command (R3) processing, to patrolling
It collects unit (L3) and issues and restore order, to restore the processing to erasing order (E3).If read command (R3) and erasing order (E3)
Different logic units is accessed, then directly handles read command (R3), without suspending erasing order (E3).Further, if connecing
Get off in Low Priority Queuing and programming (P4)/erasing (E4) order for occurring accessing other logic units is (different from logic
Other logic units of unit L3), there is read command (R4) in high-priority queue, then executes programming (P4)/erasing (E4)
Order, and pause programming (P4)/erasing (E4) order, next execute read command (R4) and recovering programming (P4)/erasing
(E4) processing ordered.
Optionally, each logic unit has the execution state of corresponding Media Interface Connector controller or Media Interface Connector controller,
I/O command to handled by same Media Interface Connector controller accesses identical logic unit.In the case, medium connects
Mouth controller is performing programming/wiping without judging whether read command and program/erase order access identical logic unit
Except rear and when receiving read command from high-priority queue, pause command all is issued to logic unit, program/erase is ordered with pause
The processing of order.Then read command is issued, and after the completion of read command executes, the execution of recovering programming/erasing order.
Fig. 4 is the block diagram according to the Media Interface Connector controller 440 of the embodiment of the present application.Media Interface Connector controller includes multiple
Queue (for example, queue 342 and queue 344).Each queue has different priority, such as queue 342 is high priority team
Column, and queue 344 is Low Priority Queuing.Media Interface Connector controller 440 includes command scheduling module 410, verification data calculating
Device 420.As an example, verification data calculator 420 does exclusive or to input data to obtain verification data, calculates in verification data
It further include XOR caching (422/424/426) in device 420, the verification data being calculated are stored in XOR caching (422/424/
426) in.
Optionally, Media Interface Connector controller 440 is additionally coupled to DRAM (referring to Fig. 1, DRAM 110).
Command scheduling module 410 takes out order from queue 342/344, and executes order to access NVM chip.For compiling
Journey order during the corresponding data of program command are sent to NVM chip, specifies XOR caching (for example, XOR is cached
422), verification data calculator 420 caches the corresponding data of program command with XOR caching (for example, XOR caching 422)
Data execute xor operation, and the result of xor operation is stored in XOR caching (for example, XOR caching 422).
As an example, a Physical Page is above distributed in each of NVM chip 405/415/425 to construct a page band (S1).
2 Physical Page in page band (S1) are for storing user data, and 1 Physical Page is for storing verification data.
Command scheduling module 410 obtains program command (P5) from command queue, and distribution XOR caching (422) orders programming
The data of (P5) are enabled to do exclusive or with XOR caching (422), calculated result is stored in XOR caching (422), and by program command
(P5) it is sent to NVM chip 405.
Next, command scheduling module 410 obtains program command (P7) from command queue, distribution XOR caching (426),
The data of program command (P7) are done into exclusive or with XOR caching (426), calculated result is stored in XOR caching (426), and will
Program command (P7) is sent to NVM chip 435.
Wherein, data are written to page band (S1) in program command (P5), and before page band (S1) is completely written, XOR
Caching (422) is occupied to generate the verification data for page band (S1).Similarly, program command (P7) is to page band (S2)
Data are written, XOR caching (426) is occupied to generate the verification data for page band (S2).
Next, occurring read command (R5) in high-priority queue, and occurs program command in Low Priority Queuing
(P6).Although the priority of read command (R5) is higher than program command (P6), in order to reduce the holding time to XOR caching (422),
Data are written to page band (S1) in 410 priority processing program command (P6) of command scheduling module, program command (P6).Programming is ordered
(P6) corresponding data are enabled to do exclusive or with XOR caching (422), exclusive or result is stored in XOR caching (422).And it will compile
Journey order (P6) is sent to NVM chip 415.
At this point, all user data of page 2 of a page band (S1) to be written due to having had received, XOR is cached in (422)
The data of storage as page band (S1) verification data and be written NVM chip 425 (by generating program command PX5), and release
Put XOR caching (422).
According to an embodiment of the present application, the corresponding data of program command (P6) are done into exclusive or with XOR caching (422),
After exclusive or result is stored in XOR caching (422), command scheduling module 410 handles the reading from high-priority queue 342
It orders (R5).If having the program command handled (for example, program command in the logic unit (L5) that read command (R5) is accessed
P6/P7/PX5) or erasing order is carrying out in pause logic unit (L5) to logic unit (L5) sending pause command
Program command or erasing order issue read command (R5) to logic unit (L5), after the completion of read command (R5) is executed, to logic
Unit (L5), which issues, restores order, to restore the program command being suspended or erasing order.
Optionally, the corresponding data of program command are done into exclusive or, exclusive or result with XOR caching (for example, XOR caching 422)
It is stored in XOR caching (for example, XOR caching 422), and after program command is sent to logic unit, XOR is cached into (422)
Content (for example, user data or verification data for page band (S1)) write-in DRAM of storage is (referring to Fig. 1, DRAM
110), so that releasable XOR caches (422), and XOR caching (422) is distributed to calculate another page of band (for example, page band
(S3)) verification data.And it in response to receiving the program command to page band (S1) write-in data, obtains and is deposited from DRAM
The content of the XOR caching (422) of storage, and store to XOR caching (for example, 422/426), and continue with and write to page band (S1)
Enter the program command of data.
Fig. 5 illustrates the Media Interface Connector controller of the another embodiment of the application.In the embodiment of Fig. 5, control unit 104
(referring to Fig. 1) includes multiple Media Interface Connector controllers (540/550).Media Interface Connector controller includes multiple queues (for example, queue
542/544,552/554).Each queue has different priority, such as queue 542/552 is high-priority queue, and team
Column 544/554 are Low Priority Queuings.Media Interface Connector controller 540/550 is coupled to verification data calculator 520.As act
Example, verification data calculator 520 do exclusive or to input data to obtain verification data, also wrap in verification data calculator 520
Include XOR caching (522/524/526).
Optionally, Media Interface Connector controller 540/550 is additionally coupled to DRAM (referring to Fig. 1, DRAM 110).
Wherein, Media Interface Connector controller 540 is exclusively used in access logic unit (LUN 505), and Media Interface Connector controller 550 is special
For accessing logic unit (LUN 515).Thus, to access LUN 505, queue 542/544 is added into corresponding order, and
To access LUN 515, corresponding order is added to queue 552/554.
It is to be appreciated that can store multiple groups in Media Interface Connector controller executes state, every group of execution state is exclusively used in accessing
One of logic unit.It is switched over by the execution state to Media Interface Connector controller, so that at each moment, Media Interface Connector control
Device processed is exclusively used in access (one) logic unit corresponding with current execution state.
In the 5 embodiment of figure 5, the shared verification data calculator 520 of multiple Media Interface Connector controllers (540/550), also altogether
Enjoy DRAM.
As an example, in response to handling program command (P10), data are written to page band (S10) in program command (P10).
Media Interface Connector controller 540 is that program command (P10) distributes XOR caching (522), and the corresponding data of program command (P10) are same
XOR caching (522) does exclusive or, and exclusive or result is stored in XOR caching (522), and program command (P10) is sent to
LUN 505。
Next, occurring read command to be processed (R10) on high-priority queue 542.Due to Media Interface Connector controller 540
It is exclusively used in access logic unit (LUN 505), thus implys that read command (R10) and program command (P10) all accesses logic list
First (LUN 505).Media Interface Connector controller 540 finds that program command (P10) is just executed on LUN 505, to reduce read command
(R10) processing delay, issues pause command to LUN 505, suspends the execution of program command (P10), and by read command (R10)
It is sent to LUN 505.And completion is executed in response to read command (R10), it is issued to LUN 505 and restores order, with recovering programming
Order the execution of (P10).
Next, occurring read command to be processed (R11) on high-priority queue 542, occur on Low Priority Queuing 544
Program command (P11) to be processed.And program command (P10) has executed completion.Since Media Interface Connector controller 540 is exclusively used in
It accesses logic unit (LUN 505), thus implys that read command (R11) and program command (P11) all accesses logic unit (LUN
505) whether the order that, media access controller 540 is checked and accepted without examining again accesses identical logic unit.Although read command
(R11) priority is higher than program command (P11), but 540 priority processing program command (P11) of media access controller.Programming
(P11) is ordered to be used to that data to be written to page band (S11).Media Interface Connector controller 540 is that program command (P11) distribution XOR is slow
(524) are deposited, the corresponding data of program command (P11) are done into exclusive or with XOR caching (524), exclusive or result is stored in XOR caching
(524) in, and program command (P11) is sent to LUN 505.Next, media access controller 540 is sent out to LUN 505
Pause command out, suspends the execution of program command (P11), and read command (R11) is sent to LUN 505.And in response to reading
Order (R11) executes completion, issues to LUN 505 and restores order, with the execution of recovering programming order (P11).
Next, in response to occurring read command to be processed (R12), Low Priority Queuing 554 on high-priority queue 552
It is upper program command (P12) to be processed occur, since Media Interface Connector controller 550 is exclusively used in access logic unit (LUN 515),
Thus imply that read command (R12) and program command (P12) all accesses logic unit (LUN 515), media access controller 550
Whether the order checked and accepted without examining again accesses identical logic unit.Even if the priority of read command (R12) is higher than programming life
It enables (P12), also priority processing program command (P12) of media access controller 550.Program command (P12) is used for page band
(S12) data are written.Media Interface Connector controller 550 is that program command (P12) distributes XOR caching (526), by program command
(P12) corresponding data do exclusive or with XOR caching (526), and exclusive or result is stored in XOR caching (526), and will programming
Order (P12) is sent to LUN 515.Next, media access controller 550 issues pause command, pause programming to LUN 515
The execution of (P12) is ordered, and read command (R12) is sent to LUN 515.And completion is executed in response to read command (R12), to
LUN 515, which is issued, restores order, with the execution of recovering programming order (P12).
Next, in response to occurring read command to be processed (R13), Low Priority Queuing 554 on high-priority queue 552
It is upper program command (P13) to be processed occur, even if the priority of read command (R13) is higher than program command (P13), medium access
Also priority processing program command (P13) of controller 550.Program command (P13) is used to that data to be written to page band (S14).Medium
Interface controller 550 is that program command (P13) distributes XOR caching.It, will since XOR caching (522/524/526) is occupied
The content transmission that one of XOR caching (for example, XOR caching 526) is stored is to DRAM.XOR caching (526) is initialized, will be programmed
The corresponding data of order (P13) do exclusive or with XOR caching (526), and exclusive or result is stored in XOR caching (526), and will
Program command (P13) is sent to LUN 515.Next, media access controller 550 issues pause command, pause to LUN 515
The execution of program command (P13), and read command (R13) is sent to LUN 515.And it is executed in response to read command (R13)
At to the sending recovery order of LUN 515, with the execution of recovering programming order (P13).
Next, no matter Media Interface Connector controller 540/550 which receive to page band (S12) write-in data programming
The storage information for page band (S12) of XOR caching (526) is all transmitted in DRAM, and obtains it from DRAM by order
The content that preceding the stored XOR for page band (S12) is cached, and store into XOR caching (526).
Fig. 6 illustrates the flow chart of the I/O command processing method of the embodiment of the present application four, for according to the application Fig. 3, Fig. 4
Or the Media Interface Connector controller of Fig. 5.
In one example, postpone to reduce program command to the processing of read command, Media Interface Connector controller response life
Queue (such as queue 342/344 of Fig. 3 or Fig. 4, the queue 542/544 of Fig. 5) pending order is enabled, I/O command is carried out
Processing.If for example, the discovery of Media Interface Connector controller has in high-priority queue, read command is to be processed, and is accessed in read command
NVM chip or LUN on, the program command from Low Priority Queuing is carrying out (601)；Then suspend the programming being carrying out
It orders (632)；And read command (633) of the processing from high priority.Optionally, Media Interface Connector controller is handled in read command
After the completion, restore to be suspended order, the order being suspended is such as programming or erasing order (634).
In another example, have that read command is to be processed in Media Interface Connector controller discovery high-priority queue, Yi Ji
There is the program command for accessing identical LUN or NVM chip with read command to be processed (610) to be processed in Low Priority Queuing, then
Preferentially program command, and processing program command (611) are taken out from Low Priority Queuing.Media Interface Connector controller also records programming
The state being performed is ordered, to suspend the program command being performed if necessary.Optionally, Media Interface Connector controller
Back up and be released to the XOR caching (612) that handled program command is distributed.To be used to access other page of item for XOR caching
The program command of band.Next, Media Interface Connector controller suspends the program command (632) that is being performed, and from high priority
Read command is obtained in queue is handled (633).Optionally, Media Interface Connector controller restores quilt after the completion of read command is handled
Pause command (634).
In another example, have that read command is to be processed in Media Interface Connector controller discovery high-priority queue, and low
There is the erasing order for accessing identical LUN or NVM chip with read command to be processed (620) to be processed in priority query, then it is excellent
First erasing order, and processing erasing order (621) are taken out from Low Priority Queuing.Media Interface Connector controller also records erasing life
The state being performed is enabled, and suspends the erasing order (622) being performed.Next, Media Interface Connector controller is from height
Read command is obtained in priority query is handled (633).Optionally, Media Interface Connector controller read command handle after the completion of,
Recovery is suspended order (634).
Fig. 7 be according to the flow chart of the I/O command processing method of the another embodiment of the application, for according to the application Fig. 3,
The Media Interface Connector controller of Fig. 4 or Fig. 5.
In the embodiment according to Fig. 7, the order of Media Interface Connector controller always priority processing high-priority queue.It is optional
Ground appears in the order always read command in high-priority queue, or the order appeared in high-priority queue will not be
Program command or erasing order.If there is read command (710) to be processed in high-priority queue, the inspection of Media Interface Connector controller is being read
Whether there is order just in (720) processed on LUN the or NVM chip of command access.If on LUN or NVM chip exist by
The program command or erasing order of processing, Media Interface Connector controller suspend just in processed program command or erasing order
(724).If on LUN or NVM chip exist just except processed program command or erasing order other order (for example,
Read command, reset command etc.), Media Interface Connector controller waits these other orders to have been processed into.If on LUN or NVM chip
There is no just in processed order (720), Media Interface Connector controller obtains read command from high-priority queue and handles the reading
It orders (722).
If not having pending read command (710) in high-priority queue, Media Interface Connector controller is obtained and is handled temporary
The order (if there is) (730) stopped.The order being suspended can be program command or erasing order.
The order being suspended if it does not exist, in Low Priority Queuing when pending order (740), from low preferential
Grade queue, which obtains, to be ordered and handles.Optionally, order in Low Priority Queuing always program command or erasing order are appeared in.
If the order to be processed in Low Priority Queuing is erasing order, Media Interface Connector controller obtains and handles the erasing
It orders (742).If the order to be processed in Low Priority Queuing is program command, Media Interface Connector controller obtains and handles the volume
Journey order (744).
Optionally, if being constantly present order to be processed in high-priority queue, to avoid the life in Low Priority Queuing
Order cannot handle for a long time and influence user experience, by-pass mechanism be provided, under specified requirements, even if having in high-priority queue
Order to be processed also suspends the processing of the order to high-priority queue, and handles the order being suspended or low priority team
Order (715) in column.As an example, after the read command of the specified quantity of continuous processing high-priority queue or low
Order in priority query has waited specified time, and the specified requirements for by-pass mechanism meets.Still as an example, may be used
Specified quantity and/or the specified time of the foundation whether specified requirements meets are used for the setting of Media Interface Connector controller.
Still as an example, to the ratio of Media Interface Connector controller setting read operation and write operation, according to set ratio
Example, determines every N read command of processing, to handle M program command, and wherein N, M are positive integers, and N/M dependent on read operation and
The ratio of write operation.
Still as an example, to the type of service of Media Interface Connector controller setting priority processing.For example, setting priority processing
Program command.Correspondingly, specified requirements is after being spaced specified time or having handled the program command of specified quantity, to reprocess Gao You
Read command in first grade queue.
As another example, avoid the number suspended to same program command excessive.It is specified temporary to same program command
Stop the threshold value of number.When reaching threshold value, in step 720, the program command handled is waited to execute completion, and no longer suspended
The program command.And it after the completion of the program command executes, is obtained from high-priority queue and handles read command (722).Into
One step, avoid the suspendable number of same program command is cracking from exhausting, and cause to fall into a long wait programming life in step 720
The execution of order and increase high priority read command processing delay.In the specified requirements of step 715, according to execution program command
Timeslice s (for example, s=T/C) is arranged in the threshold value C of required time T and program command suspending count, in each timeslice,
To same program command, only allow program command 1 time that recovery is suspended.If being executed to program command in timeslice
Step 730, then the specified requirements of step 715 no longer meets in the timeslice.
Fig. 8 is the flow chart of the I/O command processing method after being occurred according to the powered-off fault of the another embodiment of the application, is used
In the Media Interface Connector controller according to the application Fig. 3, Fig. 4 or Fig. 5.
Influence in detecting that (810) occur for powered-off fault, Media Interface Connector controller cancel the erasing order that is handling or
The erasing order (if present) (820) being suspended.As an example, cancelled by sending reset command to LUN or NVM chip
The erasing order handled or the erasing order being suspended.As another example, for the erasing order being suspended,
First restore the erasing order being suspended, then sends reset command to LUN or NVM chip to cancel the erasing order handled.
Optionally, if desired cancelling has the read command handled or programming life on LUN the or NVM chip for the erasing order being suspended
It enables, after the completion of waiting these read commands or program command to execute, then cancels the erasing order being suspended.
Next, if Media Interface Connector controller gets read command or erasing order (830), directly lose time read command or
Erasing order is without being handled (835) to these orders.As an example, after powered-off fault generation, Media Interface Connector controller
Method according to figure 7 is preferentially obtained from high-priority queue and is ordered, and then abandons the read command or erasing order obtained；With
And method according to figure 7 preferentially obtains erasing order from Low Priority Queuing, and then abandons erasing order.In another example
In son, after powered-off fault generation, Media Interface Connector controller is no longer obtained from high-priority queue and is ordered, and only from low priority
Queue obtains order.
After powered-off fault generation, optionally, after step 820, the program command (840) being suspended if it exists,
Media Interface Connector controller restores the program command (842) being suspended；And from high-priority queue and/or Low Priority Queuing
It obtains program command (844), and handles program command (846).To which after powered-off fault generation, Media Interface Connector controller will
Whole processing capacities of LUN or NVM chip are for handling program command, to complete the working site to solid storage device as early as possible
Back-up job.
The present processes and device can be realized with hardware, software, firmware and any combination among the above.Hardware
It may include digital circuit, analog circuit, digital signal processor (DSP), dedicated succession circuit (ASIC) etc..Software can be with
Including computer-readable program, these computer-readable programs realize method described herein when being computer-executed.
The software of the application can also be stored in computer readable storage medium, such as hard disk, in CD etc., the calculating
Machine readable storage medium storing program for executing is stored with program, when described program is executed by an equipment, so that equipment progress is described above
Method.
The above, the only specific embodiment of the application, but the protection scope of the application is not limited thereto, it is any
Those familiar with the art within the technical scope of the present application, can easily think of the change or the replacement, and should all contain
Lid is within the scope of protection of this application.Therefore, the protection scope of the application should be based on the protection scope of the described claims.
Claims (10)
1. a kind of method for handling I/O command, comprising:
Identify that there are read commands to be processed for high-priority queue；
In response to thering is program command or erasing order handling in the logic unit of read command access, suspend the programming
Order or the erasing order；And
It is obtained from high-priority queue and handles the read command.
2. according to the method described in claim 1, further include:
Restore the program command being suspended or the erasing order；And
Handle the program command or the erasing order.
3. method according to claim 1 or 2, further includes:
I/O command is obtained from Low Priority Queuing；And
The acquired I/O command of processing.
4. method described in one of -3 according to claim 1, further includes:
Meet in response to specified requirements, pause obtains read command, and the program command that processing is suspended from high-priority queue
Or erasing order；Or
Meet in response to specified requirements, pause obtains read command from high-priority queue, and obtains simultaneously from Low Priority Queuing
Handle I/O command.
5. according to the method described in claim 4, wherein
It is processed without program command in response to the read command of continuous processing specified quantity, or at the appointed time, it will specify
Condition setting is to meet.
6. method according to claim 4 or 5, further includes:
The foundation whether specified requirements meets is set.
7. the method according to one of claim 4-6, further includes:
Specified requirements is set as meeting；And
It is processed without read command in response to the program command of continuous processing specified quantity, or within a specified time, it will refer to
Fixed condition is set as being unsatisfactory for.
8. method described in one of -7 according to claim 1, further includes:
In response to being abnormal power down, cancel the erasing order handled or the erasing order being suspended.
9. method described in one of -8 according to claim 1, further includes:
In response to being abnormal power down, if there is the first program command handled in logic unit, the first program command is waited
Execute completion.
10. a kind of solid storage device, including control unit and NVM chip；The control unit is wanted for executing according to right
Seek method described in one of 1-9.
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