CN108983520A - The display panel of anti-electrostatic discharging - Google Patents
The display panel of anti-electrostatic discharging Download PDFInfo
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- CN108983520A CN108983520A CN201811146394.6A CN201811146394A CN108983520A CN 108983520 A CN108983520 A CN 108983520A CN 201811146394 A CN201811146394 A CN 201811146394A CN 108983520 A CN108983520 A CN 108983520A
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136204—Arrangements to prevent high voltage or static electricity failures
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- Microelectronics & Electronic Packaging (AREA)
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- Crystallography & Structural Chemistry (AREA)
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- Optics & Photonics (AREA)
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- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Elimination Of Static Electricity (AREA)
Abstract
The present invention provides a kind of display panel of anti-electrostatic discharging, it the advantage is that, first ground line avoids the fan-out area of the first metal layer of large area, it avoids when product progress reliability test generation electrostatic is larger, the generation of static discharge, and then first ground line and the first metal layer fan-out line group short circuit are avoided, the ability of display panel anti-electrostatic discharging can be improved.
Description
Technical field
The present invention relates to field of liquid crystal display more particularly to a kind of display panels of anti-electrostatic discharging.
Background technique
The generation of electrostatic is inevitable in the industrial production, and will cause serious harm.It is quiet by taking electronics industry as an example
Electricity causes the failure or mistake of electronic equipment mainly in the form of static discharge (electro-static discharge, ESD)
Movement causes electromagnetic interference and electronic product fluctuation of service, breakdown integrated circuit and accurate electronic component, or promotes electricity
Subcomponent aging reduces production yield rate.
In the product design of liquid crystal display panel (LCD), the method that the protection design of Electro-static Driven Comb is commonly used is to show
For panel outermost by the ground terminal (GND) of ground terminal access driving chip (IC) of flexible circuit board, effect is that shielding is outer
Boundary's charge protects display panel internal structure.Specifically, Fig. 1 is the vertical view signal of existing LCD panel Electrostatic Protection Design
Figure, Fig. 2 is the enlarged diagram at the position A in Fig. 1.Fig. 1 and Fig. 2 is please referred to, the liquid crystal display panel includes a film crystal
Pipe substrate (TFT) 10 and the color membrane substrates (CF) 20 that 10 top of thin film transistor base plate is set.Wherein, thin film transistor (TFT)
Substrate 10 is painted by the structure that the color membrane substrates 20 block using dotted line.In liquid crystal display panel, film is brilliant
Body pipe substrate 10 is completed in SD processing procedure in one circle of panel periphery design, one second ground line 11, is connected to a ground pad (FPC
GND Pad) 12, the ground pad connection of the ground pad and flexible circuit board, for stopping or guiding the film crystal
The electrostatic of 10 side of pipe substrate;20 side of color membrane substrates can not do ground connection cabling because of no metallic circuit, for guide follow-up process or
The electrostatic of color membrane substrates side when product E SD is tested can do an elargol conductiving point 21 in 10 side of thin film transistor base plate, by described
20 side of color membrane substrates is connected to one first ground line 13 of 10 side of thin film transistor base plate, institute by elargol conductiving point 21
It states the first ground line 13 and is then connected to the ground pad 12, so that the electrostatic of 20 side of color membrane substrates be guided.
The shortcomings that above method is, referring to Fig. 2, on the thin film transistor base plate 10, the thin film transistor (TFT)
The fan-out line 14 of one the first metal layer of substrate 10 (blocks, then since the fan-out line group 14 of the first metal layer is passivated layer
It is painted in the accompanying drawings using dotted line) it is concentrically formed a fan-out area C and is connect with a first metal layer pad 15, first gold medal
Belong to layer pad 15 to connect with the signal wire pad of flexible circuit board.First ground line 13 belongs to second metal layer, need to be across fan
Region C is connect with the ground pad 12 out.First ground line, 13 bottoms have being fanned out to for the first metal layer of large area
Line 14, and only (do not drawn in attached drawing by passivation layer (ILD) between the fan-out line 14 of the first metal layer and first ground line 13
Show) barrier, then product carry out reliability test generate electrostatic it is larger when, easily generation ESD, cause it is described first ground line 13 with
14 short circuit of fan-out line of the first metal layer.Since the fan-out line 14 of the first metal layer is separately connected flexible circuit board
TP/CT/DMUX/CK/GAS/VGL equisignal line, then ESD will lead to the short circuit of those signal wires, to keep the display panel aobvious
Show exception.
Summary of the invention
The technical problem to be solved by the invention is to provide a kind of display panels of anti-electrostatic discharging, can reduce quiet
Discharge of electricity.
To solve the above-mentioned problems, the present invention provides a kind of display panels for reducing static discharge, including one first base
Plate and a second substrate, the first substrate are oppositely arranged with the second substrate, and the first substrate includes at least one first
Metal layer fan-out line group, at least a first metal layer weld pad group, at least a conductive salient point, at least one first ground line and at least one
First ground pad, the first metal layer fan-out line group are connect with the first metal layer weld pad group, the conductive salient point with
The metal routing of the second substrate connects, and one end of first ground line is connect with the conductive salient point, and described first connects
The other end of ground wire bypasses the side and institute that the first metal layer weld pad group is not connect with the first metal layer fan-out line group
State the connection of the first ground pad.
In one embodiment, the first metal layer weld pad group is arranged in the conductive salient point and first ground pad
Between.
In one embodiment, the first substrate includes symmetrically arranged two the first metal layer fan-out line groups, two
A the first metal layer weld pad group, two conductive salient points, two first ground lines and two first ground connection
Weld pad.
In one embodiment, an edge of the first substrate protrudes from an edge of the second substrate, is formed on one side
Frame region, the first metal layer fan-out line group, the first metal layer weld pad group, the conductive salient point, first ground connection
Line and first ground pad are arranged in the frame region.
In one embodiment, the first substrate further include one the first substrate periphery is set substrate ground line,
At least one second ground line and at least one second ground pad, the substrate ground line are connected to institute by second ground line
State the second ground pad.
In one embodiment, the first substrate includes symmetrically arranged two second ground lines and two described the
Two ground pads, the substrate ground wire loop are arranged around the first substrate, the both ends of the substrate ground line respectively with one
The second ground line connection.
In one embodiment, one end of second ground line is connect with the substrate ground line, second ground line
The side that connect with the first metal layer fan-out line group around the first metal layer weld pad group of the other end and described the
The connection of two ground pads.
In one embodiment, one end of second ground line is connect with the substrate ground line, second ground line
The other end pass through the first metal layer fan-out line group and the first metal layer weld pad group junction connect with described second
Weld pad connection in ground has a dielectric isolation layer between second ground line and the first metal layer fan-out line group.
In one embodiment, the first substrate further includes an at least second metal layer fan-out line group, second metal
There is a dielectric isolation layer between layer fan-out line group and the first metal layer fan-out line group.
In one embodiment, the first substrate is thin film transistor base plate, and the second substrate is color membrane substrates.
It is an advantage of the current invention that first ground line avoids the fan-out area of the first metal layer of large area, avoid
Product carry out reliability test generate electrostatic it is larger when, the generation of static discharge, so avoid first ground line with
The first metal layer fan-out line group short circuit, can be improved the ability of display panel anti-electrostatic discharging.
Detailed description of the invention
Fig. 1 is the schematic top plan view of existing LCD panel Electrostatic Protection Design;
Fig. 2 is the enlarged diagram at the position A in Fig. 1;
Fig. 3 is the overlooking structure diagram for the display panel that the present invention reduces static discharge;
Fig. 4 is the enlarged diagram at the position B in Fig. 3.
Specific embodiment
The specific embodiment of the display panel provided by the invention for reducing static discharge is done in detail with reference to the accompanying drawing
Explanation.
Fig. 3 is the overlooking structure diagram of the display panel of anti-electrostatic discharging of the present invention, and Fig. 4 is the amplification at the position B in Fig. 3
Schematic diagram.Fig. 3 and Fig. 4 is please referred to, the display panel that the present invention reduces static discharge includes a first substrate 30 and one second base
Plate 40.In the present embodiment, the first substrate 30 is thin film transistor base plate, i.e. TFT substrate, and the second substrate 40 is coloured silk
Ilm substrate, i.e. CF substrate.The first substrate 30 is oppositely arranged with the second substrate 40, the first substrate 30 described in Fig. 3
The lower section of the second substrate 40 is set.In order to clearly illustrate technical solution of the present invention, in the accompanying drawings, knot of the present invention
Structure is painted by the part that the second substrate 40 is blocked using dotted line, for example, 36 quilt of substrate ground line of the second substrate 30
The part that the second substrate 40 is blocked is painted using dotted line, and suitably exaggerates the size of all parts.In the present embodiment, institute
Stating first substrate 30 is thin film transistor base plate (TFT substrate), and the second substrate 40 is color membrane substrates (CF substrate).
The first substrate 30 includes an at least the first metal layer fan-out line group 31, at least one the first metal layer weld pad group
32, an at least conductive salient point 33, at least one first ground line 34 and at least one first ground pad 35, due to first metal
Layer fan-out line group 31 is blocked by dielectric isolation layer, then is painted in the accompanying drawings using dotted line).One edge of the first substrate 30 is prominent
For the second substrate 40, a frame region S, the first metal layer fan-out line group 31, the first metal layer weldering are formed
Pad group 32, the conductive salient point 33, first ground line 34 and first ground pad 35 are arranged in the frame region S
It is interior.For example, in the present embodiment, the lower edge of the first substrate 30 protrudes from the lower edge of the second substrate 40, formed
One frame region S, i.e., following frame region are the first metal layer fan-out line group 31, the first metal layer weld pad group 32, described
Conductive salient point 33, first ground line 34 and first ground pad 35 are arranged in the following frame region.At other
In embodiment, the side edge of the first substrate 30 protrudes from the side edge of the second substrate 40, forms a frame region S,
That is side frame region, the first metal layer fan-out line group 31, the first metal layer weld pad group 32, the conductive salient point 33,
First ground line 34 and first ground pad 35 are arranged in the side frame region.
The first metal layer fan-out line group 31 is used for the scan line (not being painted in attached drawing) etc. of the first substrate 30
The metal wire for belonging to the first metal layer is fanned out to, one end of the first metal layer fan-out line group 31 and the gold of the first metal layer
Belong to line connection, the other end of the first metal layer fan-out line group 31 is connect with the first metal layer weld pad group 32.It is showing
In the manufacture craft of panel, the first metal layer fan-out line group 31 and the metal wire of the first metal layer make simultaneously, belong to
The first metal layer.The first metal layer fan-out line group 31 includes more the first metal layer fan-out lines 311, is only illustrated in Fig. 4
Five the first metal layer fan-out lines 311 are painted to property, in the practical structures of display panel, the first metal layer fan-out line group
The quantity of the 31 the first metal layer fan-out lines 311 for including is not limited to five, needs the practical need according to the first substrate 30
Depending on asking.Wherein, the region where defining the first metal layer fan-out line group 31 is fan-out area C.
The first metal layer weld pad group 32 is located at the side of the fan-out area C.Specifically, the first metal layer
Weld pad group 32 is located at the side that the fan-out area C deviates from 30 center of first substrate.For example, in the present embodiment, it is described
Frame region S is following frame region, then the first metal layer weld pad group 32 is located at the lower section of the fan-out area C.Described
One metal layer weld pad group 32 includes multiple the first metal layer weld pads 321, and five the first metal layers are only symbolically painted in Fig. 4
Weld pad 321.Wherein, the first metal layer weld pad 321 of the first metal layer weld pad group 32 includes but is not limited to provide TP/CT/
The signals such as DMUX/CK/GAS/VGL.In display panel, the flexible circuit board with IC chip can be welded with the first metal layer
Pad group 32 is welded, and the first metal layer is connected to IC chip.
The conductive salient point 33 is connect with the metal routing of the second substrate 40.Specifically, the conductive salient point 33
The second substrate 40 is extended to, the second substrate 40 needs the metal routing being grounded to connect with the conductive salient point 33.It is described to lead
Electric salient point 33 includes but is not limited to elargol conductive salient point.
It is described first ground line 34 one end connect with the conductive salient point 33, it is described first be grounded 34 the other end around
Cross the side and first ground connection that the first metal layer weld pad group 321 is not connect with the first metal layer fan-out line group 31
Weld pad 35 connects.Specifically, in the surface of the first substrate 30, described first 34 one end of ground line and the conductive salient point
33 bottom connection, it is described first ground line 34 the other end then extend around the first metal layer weld pad group 321 not with institute
It is connect after stating the side of the connection of the first metal layer fan-out line group 31 with first ground pad 35.For example, in the present embodiment,
First ground line, 34 one end are connect with the bottom of the conductive salient point 33, and the other end of first ground line 34 then extends
It is connect behind lower end around the first metal layer weld pad group 321 with first ground pad 35.
The electrostatic of the second substrate 40 can be conducted via the conductive salient point 33 and first ground line 34 to the first ground connection
Weld pad 35, first ground pad 35 and the ground terminal of flexible circuit board weld, and then by the electrostatic of the second substrate 40
Export.It is described first ground line 34 the other end extend around the first metal layer weld pad group 321 not with first metal
The advantages of connecting behind the side of 31 connection of layer fan-out line group with first ground pad 35 is that first ground line 34 is kept away
The fan-out area C for opening the first metal layer of large area is avoided when product progress reliability test generation electrostatic is larger, electrostatic
The generation of electric discharge, and then first ground line 34 and 31 short circuit of the first metal layer fan-out line group are avoided, display can be improved
The ability of panel anti-electrostatic discharging.
In the present embodiment, the setting of the first metal layer weld pad group 32 is in the conductive salient point 33 and first ground connection
Between weld pad 35.Specifically, the edge of the frame region S, first ground pad is arranged in the conductive salient point 33
35 may be provided at the middle part of the frame region S, and the first metal layer weld pad group 32 is arranged between.Described first connects
If ground wire 34 is connect with first ground pad 35, need around the first metal layer weld pad group 32.Further, described
First substrate 30 includes 31, two the first metal layer weld pad groups of the symmetrically arranged two the first metal layer fan-out line groups
32, two conductive salient points 33, two, first ground line 34 and two first ground pads 35.For example, at this
In embodiment, described 32, two conductions of the first metal layer weld pad group of two the first metal layer fan-out line groups 31, two
Salient point 33, two first ground lines 34 and two first ground pads 35 are with the center line pair of the first substrate 30
Claim distribution.
The first substrate 30 further includes one the substrate ground line 36 of 30 periphery of the first substrate, at least 1 the being arranged in
Two ground lines 37 and at least one second ground pad 38.The substrate ground line 36 is connected to institute by second ground line 37
State the second ground pad 38.The substrate ground line 36 is used for the electrostatic of the first substrate 30 through second ground line 37
To the second ground pad 38, the ground terminal of second ground pad 38 and flexible circuit board is welded for conduction, and then by the institute
State the electrostatic export of first substrate 30.
Optionally, one end of second ground line 37 is connect with the substrate ground line 36, second ground line 37
The side that connect with the first metal layer fan-out line group 31 around the first metal layer weld pad group 32 of the other end after and
Second ground pad 38 connects.For example, one end of second ground line 37 is connect with the substrate ground line 36, it is described
The other end of second ground line 37 connects around behind the lower end of the first metal layer weld pad group 32 with second ground pad 38
It connects.It the advantage is that, second ground line 37 avoids the fan-out area C of the first metal layer of large area, avoids in product
Carry out reliability test generate electrostatic it is larger when, the generation of static discharge, and then avoid second ground line 37 and described the
One metal layer fan-out line group, 31 short circuit, can be improved the ability of the anti-ESD of display panel.
Optionally, in the present embodiment, the first substrate 30 includes symmetrically arranged two second ground lines 37
And two second ground pads 38.The substrate ground line 36 is arranged around the first substrate 30, the substrate ground
The both ends of line 36 are connect with second ground line 37 respectively.One end of second ground line 37 and the substrate ground
Line 36 connects, and the other end of second ground line 37 passes through the first metal layer weld pad group 32 and fans with the first metal layer
The junction (i.e. fan-out area C) of outlet group 31 is connect with second ground pad 38 afterwards.In the present embodiment, due to described
Substrate ground line 36 is arranged around the first substrate 30, so that the anti-ESD ability of the first substrate 30 is with respect to the second substrate 40
The ability of anti-ESD is stronger, so may also will not draw even if the other end of second ground line 37 passes through fan-out area C
Play static discharge.There is a dielectric isolation layer between second ground line 37 and the first metal layer fan-out line group 31
(not being painted in attached drawing), the dielectric isolation layer can be avoided second ground line 37 and the first metal layer fan-out line group
31 conductings.
Further, the first substrate 30 further includes an at least second metal layer fan-out line group 39.The second metal layer
The metal wire (not being painted in attached drawing) of the second metal layers such as the data line of one end of fan-out line group 39 and the first substrate 30 is even
It connects, the other end is connect with the second metal layer weld pad group 50 of frame region S.In display panel, the flexible wires with IC chip
Road plate can be welded with the second metal layer weld pad group 50, and the second metal layer is connected to IC chip.Second gold medal
Belonging to layer fan-out line group 39 includes multiple second metal layer fan-out lines 391, and two second metal layers are only symbolically painted in Fig. 4
Fan-out line 391.The first substrate 30 may include two symmetrically arranged second metal layer fan-out line groups 39, then corresponds to
Ground, the first substrate 30 include two symmetrically arranged second metal layer weld pad groups 50.
Between the second metal layer fan-out line group 39 and the first metal layer fan-out line group 31 also have one insulation every
Absciss layer (is not painted) in attached drawing, and the dielectric isolation layer can be avoided the second metal layer fan-out line group 39 and first gold medal
Belong to layer fan-out line group 31 to be connected.
The above is only a preferred embodiment of the present invention, it is noted that for the ordinary skill people of the art
Member, various improvements and modifications may be made without departing from the principle of the present invention, these improvements and modifications also should be regarded as
Protection scope of the present invention.
Claims (10)
1. a kind of display panel of anti-electrostatic discharging, which is characterized in that including a first substrate and a second substrate, described first
Substrate is oppositely arranged with the second substrate, and the first substrate includes an at least the first metal layer fan-out line group, at least 1 the
One metal layer weld pad group, at least a conductive salient point, at least one first ground line and at least one first ground pad, first gold medal
Belong to layer fan-out line group to connect with the first metal layer weld pad group, the metal routing of the conductive salient point and the second substrate connects
It connects, one end of first ground line is connect with the conductive salient point, and the other end of first ground line bypasses described first
The side that metal layer weld pad group is not connect with the first metal layer fan-out line group is connect with first ground pad.
2. the display panel of anti-electrostatic discharging according to claim 1, which is characterized in that the first metal layer weld pad group
It is arranged between the conductive salient point and first ground pad.
3. the display panel of anti-electrostatic discharging according to claim 1, which is characterized in that the first substrate includes symmetrical
Two be arranged the first metal layer fan-out line group, two the first metal layer weld pad groups, two conductive salient points, two
A first ground line and two first ground pads.
4. the display panel of anti-electrostatic discharging according to claim 1, which is characterized in that an edge of the first substrate
An edge of the second substrate is protruded from, a frame region, the first metal layer fan-out line group, first metal are formed
Layer weld pad group, the conductive salient point, first ground line and first ground pad are arranged in the frame region.
5. the display panel of anti-electrostatic discharging according to claim 1, which is characterized in that the first substrate further includes one
The substrate ground line, at least one second ground line and at least one second ground pad of the first substrate periphery are set, it is described
Substrate ground line is connected to second ground pad by second ground line.
6. the display panel of anti-electrostatic discharging according to claim 5, which is characterized in that the first substrate includes symmetrical
Two be arranged, second ground line and two second ground pads, the substrate ground wire loop is around the first substrate
Setting, the both ends of the substrate ground line are connected with second ground line respectively.
7. the display panel of anti-electrostatic discharging according to claim 5, which is characterized in that one end of second ground line
It is connect with the substrate ground line, the other end of second ground line is around the first metal layer weld pad group not with described the
The side of one metal layer fan-out line group connection is connect with second ground pad.
8. the display panel of anti-electrostatic discharging according to claim 5, which is characterized in that one end of second ground line
It is connect with the substrate ground line, the other end of second ground line passes through the first metal layer fan-out line group and described the
The junction of one metal layer weld pad group is connect with second ground pad, in second ground line and the first metal layer
There is a dielectric isolation layer between fan-out line group.
9. the display panel of anti-electrostatic discharging according to claim 1, which is characterized in that the first substrate further include to
A few second metal layer fan-out line group, has between the second metal layer fan-out line group and the first metal layer fan-out line group
One dielectric isolation layer.
10. the display panel of anti-electrostatic discharging according to claim 1, which is characterized in that the first substrate is film
Transistor base, the second substrate are color membrane substrates.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
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CN201811146394.6A CN108983520B (en) | 2018-09-29 | 2018-09-29 | Display panel with anti-electrostatic discharge |
PCT/CN2018/117896 WO2020062535A1 (en) | 2018-09-29 | 2018-11-28 | Electrostatic discharge resistant display panel |
Applications Claiming Priority (1)
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CN201811146394.6A CN108983520B (en) | 2018-09-29 | 2018-09-29 | Display panel with anti-electrostatic discharge |
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CN108983520B CN108983520B (en) | 2021-04-02 |
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CN201811146394.6A Active CN108983520B (en) | 2018-09-29 | 2018-09-29 | Display panel with anti-electrostatic discharge |
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Cited By (1)
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CN114501967A (en) * | 2022-01-20 | 2022-05-13 | 绵阳惠科光电科技有限公司 | Display panel and electronic device |
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CN106405962A (en) * | 2016-10-31 | 2017-02-15 | 深圳市华星光电技术有限公司 | Array substrate, manufacturing method of routing line and test pad of array substrate as well as liquid crystal panel |
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CN114501967A (en) * | 2022-01-20 | 2022-05-13 | 绵阳惠科光电科技有限公司 | Display panel and electronic device |
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