CN108962980B - Flexible panel and device with display panel - Google Patents
Flexible panel and device with display panel Download PDFInfo
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- CN108962980B CN108962980B CN201810715250.1A CN201810715250A CN108962980B CN 108962980 B CN108962980 B CN 108962980B CN 201810715250 A CN201810715250 A CN 201810715250A CN 108962980 B CN108962980 B CN 108962980B
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- 238000005452 bending Methods 0.000 claims abstract description 229
- 239000010409 thin film Substances 0.000 claims abstract description 145
- 230000015556 catabolic process Effects 0.000 abstract description 5
- 238000006731 degradation reaction Methods 0.000 abstract description 5
- 230000007547 defect Effects 0.000 description 19
- 238000010586 diagram Methods 0.000 description 9
- 238000003491 array Methods 0.000 description 3
- 230000002708 enhancing effect Effects 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000002035 prolonged effect Effects 0.000 description 2
- 239000000969 carrier Substances 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 239000010408 film Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1218—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or structure of the substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1025—Channel region of field-effect devices
- H01L29/1029—Channel region of field-effect devices of field-effect transistors
- H01L29/1033—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
- H01L29/41725—Source or drain electrodes for field effect devices
- H01L29/41733—Source or drain electrodes for field effect devices for thin film transistors with insulated gate
Abstract
The invention discloses a flexible panel and a device with a display panel, wherein the flexible panel comprises a flexible backboard and a plurality of thin film transistors which are arranged on the flexible backboard in a plurality of groups of array arrangement, each thin film transistor comprises a first electrode and a second electrode which are paired into a source electrode and a drain electrode, a channel region is formed between the first electrode and the second electrode, the flexible panel is provided with a bending shaft, and at least one of the first electrode and the second electrode of the plurality of thin film transistors which are arranged along the bending shaft is overlapped with the bending shaft. The channel regions of the plurality of thin film transistors arranged along the bending axis are non-uniform channels. Therefore, the invention can effectively weaken the electrical degradation of the thin film transistor caused by stress, increase the bending times of the flexible panel and further improve the service life of the flexible panel.
Description
Technical Field
The invention relates to the technical field of display, in particular to a flexible panel and a device with a display panel.
Background
The Transistor is a key device for manufacturing a display device, wherein a Thin-Film Transistor (TFT) is an electronic device widely used in a display device, and the TFT is more applied in a flexible and foldable product, so that the requirement on the stability of the TFT is higher, and a stress concentration region generated when a channel of the TFT is bent in a flexible panel is often easily bent, thereby generating a stress defect and affecting the normal operation of the TFT and a light emitting device in the display device.
At present, a conventional thin film transistor generally passes through a channel region of the whole thin film transistor through a flexible display screen in a bending axial direction, so that a stress defect caused when the flexible display screen is bent is avoided, as shown in fig. 1, the channel region where the thin film transistor is formed on the flexible display screen is a uniform channel. However, for the thin film transistors with the same area to form the channel region, if the flexible display screen adopts the thin film transistors with uniform channel arrangement, since the flexible display screen axially penetrates through the channel region of the thin film transistor with the bending axis, the stress area formed on the channel region of the thin film transistor by the flexible display screen is relatively large, that is, the proportion of the stress area occupying the channel region of the same area is relatively large.
Disclosure of Invention
Therefore, the technical problem to be solved by the present invention is to overcome the defect that the thin film transistor adopting the uniform channel design in the prior art still generates stress in the stress concentration region of the flexible display screen due to stress, which will cause electrical degradation of the thin film transistor and increase the pressure drift of the channel region of the thin film transistor, thereby reducing the service life of the product.
Therefore, the invention provides the following technical scheme:
the invention provides a flexible panel, which comprises a flexible backboard and a plurality of thin film transistors arranged on the flexible backboard in a plurality of groups of arrays, wherein each thin film transistor comprises a first electrode and a second electrode which are paired into a source electrode and a drain electrode, a channel region is formed between the first electrode and the second electrode, the flexible panel is provided with a bending shaft, and at least one of the first electrode and the second electrode of the thin film transistors arranged along the bending shaft is overlapped with the bending shaft.
Optionally, the channel regions of the plurality of thin film transistors arranged along the bending axis are non-uniform channels.
Optionally, a projection of an overlapping area of the bending axis and the non-uniform channel on the bending axis is smaller than a maximum projection of the non-uniform channel on the bending axis, and/or the non-uniform channel is not overlapped with the bending axis.
Optionally, the first electrode is parallel to the bending axis, the second electrode is in a semi-surrounding structure, and one end of the first electrode is located in the semi-surrounding structure, and the channel region is disposed in a region formed by the first electrode being semi-surrounded by the second electrode.
Optionally, each group of the thin film transistors arranged in the array is located on a straight line in the same row, and the opening directions of the second electrodes are the same.
Optionally, each group of the thin film transistors arranged in the array is located on a straight line in the same row, and the opening directions of the second electrodes of two adjacent thin film transistors are opposite.
Optionally, each group of the thin film transistors arranged in the array is located on a straight line in the same row, and the opening directions of the second electrodes of at least two adjacent thin film transistors are the same.
Optionally, the thin film transistors in two adjacent columns are arranged in a staggered manner.
Optionally, the flexible panel, the second electrode having the semi-enclosed structure, includes:
a first straight line part arranged perpendicular to the bending axis;
and the two second straight line parts are arranged in parallel with the bending shaft and are respectively connected with two ends of the first straight line part.
Optionally, in the plurality of thin film transistors arranged along the bending axis, at least a part of the first electrodes in the thin film transistors extend along the bending axis.
Optionally, in the plurality of thin film transistors arranged along the bending axis, at least a part of the first electrodes of the thin film transistors extend along the bending axis; at least part of a second straight line part of the thin film transistor extends along the bending axis.
The embodiment of the invention provides a device with a display panel, which is the flexible panel.
The technical scheme of the embodiment of the invention has the following advantages:
the invention provides a device with a display panel, wherein the flexible panel comprises a flexible backboard and a plurality of thin film transistors which are arranged on the flexible backboard in a plurality of groups of arrays, each thin film transistor comprises a first electrode and a second electrode which are paired into a source electrode and a drain electrode, a channel region is formed between the first electrode and the second electrode, the flexible panel is provided with a bending axis, and at least one of the first electrode and the second electrode of the plurality of thin film transistors which are arranged along the bending axis is overlapped with the bending axis. The channel regions of the plurality of thin film transistors arranged along the bending axis are non-uniform channels. Therefore, the invention can effectively weaken the electrical degradation of the thin film transistor caused by stress, increase the bending times of the flexible panel and further improve the service life of the flexible panel.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings can be obtained by those skilled in the art without creative efforts.
FIG. 1 is a schematic structural diagram of a thin film transistor with a uniform channel according to the prior art;
FIG. 2 is a schematic view of a first structure of a flexible panel according to an embodiment of the present invention;
FIG. 3 is a diagram illustrating a first structure of a TFT in a flexible panel according to an embodiment of the invention;
FIG. 4 is a diagram illustrating a second structure of a TFT in a flexible panel according to an embodiment of the present invention;
FIG. 5 is a diagram illustrating a third structure of a TFT in a flexible panel according to an embodiment of the present invention;
FIG. 6A is a graph of gate voltage for a thin film transistor employing a uniform channel in an embodiment of the present invention;
FIG. 6B is a graph of gate voltage for a TFT with a non-uniform channel according to an embodiment of the present invention;
FIG. 7 is a schematic diagram of a second structure of a flexible panel according to an embodiment of the invention;
FIG. 8 is a schematic view of a third structure of a flexible panel according to an embodiment of the present invention;
FIG. 9 is a fourth structural diagram of a flexible panel according to an embodiment of the present invention;
FIG. 10 is a schematic diagram of a fifth configuration of a flexible panel in an embodiment of the invention;
FIG. 11 is a schematic diagram of a sixth configuration of a flexible panel in an embodiment of the invention;
FIG. 12 is a schematic view of a seventh structure of a flexible panel according to an embodiment of the present invention;
FIG. 13 is a schematic view of an eighth structure of a flexible panel according to an embodiment of the present invention;
fig. 14 is a schematic diagram of a ninth structure of the flexible panel according to the embodiment of the present invention.
Detailed Description
The technical solutions of the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings, and it is to be understood that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the description of the embodiments of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience in describing the embodiments of the present invention and simplifying the description, but do not indicate or imply that the referred devices or elements must have specific orientations, be configured in specific orientations, and operate, and thus, should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the description of the embodiments of the present invention, it should be noted that, unless explicitly stated or limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; the two elements may be directly connected or indirectly connected through an intermediate medium, or may be communicated with each other inside the two elements, or may be wirelessly connected or wired connected. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.
In addition, the technical features involved in the different embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.
Example 1
An embodiment of the present invention provides a flexible panel, as shown in fig. 2, including a flexible backplane and a plurality of thin film transistors arranged on the flexible backplane in a plurality of groups in an array. A Thin-Film Transistor (TFT) is one of the types of field effect transistors, and specifically, may be an insulated gate field effect Transistor, and is manufactured by depositing various films on a substrate, which plays an important role in the working performance of a display device. As shown in fig. 3, each thin film transistor includes a first electrode and a second electrode paired as a source and a drain, i.e., the first electrode is a source S and the second electrode is a drain D; or the first electrode is a drain D, and the second electrode is a source S; a channel region is formed between the source electrode S and the drain electrode D, and of course each thin film transistor further includes a gate electrode G, which is not specifically shown in fig. 3. In fig. 3, the bending axis of the flexible panel is located in the center of the channel region of the thin film transistor, and the axial region of the bending axis of the flexible panel is a stress concentration region, in fig. 3, the stress concentration region located in the channel region is the stress concentration region in the channel, the stress concentration region is a region which is easier to generate stress defect when the flexible panel is bent, and the non-stress concentration region is not usually located in the axial region of the bending axis and is not easy to generate stress defect. Stress concentration district makes the flexible panel take place to destroy because of stress failure easily, so when the flexible panel takes place to buckle, has produced stress on buckling the axle, so produce stress failure on buckling the axial region of axle relatively easily, and the not stress concentration district is not very easy to take place to damage because of the existence of stress. Therefore, in the embodiment, it is important to study that at least one of the first electrodes and the second electrodes of the plurality of thin film transistors arranged along the bending axis of the flexible panel is overlapped with the bending axis, and the channel regions of the plurality of thin film transistors arranged along the bending axis are non-uniform channels, so that the bending frequency of the flexible panel can be increased by the non-uniform channel regions, and the service life of the flexible panel is further prolonged.
Example 2
An embodiment of the present invention provides a flexible panel, as shown in fig. 2, including a flexible backplane and a plurality of thin film transistors arranged on the flexible backplane in a plurality of groups in an array, where each thin film transistor includes a first electrode and a second electrode, where the first electrode is a source S, the second electrode is a drain D, a channel region is formed between the first electrode and the second electrode, and the flexible panel has a bending axis. At least one of the first electrode and the second electrode of the thin film transistor arranged along the bending axis overlaps the bending axis. As shown in fig. 4, the bending axis overlaps only the second electrode (drain) of the thin film transistor, and does not overlap the first electrode (source). In fig. 3, the bending axis overlaps with both the first electrode (source) and the second electrode (drain) of the thin film transistor, respectively. For a plurality of groups of thin film transistors arranged in an array, any one of the first electrodes and the second electrodes of the plurality of thin film transistors arranged along the bending axis may overlap with the bending axis, or both the first electrodes and the second electrodes may overlap with the bending axis, and the channel regions of the plurality of thin film transistors arranged along the bending axis are non-uniform channels. In fig. 5, a projection of an overlapping region of the bending axis and the non-uniform channel on the bending axis is smaller than a maximum projection of the non-uniform channel on the bending axis, the projection of the overlapping region of the bending axis and the non-uniform channel on the bending axis is a first region a, the maximum projection of the non-uniform channel on the bending axis is a second region b, and an area of the first region a is smaller than an area of the second region b. The channel regions of the plurality of thin film transistors arranged along the bending axis are non-uniform channels, and in fig. 4, the non-uniform channels do not overlap the bending axis.
In an embodiment of the present invention, a flexible panel, a second electrode having a half-enclosed structure, includes: a first straight line part arranged perpendicular to the bending axis; and the two second straight line parts are arranged in parallel with the bending shaft and are respectively connected with two ends of the first straight line part. In fig. 3, the first straight portion of the second electrode having the semi-enclosed structure is disposed perpendicular to the bending axis, and the second electrode having the semi-enclosed structure further has two second straight portions disposed parallel to the bending axis.
In the flexible panel according to the embodiment of the present invention, the first electrode of the plurality of thin film transistors arranged along the bending axis may be a part of the thin film transistors extending along the bending axis. In fig. 3, the first electrode is a source electrode, and the source electrode may be disposed along the bending axis direction.
In the flexible panel according to the embodiment of the present invention, among the plurality of thin film transistors arranged along the bending axis, a portion of the first electrode of the thin film transistor may extend along the bending axis, and a second linear portion of the thin film transistor extends along the bending axis. In fig. 3, the first electrode is a source electrode, the second electrode is a drain electrode, the source electrode may be disposed along the bending axis direction, and any one of the two straight portions of the second electrode may be disposed along the bending axis direction.
In fig. 3, in the flexible panel according to the embodiment of the present invention, the first electrode is parallel to the bending axis, the second electrode is in a half-surrounded structure, one end of the first electrode is located in the half-surrounded structure, the first electrode and the second electrode are paired to be a source or a drain, and a channel region formed between the first electrode and the second electrode is a region where the first electrode is half-surrounded by the second electrode. In fig. 3, when the first electrode is a source electrode and the second electrode is a drain electrode, one end of the first electrode is located in the semi-surrounding structure, and the second electrode is in the semi-surrounding structure. Of course, when the first electrode is a source electrode and the second electrode is a drain electrode, one end of the second electrode may be located in the semi-surrounding structure, and the first electrode may be in the semi-surrounding structure. In fig. 1, a bending axis of the flexible panel during bending penetrates through a channel region between the source S and the drain D, and the bending axis of the flexible panel during bending penetrates through a channel region between the source S and the drain D to form a uniform channel, and because the bending axis of the flexible panel penetrates through a channel region of the thin film transistor to form a stress concentration region, it is found by comparing fig. 3 in fig. 1 that a ratio of the stress concentration region in fig. 1 to the channel region is much larger than a ratio of the stress concentration region in fig. 3 to the channel region, which means that the area of the stress concentration region in the channel region in fig. 1 is larger, which is more likely to induce the thin film transistor to generate stress defects, so that the non-uniform channel formed between the source S and the drain D of the transistor arranged on the flexible panel in the embodiment can effectively reduce the stress defects and reduce the pressure drift of the channel region of the thin film transistor, thereby enhancing the electrical characteristics of the thin film transistor and further enhancing the service life of the flexible panel.
As another alternative embodiment, in the flexible panel according to the embodiment of the present invention, for the uniform channel, at least one of the first electrode and the second electrode of the thin film transistor arranged along the bending axis overlaps with the bending axis, which is also an implementation that can be implemented, but the non-uniform channel is used, and the case where at least one of the first electrode and the second electrode of the thin film transistor arranged along the bending axis overlaps with the bending axis is widely used.
Specifically, as is apparent from fig. 6A and 6B, the pressure drift for the uniform channel, and the thin film transistor not arranged along the bending axis, is apparent on the graph in fig. 6A, and the pressure drift for the non-uniform channel is weak as is apparent on the graph in fig. 6B. After the pressure drift is damaged due to stress generated in the channel region of the thin film transistor, the carriers in the channel region of the thin film transistor change to generate the pressure drift. Therefore, the non-uniform channel adopted for the flexible panel can weaken the degradation of the electrical characteristics of the thin film transistor caused by stress to a great extent, so that the bending use times of the flexible panel are increased, and the service life of the flexible panel is prolonged.
Example 3
The invention provides a flexible panel, which comprises a flexible backboard and a plurality of thin film transistors arranged on the flexible backboard in a plurality of groups of arrays, as shown in fig. 2, each thin film transistor comprises a source electrode S and a drain electrode D, a channel region is formed between the source electrode S and the drain electrode D, of course, each thin film transistor also comprises a grid electrode G, and the grid electrode G is not specifically shown in fig. 2. In fig. 2, the bending axis of the flexible panel is located in the center of the channel region of the thin film transistor, and the axial region of the bending axis of the flexible panel is a stress concentration region, which is a region where stress defects are more easily generated when the flexible panel is bent, and it can be seen from fig. 2 that the stress concentration region in the non-uniform channel belongs to a partial region of the non-uniform channel, but is not a non-stress concentration region in the axial region of the bending axis of the flexible panel. In fig. 2, the source S is half surrounded by the drain D and parallel to the bending axis, and the bending axis is parallel to the lateral direction of the flexible panel, so that the flexible panel is generally bent in the lateral direction, and the channel region is located on the region where the source S is half surrounded by the drain D. In fig. 2, in the thin film transistors arranged along the bending axis, there is an overlap between the bending axis of the flexible panel and the source S and drain D, because the channel region of the thin film transistor arranged along the bending axis is a non-uniform channel, and the projection of the overlapping region of the bending axis and the non-uniform channel on the bending axis is smaller than the maximum projection of the non-uniform channel on the bending axis. In fig. 2, it can be seen that the overlapping region of the bending axis and the non-uniform channel occupies only a partial region of the non-uniform channel, and the area of the stress concentration region existing on the non-uniform channel is small. In fig. 2, the tfts in each group are located on the same straight line, and the opening direction of the drain D of each tft is the same, and in fig. 2, the openings of the drains D of the tfts in the same straight line, that is, the same row, are all facing to the left, where the row in the same row is parallel to the bending axis. In fig. 2, it can be seen that the area range of the stress concentration region of the channel region of the thin film transistors arranged along the bending axis is relatively small, which can significantly reduce stress damage to the flexible panel, and further can improve the bending-resistant times of the flexible panel and enhance the electrical characteristics of the thin film transistors.
Example 4
An embodiment of the present invention provides a flexible panel, as shown in fig. 7, including a flexible backplane and a plurality of thin film transistors arranged on the flexible backplane in a plurality of groups in an array, where each thin film transistor includes a source S and a drain D, a channel region is formed between the source S and the drain D, and of course, each thin film transistor further includes a gate G, and the gate G is not specifically shown in fig. 7. In fig. 7, the bending axis of the flexible panel is located in the center of the channel region of the thin film transistor, and the axial region of the bending axis of the flexible panel is a stress concentration region, which is a region where stress defects are more easily generated when the flexible panel is bent, and it can be seen from fig. 7 that the stress concentration region in the non-uniform channel belongs to a partial region of the non-uniform channel, but is not a non-stress concentration region in the axial region of the bending axis of the flexible panel. In fig. 7, the source S is half surrounded by the drain D and parallel to the bending axis, and the bending axis is parallel to the lateral direction of the flexible panel, so that the flexible panel is generally bent in the lateral direction, and the channel region is located on the region where the source S is half surrounded by the drain D. In fig. 7, the source electrodes and the drain electrodes of the plurality of thin film transistors arranged along the bending axis respectively overlap with the bending axis, wherein the bending axis is parallel to the source electrodes but partially overlaps with the source electrodes, the bending axis intersects with the drain electrodes and partially overlaps with the bending axis, and the projection of the overlapping region of the bending axis and the non-uniform channel on the bending axis is smaller than the maximum projection of the non-uniform channel on the bending axis. In fig. 7, each group of thin film transistors arranged in an array are located on a straight line in the same row, and the opening direction of the drain D of each thin film transistor is the same, where the row in the same row is a direction parallel to the bending axis, where one end of the source S points to the drain D, and the source S can be semi-surrounded, the opening directions of the drains D of the thin film transistors arranged in an array on the same straight line, i.e. the same row, in fig. 7 are all facing to the right, the channel region located in the bending axis direction of the flexible panel is generally a stress concentration region, in fig. 7, the overlapping region of the bending axis and the non-uniform channel only occupies a partial region of the non-uniform channel, i.e. the stress concentration region in the non-uniform channel belongs to a partial region of the non-uniform channel, and is not a non-stress concentration region in the axial region of the bending axis of the flexible panel, stress damage to the flexible panel can be remarkably reduced, so that the bending resistance times of the flexible panel can be improved, and the electrical characteristics of the thin film transistor are enhanced.
Example 5
The flexible panel in the embodiment of the present invention includes a flexible backplane and a plurality of thin film transistors arranged on the flexible backplane in a plurality of groups in an array, as shown in fig. 8, each thin film transistor includes a source S and a drain D, a channel region is formed between the source S and the drain D, and of course, each thin film transistor further includes a gate G, which is not specifically shown in fig. 8. In fig. 8, the bending axis of the flexible panel is located in the center of the channel region of the thin film transistor, and the axial region of the bending axis of the flexible panel is a stress concentration region, which is a region where stress defects are more easily generated when the flexible panel is bent, and it can be seen from fig. 8 that the stress concentration region in the non-uniform channel belongs to a partial region of the non-uniform channel, but is not a non-stress concentration region in the axial region of the bending axis of the flexible panel. In fig. 8, a plurality of tfts arranged along a bending axis and a source electrode and a drain electrode are respectively overlapped with the bending axis, wherein the bending axis is parallel to the source electrode but partially overlapped with the source electrode, the bending axis intersects with the drain electrode and partially overlapped with the bending axis, and a projection of an overlapped area of the bending axis and the non-uniform channel on the bending axis is smaller than a maximum projection of the non-uniform channel on the bending axis. In fig. 8, the source S is half surrounded by the drain D and parallel to the bending axis, and the bending axis is parallel to the lateral direction of the flexible panel, so that the flexible panel is generally bent in the lateral direction, and the channel region is located on the region where the source S is half surrounded by the drain D. In fig. 8, each group of tfts arranged in an array is located on a straight line in a same row, and the opening directions of the drains D of two adjacent tfts are opposite, where the row in the same row is parallel to the bending axis, one end of the source S points to the drain D, and the drain D may semi-surround the source S. In fig. 8, the overlapping region of the bending axis and the non-uniform channel only occupies a partial region of the non-uniform channel, i.e., the stress concentration region in the non-uniform channel belongs to a partial region of the non-uniform channel, but not the non-stress concentration region in the axial region of the bending axis of the flexible panel, so that it can be obviously seen that the area range of the stress concentration region of the non-uniform channel is smaller, the stress damage to the flexible panel can be significantly reduced, the bending-resistant times of the flexible panel can be further improved, and the electrical characteristics of the thin film transistor can be enhanced.
Example 6
In an embodiment of the present invention, a flexible panel is provided, including a flexible backplane and a plurality of thin film transistors arranged on the flexible backplane in a plurality of groups in an array, as shown in fig. 9, each thin film transistor includes a source S and a drain D, a channel region is formed between the source S and the drain D, and of course, each thin film transistor further includes a gate G, which is not specifically shown in fig. 9. In fig. 9, the bending axis of the flexible panel is located at the center of the tft, and the source and drain electrodes of the tfts arranged along the bending axis overlap with the bending axis, where the bending axis is parallel to the source electrode but partially overlaps with the source electrode, the bending axis intersects with the drain electrode and partially overlaps with the bending axis, and a projection of an overlapping region of the bending axis and the non-uniform channel on the bending axis is smaller than a maximum projection of the non-uniform channel on the bending axis. In fig. 9, the axial region of the bending shaft of the flexible panel is a stress concentration region, which is a region where stress defect is easily generated when the flexible panel is bent, and it can be seen from fig. 9 that the stress concentration region in the non-uniform channel belongs to a partial region of the non-uniform channel, but is not in the non-stress concentration region in the axial region of the bending shaft of the flexible panel. In fig. 9, the source S is half surrounded by the drain D and parallel to the bending axis, and the bending axis is parallel to the lateral direction of the flexible panel, so that the flexible panel is generally bent in the lateral direction, and the channel region is located on the region where the source S is half surrounded by the drain D. This stress concentration district is the flexible panel and takes place the region that produces stress defect when buckling more easily, and not at the regional non-stress concentration district of the axial of the bending axis of flexible panel. In fig. 9, each group of thin film transistors arranged in an array are located on a straight line in the same row, the opening directions of the drains D of every two adjacent thin film transistors are the same, the row in the same row is a direction parallel to the bending axis, wherein one end of the source S points to the drain D, the drain D can semi-surround the source S, the thin film transistors arranged in an array on the same straight line in fig. 9 are located on the same row, the opening directions of the drains D of every two adjacent thin film transistors are the same, the channel region located in the bending axis direction of the flexible panel is generally a stress concentration region, in fig. 9, the overlapping region of the bending axis and the non-uniform channel only occupies a partial region of the non-uniform channel, that is, the stress concentration region in the non-uniform channel belongs to a partial region of the non-uniform channel, but is not located in the axial region of the bending axis of the flexible panel, it can be obviously seen that the area range of the stress concentration region of, stress damage to the flexible panel can be remarkably reduced, so that the bending resistance times of the flexible panel can be improved, and the electrical characteristics of the thin film transistor are enhanced.
Example 7
An embodiment of the present invention provides a flexible panel, which includes a flexible backplane and a plurality of thin film transistors arranged on the flexible backplane in a plurality of groups in an array, as shown in fig. 10, each thin film transistor includes a source S and a drain D, a channel region is formed between the source S and the drain D, and of course, each thin film transistor further includes a gate G, which is not specifically shown in fig. 3. In fig. 10, a bending axis of the flexible panel is located in the center of the thin film transistor, a plurality of thin film transistors and source and drain electrodes arranged along the bending axis overlap with the bending axis respectively, wherein the bending axis is parallel to the source electrode but partially overlaps with the source electrode, the bending axis intersects with the drain electrode and partially overlaps with the bending axis, a projection of an overlapping region of the bending axis and the non-uniform channel on the bending axis is smaller than a maximum projection of the non-uniform channel on the bending axis, in fig. 10, an axial region of the bending axis of the flexible panel is a stress concentration region, the stress concentration region is a region where stress defects are more easily generated when the flexible panel is bent, and it can be seen from fig. 10 that the stress concentration region in the non-uniform channel belongs to a partial region of the non-uniform channel and is not a non-stress concentration region in the axial region of the bending axis of the flexible. In fig. 10, the source S is half surrounded by the drain D and parallel to the bending axis, and the bending axis is parallel to the lateral direction of the flexible panel, so that the flexible panel is generally bent in the lateral direction, and the channel region is located on the region where the source S is half surrounded by the drain D. This stress concentration district is the flexible panel and takes place the region that produces stress defect when buckling more easily, and not at the regional non-stress concentration district of the axial of the bending axis of flexible panel. It can be seen from fig. 10 that the stress concentration region in the non-uniform channel belongs to a partial region of the non-uniform channel, and is not a stress concentration region in the axial region of the bending axis of the flexible panel. In fig. 10, each group of thin film transistors arranged in an array are located on a straight line in the same row, and the opening directions of the drains D of every three adjacent thin film transistors are the same, where the row in the same row is a direction parallel to the bending axis, one end of the source S points to the drain D, the drain D can semi-surround the source S, the channel region located in the bending axis direction of the flexible panel is generally a stress concentration region, in fig. 10, the overlapping region of the bending axis and the non-uniform channel only occupies a partial region of the non-uniform channel, that is, the stress concentration region in the non-uniform channel belongs to a partial region of the non-uniform channel, but not to a non-stress concentration region in the axial region of the bending axis of the flexible panel, so that it can be obviously seen that the area range of the stress concentration region of the non-uniform channel is small, stress damage to the flexible panel can be significantly reduced, the electrical characteristics of the thin film transistor are enhanced.
Example 8
The flexible panel in the embodiment of the present invention includes a flexible backplane and a plurality of thin film transistors arranged on the flexible backplane in a plurality of groups in an array, as shown in fig. 11, each thin film transistor includes a source S and a drain D, a channel region is formed between the source S and the drain D, and of course, each thin film transistor further includes a gate G, which is not specifically shown in fig. 11. In fig. 11, the bending axis of the flexible panel is located at the center of the tft, and the tfts and the source and drain electrodes arranged along the bending axis overlap with the bending axis, respectively, where the bending axis is parallel to the source electrode but partially overlaps with the source electrode, the bending axis intersects with the drain electrode and partially overlaps with the bending axis, and a projection of an overlapping region of the bending axis and the non-uniform channel on the bending axis is smaller than a maximum projection of the non-uniform channel on the bending axis. In fig. 11, the axial region of the bending shaft of the flexible panel is a stress concentration region, which is a region where stress defect is easily generated when the flexible panel is bent, and it can be seen from fig. 11 that the stress concentration region in the non-uniform channel belongs to a partial region of the non-uniform channel, but is not in the non-stress concentration region in the axial region of the bending shaft of the flexible panel. In fig. 11, the source S is half surrounded by the drain D and parallel to the bending axis, and the bending axis is parallel to the lateral direction of the flexible panel, so that the flexible panel is generally bent in the lateral direction, and the channel region is located on the region where the source S is half surrounded by the drain D. In fig. 11, two adjacent tfts in each group of tfts arranged in an array are not on the same straight line, the opening directions of the drains D corresponding to the tfts arranged in the array are the same, where the row in the same row is parallel to the bending axis, one end of the source S points to the drain D, and the drain D can semi-surround the source S. As another alternative, two adjacent tfts in each group of tfts arranged in an array are not in a straight line in the same row, where the row in the same row is a direction parallel to the bending axis, and the opening directions of the drains D of the tfts arranged in an array are the same, that is, the opening directions of the drains D of two adjacent tfts are both toward the right, as shown in fig. 12. In fig. 11 and 12, it can also be considered that the thin film transistors in two adjacent columns are arranged in a staggered manner, in fig. 11 and 12, the overlapping region of the bending axis and the non-uniform channel only occupies a partial region of the non-uniform channel, that is, the stress concentration region in the non-uniform channel belongs to a partial region of the non-uniform channel, but not the non-stress concentration region in the axial region of the bending axis of the flexible panel, so that it can be obviously seen that the area range of the stress concentration region of the non-uniform channel is smaller, the stress damage to the flexible panel can be significantly reduced, the bending resistant times of the flexible panel can be further improved, and the electrical characteristics of the thin film transistors can.
Example 9
In an embodiment of the present invention, a flexible panel is provided, including a flexible backplane and a plurality of thin film transistors arranged on the flexible backplane in a plurality of groups in an array, as shown in fig. 13, each thin film transistor includes a source S and a drain D, a channel region is formed between the source S and the drain D, and of course, each thin film transistor further includes a gate G, which is not specifically shown in fig. 13. In fig. 13, a bending axis of the flexible panel is located in the center of the thin film transistor, a plurality of thin film transistors and source and drain electrodes arranged along the bending axis overlap with the bending axis respectively, wherein the bending axis is parallel to the source electrode but partially overlaps with the source electrode, the bending axis intersects with the drain electrode and partially overlaps with the bending axis, a projection of an overlapping region of the bending axis and the non-uniform channel on the bending axis is smaller than a maximum projection of the non-uniform channel on the bending axis, in fig. 13, an axial region of the bending axis of the flexible panel is a stress concentration region, the stress concentration region is a region where stress defects are more easily generated when the flexible panel is bent, and it can be seen from fig. 13 that the stress concentration region in the non-uniform channel belongs to a partial region of the non-uniform channel and is not a non-stress concentration region in the axial region of the bending axis of the flexible panel. In fig. 13, the source S is half surrounded by the drain D and parallel to the bending axis, and the bending axis is parallel to the lateral direction of the flexible panel, so that the flexible panel is generally bent in the lateral direction, and the channel region is located on the region where the source S is half surrounded by the drain D. This stress concentration district is the flexible panel and takes place the region that produces stress defect when buckling more easily, and not at the regional non-stress concentration district of the axial of the bending axis of flexible panel. It can be seen from fig. 13 that the stress concentration region in the non-uniform channel belongs to a partial region of the non-uniform channel, and is not a stress concentration region in the axial region of the bending axis of the flexible panel. In fig. 13, two adjacent tfts in each group of tfts arranged in an array are not in a same row and the opening directions of the drains D corresponding to the two adjacent tfts are opposite, where the row in the same row is parallel to the bending axis, or summarized as that two adjacent tfts are not in a same row and the opening directions of the drains D corresponding to the two adjacent tfts are opposite, where one end of the source S points to the drain D, and the drain D can half-surround the source S. In fig. 13, it can also be considered that the thin film transistors in adjacent two columns are arranged in a staggered manner. In fig. 13, the overlapping region of the bending axis and the non-uniform channel only occupies a partial region of the non-uniform channel, that is, the stress concentration region in the non-uniform channel belongs to a partial region of the non-uniform channel, but not the non-stress concentration region in the axial region of the bending axis of the flexible panel.
Example 10
In an embodiment of the present invention, a flexible panel is provided, including a flexible backplane and a plurality of thin film transistors arranged on the flexible backplane in a plurality of groups in an array, as shown in fig. 14, each thin film transistor includes a source S and a drain D, a channel region is formed between the source S and the drain D, and of course, each thin film transistor further includes a gate G, which is not specifically shown in fig. 14. In fig. 14, a bending axis of the flexible panel is located in the center of the thin film transistor, a plurality of thin film transistors and source and drain electrodes arranged along the bending axis overlap with the bending axis respectively, wherein the bending axis is parallel to the source electrode but partially overlaps with the source electrode, the bending axis intersects with the drain electrode and partially overlaps with the bending axis, a projection of an overlapping region of the bending axis and the non-uniform channel on the bending axis is smaller than a maximum projection of the non-uniform channel on the bending axis, an axial region of the bending axis of the flexible panel in fig. 14 is a stress concentration region, the stress concentration region is a region where stress defects are more easily generated when the flexible panel is bent, and it can be seen from fig. 14 that the stress concentration region in the non-uniform channel belongs to a partial region of the non-uniform channel and is not a non-stress concentration region in the axial region of the bending axis of the flexible. In fig. 14, the source S is half surrounded by the drain D and parallel to the bending axis, and the bending axis is parallel to the lateral direction of the flexible panel, so that the flexible panel is generally bent in the lateral direction, and the channel region is located on the region where the source S is half surrounded by the drain D. Stress concentration district is the flexible panel and takes place to produce the region of stress defect when buckling more easily, and the axial region of the bending axis of flexible panel is not stress concentration district. It can be seen from fig. 14 that the stress concentration region in the non-uniform channel belongs to a partial region of the non-uniform channel, and is not a stress concentration region in the axial region of the bending axis of the flexible panel. In fig. 14, two adjacent thin film transistors in each group of thin film transistors arranged in an array are not in a straight line in the same row, and the opening directions of the drains D corresponding to each two adjacent thin film transistors are the same, where the row in the same row is a direction parallel to the bending axis, where one end of the source S points to the drain D, and the drain D may semi-surround the source S, in fig. 14, two adjacent thin film transistors in each group of thin film transistors arranged in an array are not in a straight line in the same row, and the opening directions of the drains D corresponding to each two adjacent thin film transistors are the same. In fig. 14, it can also be considered that the thin film transistors in two adjacent columns are arranged in a staggered manner, and the channel region in the bending axial direction of the flexible panel is generally a stress concentration region, so that it can be obviously seen that the area range of the stress concentration region of the non-uniform channel is smaller, stress damage to the flexible panel can be obviously reduced, the bending resistance times of the flexible panel can be further improved, and the electrical characteristics of the thin film transistors can be enhanced.
The embodiment of the invention provides a device with a display panel, which comprises the flexible panel in the embodiment.
In summary, in the flexible panel and the device with the display panel according to the embodiments of the invention, at least one of the source electrodes and the drain electrodes of the plurality of thin film transistors arranged along the bending axis is overlapped with the bending axis, and the channel regions of the plurality of thin film transistors arranged along the bending axis are non-uniform channels, which can effectively weaken electrical degradation of the thin film transistors caused by stress, increase the bending frequency of the flexible panel, and further improve the service life of the flexible panel.
It should be understood that the above examples are only for clarity of illustration and are not intended to limit the embodiments. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. And obvious variations or modifications therefrom are within the scope of the invention.
Claims (10)
1. A flexible panel comprises a flexible backboard and a plurality of thin film transistors, wherein the thin film transistors are arranged on the flexible backboard in a plurality of groups in an array mode, each thin film transistor comprises a first electrode and a second electrode which are paired into a source electrode and a drain electrode, and a channel region is formed between the first electrode and the second electrode.
2. The flexible panel of claim 1, wherein channel regions of the plurality of thin film transistors arranged along the bending axis are non-uniform channels; wherein, the non-uniform channel means that the projection of the overlapping area of the channel region and the bending axis on the bending axis is smaller than the maximum projection of the channel region on the bending axis.
3. The flexible panel of claim 1, wherein the channel region is free of overlap with the bend axis when the bend axis overlaps with the second electrode and is free of overlap with the first electrode for the same thin film transistor.
4. The flexible panel of claim 1, wherein the first electrode is parallel to the bending axis, the second electrode is a semi-enclosed structure, one end of the first electrode is located in the semi-enclosed structure, and the channel region is disposed in a region where the first electrode is semi-enclosed by the second electrode.
5. The flexible panel according to claim 4, wherein each group of the thin film transistors arranged in the array is located on a straight line in the same row, and the openings of the second electrodes are aligned in the same direction.
6. The flexible panel according to claim 4, wherein each group of the thin film transistors arranged in the array is located on a straight line in a same row, and the openings of the second electrodes of two adjacent thin film transistors are opposite in direction.
7. The flexible panel according to claim 4, wherein each group of the thin film transistors arranged in the array is located on a straight line in a same row, and the opening directions of the second electrodes in at least two adjacent thin film transistors are the same.
8. The flexible panel according to any one of claims 1 to 7, wherein the thin film transistors in two adjacent columns are staggered.
9. The flexible panel of claim 4, wherein the second electrode having the semi-enclosed structure comprises:
a first straight line part arranged perpendicular to the bending axis;
and the two second straight line parts are arranged in parallel with the bending shaft and are respectively connected with two ends of the first straight line part.
10. A device with a display panel, characterized in that the device with a display panel is a flexible panel according to any one of claims 1 to 9.
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