CN108880674B - Optical module for local loop test - Google Patents

Abstract

The invention discloses an optical module for local loop test, which can simulate test application environments under different power consumption conditions, accurately collect feedback related information in real time, is suitable for network equipment under various different modulation types and rates and different link attenuation conditions, and shortens test time and reduces test cost while improving test precision and accuracy. The optical module includes: the device comprises a plurality of interfaces, an attenuation circuit ATT, a CDR module, a micro control unit MCU, a multi-path control switch and a plurality of load resistors which are packaged according to a preset protocol; the MCU is used for setting an initialization modulation mode and a power consumption level of the optical module according to a preset protocol, controlling the CDR module to adopt a PAM-4 modulation mode or an NRZ modulation mode, and switching the speed of each signal interface according to the modulation mode; and controlling to set a corresponding load power consumption value, and controlling the CDR module to establish network mapping between the input signal interface and the output signal interface.

Description

Optical module for local loop test

Technical Field

The invention relates to the technical field of optical fiber communication, in particular to an optical module for local loop back (in this document, the loop back refers to local loop back).

Background

In recent years, with the rapid development of mobile communication technology, the fifth generation mobile communication technology "5G" will gradually enter our life, and as a carrier of the 5G communication system, high-speed optical modules and network devices such as corresponding routers and switches will be used in a large amount. The existing network equipment carries out signal transmission and interaction by adopting a non-return-to-zero code NRZ mode for modulation, namely, two signal levels are used for representing 0 and 1 information of digital logic signals, and each symbol period can transmit 1 bit of logic information; the pulse amplitude modulated PAM signal may employ more signal levels so that more bit information may be transmitted per symbol period. Taking the PAM-4 signal as an example, it uses 4 different signal levels for signal transmission, and each symbol period may represent 2 bits of logic information (0, 1, 2, 3). Therefore, to achieve the same signal transmission capability, the symbol rate of the PAM-4 signal only needs to be half that of the NRZ signal, so that the loss caused by the transmission channel is greatly reduced.

In the process of formulating the high-speed optical module interface standard, the most basic requirement is that the data rate on each pair of high-speed lines is increased to more than 50Gbps, if the NRZ modulation technology is still adopted, each symbol period is only less than 20ps, and the time allowance of a receiving and transmitting end chip and the loss requirement of a transmission link are more severe, so that the use of the PAM-4 modulation technology almost becomes a necessary trend. However, conventional high-rate network communication devices are hardly capable of supporting PAM-4 modulation mode; the existing test mode also needs to adopt an optical module, an optical fiber, an optical attenuation or amplifier and other test cables to build a test system (namely, a non-local loop), and the mode is high in test cost and low in test efficiency, occupies a large amount of test resources, and is difficult to perform online high-low temperature and system level tests.

No Loopback test optical module supporting NRZ/PAM-4 modulation mode exists in the current market, and the existing QSFP28Loopback test optical module loops 4 paths of NRZ signals through a CDR circuit, wherein the highest loop-back rate of each channel is only 28Gbps. In addition, each QSFP28Loopback test optical module only corresponds to one power consumption level, for example, the test requirement of different power consumption levels at the Host end is met, so that the QSFP28Loopback test optical module needs to be customized for testing, the test cost is increased, and a plurality of inconveniences are brought to the test work.

At present, all large network communication companies in the world hold different attitudes to the development direction of future high-speed modules, and some think that QSFP-DD series high-speed optical modules will become main stream products, and some think that OSFP or CFP series high-speed optical modules will dominate the market development trend; aiming at the development trend of the next generation of high-speed optical modules, when no agreement is yet made all over the world, QSFP-DD, OSFP, CFP series optical modules are simultaneously raised and developed; the existing single-type Loopback test optical module cannot cover most of the applications of the Host-side switch.

Disclosure of Invention

At least one of the purposes of the present invention is to provide an optical module for local loop test, which can simulate the test application environment under different power consumption conditions, accurately collect feedback related information in real time, and is suitable for network devices under various different modulation types and rates and different link attenuation conditions, thereby improving the test precision and accuracy, shortening the test time and reducing the test cost.

In order to achieve the above object, the present invention adopts a technical scheme including the following aspects.

An optical module for local loop-back testing, comprising: the device comprises a plurality of interfaces, an attenuation circuit ATT, a CDR module, a micro control unit MCU, a multi-path control switch and a plurality of load resistors which are packaged according to a preset protocol;

the interfaces packaged according to the preset protocol are used for being connected with interfaces corresponding to the tested host equipment, and comprise a plurality of input signal interfaces for receiving data packets from the host equipment, a plurality of output signal interfaces for generating the data packets to the host equipment, six power interfaces for supplying power to the optical module, an I2C bus interface comprising a data line SDA and a clock signal line SCL, and a plurality of state control and indication interfaces; each input signal interface and each output signal interface are set as a single-channel 25Gbps or 50Gbps speed-switchable interface; the input signal interface is connected to the CDR module via an attenuation circuit ATT;

the MCU is used for setting an initialization modulation mode and a power consumption level of the optical module according to a preset protocol; the MCU is connected with the host equipment through an I2C bus interface to receive a loopback test instruction from the host equipment and send diagnostic information to the host equipment, is connected with the CDR module through an MDIO/MDC bus interface and is connected with the multipath control switch through a GPIO interface; the MCU is further used for setting a register in the CDR module through the MDIO/MDC bus interface according to information in the loopback test instruction to control the CDR module to carry out signal modulation by adopting a PAM-4 modulation mode or an NRZ modulation mode, and switching the speed of each input signal interface and each output signal interface according to the modulation mode;

the MCU is further used for controlling the multi-path control switch to be connected or disconnected through the GPIO interface according to the determined modulation mode to set corresponding load power consumption values to match the power consumption levels corresponding to the preset protocol, and controlling the CDR module to establish network mapping between the input signal interface and the output signal interface through the MDIO/MDC bus interface.

Preferably, the attenuation circuit ATT comprises 8 pi-type attenuation circuits, each of which is constituted by 4 digital resistors, the signals being attenuated by different digital resistor combinations at different levels.

Preferably, the CDR module includes a continuous time linear equalizer CTLE, a CDR circuit, and a forward error correction FEC relay circuit connected in sequence;

a plurality of AC coupling capacitors are connected between the input end and the output end of the CDR module so as to filter direct current components in the high-frequency signals.

Preferably, the light module further comprises a temperature sensor connected to the MCU via a GPIO interface, a voltage acquisition circuit, and a plurality of status indicator lights.

Preferably, the MCU is configured to periodically obtain, by using a temperature sensor and a voltage acquisition circuit, a real-time temperature and a power supply voltage of the optical module, and determine whether the temperature and the power supply voltage are within a working requirement range of the optical module; when the working temperature and the working voltage are in the normal range, the optical module works normally, and the MCU controls the status indicator lamp to display normal working information; when the working temperature or the power supply voltage of the module exceeds the working requirement range, the MCU controls the status indicator lamp to display alarm information, and the power supply connected with the power supply interface is cut off through a control switch in the MCU so as to protect the tested host equipment and the optical module.

Preferably, the MCU is further configured to determine whether to use a PAM-4 modulation mode according to the loopback test instruction, and if the host device indicates that the PAM-4 modulation mode is used and is the same as the initial modulation mode, not switch the modulation mode; and further judging whether to switch the power consumption level; if the host equipment indicates to increase or decrease the power consumption level, the MCU controls the multi-path control switch to be turned on or off through the GPIO interface to set a corresponding load power consumption value so as to match the indicated power consumption level in the loopback test instruction; after the power consumption level switching is not needed or the switching is completed, the MCU controls the CDR module to establish network mapping between the input signal interface and the output signal interface through the MDIO/MDC bus interface, and controls the CDR module to send data packets under the drive of a PAM-4 modulation mode.

Preferably, if the host device indicates that the NRZ modulation mode is adopted and is different from the initial modulation mode, the MCU selects a corresponding register in the CDR module through the MDIO/MDC bus interface to switch the modulation mode to the NRZ modulation mode; further, the MCU judges whether to switch the power consumption level; if the host equipment indicates to increase or decrease the power consumption level, opening a corresponding channel multipath load switch to match the indicated power consumption level in the loopback test instruction; and establishing network mapping between the input signal interface and the output signal interface, and controlling the CDR module to send the data packet under the drive of the NRZ modulation mode.

Preferably, the switching the rate of each of the input signal interface and the output signal interface according to the modulation mode includes: the rate of each of the input signal interface and the output signal interface is switched to 50Gbps when the PAM-4 modulation mode is employed, and the rate of each of the input signal interface and the output signal interface is switched to 25Gbps when the NRZ modulation mode is employed.

Preferably, the preset protocol is one of QSFP-DD, CFP, CFP2, CFP4, CFP8 and OSFP MSA protocols.

Preferably, the optical module junction component comprises a base, an unlocking piece drawstring, a spring, a PCB assembly, an LED luminous tube, a cover plate and a screw;

the LED light-emitting diode comprises an attenuation circuit ATT, a CDR module, a micro control unit MCU, a multi-path control switch and a plurality of load resistors, wherein the attenuation circuit ATT, the CDR module, the micro control unit MCU, the multi-path control switch and the plurality of load resistors are all arranged on a PCB assembly; the base is provided with an installing table clamped into the PCB assembly, and one end of the base is provided with a circular groove clamped into the LED to be fixed; at least four screw holes are respectively arranged on the base and the cover plate, and the base and the cover plate are combined and fixed through corresponding screws.

In summary, due to the adoption of the technical scheme, the invention has at least the following beneficial effects:

the CDR module which simultaneously supports PAM-4 and NRZ modulation modes is integrated, so that the method is applicable to network equipment under different modulation types and rates and different link attenuation conditions, and the standard rate range covers all standard applications including Datacom, infiniband, fiber Channel and the like; the purpose that 1 test module is used to be compatible with various applications is achieved, the application environment of the Loopback test optical module is widened, and a great amount of test cost and time are saved for network equipment manufacturers;

the optical module of the embodiment of the invention is packaged into the interface types of QSFP-DD, CFP, CFP2, CFP4, CFP8, OSFP and the like, so that a complete factory performance test scheme is provided for Host-end network equipment of the corresponding high-speed interface type, expensive test cost is saved for manufacturers, the system test difficulty is reduced, and the test efficiency is improved;

by arranging the high-precision temperature detector and the working voltage monitoring circuit in the optical module, the internal temperature of the module and the working voltage of the module can be accurately acquired in real time, and related information is fed back to a Host end;

through the status indicator lamp, a tester can intuitively see the working status of the module, and accurately judge whether the tested equipment is normal or not by combining the monitoring information of the Host end;

through integrating the controllable power consumption level selection function of the program, a tester can select different power consumption modes by sending instructions through the I2C bus by the host computer, and simulate test application environments under different power consumption conditions.

Drawings

Fig. 1 illustrates an optical module for local loop testing according to an exemplary embodiment of the present invention.

Fig. 2 shows a schematic diagram of the operation of an optical module for local loop-back testing according to an exemplary embodiment of the present invention.

Fig. 3 shows an exploded schematic view of a structure of an optical module for local loop testing according to an exemplary embodiment of the present invention.

Fig. 4 shows a schematic diagram of the outline structure of an optical module for local loop-back testing according to an exemplary embodiment of the present invention.

Detailed Description

The present invention will be described in further detail with reference to the drawings and examples, so that the objects, technical solutions and advantages of the present invention will become more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention.

Fig. 1 illustrates an optical module for local loop testing according to an exemplary embodiment of the present invention. The optical module of this embodiment mainly includes: the device comprises a plurality of interfaces, an attenuation circuit ATT, a CDR module, a micro control unit MCU, a multi-path control switch and a plurality of load resistors, wherein the interfaces, the attenuation circuit ATT, the CDR module, the micro control unit MCU, the multi-path control switch and the load resistors are packaged according to a preset protocol. The preset protocol may be a dual-density four-way small-package hot-pluggable module (QSFP-DD) multi-source protocol (MSA), a small-package hot-pluggable CFP, CFP2, CFP4, CFP8, OSFPMSA (eight-channel small-size pluggable SFP), and the like, and in the embodiments not specifically described, the high-speed Loopback optical module packaged by the QSFP-DD MSA protocol is described below as an example.

The interfaces packaged according to the preset protocol are used for being connected with interfaces corresponding to tested Host equipment (network equipment such as a switch, a router and the like); specifically, the system comprises eight input signal interfaces (RX 1+, RX1-, …, RX8+, RX 8-), eight output signal interfaces (TX 1+, TX1-, …, TX8+, TX 8-), six (two are shown in the figure) which are used for providing power to the optical module, an I2C bus interface comprising a data line SDA and a clock signal line SCL, and a plurality of state control and indication interfaces (comprising a Reset control interface reset_L, a fault state indication interface int_L, a mode selection control interface Modsel_L, a low power consumption mode control interface Lpmode_L and a fault insertion state indication interface Modprs_L), wherein the suffix "_L" represents the validity of low level; the power interface VCC supplies power to the CDR module through the slow starting circuit and the DC-DC conversion circuit respectively, and supplies power to the MCU and the multipath control switch through the slow starting circuit. Each of the input signal interface and the output signal interface is configured as a single channel 25Gbps or 50Gbps rate switchable interface.

The input signal interface is connected to the CDR module through an attenuation circuit ATT, and the CDR module comprises a continuous time linear equalizer CTLE, a CDR circuit and a Forward Error Correction (FEC) relay circuit which are connected in sequence; wherein the attenuation circuit ATT may comprise 8 pi-type attenuation circuits, each of which is composed of 4 digital resistors, different levels of attenuation of the high-speed signal being achieved by a combination of different digital resistors (e.g. for an optical module of the QSFP-DD MSA protocol, a default high-frequency attenuation value is set to 0, i.e. no attenuation); the continuous time linear equalizer CTLE is used for eliminating or weakening inter-code crosstalk caused by broadband communication delay; the CDR circuit is used for extracting a clock signal from the data packet, retiming and recovering the data; the Forward Error Correction (FEC) relay circuit is used for correcting transmission error codes; a plurality of AC coupling capacitors are connected between the input end and the output end of the CDR module so as to filter direct current components in the high-frequency signals; the combined use of various circuits in the CDR module can ensure that the signal amplitude of the high-speed data is not distorted, the high-low frequency components are not attenuated, error codes are not generated or are less generated in the transmission process, and the like, so that the high-speed data packet can be correctly identified when being transmitted from a transmitting end to a receiving end.

The MCU is used for setting an initialization modulation mode and a power consumption level of the optical module according to a preset protocol; the MCU is connected with the host equipment through an I2C bus interface to receive a loopback test instruction from the host equipment and send diagnostic information (such as temperature, working voltage and the like of an optical module, and is packaged into a prescribed protocol format such as SFF-8472MSA and the like) to the host equipment, is connected with the CDR module through an MDIO/MDC bus interface and is connected with the multi-path control switch through a GPIO (General Purpose Input Output, general input/output) interface; the MCU is further used for setting a register in the CDR module through the MDIO/MDC bus interface according to information in the loopback test instruction to control the CDR module to carry out signal modulation by adopting a PAM-4 modulation mode or an NRZ modulation mode, switching the speed of each input signal interface and each output signal interface to 50Gbps when the PAM-4 modulation mode is adopted, and switching the speed of each input signal interface and each output signal interface to 25Gbps when the NRZ modulation mode is adopted; the MCU is further used for controlling the multiplexing control switch to be switched on or off through the GPIO interface according to the determined modulation mode, setting corresponding load power consumption values to match corresponding power consumption levels (for example, eight levels of 3.5W, 7W, 8W, 9W, 10W, 12W, 14W and > 14W) of a preset protocol by one or more of a plurality of load resistors (R1, R2 and … Rn, for example, n is 8), and controlling the CDR module to establish network mapping between an input signal interface and an output signal interface through the MDIO/MDC bus interface.

Wherein setting registers in the CDR block comprises: the length of N bytes from the address of the chip register A can be used for selecting a modulation mode, bandwidth and speed, when the PAM-4 modulation mode needs to be set, setting corresponding address bits in the addresses A to (A+N) according to a register table to select the PAM-4, and shielding an NRZ mode; on the contrary, when the NRZ modulation mode needs to be set, the address register corresponding to the PAM-4 is shielded, and the NRZ address register is selected.

In a preferred embodiment, the optical module for local loop test may further include a temperature sensor, a voltage acquisition circuit, and a plurality of status indicator lamps connected via a GPIO interface. The MCU acquires the real-time temperature and the power supply voltage of the optical module in real time through the temperature sensor and the voltage acquisition circuit, and judges whether the temperature and the power supply voltage are within the working requirement range of the optical module; when the working temperature and the working voltage are both in the normal range (for example, the temperature is-40 to +85 ℃, the voltage is 3.135 to 3.465V), the optical module works normally, and the MCU controls the status indicator lamp to display normal working information; when the working temperature or the power supply voltage of the module exceeds the working requirement range, the MCU controls the status indicator lamp to display alarm information, and the power supply connected with the power supply interface is cut off through a control switch in the MCU so as to protect the tested host equipment and the optical module.

In a specific embodiment, the status indicators include at least two status indicators with different colors, for example, a red LED and a green LED, and through different display status combinations, the status indicators visually display the working status of the optical module, and can supplement and display relevant information such as DDM (digital diagnostic monitor) displayed by the Host, where the working status displayed by the status indicators is shown in the following table 1:

TABLE 1

In a preferred embodiment, the optical module for local loop testing further comprises an internal memory for storing an operating state, and the MCU is further configured to receive a state update instruction from the host device via the I2C bus interface, and switch the operating state of the optical module between the low power control interface and the internal memory, between the reset control interface and the internal memory, between the mode selection control interface and the internal memory, and between the fault status indication interface and the internal memory according to the state update instruction.

Fig. 2 shows a schematic diagram of the operation of an optical module for local loop-back testing according to an exemplary embodiment of the present invention. After the interfaces packaged according to the preset protocol in the optical module are connected with the interfaces corresponding to the tested host equipment, the MCU in the optical module opens the power interface to connect with the power supply (step 201) within the time required by the preset protocol, and sets the initial modulation mode and the power consumption level (step 202). For example, the initial modulation mode of the optical module according to the QSFP-DD MSA package is set to PAM-4, and the power consumption level is 8W.

The MCU receives a loop-back test instruction from the Host through the I2C bus interface (step 203), and judges whether to perform modulation mode switching and/or power consumption level switching according to the loop-back test instruction. Specifically, it is first determined whether to use PAM-4 modulation mode according to the loopback test instruction (step 204), and if the host device indicates that PAM-4 modulation mode is used and is the same as the initial modulation mode, the modulation mode is not switched.

Because the power consumption levels corresponding to the PAM-4 modulation mode and the NRZ modulation mode are different at the same rate (the DSP function inside the CDR module/chip is required to be opened in the PAM-4 modulation mode, but the NRZ modulation mode is not required to be opened), the power consumption levels are required to be compensated after being calculated by the MCU and selected by the program-controlled multi-path control switch. It is thus necessary to further judge whether or not to switch the power consumption level (step 205); if the host device indicates to increase or decrease the power consumption level, the MCU controls the multi-path control switch to turn on or off one or more of the plurality of load resistors through the GPIO interface to set the corresponding load power consumption to match the indicated power consumption level in the loopback test instruction (step 206); after the power consumption level switch is not required or the switch is completed, the MCU establishes a network mapping between the input signal interface and the output signal interface via the MDIO/MDC bus interface control CDR module (step 207). And then, the control CDR module can send the data packet under the drive of the PAM-4 modulation mode.

After the step 204, if the host device indicates that the NRZ modulation mode is adopted and is different from the initial modulation mode, the MCU selects a corresponding register in the CDR module through the MDIO/MDC bus interface to switch the modulation mode to the NRZ modulation mode (step 208);

further, the MCU judges whether to switch the power consumption level (step 205); if the host device indicates to increase or decrease the power consumption level, then opening the corresponding channel multi-way load switch to match the indicated power consumption level in the loopback test instruction (step 206); and establishes a network mapping between the input signal interface and the output signal interface (step 207). The control CDR block may then transmit the packet using the PRBS31 (default) pattern driven by the NRZ modulation mode.

The optical module for local loop test in the above embodiments may be packaged according to the QSFP-DD MSA protocol into an 8-channel, 200/400Gbps rate, hot pluggable, 76-pin transceiver structure, where the single channel rate is 25Gbps or 50Gbps, the initial modulation mode is NRZ when the single channel rate is 25Gbps, the initial modulation mode is PAM-4 when the single channel rate is 50Gbps, and the target power consumption is less than 8W.

The optical module for local loop test in the above embodiments may also be packaged according to CFP MSA protocol into a 4-channel, 100Gbps rate, hot pluggable, 148 pin transceiver structure, where the single channel rate is 25Gbps, and the initial modulation mode is NRZ when the single channel rate is 25Gbps, and the target power consumption is less than 32W.

The optical module for local loop test in the above embodiments may also be packaged according to CFP2MSA protocol into a 4-channel, 100/200Gbps rate, hot pluggable, 96-pin transceiver structure, where the single channel rate is 25Gbps or 50Gbps, and the initial modulation mode is NRZ when the single channel rate is 25Gbps; and when the single channel rate is 50Gbps, the initial modulation mode is PAM-4, and the target power consumption is less than 12W.

The optical module for local loop test in the above embodiments may also be packaged according to CFP4MSA protocol into a 4-channel, 100/200Gbps rate, hot pluggable, 56-pin transceiver structure, where the single channel rate is 25Gbps or 50Gbps, and the initial modulation mode is NRZ when the single channel rate is 25Gbps; and when the single channel rate is 50Gbps, the initial modulation mode is PAM-4, and the target power consumption is less than 6W.

The optical module for local loop test in the above embodiments may also be packaged according to CFP8MSA protocol into an 8-channel, 400Gbps rate, hot pluggable, 124-pin transceiver structure, where the single channel rate is 50Gbps, the initial modulation mode is PAM-4, and the target power consumption is less than 18W.

The optical module for local loop test in the above embodiments may be further packaged into an 8-channel, 400Gbps rate, hot pluggable, 60 pin transceiver structure according to OSFP MSA protocol, where the single channel rate is 50Gbps, the initial modulation mode is PAM-4, and the target power consumption is less than 13W.

Fig. 3 shows an exploded schematic view of a structure of an optical module for local loop testing according to an exemplary embodiment of the present invention. Fig. 4 shows a schematic diagram of the outline structure of an optical module for local loop-back testing according to an exemplary embodiment of the present invention. The optical modules of the exemplary embodiments shown in fig. 3 and 4 are encapsulated according to the QSFP-DD MSA protocol, and the optical module structures encapsulated according to protocols such as CFP, CFP2, CFP4, CFP8, OSFP MSA, etc. differ in package size, gold finger (interface, pin) definition, target power consumption, etc. As shown in fig. 3, the structural member of the optical module comprises a base 1, an unlocking piece pull belt 2, a spring 3, a PCB assembly 4, an LED luminous tube 5, a protection plug 6, a cover plate 7 and a screw 8.

The unlocking piece pull belt 2 is connected with the unlocking groove on the base 1, and the two springs 3 are respectively arranged in a space formed by the unlocking groove on two sides of the base 1 and the unlocking piece pull belt 2; the attenuation circuit ATT, the CDR module, the micro control unit MCU, the multi-path control switch and the plurality of load resistors are all arranged on the PCB assembly 4; the LED luminous tube 5 and the golden fingers LED out from the interfaces are connected to the PCB assembly 4;

the base 1 is provided with an installation table clamped into the PCB assembly 4, and one end of the base 1 is provided with a circular groove clamped into the LED 5 for fixing; at least four screw holes which are opposite in position are respectively arranged on the base 1 and the cover plate 7 so as to combine and fix the base 1 and the cover plate through the corresponding screw 8; in order to protect the components within the light module when not in use, a protection plug 6 may also be included, having a structure that mates with the base 1 and cover 7, when secured at the rear end. Installation completion an exemplary light module is shown in fig. 4.

In the embodiment, the optical module for local loop test integrates the CDR module which simultaneously supports the PAM-4 modulation mode, the NRZ modulation mode and the like and the corresponding equalization and forward error correction functions, so that the PAM-4 modulation mode, the NRZ modulation mode and the corresponding expansion rate can be supported, and the attenuated high-speed signal data and the attenuated clock can be recovered and compensated, thereby improving the test precision; CDR circuits are capable of supporting standard applications at rates of 50Gbps and 25Gbps and below, with a rate range encompassing application standards of Datacom, infiniband, fiber Channel, etc. Meanwhile, the working state of the CDR is controlled, so that the Loopback testing module can work under different modulation types and rates, and the application environment of the module is widened; and moreover, different power consumption levels can be selected in a program control mode, so that the test environment under various load conditions can be simulated, and more test choices are provided for a network equipment host.

The foregoing is a detailed description of specific embodiments of the invention and is not intended to be limiting of the invention. Various alternatives, modifications and improvements will readily occur to those skilled in the relevant art without departing from the spirit and scope of the invention.

Claims (10)

1. An optical module for local loop testing, the optical module comprising: the device comprises a plurality of interfaces, an attenuation circuit ATT, a CDR module, a micro control unit MCU, a multi-path control switch and a plurality of load resistors which are packaged according to a preset protocol;

the interfaces packaged according to the preset protocol are used for being connected with interfaces corresponding to the tested host equipment, and comprise a plurality of input signal interfaces for receiving data packets from the host equipment, a plurality of output signal interfaces for generating the data packets to the host equipment, six power interfaces for supplying power to the optical module, an I2C bus interface comprising a data line SDA and a clock signal line SCL, and a plurality of state control and indication interfaces; each input signal interface and each output signal interface are set as a single-channel 25Gbps or 50Gbps speed-switchable interface; the input signal interface is connected to the CDR module via an attenuation circuit ATT;

the MCU is used for setting an initialization modulation mode and a power consumption level of the optical module according to a preset protocol; the MCU is connected with the host equipment through an I2C bus interface to receive a loopback test instruction from the host equipment and send diagnostic information to the host equipment, is connected with the CDR module through an MDIO/MDC bus interface and is connected with the multipath control switch through a GPIO interface; the MCU is further used for setting a register in the CDR module through the MDIO/MDC bus interface according to information in the loopback test instruction to control the CDR module to carry out signal modulation by adopting a PAM-4 modulation mode or an NRZ modulation mode, and switching the speed of each input signal interface and each output signal interface according to the modulation mode;

the MCU is further used for controlling the multi-path control switch to be connected or disconnected through the GPIO interface according to the determined modulation mode to set corresponding load power consumption values to match the power consumption levels corresponding to the preset protocol, and controlling the CDR module to establish network mapping between the input signal interface and the output signal interface through the MDIO/MDC bus interface.

2. An optical module as claimed in claim 1, characterized in that the attenuation circuit ATT comprises 8 pi-type attenuation circuits, each of which is constituted by 4 digital resistors, the signals being attenuated differently by a combination of different digital resistors.

3. The optical module of claim 1, wherein the CDR module comprises a continuous-time linear equalizer CTLE, a CDR circuit, and a forward error correction FEC relay circuit connected in sequence;

a plurality of AC coupling capacitors are connected between the input end and the output end of the CDR module so as to filter direct current components in the high-frequency signals.

4. The light module of claim 1, further comprising a temperature sensor connected to the MCU via a GPIO interface, a voltage acquisition circuit, and a plurality of status indicators.

5. The optical module according to claim 4, wherein the MCU is configured to periodically obtain, through the temperature sensor and the voltage acquisition circuit, a real-time temperature and a power supply voltage of the optical module, and determine whether the temperature and the power supply voltage are within a range of a working requirement of the optical module; when the working temperature and the working voltage are in the normal range, the optical module works normally, and the MCU controls the status indicator lamp to display normal working information; when the working temperature or the power supply voltage of the module exceeds the working requirement range, the MCU controls the status indicator lamp to display alarm information, and the power supply connected with the power supply interface is cut off through a control switch in the MCU so as to protect the tested host equipment and the optical module.

6. The optical module of claim 1, wherein the MCU is further configured to first determine whether to employ a PAM-4 modulation mode according to the loopback test instruction, and not switch the modulation mode if the host device indicates that the PAM-4 modulation mode is employed and is the same as the initial modulation mode; and further judging whether to switch the power consumption level; if the host equipment indicates to increase or decrease the power consumption level, the MCU controls the multi-path control switch to be turned on or off through the GPIO interface to set a corresponding load power consumption value so as to match the indicated power consumption level in the loopback test instruction; after the power consumption level switching is not needed or the switching is completed, the MCU controls the CDR module to establish network mapping between the input signal interface and the output signal interface through the MDIO/MDC bus interface, and controls the CDR module to send data packets under the drive of a PAM-4 modulation mode.

7. The optical module of claim 6, wherein if the host device indicates that the NRZ modulation mode is adopted and is different from the initial modulation mode, the MCU selects a corresponding register in the CDR module through the MDIO/MDC bus interface to switch the modulation mode to the NRZ modulation mode; further, the MCU judges whether to switch the power consumption level; if the host equipment indicates to increase or decrease the power consumption level, opening a corresponding channel multipath load switch to match the indicated power consumption level in the loopback test instruction; and establishing network mapping between the input signal interface and the output signal interface, and controlling the CDR module to send the data packet under the drive of the NRZ modulation mode.

8. The optical module of claim 1, wherein the switching the rate of each of the input signal interface and the output signal interface according to the modulation mode comprises: the rate of each of the input signal interface and the output signal interface is switched to 50Gbps when the PAM-4 modulation mode is employed, and the rate of each of the input signal interface and the output signal interface is switched to 25Gbps when the NRZ modulation mode is employed.

9. The optical module according to any one of claims 1 to 8, wherein the preset protocol is one of QSFP-DD, CFP, CFP2, CFP4, CFP8, OSFP MSA protocol.

10. The light module of claim 9, wherein the light module junction member comprises a base, an unlocking pull strap, a spring, a PCB assembly, an LED light emitting tube, a cover plate, and a screw;

the LED light-emitting diode comprises an attenuation circuit ATT, a CDR module, a micro control unit MCU, a multi-path control switch and a plurality of load resistors, wherein the attenuation circuit ATT, the CDR module, the micro control unit MCU, the multi-path control switch and the plurality of load resistors are all arranged on a PCB assembly; the base is provided with an installing table clamped into the PCB assembly, and one end of the base is provided with a circular groove clamped into the LED to be fixed; at least four screw holes are respectively arranged on the base and the cover plate, and the base and the cover plate are combined and fixed through corresponding screws.