CN108845224A - Hit detection device and hit detection method - Google Patents
Hit detection device and hit detection method Download PDFInfo
- Publication number
- CN108845224A CN108845224A CN201811078810.3A CN201811078810A CN108845224A CN 108845224 A CN108845224 A CN 108845224A CN 201811078810 A CN201811078810 A CN 201811078810A CN 108845224 A CN108845224 A CN 108845224A
- Authority
- CN
- China
- Prior art keywords
- hit
- measured pulse
- burst length
- counter
- pulse
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 title claims abstract description 34
- 230000000630 rising effect Effects 0.000 claims abstract description 27
- 230000005540 biological transmission Effects 0.000 claims description 11
- 210000001367 artery Anatomy 0.000 claims description 4
- 210000003462 vein Anatomy 0.000 claims description 4
- 230000005611 electricity Effects 0.000 claims description 2
- 238000005259 measurement Methods 0.000 abstract description 21
- 238000000034 method Methods 0.000 description 13
- 238000012546 transfer Methods 0.000 description 5
- 238000013461 design Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
- 238000012360 testing method Methods 0.000 description 4
- 238000006243 chemical reaction Methods 0.000 description 3
- 239000013078 crystal Substances 0.000 description 3
- 230000008054 signal transmission Effects 0.000 description 3
- 230000001360 synchronised effect Effects 0.000 description 3
- 238000012545 processing Methods 0.000 description 2
- 238000004080 punching Methods 0.000 description 2
- 238000006467 substitution reaction Methods 0.000 description 2
- 238000004458 analytical method Methods 0.000 description 1
- 230000033228 biological regulation Effects 0.000 description 1
- 230000000052 comparative effect Effects 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 238000009863 impact test Methods 0.000 description 1
- 238000011068 loading method Methods 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
- 238000010998 test method Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/50—Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Measurement Of Unknown Time Intervals (AREA)
Abstract
The invention discloses a kind of hit detection device and hit detection method, the hit detection device includes：Counter is counted for the burst length to measured pulse；Comparator, it is configured to detect the failing edge voltage of the rising edge voltage of the measured pulse and the measured pulse, and the rising edge voltage of the measured pulse and failing edge voltage are compared with hit threshold voltage, when the rising edge voltage of the measured pulse is greater than the hit threshold voltage, the counter is enabled to count, when the failing edge voltage of the measured pulse is less than the hit threshold voltage, stops the counter and count；And processor, it is configured to calculate the burst length of the measured pulse according to the count value of the counter, and judge hit state according to the burst length of the measured pulse.The present invention being capable of accurate judgement and quickly capture hit pulse and accurately measurement hit burst length.
Description
Technical field
The present invention relates to field of precision measurement more particularly to a kind of hit detection devices and hit detection method.
Background technique
It is a kind of fine measuring instrument that hit tester, which is connected, for monitoring electric connector connection wiring harness and interconnection
Component in the dynamic loadings environmental test such as vibration, impact, collision whether can there is a phenomenon where momentary breaks suddenly, detect simultaneously
Position and the time that hit occurs, for determining that contact of the elements such as harness and connector during dynamic use is reliable
Property.Hit pulse for hit tester to be connected quickly captures and time synchronized measurement technology, is a kind of to judge to be in
Whether the electric connector under the dynamical states such as vibration, electrical characteristic are vibrated the influence of impact, connector are caused to be transmitted
Electric signal there is momentary breaks phenomenon, and accurately measurement occurs the time of hit and develops the special test technology of generation.
The existing hit pulse for hit tester to be connected quickly captures and time synchronized measurement technology generally uses
The traditional logic gate device TTL realizes that operating voltage is higher, when work internal transistor be not parked in turn-on and turn-off state it
Between toggle, cause its propagation delay time to can only achieve μ s magnitude, can only operate in the circuit at a slow speed of 1 μ s grade or more, be based on
The existing measuring technique of TTL circuit is difficult to realize the purpose accurately measured the time of 0.01 μ s magnitude.
The difficulty of the small signal of burst pulse high speed is measured from the precise measurement to hit pulse width in short-term.To improve wink
The measurement accuracy of disconnected pulse signal width, generally takes the method for improving counting clock frequency, and clock frequency is higher, measures pulsewidth
Error it is smaller, but frequency is higher higher to the performance requirement of chip.Assuming that wink break time accuracy of measurement is 0.1 μ s, hit
Time measurement resolution is 0.01 μ s；So clock frequency will reach 100MHz, one clock period time is 10ns.At this time
General traditional logic gates, counter are all difficult to work normally, such as the rising of 74HC series of high speed TTL gate circuit chip
Edge, failing edge are above 25ns, and signal transmission delay reaches 30ns, can not survey at all to 10ns hit pulse signal below
Amount.
In order to guarantee reliable performance of the electric connector under vibrational state, country has promulgated that multiple standards advise it
It is fixed, such as《GJB1217A-2009 electric connector test method》" unless otherwise prescribed, own when the 4.2nd article of regulation impact test
The electric load of contact is up to 100mA；It is not allow for the electrical continuity of stipulated time, should use can detect 1 μ s hit
Detector ".After so hit pulse signal occurs, how accurate judgement hit phenomenon occurs and how quickly to wink break time
It measures etc. and higher design requirement is proposed to conducting hit tester, in the design of conducting hit tester, how
It solves the problems, such as accurate judgement and quickly captures and accurately measure key of the hit burst length as design.
Summary of the invention
The object of the present invention is to provide a kind of hit detection device and hit detection method, accurate judgement and can quickly catch
It catches hit pulse and accurately measures the hit burst length.
One aspect of the present invention provides a kind of hit detection device, including：Counter, for the pulse to measured pulse
Time is counted；Comparator is configured to detect the decline of the rising edge voltage of the measured pulse and the measured pulse
It is compared along voltage, and by the rising edge voltage of the measured pulse and failing edge voltage with hit threshold voltage, works as institute
When stating the rising edge voltage of measured pulse greater than the hit threshold voltage, enables the counter and count, when the tested arteries and veins
When the failing edge voltage of punching is less than the hit threshold voltage, stops the counter and count；And processor, it is configured to basis
The count value of the counter calculates the burst length of the measured pulse, and is sentenced according to the burst length of the measured pulse
Disconnected hit state.
Another aspect of the present invention provides a kind of hit detection method, including：When the rising edge for detecting measured pulse
When voltage is greater than hit threshold voltage, enablement count device is counted；When the failing edge voltage for detecting the measured pulse is less than institute
When stating hit threshold voltage, stops the counter and count；The measured pulse is calculated according to the count value of the counter
Burst length；Hit state is judged according to the burst length of the measured pulse.
The technical solution of above-mentioned aspect according to the present invention, can accurate judgement and quickly capturing hit pulse and accurately survey
Measure the hit burst length.
Detailed description of the invention
It, below will be to required in embodiment description in order to illustrate more clearly of the technical solution of embodiment of the present invention
The attached drawing used is briefly described, it should be apparent that, the accompanying drawings in the following description is only some embodiments of the present invention,
For those of ordinary skill in the art, without any creative labor, it can also obtain according to these attached drawings
Obtain other attached drawings.
Fig. 1 is the schematic diagram of the hit detection device of one embodiment of the present invention；
Fig. 2 is the social function theory of the hit detection device of one embodiment of the present invention；
Fig. 3 is the process flow diagram of the hit detection method of one embodiment of the present invention；
Fig. 4 is the exemplary diagram of the hit detection method of one embodiment of the present invention.
Specific embodiment
To be solved below in conjunction with attached drawing is further to a specific embodiment of the invention convenient for the understanding of the present invention
Explanation is released, wherein various embodiments and not constituting a limitation of the invention.
An embodiment of the invention provides a kind of hit detection device, including：Counter, for measured pulse
Burst length is counted；Comparator is configured to detect the rising edge voltage of the measured pulse and the measured pulse
Failing edge voltage, and the rising edge voltage of the measured pulse and failing edge voltage are compared with hit threshold voltage,
When the rising edge voltage of the measured pulse is greater than the hit threshold voltage, enables the counter and count, when the quilt
When surveying the failing edge voltage of pulse less than the hit threshold voltage, stops the counter and count；And processor, it is configured to
The burst length of the measured pulse is calculated according to the count value of the counter, and when according to the pulse of the measured pulse
Between judge hit state.
The hit testing principle of present embodiment is as shown in Figure 1, hit (pulse to be measured) rising edge that electric connector generates
It is compared with hit threshold voltage.When hit rising edge voltage is greater than hit threshold voltage, comparator output signal EN makes
Energy counter, counter start counting under clock source signals CLK triggering；Rise when detecting with the hit of electric connector generation
When along the adjacent hit failing edge voltage of voltage, comparator output signal stops counter and counts；Micro-control unit MCU (Micro
Controller Unit) value of counter is read at this time and calculates the time of hit pulse accordingly.
In the present embodiment, as shown in Figure 1, being used as constant vibration time signal using active crystal oscillator (crystal oscillator)
Source, the signal source carry out the clock reference source that level conversion makees counter counting with through NAND gate chip, and wherein level conversion is
TTL signal is changed into ECL signal.Since the rising edge of hit pulse can not be fully synchronized with clock pulses, the period is counted not
Completely, hit pulse width measuring is caused to be bound to have error, therefore clock source frequency is at least higher than the 2 of testing time frequency
Times, it just can guarantee the accuracy of measurement.
To overcome influence of the device to line transmission, present embodiment uses emitter-coupled logic (ECL) ECL
(Emitter Coupled Logic) level is as transmission level, in the sequential logical circuit of present embodiment, transmission level
It is the electric signal that logic level is transmitted from device input to output end.Present embodiment preferably uses ECL high-speed door electric
Road is as sequential logical circuit, its biggest characteristic is that basic gate circuit work in unsaturated state, since output impedance is small, drives
Electric current is bigger, strong antijamming capability, and delay time is ps and ns magnitude, is highly suitable for high-speed transfer occasion.
Specifically, in the present embodiment, as the hit burst length T of measurementIt is disconnected< sets hit burst length TsetWhen,
Show that there is no momentary breaks；As measurement hit burst length TIt is disconnected> sets hit burst length Tset, and measure hit pulse
Time TIt is disconnectedWhen < 99.99us (example of general pulse time), show that momentary breaks have occurred, counter continues to count, and works as wink
At the end of disconnected, counter stops counting, and data are latched；If TIt is disconnected> 99.99us, counter stop counting.That is, being sent out in hit
When raw, counter is started counting, and terminates in hit or hit counts and stops counting when being greater than 99.99us.Here wink break time
The maximum time of measurement is 99.99us, then without counting more than 99.99us, can then accurately measure hit arteries and veins less than 99.99us
Rush the time.MCU reads count value and respective logical states, and output state result.
The following table 1 is the sequential logic truth table for carrying out hit measurement in present embodiment using logical device.Wherein, TIt is disconnectedTable
Show the hit burst length of measured pulse, TsetIndicate the setting hit burst length, count is the value of counter, and MR indicates to reset
Mark, lockBit, which indicates to count, latches mark, and countValue indicates counted number of pulses, and software reset indicates that MCU is needed to carry out
Reset count value.
1 sequential logic truth table of table
Present embodiment, it is preferable that take ECL level as the transmission level of the measured pulse, examined according to the ECL level
Survey the rising edge voltage and failing edge voltage of the measured pulse.
Fig. 2 is the concrete function logic chart of the hit detection device of one embodiment of the present invention.In the social function theory
In, it is preferable that realize that this hit is measured using the hardware circuit of high-speed response, it should be understood by those skilled in the art that its conduct
A kind of implementation of present embodiment, does not constitute the limitation to present embodiment.
In Fig. 2, voltage compares threshold generation circuits, for generating hit comparison voltage threshold value, with connector input
Hit pulse voltage is compared into comparator together, comparator according to input voltage difference export comparative level enter or
Gate logic processing, enters back into 16 digit counters and is counted, and crystal oscillator generates the TTL signal source of standard, becomes ECL through level conversion
Level enters counter, mainly cooperates counter to generate what wink break time counted with door, nor gate, latch, digital comparator
Comparing and lock logic function, MCU is responsible for reading the count value of counter and the time of setting digital comparator compares design value,
Software reset is carried out to latch, counter simultaneously and removing is handled.
To guarantee the accurate of high speed transmission of signals, the signal delay of logic level has a great impact to accurate measurement, because
This logic chip in signals transmission all uses the component of ECL level, guarantees the accuracy of level transmission.This embodiment party
The logical device of all ECL level of device in formula, has high-speed transfer characteristic, and other TTL logical devices can also complete phase
Same logic function is delayed very big when only progress high-speed transfer goes out, and causes high speed to measure inaccurate.Therefore, present embodiment
When designing sequential logical circuit, high-speed comparator, high-speed counter, at a high speed with the logic devices such as door or door, digital comparator
ECL level logic chip is preferably used in the selection of part, transmission delay is in ns magnitude, as shown in table 2 below.
2 gate circuit parameter of table
| Model | Type | Level | Transmission delay (ns) |
| SY100E137 | Counter | ECL | 2.2 |
| SY10-100E104 | NAND gate | ECL | 0.38 |
| SY100S302 | Nor gate | ECL | 0.7 |
| SY10-100E166 | Digital comparator | ECL | 1.1 |
| SY100S350 | Latch | ECL | 1.0 |
In logic circuits, TTL circuit and ECL circuit can realize logic level, and just TTL circuit can only realize low speed
Transmission, high-speed transfer can generate signal delay distortion, and ECL level will not generate distortion in high-speed transfer.By as above adopting
With ECL high-speed door circuit chip, the accuracy of signal transmission ensure that.
In present embodiment preferably using ECL high speed gate circuit as sequential logical circuit outside, can also be used programmable
Logical device FPGA or CPLD substitution are realized.
Another embodiment of the invention provides a kind of hit detection method, including：When detecting the upper of measured pulse
When rising along voltage greater than hit threshold voltage, enablement count device is counted；When the failing edge voltage for detecting the measured pulse is small
When the hit threshold voltage, stops the counter and count；The tested arteries and veins is calculated according to the count value of the counter
The burst length of punching；Hit state is judged according to the burst length of the measured pulse.
Specifically, the process flow of the hit detection method of present embodiment is as shown in figure 3, include that following processing walks
Suddenly：
Step S21, when the rising edge voltage for detecting measured pulse is greater than hit threshold voltage, enablement count device meter
Number；
Step S22, when the failing edge voltage for detecting the measured pulse is less than the hit threshold voltage, stop institute
State counter counting；
Step S23, the hit burst length of the measured pulse is calculated according to the count value of the counter；
Step S24, hit state is determined according to the burst length of the measured pulse.
Preferably, in step s 24, judge that hit state includes according to the burst length of the measured pulse：When described
When the burst length of measured pulse is less than the setting hit burst length, judge that there is no hits；When the hit burst length
When greater than the setting hit burst length and being less than the general pulse time, then judge that hit occurs.
In hit impulsive measurement, different connectors is different to the requirement of hit burst length, and this requires testers
The setting hit burst length can be determined acording to the requirement of user.
Below according to a specific example, hit state is determined according to the hit burst length come illustrate present embodiment
Method detects hit as shown in figure 4, the hit measurement process of present embodiment is actually a sequential logical circuit process
Rising edge voltage, in hit measurement process, when the hit rising edge voltage of generation is greater than hit threshold voltage, processor refers to
Show that comparator overturning exports a level control enablement count device and counts, counter is counted with the frequency of clock signal.When
When hit failing edge voltage is less than hit threshold voltage, stops the counter and count；When stopping counting according to the counter
Count value calculate the hit burst length；At this point, the count value of counter output enters digital comparator, with setting hit pulse
Time TsetIt is compared, as hit burst length TIt is disconnected< sets hit burst length TsetWhen, and the hit burst length is corresponding
Hit failing edge voltage is less than the hit threshold voltage, logic gate meeting reset count device, then it represents that hit exception or hit
There is no 4 hit burst lengths T1, T2, T3, T4 are both less than T in figureset, so circuit automatic fitration is fallen, logic circuit
Judge hit there is no.It is greater than T in the time T5 of T5 hit pulse generationset, digital comparator export the control of level with
Gate circuit, the latch signal that latch output hit occurs marks hit, and indication counter continues to count；Directly
When being less than the hit threshold voltage to hit burst length corresponding hit failing edge voltage, counter stops counting, measurement
It latches, logic circuit judges hit, while single-chip microcontroller detects that signal occurs for hit, reads the value of counter, is divided
It analyses and shows, then hit measurement process is completed.
In conclusion embodiment of the present invention passes through when the rising edge voltage for detecting measured pulse is greater than hit threshold value electricity
When pressure, enablement count device is counted；When detect the failing edge voltage adjacent with the rising edge voltage be less than the hit threshold value
When voltage, stops the counter and count；When calculating the hit pulse of the measured pulse according to the count value of the counter
Between；The hit state of the measured pulse is determined according to the hit burst length to determine whether that hit occurs.By above-mentioned
Method can quickly can carry out hit time pulse signal same while carrying out judging whether to occur to pulse hit
Step detection, capture and identification measurement.
Those of ordinary skill in the art will appreciate that：Attached drawing is the schematic diagram of an embodiment, the module in attached drawing
Or process is not necessarily implemented necessary to the present invention.
Through the above description of the embodiments, those skilled in the art can be understood that the present invention can be by
Software adds the mode of required general hardware platform to realize.Based on this understanding, technical solution of the present invention substantially or
Person says that the part that contributes to existing technology can be embodied in the form of software products, which can be with
It is stored in a storage medium, such as ROM/RAM, magnetic disk, CD, including some instructions are used so that a computer equipment (can
To be personal computer, server or the network equipment etc.) execute the certain of each embodiment or embodiment of the invention
Method described in part.
The foregoing is merely the preferable specific embodiments of the present invention, but scope of protection of the present invention is not limited thereto,
In the technical scope disclosed by the present invention, any changes or substitutions that can be easily thought of by anyone skilled in the art,
It should be covered by the protection scope of the present invention.Therefore, protection scope of the present invention should be with scope of protection of the claims
Subject to.
Claims (10)
1. a kind of hit detection device, which is characterized in that including：
Counter is counted for the burst length to measured pulse；
Comparator is configured to detect the failing edge voltage of the rising edge voltage of the measured pulse and the measured pulse, and
The rising edge voltage of the measured pulse and failing edge voltage are compared with hit threshold voltage, when the measured pulse
Rising edge voltage when being greater than the hit threshold voltage, enable the counter and count, when the failing edge of the measured pulse
When voltage is less than the hit threshold voltage, stops the counter and count；
And processor, it is configured to calculate the burst length of the measured pulse, and root according to the count value of the counter
Hit state is judged according to the burst length of the measured pulse.
2. hit detection device according to claim 1, which is characterized in that the processor is configured to：
When being less than the setting hit burst length in the burst length of the measured pulse, judge that there is no hits；
When the hit burst length being greater than the setting hit burst length and being less than the general pulse time, judge that hit occurs.
3. hit detection device according to claim 2, which is characterized in that further include：Latch is configured to when the place
When managing device judgement generation hit, the latch signal of output token hit generation.
4. hit detection device according to claim 3, which is characterized in that the processor is configured to：When judgement does not have
When hit occurs, the counter and the latch are resetted.
5. hit detection device according to claim 3 or 4, which is characterized in that the counter, the comparator and institute
Stating latch is ECL high speed gate circuit.
6. hit detection device described in any one of -5 according to claim 1, which is characterized in that
The transmission level of the measured pulse is ECL level, and the comparator is configured to the quilt according to the ECL level detection
Survey the rising edge voltage of pulse and the failing edge voltage of the measured pulse.
7. a kind of hit detection method, which is characterized in that including：
When the rising edge voltage for detecting measured pulse is greater than hit threshold voltage, enablement count device is counted；
When the failing edge voltage for detecting the measured pulse is less than the hit threshold voltage, stop the counter counts
Number；
The burst length of the measured pulse is calculated according to the count value of the counter；
Hit state is judged according to the burst length of the measured pulse.
8. hit detection method according to claim 7, which is characterized in that
The transmission level of the measured pulse is ECL level, according to the rising edge of measured pulse described in ECL level detection electricity
The failing edge voltage of pressure and the measured pulse.
9. hit detection method according to claim 7 or 8, which is characterized in that the arteries and veins according to the measured pulse
Rushing the time judges that hit state includes：
When being less than the setting hit burst length in the burst length of the measured pulse, judge that there is no hits；
When the hit burst length being greater than the setting hit burst length and being less than the general pulse time, then judge that wink occurs
It is disconnected.
10. hit detection method according to claim 9, which is characterized in that
When judging that there is no resetting the counter when hit；
When hit occurs for judgement, output latch signal marks hit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811078810.3A CN108845224A (en) | 2018-09-14 | 2018-09-14 | Hit detection device and hit detection method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811078810.3A CN108845224A (en) | 2018-09-14 | 2018-09-14 | Hit detection device and hit detection method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN108845224A true CN108845224A (en) | 2018-11-20 |
Family
ID=64189779
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201811078810.3A Pending CN108845224A (en) | 2018-09-14 | 2018-09-14 | Hit detection device and hit detection method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN108845224A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110389278A (en) * | 2019-08-01 | 2019-10-29 | 珠海市运泰利自动化设备有限公司 | A kind of B2B connector device is fitted on level detecting apparatus |
| CN111766452A (en) * | 2020-07-28 | 2020-10-13 | 哈尔滨工业大学 | Transient high-frequency pulse waveform capturing system and method |
| CN114545021A (en) * | 2022-02-25 | 2022-05-27 | 南京理工大学 | High-precision transient detonation velocity measuring device |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201352245Y (en) * | 2009-02-16 | 2009-11-25 | 西安市耀石科技发展有限公司 | Multi-cable connector intermittent disconnection testing system |
| CN103716051A (en) * | 2013-12-16 | 2014-04-09 | 广东正业科技股份有限公司 | High-precision analog-to-digital conversion circuit system |
| CN103941075A (en) * | 2014-04-03 | 2014-07-23 | 南京工程学院 | Pulse real-time detection method and circuit for nanosecond pulse width electrochemical machining |
-
2018
- 2018-09-14 CN CN201811078810.3A patent/CN108845224A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201352245Y (en) * | 2009-02-16 | 2009-11-25 | 西安市耀石科技发展有限公司 | Multi-cable connector intermittent disconnection testing system |
| CN103716051A (en) * | 2013-12-16 | 2014-04-09 | 广东正业科技股份有限公司 | High-precision analog-to-digital conversion circuit system |
| CN103941075A (en) * | 2014-04-03 | 2014-07-23 | 南京工程学院 | Pulse real-time detection method and circuit for nanosecond pulse width electrochemical machining |
Non-Patent Citations (2)
| Title |
|---|
| 邓锐: "连接器接触瞬断监测技术与方法" * |
| 陈银环: "一种电子接插件的瞬断检测方法" * |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110389278A (en) * | 2019-08-01 | 2019-10-29 | 珠海市运泰利自动化设备有限公司 | A kind of B2B connector device is fitted on level detecting apparatus |
| CN111766452A (en) * | 2020-07-28 | 2020-10-13 | 哈尔滨工业大学 | Transient high-frequency pulse waveform capturing system and method |
| CN114545021A (en) * | 2022-02-25 | 2022-05-27 | 南京理工大学 | High-precision transient detonation velocity measuring device |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US6668346B1 (en) | Digital process monitor | |
| US10277213B1 (en) | Glitch detection in input/output bus | |
| US9482720B2 (en) | Non-invasive pre-bond TSV test using ring oscillators and multiple voltage levels | |
| US8553503B2 (en) | On-die signal timing measurement | |
| CN102928772B (en) | Timing sequence test system and method for testing thereof | |
| CN105628115B (en) | A kind of Impulse Noise Denoising Method applied to transit-time ultrasonic flow meter | |
| CN108845224A (en) | Hit detection device and hit detection method | |
| CN103884980A (en) | Hardware Trojan horse detection method and system based on supply current | |
| KR19990037034A (en) | Signal measuring device in tester system | |
| US9939480B2 (en) | Controlling clock measurement with transistors, capacitor, OPAMP, ADC, external enable | |
| CN207717914U (en) | A kind of breakpoint of cable position detecting system based on low voltage pulse reflection method | |
| CN208766255U (en) | Hit detection device | |
| JP2002006003A (en) | All digital built-in self-inspection circuit for phase lock loop and inspecting method | |
| US20060149492A1 (en) | System and method for testing differential signal crossover using undersampling | |
| CN109298307A (en) | Semiconductor packages detection system | |
| CN103983834A (en) | Single-particle transient pulse signal amplitude measuring circuit | |
| CN207717915U (en) | A kind of CPLD breakpoint of cable positioning circuit | |
| US8339155B2 (en) | System and method for detecting soft-fails | |
| Wu et al. | Research on metastability based on FPGA | |
| US8547082B2 (en) | Semiconductor device and pulse width detection method | |
| Ishida et al. | On-chip circuit for measuring data jitter in the time or frequency domain | |
| CN105807134A (en) | Frequency tester and frequency test system | |
| US20160028387A1 (en) | Measuring delay between signal edges of different signals using an undersampling clock | |
| US7386407B2 (en) | Semiconductor device test method using an evaluation LSI | |
| Tianming et al. | An enhanced time-to-digital conversion solution for pre-bond TSV dual faults testing |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20181120 |