CN207717915U - A kind of CPLD breakpoint of cable positioning circuit - Google Patents
A kind of CPLD breakpoint of cable positioning circuit Download PDFInfo
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- CN207717915U CN207717915U CN201820050573.9U CN201820050573U CN207717915U CN 207717915 U CN207717915 U CN 207717915U CN 201820050573 U CN201820050573 U CN 201820050573U CN 207717915 U CN207717915 U CN 207717915U
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Abstract
The utility model discloses a kind of CPLD breakpoint of cable positioning circuits, it includes CPLD controllers, pulse emitting units and signal isolation shaping unit；CPLD controllers are mainly made of divider unit and counter unit；Signal isolation shaping unit is mainly made of analog switch and operational amplifier；Pulse emitting units are mainly made of the first nor gate, the second nor gate, first resistor R1, second resistance R2 and capacitance C；Wherein, the resistance value of first resistor R1 is 1M Ω, and the resistance value of second resistance R2 is 10 Ω；The output end of operational amplifier stops end with the counting of counter unit and is connected, and the output end of pulse emitting units is connected with the counting start end of counter unit；The numerical control selection end of analog switch is connected with the delivery outlet of microcontroller.The utility model has check frequency small, and the advantage that design of hardware and software difficulty is small.
Description
Technical field
The utility model is related to a kind of breakpoint of cable to detect positioning circuit, specifically a kind of cable suitable for longer lines
Positioning circuit is detected, detection maintenance Instrument technology field is belonged to.
Background technology
Communication cable is the main media of information exchange, is played an important role to the reliability of communication system.For standard
The position for really finding communication cabinet fault generation needs to rely on necessary instrument and equipment.Breakpoint of cable positioning device is common inspection
Repair one of instrument.
Mainly there is measuring principle used by breakpoint of cable positioning device：Bridge method, low voltage pulse reflection method and secondary arteries and veins
Rush method.Wherein bridge method is the intelligent detecting method occurred earliest the sixties, it is detected using bridge balance principle, mainly
There are resistance bridge, capacitance bridge etc., it is lower in widely applied several days this technical intelligence degree of computer technology.
Secondary pulse process is to emit low voltage pulse signal to failure cable using the moment of high-voltage pulse breakdown high resistive fault,
With action of low-voltage pulse short trouble waveform testing cable high resistive fault, this is the detection method in more forward position, but circuit structure ratio
It is more complex.
Widely used at present or low voltage pulse reflection method, its basic principle are to emit a low pressure to tested cable
Pulse can reflect a pulse signal when pulse signal encounters fault point, emit pulse by calculating and reflect the round-trip of arteries and veins
Time difference can calculate rough between test point and fault point in conjunction with the wave velocity that pulse is propagated in particular cable
Distance realizes the Primary Location of failure breakpoint.
In low voltage pulse reflection method, transmitting pulse should have suitable pulse width t, if that exomonental arteries and veins
Width t is rushed (to that is to say to have arrived in t time reflected waves and send out more than two-way time of the low voltage electric impulse in tested cable
The test point position of transmitted wave) so transmitted wave will be Chong Die with back wave, it cannot be distinguished out, the intelligent processors such as microcontroller are just
It can not be detected positioning, measurement blind area occur.Such as the pulse width t of transmitted wave is 0.5 μ s, and low voltage pulse signal exists
Spread speed in cable is 160m/ μ s, then measurement blind area is exactly 40m, low voltage pulse signal only needs 0.5 μ s can be in quilt
It surveys in cable and runs one back and forth, back wave reaches test point, and two pulse signals overlap, and test can not obtain a result.
Therefore in order to improve detection adaptability, the pulse width of transmitting signal should moderately be reduced.
And in the prior art, the pulse width for the pulse generating circuit usually realized using basic digital module is mostly μ s
Grade, it is difficult to adapt to check frequency and require small design, narrower pulse transmission signals often use at the high speed such as FPGA in order to obtain
Reason device is realized by complicated algorithm, but this necessarily causes system hardware and software design difficulty to increase.
Utility model content
For deficiencies of the prior art, the purpose of this utility model is：It is small to provide a kind of check frequency, and
The small breakpoint of cable positioning circuit of design of hardware and software difficulty.
To achieve the goals above, the utility model uses technical solution below.
A kind of CPLD breakpoint of cable positioning circuit, it is characterised in that：It includes CPLD controllers, pulse emitting units and letter
Number isolation shaping unit；
The CPLD controllers are mainly made of divider unit and counter unit；
The signal isolation shaping unit is mainly made of analog switch and operational amplifier；
The pulse emitting units are mainly by the first nor gate, the second nor gate, first resistor R1, second resistance R2 and electricity
Hold C compositions；First resistor R1 with and second resistance R2 be connected in series with, connection electrical nodes be denoted as electrical nodes A；First resistor R1's is another
One end is connected with the output end of the frequency divider；The other end of second resistance R2 is grounded；The one end of electrical nodes A also with capacitance C
It is connected, the other end ground connection of capacitance C；The first input end of first nor gate is connected with the output end of frequency divider, the
Second input terminal of one nor gate is connected with electrical nodes A；The output of the first input end and frequency divider of second nor gate
End is connected, and the second input terminal of the second nor gate is connected with the output end of first nor gate, the second nor gate it is defeated
Outlet is the output end of pulse emitting units；Wherein, the resistance value of first resistor R1 is 1M Ω, and the resistance value of second resistance R2 is 10
Ω；
The output end of the pulse emitting units is connected with the first input/output port of analog switch；The analog switch
The second input/output port be connected with the positive input terminal of operational amplifier, the negative input end of operational amplifier passes through 3rd resistor
R3 is connected with positive pole, and the negative input end of operational amplifier is connected to the ground by the 4th resistance R4；
The output end of the operational amplifier stops end with the counting of counter unit and is connected, the pulse emitting units
Output end be connected with the counting start end of counter unit；
The common end COM of the analog switch is the test contact jaw of breakpoint of cable positioning circuit；The numerical control of analog switch
Selection end is connected with the delivery outlet of microcontroller；
The CPLD controllers are communicated by SPI interface and microcontroller.
Further, the microcontroller is connected with LCD display.
Compared with prior art, the utility model has the following advantages that：The list that the pulse emitting units of the utility model generate
Pulse signal is the narrow pulse signal that pulse width is nanosecond, therefore even if in 40m test scopes short in this way, emits arteries and veins
The pulse width t of punching is also far smaller than two-way time of the low voltage electric impulse in tested cable, does not appear in t time internal reflections
Wave has arrived at the test point position for sending out transmitted wave, and transmitted wave is Chong Die with back wave, cannot be distinguished, leads to not measuring pulse
The defect of two-way time in the cable, in summary the utility model have the advantages that measurement blind area is avoided to occur.
Description of the drawings
Fig. 1 is the utility model circuit structure diagram；
Compare shaping unit circuit structure diagram in the utility model of the positions Fig. 2；
Specific implementation mode
The utility model is described in further detail with reference to the accompanying drawings and detailed description.
One, the utility model particular circuit configurations
As shown in Figure 1, a kind of CPLD breakpoint of cable positioning circuit of the utility model, it is by CPLD controllers, impulse ejection
Unit and signal isolation shaping unit composition.
CPLD controllers can (such as MAX3000) using the common low side CPLD chips that ALTERA companies provide.
Pulse emitting units constitute primary element by integrated nor gate chip, two resistance and a capacitance.
Signal isolation shaping unit is mainly made of analog switch and operational amplifier.
1, CPLD controllers
It is mainly made of divider unit and counter unit, wherein there are one count start end and one for counter unit tool
A counting stops end (must also have the conventional ports such as counter output, clock end and clear terminal certainly), counts start end
Counter can be started after the rising edge for including in pulse signal by, which receiving, is counted, and is counted and is stopped termination and receives pulse signal
In include rising edge after can suspend counting, can specifically be patrolled with judgement by the Edge check of VHDL hardware description languages
Programming is collected to realize, but physical circuit netlist will be converted to by eda tool by programming the counter module realized, finally by counter
In the Structured cured chip to CPLD；Divider unit then may be used existing schematic diagram unit module and call, but nothing
By being to use VHDL or schematic diagram mode, finally all particular circuit configurations can be formed under the conversion of eda tool.
2, pulse emitting units
Mainly it is made of the first nor gate, the second nor gate, first resistor R1, second resistance R2 and capacitance C；First resistor
R1 with and second resistance R2 be connected in series with, connection electrical nodes be denoted as electrical nodes A；The other end of first resistor R1 and frequency divider it is defeated
Outlet is connected；The other end of second resistance R2 is grounded；Electrical nodes A is also connected with one end of capacitance C, the other end of capacitance C
Ground connection；The first input end of first nor gate is connected with the output end of frequency divider, the second input terminal and the electricity of the first nor gate
Node A is connected；The first input end of second nor gate is connected with the output end of frequency divider, the second input of the second nor gate
End is connected with the output end of the first nor gate, and the output end of the second nor gate is the output end of pulse emitting units；Wherein,
The resistance value of one resistance R1 is 1M Ω, and the resistance value of second resistance R2 is 10 Ω, and the capacitance of capacitance C is 1nF or 10nF.
3, signal isolation shaping unit
As shown in Figure 1, mainly by analog switch and comparing shaping unit and forming, two component parts are all made of conventional die
Realization, for example, analog switch may be used common ADG719 alternatives analog switch (that is to say " single-pole double throw " simulation
Switch) it realizes, compare shaping unit and is realized using conventional operational amplifiers.As shown in Fig. 2, the negative input end of operational amplifier is logical
3rd resistor R3 to be crossed with positive pole to be connected, the negative input end of operational amplifier is connected to the ground by the 4th resistance R4,
It is to form a comparator circuit, the threshold value compared is since the ratio of 3rd resistor R3 and the 4th resistance R4 determine, this routine
The prior art, herein not reinflated narration.
4, circuit connecting relation
The output end of pulse emitting units is connected with the first input/output port of analog switch；The second of analog switch is defeated
Enter delivery outlet with the positive input terminal of operational amplifier to be connected, the counting of the output end and counter unit of operational amplifier stops
End is connected, and the output end of pulse emitting units is also connected with the counting start end of counter unit；
The common end COM of analog switch is the test contact jaw of breakpoint of cable positioning circuit；The numerical control of analog switch selects
End is connected with the delivery outlet of microcontroller；CPLD controllers are communicated by SPI interface and microcontroller, and microcontroller is shown with LCD
Device is connected.
Two, utility model works principle
1, pulse emitting units operation principle
By the elaboration of background technology it is found that in order to obtain higher detection accuracy, pulse must be generated by reducing check frequency
The narrower detectable signal of width (single pulse signal), the pulse emitting units in the utility model are to complete above-mentioned function, production
Raw narrower single pulse signal.Its concrete operating principle is as follows：The frequency divider being arranged inside CPLD controllers is by crystal oscillator clock
The output signal of circuit is divided to obtain frequency square-wave signal appropriate (for example frequency is 1KHZ), is loaded into impulse ejection list
In member；When the square-wave signal of frequency divider output is between high period, (high level can maintain 0.001 second) electrical nodes A also will place
In high level, (resistance value of second resistance R2 is very big, therefore can will be close to frequency divider output end voltage with the voltage value of electrical nodes A
Value can charge during this to capacitance C certainly), while according to the logic feature of nor gate it is found that the first nor gate will export
Low level, the second nor gate will also export low level；But when the square-wave signal of frequency divider output is reduced to low electricity from high level
Flat moment, since the resistance value of first resistor R1 is much larger than the resistance value of second resistance R2, capacitance C will be put by first resistor R1
Electric (in this discharge process, electrical nodes A is reduced to low level from high level), while it is noted that in this capacitance C processes
What the output end signal clock of middle frequency divider was kept is low level, as a result it will be appreciated that：It is low level when frequency divider exports, and
And electrical nodes A be high level when, the first nor gate output be low level, the second nor gate output necessarily be high level (second or
Two inputs of NOT gate are all low levels, take or are low level afterwards, then negated, are just high level)；When frequency divider output is low electricity
It is flat, and when electrical nodes A is low level, it is clear that the output of the second nor gate is low level.To sum up, in capacitance C discharge processes,
Second nor gate that is to say that the output end of pulse emitting units will necessarily be reduced to low level from high level, a positive arteries and veins occurs
Punching, and the width of this pulse is the discharge time of capacitance C, is readily apparent that, and discharge time is second resistance R2
Resistance value and capacitance C capacitance product, such as the resistance value of second resistance R2 is 10 Ω, and the capacitance of capacitance C is 1nF, then putting
The electric time is 10ns, and the capacitance of capacitance C is 10nF, then discharge time is 100ns.Therefore the pulse hair of the utility model
It can the very narrow single pulse signal of output pulse width, certain this may be easily not regular enough a rectangle arteries and veins to penetrate unit
Punching, as needed we can also carry out Shape correction to it, it is therefore desirable to be handled, by signal instructions, operation amplifier
Device has acted as the effect of this signal instructionsization processing, and common method still utilizes operational amplifier, by operational amplifier
It is set as a comparator, irregular first pulse emitting units output signal is entered by the positive input terminal of operational amplifier,
The negative input end voltage of operational amplifier is that comparison reference voltage the first pulse emitting units output signal voltage is more than with reference to electricity
The part of pressure is through comparing output high level, otherwise output low level, operational amplifier export a regular digital pulse signal,
Can similar means be used to obtain the pulse signal of rule in many fields of measurement, be not belonging to improvements of the present invention, here not
It repeats again, considers whether to add a comparison shaping circuit in a word depending on actual test situation, this transmitting signal is certainly
Rule is wanted for reflection signal.
The principle illustrated by background technology is it is found that pulse narrow in this way can overcome two pulses of transmitted wave and back wave
The technical issues of signal overlap causes measurement blind area to occur together.It is further to note that above-mentioned single pulse signal can the period
Property persistently occur because the signal being loaded on pulse emitting units is a periodic signal, but this period be 0.002 second,
This is much larger than two-way time of the pulse signal in tested cable, therefore can carry out repeated multiple times detection, to multiple surveymeter
Detection accuracy can be improved by calculating result progress data processing.
2, the utility model circuit overall work principle and process
The single pulse signal that pulse emitting units generate is a kind of low-voltage signal, and into tested cable, injected pulse transmitting is single
The low pressure pulse that member generates, can reflect one when pulse signal encounters impedance mismatch point (i.e. cable terminal or breakpoint)
Pulse signal (it is an irregular pulse signal certainly), acquires above-mentioned irregular pulse signal, just by processor
The two-way time that the irregular pulse signal of transmitting pulse and reflection can be calculated is poor, in conjunction with pulse in particular cable
The wave velocity of propagation can calculate the cable length between impedance mismatch point and test point.Also cable open circuit can be found out
Fault point locating is realized from the distance between test point in fault point.To sum up, the measuring principle of the utility model can be summarized as：Hair
A pulse is penetrated, the pulse of reflection is received, the time difference T between transmitting pulse and reflected impulse is calculated, then T/2 is
It is that pulse is transmitted to cable terminal or open end required time in tested cable by test point.It will be apparent that again
In conjunction with the wave velocity that pulse is propagated in particular cable, the cable that can be calculated between impedance mismatch point and test point is long
Degree is completed to measure.
The single pulse that pulse emitting units generate is transmitted to the first input/output port IO1 of analog switch, when numerical control is selected
It selects (low level is sent by the IO of microcontroller) when occurring low level on end, common end COM1 and the first input/output port IO1 connect
It is logical, between two ends can with transmission of analogue signal, meanwhile, cut off between common end COM and the second input/output port IO2, cannot
Transmit signal, at this time pulse emitting units generate single pulse just can be transmitted to analog switch common end COM (and electricity
The test contact jaw of cable breakpoint detection circuit).The utility model by it is specifically used when, will test contact jaw consolidated with tested cable
Electrical connection, therefore the single pulse that pulse emitting units generate just can be injected into tested cable, and in tested cable
It propagates.When this single pulse signal (referred to as emitting pulse) encounters impedance mismatch point (i.e. cable terminal or open end)
An irregular pulse signal (it is also referred to as reflected impulse here) can be reflected.
The utility model by it is specifically used when, test contact jaw and tested cable are consolidated and are electrically connected, therefore reflected impulse
Also will be entered in the utility model circuit by testing contact jaw, it is high when occurring on the numerical control of analog switch selection end SEL at this time
When level, common end COM is connected to the second input/output port, between two ends can with transmission of analogue signal, meanwhile, common end
Cut off between COM and the second input/output port IO2, signal cannot be transmitted, it is clear that at this point, reflected impulse through analog switch second
Input/output port IO2 enters the positive input terminal of operational amplifier.High level on the numerical control selection end SEL of certain analog switch is also
Be need the IO by microcontroller sent at once after transmitting pulse is sent out (usual pulse two-way time tens to hundreds of nanoseconds it
Between, it is therefore necessary to the high level is sent before reflected impulse reaches).
Obviously, the reflected impulse for being sent into operational amplifier is an irregular pulse signal, and microcontroller or CPLD are
It cannot directly handle, it is therefore desirable to be handled, by signal instructions, operational amplifier has acted as this signal instructions
The effect of processing, it is clear that according to aforementioned circuit structure, operational amplifier is arranged to a comparator, random scatters pulse
Entered by the positive input terminal of operational amplifier, the negative input end voltage of operational amplifier is comparison reference voltage, the reference voltage
It is determined by the ratio of 3rd resistor R3 and the 4th resistance R4, the part that transmitting pulse voltage is more than reference voltage is high through comparing output
Level, on the contrary output low level, operational amplifier export a regular digital pulse signal, and this can in many fields of measurement
The pulse signal of rule is obtained using similar means, which is not described herein again.
It is transmitting and the receive process of signal above, the time difference for how obtaining signal transmission is next introduced：Pulse is sent out
The output end for penetrating unit is connected with the counting start end of counter unit；The output end of operational amplifier and counter unit
Stopping end being counted to be connected.
While the output end of pulse emitting units emits test pulse by analog switch to tested cable, also by the survey
The counting start end that single pulse on probation is sent to counter unit (will could carry out signal biography by the IO of CPLD chips certainly
It is defeated), counter starts counting up, the CP pulse signals being counted be CPLD internal works clock (such as common 50MHZ, or
Higher 200MHZ), by taking the work dominant frequency of 200MHZ as an example, corresponding clock cycle t1 is 5ns, that is to say counter with 5ns
Periodic signal be count target start timer counter.0 can be set as by resetting by counting initial value.Realize the another of this function
One scheme is that the output single pulse of pulse emitting units is sent to the interrupting input mouth of microcontroller, and interrupting input mouth receives
It is sent to the counter being arranged inside CPLD by interrupt service routine after to interrupt requests and counts enabling signal.In short, real
There are many mode for now starting counting.
When being reflected back a pulse in tested cable, which becomes a rule after being handled via operational amplifier
The counting that digital pulse signal (single pulse) then is sent to counter stops end, and counter stops to preserve after counting
Next current count value, taken as CNT, then being started counting up from timer conter to the time difference T stopped counting
=(CNT-0) × t1, wherein t1 are 5ns.
Obviously, counter start counting up stop count between time difference be that is to say transmitting pulse and reflected impulse it
Between time difference T, then T/2 is pulse cable terminal or open end are transmitted to by test point in tested cable required for
Time.
And the spread speed V of pulse in the cable is then led by the light velocity, the relative dielectric coefficient of cable insulation material and relatively
The decision of magnetic system number, for example, 160m/ μ s or so,.It is to sum up tested cable length S=V × T/2, fault point locating is completed.
Finally illustrate, above example is merely intended for describing the technical solutions of the present application, but not for limiting the present application, although ginseng
The utility model is described in detail according to preferred embodiment, it will be understood by those of ordinary skill in the art that, it can be to this
The technical solution of utility model is modified or replaced equivalently, without departing from the objective and model of technical solutions of the utility model
It encloses, should all cover in the right of the utility model.
Claims (2)
1. a kind of CPLD breakpoint of cable positioning circuit, it is characterised in that：It includes CPLD controllers, pulse emitting units and signal
Shaping unit is isolated；
The CPLD controllers are mainly made of divider unit and counter unit；
The signal isolation shaping unit is mainly made of analog switch and operational amplifier；
The pulse emitting units are mainly by the first nor gate, the second nor gate, first resistor R1, second resistance R2 and capacitance C
Composition；First resistor R1 with and second resistance R2 be connected in series with, connection electrical nodes be denoted as electrical nodes A；First resistor R1's is another
End is connected with the output end of the frequency divider；The other end of second resistance R2 is grounded；Electrical nodes A also with one end phase of capacitance C
Connection, the other end ground connection of capacitance C；The first input end of first nor gate is connected with the output end of frequency divider, and first
Second input terminal of nor gate is connected with electrical nodes A；The output end of the first input end and frequency divider of second nor gate
It is connected, the second input terminal of the second nor gate is connected with the output end of first nor gate, the output of the second nor gate
End is the output end of pulse emitting units；Wherein, the resistance value of first resistor R1 is 1M Ω, and the resistance value of second resistance R2 is 10 Ω；
The output end of the pulse emitting units is connected with the first input/output port of analog switch；The of the analog switch
Two input/output ports are connected with the positive input terminal of operational amplifier, the negative input end of operational amplifier by 3rd resistor R3 with
Positive pole is connected, and the negative input end of operational amplifier is connected to the ground by the 4th resistance R4；
The counting of the output end of the operational amplifier and counter unit stops end and is connected, the pulse emitting units it is defeated
Outlet is connected with the counting start end of counter unit；
The common end COM of the analog switch is the test contact jaw of breakpoint of cable positioning circuit；The numerical control of analog switch selects
End is connected with the delivery outlet of microcontroller；
The CPLD controllers are communicated by SPI interface and microcontroller.
2. a kind of CPLD breakpoint of cable positioning circuit according to claim 1, it is characterised in that：The microcontroller and LCD
Display is connected.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201820050573.9U CN207717915U (en) | 2018-01-11 | 2018-01-11 | A kind of CPLD breakpoint of cable positioning circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201820050573.9U CN207717915U (en) | 2018-01-11 | 2018-01-11 | A kind of CPLD breakpoint of cable positioning circuit |
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| Publication Number | Publication Date |
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| CN207717915U true CN207717915U (en) | 2018-08-10 |
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ID=63051687
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| CN201820050573.9U Expired - Fee Related CN207717915U (en) | 2018-01-11 | 2018-01-11 | A kind of CPLD breakpoint of cable positioning circuit |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111983520A (en) * | 2020-07-28 | 2020-11-24 | 重庆昱普生科技发展有限公司 | Circuit disconnection monitoring device |
-
2018
- 2018-01-11 CN CN201820050573.9U patent/CN207717915U/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111983520A (en) * | 2020-07-28 | 2020-11-24 | 重庆昱普生科技发展有限公司 | Circuit disconnection monitoring device |
| CN111983520B (en) * | 2020-07-28 | 2023-02-28 | 重庆昱普生科技发展有限公司 | Circuit breaking monitoring device |
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