CN108832805A - Switching Power Supply, charging pile, inverter, frequency converter, UPS and its protection circuit - Google Patents

Switching Power Supply, charging pile, inverter, frequency converter, UPS and its protection circuit Download PDF

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Publication number
CN108832805A
CN108832805A CN201810372369.3A CN201810372369A CN108832805A CN 108832805 A CN108832805 A CN 108832805A CN 201810372369 A CN201810372369 A CN 201810372369A CN 108832805 A CN108832805 A CN 108832805A
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China
Prior art keywords
pwm
signal
protection circuit
door
circuit
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Granted
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CN201810372369.3A
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Chinese (zh)
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CN108832805B (en
Inventor
袁沛华
李化良
刘丹
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Santak Electronic Shenzhen Co Ltd
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Santak Electronic Shenzhen Co Ltd
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Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/32Means for protecting converters other than automatic disconnection
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/5387Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
    • H02M7/53871Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/539Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency
    • H02M7/5395Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency by pulse-width modulation
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/32Means for protecting converters other than automatic disconnection
    • H02M1/325Means for protecting converters other than automatic disconnection with means for allowing continuous operation despite a fault, i.e. fault tolerant converters

Abstract

The present invention relates to a kind of Switching Power Supply, charging pile, inverter, frequency converter, UPS and its protection circuits for preventing bridge arm direct pass; the bridge arm includes the first semiconductor devices driven by PWM-A signal and the second semiconductor devices for being driven by PWM-B signal, and the protection circuit includes:Be connected to the bridge arm the first current detection circuit of second semiconductor device creepage and is connected to the first decision circuitry of first current detection circuit for detecting;First decision circuitry is used to determine whether that the PWM-A signal drives first semiconductor devices according to the testing result and the PWM-B signal of first current detection circuit.

Description

Switching Power Supply, charging pile, inverter, frequency converter, UPS and its protection circuit
Technical field
The present invention relates to power electronics fields, and in particular to a kind of Switching Power Supply, charging pile, inverter, frequency converter, UPS and its protection circuit.
Background technique
As the technology of field of power electronics develops, for semiconductor switch device using safety requirements also increasingly Height, for example, for half-bridge, full-bridge or the circuit topological structures such as recommend, it is straight-through if there is the semiconductor switch pipe of upper and lower bridge arm The phenomenon that, it will lead to bridgc arm short, or even switching tube is caused to demolish, cause safety problem.
Due to semiconductor switch device (such as IGBT), usually all there is certain junction capacity, this leads to switching device meeting There is conducting turn-off delay.In the prior art, general by the way of software programming, for example, one is arranged in pwm control signal Fixed dead time, to avoid short circuit caused by above-mentioned reason.But if dead band time setting is too long, the whole of circuit will affect Body running efficiency, dead band time setting is too short, since different switching devices can have individual difference, and can reduce circuit safety Property;This mode for only relying on software set dead time avoids the shoot through on bridge arm from still lacking reliability.
Therefore, a kind of Switching Power Supply, charging pile, inverter, frequency converter, UPS and its protection circuit are needed at present.
Summary of the invention
For the above-mentioned problems in the prior art, the protection that the present invention provides a kind of for preventing bridge arm direct pass is electric Road, the bridge arm include the first semiconductor devices driven by PWM-A signal and the second semiconductor device for being driven by PWM-B signal Part, the protection circuit include:It is connected to the first electricity for detecting second semiconductor device creepage of the bridge arm Current detection circuit and the first decision circuitry for being connected to first current detection circuit;First decision circuitry is used for basis The testing result of first current detection circuit and the PWM-B signal determine whether the PWM-A signal to described First semiconductor devices is driven.
Preferably, the protection circuit further includes:Be connected to the bridge arm for detecting first semiconductor devices Second current detection circuit of leakage current and the second decision circuitry for being connected to second current detection circuit;Described second sentences Deenergizing is used to be determined whether according to the testing result and the PWM-A signal of second current detection circuit described PWM-B signal drives first semiconductor devices.
Preferably, first current detection circuit includes the first current sensor and for being sequentially connected to the bridge arm One comparator, first current sensor will be described for detecting the second semiconductor device creepage, the first comparator The testing result of first current sensor is compared with reference voltage and exports comparison result to first decision circuitry;
Second current detection circuit includes being sequentially connected to the second current sensor and second of the bridge arm to compare Device, for second current sensor for detecting the first semiconductor device creepage, second comparator is electric by described second The testing result of flow sensor is compared with reference voltage and exports comparison result to second decision circuitry;
Preferably, first decision circuitry includes sequentially connected first or door and the first trigger, described first or The input terminal of door is connected to the output end of the first comparator and the input terminal of the PWM-B signal, described first or The output end of door is connected to the set end of first trigger;
Second decision circuitry includes sequentially connected second or door and the second trigger, described second or door input End be connected to second comparator output end and the PWM-A signal input terminal, described second or door output End is connected to the set end of second trigger.
Preferably, the protection circuit further includes for according to the control of the judging result of first decision circuitry PWM-A signal executes the first logic circuit of driving to first semiconductor devices, and for according to second judgement The judging result of circuit controls the second logic circuit that the PWM-B signal executes driving to second semiconductor devices.
Preferably, first logic circuit includes first and door, and described first is connected to institute with the input terminal of door State the input terminal of PWM-A signal and the output end QN of first trigger, described first be connected to the output end of door it is described The driving end of first semiconductor devices;Second logic circuit includes second and door, and described second distinguishes with the input terminal of door It is connected to the input terminal of the PWM-B signal and the output end QN of second trigger, described second connects with the output end of door It is connected to the driving end of second semiconductor devices.
Preferably, the protection circuit further includes clock signal generating circuit, and the clock signal generating circuit is according to institute State the testing result and the PWM-A signal and described of the first current detection circuit and second current detection circuit PWM-B signal generates the clock signal for being used for first trigger and second trigger.
Preferably, the clock signal generating circuit includes being connected to described first or gate output terminal and second or door The first NOT gate and the second NOT gate of output end, and it is connected to the third of the described first non-gate output terminal and the second non-gate output terminal With door, the output end of the third and door is connected to the clock signal input terminal of first trigger and described two and triggers The clock signal input terminal of device.
According to another aspect of the present invention, a kind of Switching Power Supply is also provided, including protects circuit as described above.
According to another aspect of the present invention, a kind of charging pile is also provided, including protects circuit as described above.
According to another aspect of the present invention, a kind of inverter is also provided, including protects circuit as described above.
According to another aspect of the present invention, a kind of frequency converter is also provided, including protects circuit as described above.
According to another aspect of the present invention, a kind of uninterruptible power supply (UPS) is also provided, including protects electricity as described above Road.
Provided by the present invention for preventing the protection circuit of bridge arm direct pass, pass through the electric current on monitoring pwm signal and bridge arm Size controls driving of the pwm signal to complementary device, can effectively ensure that the first device of composition bridge arm, only with it mutually Mend the second device PWM drive signal B be low level, and the bridge arm end electric current of the second device be 0 when, just permission the first device PWM drive signal A it is driven, effectively prevent complementary device composition bridge arm occur it is straight-through;Meanwhile the present invention mentions The protection circuit of confession can be realized the double interlock of PWM drive signal and bridge arm current, improve the reliability of circuit interlock, i.e., Make to break down in PWM drive signal (such as driving complementary device pwm signal and meanwhile generate high level) or current detector When part fails, it also can guarantee to be not in bridge arm direct pass phenomenon, improve the safety in utilization of complementary device;In addition, with utilization The dead time of software setting is different, and protection circuit provided by the invention is not influenced by parameter of semiconductor devices itself, can be with Suitable for the bridge arm structure of various semiconductor devices complementations composition.
Detailed description of the invention
Fig. 1 is the common half-bridge inversion circuit schematic diagram being made of IGBT.
Fig. 2 is the shutdown time diagram of IGBT in circuit shown in Fig. 1.
Fig. 3 is the protection circuit schematic diagram for half-bridge inverter that the preferred embodiment of the present invention provides.
Fig. 4 is the d type flip flop clock signal generating circuit schematic diagram that the preferred embodiment of the present invention provides.
Fig. 5 be another embodiment of the present invention provides the protection circuit schematic diagram for full-bridge inverter.
Fig. 6 is the detailed circuit schematic diagram shown in Fig. 5 for the protection circuit of full-bridge inverter.
Fig. 7 be another embodiment of the present invention provides the protection circuit schematic diagram for push-pull configuration.
Specific embodiment
In order to make the objectives, technical solutions, and advantages of the present invention clearer, pass through below in conjunction with attached drawing specific real Applying example, the present invention is described in more detail.It should be appreciated that described herein, specific examples are only used to explain the present invention, and It is not used in the restriction present invention.
In the prior art, dead time is set usually in pwm control signal to prevent the circuit topology of complementary structure from going out Existing short circuit phenomenon, but inventor it has been investigated that, due to the individual difference of semiconductor switch device, this mode also can not be complete Ensure that one of switching device is fully disconnected before another switch device conductive complementary to it entirely.
By taking the half-bridge inverter of IGBT composition as an example, Fig. 1 is the common half-bridge inversion circuit schematic diagram being made of IGBT, Fig. 2 is the shutdown time diagram of IGBT in circuit shown in Fig. 1, as shown in Fig. 2, in order to turn off IGBT, for example, at the t6 moment, Transmission failing edge is controlled corresponding IGBT and starts to execute shutdown by PWM-A, due to the Miller effect, driving voltage UgeExist first The t6-t7 period, which declines, to be reached Miller platform and continues to the t8 moment;Correspondingly, at the t7 moment, collector emitter voltage Uce It begins to ramp up, until the t8 moment reaches busbar voltage;At this point, at the t8 moment, collector-emitter current IceIt begins to decline, directly It is just reduced to 0 to the t11 moment, and early in t10 moment, driving voltage UgeSpecified shutdown negative pressure is just had descended to, therefore, invention People thinks, when judging whether IGBT complete switches off, it is insecure for only relying on PWM drive signal, it is also necessary to its leakage current, That is collector-emitter current IceIt is detected.
Based on principles above, a kind of protection circuit is inventors herein proposed, letter can not only be driven for the PWM of switching device It number is interlocked, can also realize interlocking by the electric current on the bridge arm of monitoring complementary device composition, be the conducting of complementary device Dual safety is provided with shutdown to guarantee, is described in detail by taking the half-bridge inversion circuit being made of IGBT as an example below.
Fig. 3 is the protection circuit schematic diagram for half-bridge inverter that the preferred embodiment of the present invention provides, as shown in figure 3, The interlock circuit includes:The grid that the IGBT 10 and IGBT 20 in half-bridge inverter are connected to through optical coupling isolation circuit drives The logical AND gate 11 and logical AND gate 21 of moved end, current detection circuit 1A and the current detecting being connected on half-bridge inverter bridge arm Circuit 1B, and it is connected to the decision circuitry 2A and decision circuitry 2B of the output end of current detection circuit 1A and 1B;
Wherein, current detection circuit 1A include be connected to 10 emitter of IGBT for monitoring collector-emitter current IceThe current sensor 12 for whether being 0, and it is connected to through filter capacitor the comparator 13 of 12 output end of current sensor, if The I of IGBT 10ceIt is 0, then after compared with being connected to the reference voltage (such as 10 millivolts) of another input terminal of comparator 13, Comparator 13 can export a low level to decision circuitry 2A;If the I of IGBT 10ceIt is not 0, then comparator 13 can export one High level is to decision circuitry 2A;
Decision circuitry 2A includes logic sum gate 14 and d type flip flop 15, wherein an input terminal of logic sum gate 14 is connected to 13 output end of comparator, another input terminal are connected to the input terminal of the PWM-A signal of driving IGBT 10, logic sum gate 14 Output end is connected to the set end of d type flip flop 15, and the output end QN of d type flip flop is connected to an input terminal of logical AND gate 21.
The circuit of current detection circuit 1B is identical with current detection circuit 1A, including in current detection circuit 1A The current sensor 22 and comparator 23 of current sensor 12 and the complementary setting of comparator 13;The circuit of decision circuitry 2B and judgement Circuit 2A is identical, including with the logic sum gate 24 of logic sum gate 14 and the complementary setting of d type flip flop 15 in decision circuitry 2A With d type flip flop 25;Difference is that the output end QN of the d type flip flop of decision circuitry 2B is connected to an input of logical AND gate 11 End.
If in PWM-A or comparator 13 export to logic sum gate 14 signal at least one be high level, logic sum gate 14 Make d type flip flop 15 that set occur the set end for exporting high level to a d type flip flop 15, at this point, the output end QN of d type flip flop Low level will be exported to logical AND gate 21, no matter then having the PWM-B signal for being input to another input terminal of logical AND gate 21 is high electricity Flat or low level, logical AND gate 21 can all prevent its driving to IGBT 20;
If the signal of output to logic sum gate 14 is low level in PWM-A and comparator 13, that is to say, that PWM-A letter It number is 0, and the collector-emitter current I of IGBT10ceIt also is 0, logic sum gate 14 will export a low level to d type flip flop 15 set end, if the clock signal CL of d type flip flop is rising edge at this time, output end QN will export high level to logical AND Door 21, logical AND gate 21 will allow the PWM-B signal of its another input terminal to pass through, will if PWM-B at this time is high level IGBT 20 is driven to work;
Similarly, the monitoring according to current detection circuit 1B to the collector-emitter current of IGBT 20, and judgement Judgement of the circuit 2B to PWM-B signal and current detection circuit 1B monitoring situation, the logical AND of setting complementary with logical AND gate 21 Door 11 can control whether that PWM-A signal is allowed to execute drive to IGBT 10 according to the judgement result that above-mentioned decision circuitry 2B is exported It is dynamic.
By the protection circuit provided using aforementioned present invention, can not only be realized according to pwm signal to semi-bridge inversion electricity The driving on road interlocks, and driving interlocking can also be realized according to the electric current on inverter bridge leg, efficiently solves and is executing IGBT conducting When shutdown, the variation timing of gate drive voltage, collector emitter voltage and collector-emitter current is inconsistent to be asked Topic, improves the functional reliability of complementation IGBT on bridge arm.
In one embodiment of the invention, the above-mentioned clock signal CL for d type flip flop 15 and d type flip flop 25 can benefit Generated with clock signal generating circuit, specifically, can by the above-mentioned clock signal CL for being used for d type flip flop 15 and d type flip flop 25, It is associated with the current detecting result of pwm signal and current detection circuit.Fig. 4 is the D triggering that the preferred embodiment of the present invention provides Device clock signal generating circuit schematic diagram, as shown in figure 4, clock signal CL generation circuit includes being connected to shown in Fig. 3 patrol Volume or door 14 output end logic inverter 16, be connected to the logic inverter 26 of the output end of logic sum gate 24 shown in Fig. 3, with And it is connected to the logical AND gate 17 of the output end of logic inverter 16 and the output end of logic inverter 26;When logic sum gate 14 and logic Or the output of door 24 is when being low level, that is, PWM-A and PWM-B are low level, and the collection of IGBT10 and IGBT20 Electrode-transmitter pole IceWhen being 0, the clock signal CL that logical AND gate 17 exports will be rising edge.
By the clock signal CL generated using foregoing circuit, decision circuitry can be made in the control of output to logical AND gate Signal processed improves circuit reliability the case where further contemplating on inverter bridge leg with the presence or absence of through current.
In one embodiment of the invention, circuit topology shown in Fig. 3 can also use other electronic devices to realize Identical function.For example, current sensor 12 and 22 could alternatively be current divider, then current divider is detected by isolation amplifier Current signal processing amplification after, be transmitted to comparator and be compared;The supply voltage of comparator 13 and 23 in Fig. 3 can be adopted The amplifier in Fig. 3 is replaced with positive and negative 15 volts or 12 volts, or use single supply op as comparator;D type flip flop in Fig. 3 It could alternatively be JK flip-flop;The set end and reset terminal of d type flip flop itself can exchange, and output end Q and QN can also be exchanged; In addition, all logic gates could alternatively be the combination of one or more NAND gates in circuit topology shown in Fig. 3, wherein Logical AND gate 11 and 12 may be replaced by triode or metal-oxide-semiconductor, correspondingly, can be controlled using the output end Q of d type flip flop Make its on-off.
In one embodiment of the invention, above-mentioned interlock circuit can also be used to prevent the inverter bridge of full bridge inverter Shoot through occurs for arm.Fig. 5 be another embodiment of the present invention provides the protection electrical block diagram for full-bridge inverter, As shown in Figure 5, it is known that full-bridge inverter includes two bridge arm structures of four IGBT composition, is by IGBT 10 and IGBT respectively The inverter bridge leg of 20 compositions, and the inverter bridge leg being made of IGBT 30 and IGBT 40;Wherein, IGBT 10 and IGBT 30 is equal It is controlled by PWM-A, IGBT 20 and IGBT 40 is controlled by PWM-B;
Similar with the protection circuit shown in Fig. 3 for half-bridge inverter, protection circuit shown in fig. 5 respectively includes and four The corresponding current detection circuit of a IGBT and decision circuitry, wherein current detection circuit 1A and decision circuitry 1B are sequentially connected In the emitter of IGBT 10;Current detection circuit 2A and decision circuitry 2B is sequentially connected to the collector of IGBT 20;Electric current inspection Slowdown monitoring circuit 3A and decision circuitry 3B is sequentially connected to the collector of IGBT 30;Current detection circuit 4A and decision circuitry 4B are successively It is connected to the emitter of IGBT 40;
Wherein, the current detection circuit 1A-4A and decision circuitry of the protection circuit shown in fig. 5 for full-bridge inverter 1B-4B is identical as the protection circuit structure of current detection circuit 1A and decision circuitry 1B of circuit shown in Fig. 3, working method and Principle is also identical, and difference essentially consists in, for controlling PWM-A and PWM-B to the IGBT logical AND gate 31 driven and patrolling It collects and all has three inputs with door 41;By taking the logic circuit 31 for controlling PWM-A signal as an example, input terminal has been separately connected PWM- The input terminal of A, and the decision circuitry 2B corresponding to IGBT 20 output end and decision circuitry 4B corresponding to IGBT40 it is defeated Outlet;That is, logical AND gate 31 can just allow only when decision circuitry 2B and decision circuitry 4B exports high level simultaneously The PWM-A signal of its input terminal passes through and drives IGBT 10 and IGBT 30;Correspondingly, only as decision circuitry 1B and judgement electricity When road 3B exports high level simultaneously, logical AND gate 41 can just allow the PWM-B signal of its input terminal to pass through and drive 20 He of IGBT IGBT 40。
Fig. 6 is the further circuit diagram shown in Fig. 5 for the protection circuit of full-bridge inverter, wherein is corresponded to The current detection circuit 1A of IGBT 10 includes the current sensor and comparator for being sequentially connected to 10 emitter of IGBT, is corresponded to The decision circuitry 1B of IGBT 10 include be sequentially connected to current detection circuit 1A's or door and trigger;Corresponding to IGBT 20, The current detection circuit 2A-4A and decision circuitry 2B-4B of IGBT 30 and IGBT40 and the current detecting for corresponding to IGBT 10 Circuit 1A is similar with decision circuitry 1B, and details are not described herein again;As shown in fig. 6, if desired decision circuitry 2B and decision circuitry 4B are same When export high level, then it is meant that PWM-B low level must be made, and corresponding to IGBT 20 collector-emitter electricity Flow IceIt is 0, the collector-emitter current I corresponding to IGBT 40ceIt is 0, could makes logical AND gate 31 that PWM-A be allowed to drive Dynamic IGBT 10 and IGBT 30 works;On the contrary, if PWM-B be high level or IGBT 20 and IGBT 40 wherein at least One collector-emitter current does not drop to zero, and logical AND gate 31 can be made to prevent PWM-A to 10 He of IGBT The driving of IGBT 30 ensure that the work safety of IGBT to prevent bridge arm direct pass.
Similarly, arrange that logical AND gate 41 is to PWM-B in mutual symmetry due to logical AND gate 41 and logical AND gate 31 The control principle of signal and above-mentioned logical AND gate 31 are identical to the control principle of PWM-A signal, and details are not described herein again.
In one embodiment of the invention, for the clock signal CL1 of decision circuitry 1B and 2B and for judging electricity The clock signal CL2 of road 3B and 4B can be utilized respectively clock signal generating circuit shown in Fig. 4 to generate, wherein CL1 clock letter Two NOT gates of number generation circuit are connected to decision circuitry 1B and 2B's or gate output terminal, CL2 clock signal generating circuit Two NOT gates be connected to decision circuitry 3B and 4B's or gate output terminal.
When PWM-A and PWM-B are low level, and corresponding to the collector of IGBT 10 and IGBT 20-emitter electricity When stream is 0, clock signal CL1 is rising edge;Correspondingly, decision circuitry 1B and decision circuitry 2B will export high level extremely respectively Logical AND gate 41 and logical AND gate 31;Similarly, only when PWM-A and PWM-B are low level, and correspond to IGBT30 and When the collector-emitter current of IGBT40 is 0, clock signal CL2 is rising edge;Correspondingly, decision circuitry 3B and judgement Circuit 4B will export respectively high level to logical AND gate 31 and logical AND gate 41.Although in the above-described embodiments, using half-bridge Inverter and full-bridge inverter illustrate the present invention the protection circuit of offer, but it will be recognized by one of ordinary skill in the art that In other embodiments, protection circuit provided by the invention can be also used for other complementary bridge arm structures controlled by PWM, example Such as, Fig. 7 is the protection circuit schematic diagram provided by the present invention for push-pull configuration, as shown in fig. 7, being provided according to aforementioned present invention Protecting circuit designed thought, by push-pull circuit PWM input terminal setting two complementary logics and door 51 and 61, and The current detection circuit and decision circuitry of complementary setting on recommending bridge arm, for example, current detection circuit 1A and judgement in Fig. 7 Circuit 1B not only can realize locking to driving according to the PWM drive signal of push-pull circuit, can also basis recommend on bridge arm Size of current realize locking to driving, effectively prevent the shoot through for recommending bridge arm, improve the reliable of push-pull circuit Property.
In one embodiment of the invention, a kind of Switching Power Supply is also provided, the Switching Power Supply includes in above-described embodiment For preventing the protection circuit of bridge arm direct pass.
In one embodiment of the invention, a kind of charging pile is also provided, which includes the use in above-described embodiment In the protection circuit for preventing bridge arm direct pass.
In one embodiment of the invention, a kind of inverter is also provided, which includes the use in above-described embodiment In the protection circuit for preventing bridge arm direct pass.
In one embodiment of the invention, a kind of frequency converter is also provided, which includes the use in above-described embodiment In the protection circuit for preventing bridge arm direct pass.
In one embodiment of the invention, a kind of uninterruptible power supply (UPS) is also provided, also UPS equipment includes above-mentioned reality Apply the protection circuit for being used to prevent bridge arm direct pass in example.
Although the present invention has been described by means of preferred embodiments, the present invention is not limited to described here Embodiment, without departing from the present invention further include made various changes and variation.

Claims (13)

1. a kind of for preventing the protection circuit of bridge arm direct pass, which is characterized in that the bridge arm includes being driven by PWM-A signal First semiconductor devices and the second semiconductor devices driven by PWM-B signal, the protection circuit include:It is connected to the bridge The first current detection circuit for detecting second semiconductor device creepage of arm is examined with first electric current is connected to First decision circuitry of slowdown monitoring circuit;First decision circuitry be used for according to the testing result of first current detection circuit and The PWM-B signal determines whether that the PWM-A signal drives first semiconductor devices.
2. protection circuit according to claim 1, which is characterized in that the protection circuit further includes:It is connected to the bridge The second current detection circuit for detecting first semiconductor device creepage of arm is examined with second electric current is connected to Second decision circuitry of slowdown monitoring circuit;Second decision circuitry be used for according to the testing result of second current detection circuit and The PWM-A signal determines whether that the PWM-B signal drives first semiconductor devices.
3. protection circuit according to claim 2, which is characterized in that first current detection circuit includes being sequentially connected In the first current sensor and first comparator of the bridge arm, first current sensor is for detecting the second semiconductor device The testing result of first current sensor is compared with reference voltage and exports ratio by part leakage current, the first comparator Compared with result to first decision circuitry;
Second current detection circuit includes the second current sensor and the second comparator for being sequentially connected to the bridge arm, institute State the second current sensor for detect the first semiconductor device creepage, second comparator is by second current sense The testing result of device is compared with reference voltage and exports comparison result to second decision circuitry.
4. protection circuit according to claim 3, which is characterized in that first decision circuitry includes sequentially connected One or door and the first trigger, described first or the input terminal of door be connected to the output end of the first comparator and described The input terminal of PWM-B signal, described first or the output end of door be connected to the set end of first trigger;
Second decision circuitry includes sequentially connected second or door and the second trigger, described second or door input terminal point Be not connected to the output end of second comparator and the input terminal of the PWM-A signal, described second or the output end of door connect It is connected to the set end of second trigger.
5. protection circuit according to claim 4, which is characterized in that the protection circuit further includes for according to described The judging result of one decision circuitry controls the first logic electricity that the PWM-A signal executes driving to first semiconductor devices Road, and for controlling the PWM-B signal to second semiconductor device according to the judging result of second decision circuitry Part executes the second logic circuit of driving.
6. protection circuit according to claim 5, which is characterized in that first logic circuit includes first and door, institute It states first and is connected to the input terminal of the PWM-A signal and the output end QN of first trigger with the input terminal of door, Described first is connected to the driving end of first semiconductor devices with the output end of door;Second logic circuit includes second With door, described second with the input terminal of door be connected to the PWM-B signal input terminal and second trigger it is defeated Outlet QN, described second is connected to the driving end of second semiconductor devices with the output end of door.
7. protection circuit according to claim 4, which is characterized in that the protection circuit further includes that clock signal generates electricity Road, the clock signal generating circuit is according to the detection knot of first current detection circuit and second current detection circuit Fruit and the PWM-A signal and the PWM-B signal generate for first trigger and second trigger when Clock signal.
8. protection circuit according to claim 7, which is characterized in that the clock signal generating circuit includes being separately connected In described first or gate output terminal and second or gate output terminal the first NOT gate and the second NOT gate, and to be connected to described first non- The output end of the third and door of gate output terminal and the second non-gate output terminal, the third and door is connected to first triggering The clock signal input terminal of the clock signal input terminal of device and two trigger.
9. a kind of Switching Power Supply, which is characterized in that including the described in any item protection circuits of claim 1 to 8.
10. a kind of charging pile, which is characterized in that including protection circuit as claimed in any one of claims 1 to 8.
11. a kind of inverter, which is characterized in that including protection circuit as claimed in any one of claims 1 to 8.
12. a kind of frequency converter, which is characterized in that including protection circuit as claimed in any one of claims 1 to 8.
13. a kind of uninterruptible power supply, which is characterized in that including protection circuit as claimed in any one of claims 1 to 8.
CN201810372369.3A 2018-04-24 2018-04-24 Switching power supply, charging pile, inverter, frequency converter, UPS and protection circuit thereof Active CN108832805B (en)

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CN112104303A (en) * 2020-09-14 2020-12-18 珠海格力电器股份有限公司 Fault detection method of control circuit, motor controller and servo control system

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CN105553263A (en) * 2015-12-28 2016-05-04 成都芯源系统有限公司 Switching power supply with constant on-time control, and control circuit and control method thereof
CN106385009A (en) * 2016-11-30 2017-02-08 东南大学 Shaping protection circuit applied to IGBT
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JP3633655B2 (en) * 1994-11-18 2005-03-30 株式会社リコー Motor drive device
CN105553263A (en) * 2015-12-28 2016-05-04 成都芯源系统有限公司 Switching power supply with constant on-time control, and control circuit and control method thereof
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CN111399616A (en) * 2020-03-05 2020-07-10 广州市友达电子科技有限公司 Internet of things cloud platform based on WEB client
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