CN108809080B - Bias circuit, oscillator and charge pump - Google Patents
Bias circuit, oscillator and charge pump Download PDFInfo
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- CN108809080B CN108809080B CN201710297563.5A CN201710297563A CN108809080B CN 108809080 B CN108809080 B CN 108809080B CN 201710297563 A CN201710297563 A CN 201710297563A CN 108809080 B CN108809080 B CN 108809080B
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- 230000008569 process Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 2
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Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/06—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider
- H02M3/07—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps
Abstract
The embodiment of the invention provides a bias circuit, an oscillator and a charge pump, wherein the bias circuit comprises a first current mirror module and a second current mirror module, and the bias circuit further comprises: the shunt module is respectively connected with the output end of the first current mirror module, the input end of the second current mirror module and the enabling end of the oscillator, and when the enabling signal amplitude of the oscillator is greater than or equal to a preset value, the shunt module shunts the output current of the first current mirror module and outputs the shunted current to the second current mirror module; wherein the split current is inversely proportional to the enable signal amplitude of the oscillator. Under the condition that the reference current of the bias circuit (namely, the output current of the first current mirror module) is unchanged, when the amplitude of the enabling signal of the oscillator (namely, the power supply voltage change of the charge pump) is larger than or equal to a preset value, the embodiment of the invention can keep the charge supply capacity of the charge pump constant.
Description
Technical Field
The present invention relates to the field of circuit technology, and in particular, to a bias circuit, an oscillator, and a charge pump.
Background
The ability of the charge pump, i.e., the ability of the charge pump to provide charge to a load, is related to the clock frequency and clock amplitude of the charge pump. Fig. 1 is a schematic circuit structure of a conventional charge pump, and fig. 2 is a clock timing diagram of the conventional charge pump. The larger the clock clk/clkb, the higher the clock amplitude VDD, the more charge-providing the conventional charge pump is before the clock frequency reaches the breakdown point of the conventional charge pump, i.e., without the clock frequency far exceeding the frequency value at which the capacitor in the conventional charge pump cannot transfer charge.
However, when the conventional charge pump is applied to the memory, it is generally applied in the case of a wide power supply voltage, that is, the power supply voltage of the conventional charge pump may vary in the range of 1VDD to 3 VDD. At this time, if the reference current of the conventional charge pump is given, that is, when the oscillator of the conventional charge pump cannot adjust the reference current, the capability of the conventional charge pump to supply the charge will vary with the variation of the power supply voltage.
Disclosure of Invention
In view of the above, an objective of the embodiments of the present invention is to provide a bias circuit, an oscillator and a charge pump, so as to solve the problem that when the oscillator of the conventional charge pump cannot adjust the reference current, the capability of the conventional charge pump to supply charge varies with the variation of the power supply voltage.
In order to solve the above-mentioned problem, an embodiment of the present invention discloses a bias circuit, which is applied to an oscillator, and includes a first current mirror module and a second current mirror module, and further includes: the shunt module is respectively connected with the output end of the first current mirror module, the input end of the second current mirror module and the enabling end of the oscillator, and when the amplitude of the enabling signal of the oscillator is larger than or equal to a preset value, the shunt module shunts the output current of the first current mirror module and outputs the shunted current to the second current mirror module; wherein the split current is inversely proportional to an enable signal amplitude of the oscillator.
Optionally, the splitting module includes: the first current branch is respectively connected with the output end of the first current mirror module and the enabling end of the oscillator; the resistance value of the first current branch is inversely proportional to the enable signal amplitude of the oscillator; the second current branch is respectively connected with the output end of the first current mirror module and the input end of the second current mirror module; when the amplitude of the enabling signal of the oscillator is larger than or equal to the preset value, the first current branch circuit and the second current branch circuit are conducted; when the amplitude of the enabling signal of the oscillator is smaller than the preset value, the first current branch is disconnected, and the second current branch is conducted.
Optionally, the first current branch includes: the drain end of the first NMOS tube is connected with the output end of the first current mirror module, and the control end of the first NMOS tube is connected with the enabling end of the oscillator; the drain end and the control end of the second NMOS tube are respectively connected with the source end of the first NMOS tube, and the source end of the second NMOS tube is grounded.
Optionally, the equivalent resistance of the first NMOS transistor is inversely proportional to the enable signal amplitude of the oscillator.
Optionally, the second current branch includes: the drain end of the third NMOS tube is connected with the output end of the first current mirror module, the control end of the third NMOS tube is connected with the input end of the second current mirror module, and the source end of the third NMOS tube is grounded.
Optionally, the size of the first NMOS transistor, the size of the second NMOS transistor, and the size of the third NMOS transistor are the same.
In order to solve the above problems, the embodiment of the invention also discloses an oscillator, which comprises the bias circuit.
In order to solve the above problems, the embodiment of the invention also discloses a charge pump, which comprises the oscillator.
The embodiment of the invention has the following advantages: the shunt module is arranged in the bias circuit and is respectively connected with the output end of the first current mirror module, the input end of the second current mirror module and the enabling end of the oscillator in the bias circuit, when the enabling signal amplitude of the oscillator is larger than or equal to a preset value, the shunt module shunts the output current of the first current mirror module and outputs the shunted current to the second current mirror module, wherein the shunted current is inversely proportional to the enabling signal amplitude of the oscillator. Thus, when the reference current (i.e., the output current of the first current mirror module) of the bias circuit (oscillator) is unchanged, and when the amplitude of the enable signal of the oscillator (i.e., the power supply voltage of the charge pump is changed) is greater than or equal to a preset value, the current provided by the bias circuit is reduced when the amplitude of the enable signal of the oscillator is increased, i.e., the power supply voltage is increased, and when the amplitude of the enable signal of the oscillator is reduced, i.e., the power supply voltage is decreased, the current provided by the bias circuit is increased, and the clock frequency of the oscillator is increased, thereby counteracting the influence of the power supply voltage change of the charge pump on the charge supply capacity of the charge pump and keeping the charge supply capacity of the charge pump constant.
Drawings
FIG. 1 is a schematic circuit diagram of a conventional charge pump;
FIG. 2 is a clock timing diagram of a conventional charge pump;
FIG. 3 is a block diagram of one embodiment of a bias circuit of the present invention;
fig. 4 is a schematic diagram of a bias circuit embodiment of the present invention.
Detailed Description
In order that the above-recited objects, features and advantages of the present invention will become more readily apparent, a more particular description of the invention will be rendered by reference to the appended drawings and appended detailed description.
Referring to fig. 3, which shows a block diagram of an embodiment of a bias circuit of the present invention, the bias circuit may include a first current mirror module 10, a second current mirror module 20, and a shunt module 30, the shunt module 30 being respectively connected to an output terminal of the first current mirror module 10, an input terminal of the second current mirror module 20, and an enable terminal of the oscillator, the enable terminal of the oscillator providing an enable signal EN, the shunt module 30 shunting an output current of the first current mirror module 10 and outputting the shunted current to the second current mirror module 20 when an amplitude of the enable signal EN of the oscillator is greater than or equal to a preset value; wherein the split current is inversely proportional to the enable signal EN amplitude of the oscillator.
The preset value can be set according to the power supply voltage variation range of the charge pump.
In this way, in the case where the reference current (i.e., the output current of the first current mirror module 10) of the bias circuit (oscillator) is unchanged, when the amplitude of the enable signal EN of the oscillator (i.e., the power supply voltage of the charge pump is changed) is greater than or equal to a preset value, since the current supplied by the bias circuit is changed in inverse proportion to the amplitude of the enable signal EN of the oscillator, the current supplied by the bias circuit is made smaller when the amplitude of the enable signal EN of the oscillator is increased, i.e., the power supply voltage is made higher, the clock frequency of the oscillator is made smaller, and the current supplied by the bias circuit is made larger when the amplitude of the enable signal EN of the oscillator is made smaller, i.e., the power supply voltage is made lower, thereby canceling the influence of the power supply voltage change of the charge pump on the charge pump to provide the charge capability of the charge pump and realizing that the charge capability of the charge pump is kept constant.
Referring to fig. 3, the bias circuit may further include a bias current generating module 40 in addition to the first current mirror module 10, the second current mirror module 20, and the shunt module 30. Wherein, the bias current generating module 40 is used for generating bias current; the first current mirror module 10, the first current mirror module 10 is arranged in a mirror image with the bias current generating module 40, and the first current mirror module 10 is used for mirroring the bias current; the second current mirror module 20, the second current mirror module 20 is mirror-arranged with the shunt module 30, and the second current mirror module 20 is used for mirror-imaging the shunted current.
Alternatively, in one embodiment of the present invention, referring to fig. 4, the diverting module 30 may include: a first current branch 31, the first current branch 31 being connected to the output of the first current mirror module 10 and the enable of the oscillator, respectively; the resistance of the first current branch 31 is inversely proportional to the amplitude of the enable signal EN of the oscillator; the second current branch 32, the second current branch 32 is connected with the output end of the first current mirror module 10 and the input end of the second current mirror module 20 respectively; when the amplitude of the enable signal EN of the oscillator is greater than or equal to a preset value, the first current branch 31 and the second current branch 32 are conducted, and the first current branch 31 and the second current branch 32 shunt the output current of the first current mirror module 10; when the amplitude of the enable signal EN of the oscillator is smaller than the preset value, the first current branch 31 is turned off, the second current branch 32 is turned on, and the output current of the first current mirror module 10 flows only from the second current branch 32.
Alternatively, in one embodiment of the present invention, referring to fig. 4, the first current branch 31 may include: the drain end of the first NMOS tube N1 is connected with the output end of the first current mirror module 10, and the control end of the first NMOS tube N1 is connected with the enabling end of the oscillator; the drain end and the control end of the second NMOS tube N2 are respectively connected with the source end of the first NMOS tube N1, and the source end of the second NMOS tube N2 is grounded.
Alternatively, the equivalent resistance of the first NMOS transistor N1 may be inversely proportional to the amplitude of the enable signal EN of the oscillator. Specifically, the equivalent resistance of the first NMOS transistor N1 may be proportional to 1/[ K (VDD-Vth) ], where K is a constant, VDD is the enable signal EN amplitude of the oscillator, and Vth is the threshold voltage of the first NMOS transistor N1. Therefore, the equivalent resistance of the first NMOS transistor N1 may be inversely proportional to the amplitude of the enable signal EN of the oscillator. Thus, when the amplitude of the enable signal EN of the oscillator becomes large, the equivalent resistance of the first NMOS transistor N1 becomes small, the current flowing through the first current branch 31 becomes large, and when the amplitude of the enable signal EN of the oscillator becomes small, the equivalent resistance of the first NMOS transistor N1 becomes large, the current flowing through the first current branch 31 becomes small. Specifically, the preset value and the threshold voltage of the first NMOS transistor N1 may be set to be equal.
Alternatively, in one embodiment of the present invention, referring to fig. 4, the second current branch 32 may include: and the drain end of the third NMOS tube N3 is connected with the output end of the first current mirror module 10, the control end of the third NMOS tube N3 is connected with the input end of the second current mirror module 20, and the source end of the third NMOS tube N3 is grounded.
Optionally, in an embodiment of the present invention, the size of the first NMOS transistor N1, the size of the second NMOS transistor N2, and the size of the third NMOS transistor N3 may be the same, so as to calculate the split current.
In fig. 4, the number of the second NMOS transistors N2 may be 5, and the operating principle of the bias circuit shown in fig. 4 is as follows: the PMOS tube P0, the PMOS tube P1, the NMOS tube N0, the NMOS tube N4 and the resistor R0 form a bias current generating module 40, the PMOS tube P2 and the PMOS tube P3 form a first current mirror module 10, the PMOS tube P4, the PMOS tube P5, the NMOS tube N5 and the NMOS tube N6 form a second current mirror module 20, ENB is an enable counter signal of the oscillator, and V_REF1 and V_REF2 are two bias voltages provided by a bias circuit. Where m represents the number of corresponding MOS transistors, for example, m=1 of the PMOS transistors P3 represents the number of corresponding PMOS transistors P3 as 1, and m=5 of the NMOS transistors N2 represents the number of NMOS transistors N2 as 5. When the enable signal EN of the oscillator changes in magnitude from 0 to 1, the whole bias circuit starts to operate, the bias current generating module 40 provides a fixed bias current i0= (VBG-Vt)/R0, VBG is a fixed voltage of the bandgap reference, vt is a threshold voltage of the NMOS transistor N4, and R0 is a resistance value of the resistor R0. The bias current I0 is transmitted to the PMOS tube P3 through the PMOS tube P1 and the PMOS tube P3 according to the mirror image proportion of 1:1.
When the amplitude of the enable signal EN (the power supply voltage of the charge pump) of the oscillator is smaller than the preset value, although EN is 1, the bias current I0 flowing down from the PMOS transistor P3 basically flows into the second current branch due to the higher threshold voltage of the first NMOS transistor N1, and the current mirrored to the NMOS transistor N5 is also the bias current I0; if the amplitude of the enable signal EN of the oscillator (the power supply voltage of the charge pump) is greater than or equal to the preset value, that is, the amplitude of the enable signal EN of the oscillator is greater than the threshold voltage of the first NMOS transistor N1, the first NMOS transistor N1 is fully turned on, and the first current branch 31 branches off the bias current I0, so that the current flowing through the second current branch 32 is about I0/6. The current mirrored to NMOS transistor N5 is around I0/6 and the clock frequency of the oscillator will be greatly reduced.
The bias circuit of the embodiment of the invention has the following advantages: the shunt module is respectively connected with the output end of the first current mirror module, the input end of the second current mirror module and the enabling end of the oscillator in the bias circuit through arranging the shunt module (which can comprise the first current branch and the second current branch) in the bias circuit, when the enabling signal amplitude of the oscillator is larger than or equal to a preset value, the shunt module shunts the output current of the first current mirror module, and the shunted current is output to the second current mirror module, wherein the shunted current is inversely proportional to the enabling signal amplitude of the oscillator. Thus, when the reference current (i.e., the output current of the first current mirror module) of the bias circuit (oscillator) is unchanged, and when the amplitude of the enable signal of the oscillator (i.e., the power supply voltage of the charge pump is changed) is greater than or equal to a preset value, the current provided by the bias circuit is reduced when the amplitude of the enable signal of the oscillator is increased, i.e., the power supply voltage is increased, and when the amplitude of the enable signal of the oscillator is reduced, i.e., the power supply voltage is decreased, the current provided by the bias circuit is increased, and the clock frequency of the oscillator is increased, thereby counteracting the influence of the power supply voltage change of the charge pump on the charge supply capacity of the charge pump and keeping the charge supply capacity of the charge pump constant.
The embodiment of the invention also discloses an oscillator comprising the bias circuit.
The oscillator of the embodiment of the invention has the following advantages: the shunt module is respectively connected with the output end of the first current mirror module, the input end of the second current mirror module and the enabling end of the oscillator in the bias circuit through arranging the shunt module (which can comprise the first current branch and the second current branch) in the bias circuit of the oscillator, when the enabling signal amplitude of the oscillator is larger than or equal to a preset value, the shunt module shunts the output current of the first current mirror module and outputs the shunted current to the second current mirror module, wherein the shunted current is inversely proportional to the enabling signal amplitude of the oscillator. Thus, when the reference current (i.e., the output current of the first current mirror module) of the bias circuit (oscillator) is unchanged, and when the amplitude of the enable signal of the oscillator (i.e., the power supply voltage of the charge pump is changed) is greater than or equal to a preset value, the current provided by the bias circuit is reduced when the amplitude of the enable signal of the oscillator is increased, i.e., the power supply voltage is increased, and when the amplitude of the enable signal of the oscillator is reduced, i.e., the power supply voltage is decreased, the current provided by the bias circuit is increased, and the clock frequency of the oscillator is increased, thereby counteracting the influence of the power supply voltage change of the charge pump on the charge supply capacity of the charge pump and keeping the charge supply capacity of the charge pump constant.
The embodiment of the invention also discloses a charge pump comprising the oscillator.
The charge pump of the embodiment of the invention has the following advantages: the shunt module is respectively connected with the output end of the first current mirror module, the input end of the second current mirror module and the enabling end of the oscillator in the bias circuit through arranging the shunt module (which can comprise the first current branch and the second current branch) in the bias circuit of the oscillator, when the enabling signal amplitude of the oscillator is larger than or equal to a preset value, the shunt module shunts the output current of the first current mirror module and outputs the shunted current to the second current mirror module, wherein the shunted current is inversely proportional to the enabling signal amplitude of the oscillator. Thus, when the reference current (i.e., the output current of the first current mirror module) of the bias circuit (oscillator) is unchanged, and when the amplitude of the enable signal of the oscillator (i.e., the power supply voltage of the charge pump is changed) is greater than or equal to a preset value, the current provided by the bias circuit is reduced when the amplitude of the enable signal of the oscillator is increased, i.e., the power supply voltage is increased, and when the amplitude of the enable signal of the oscillator is reduced, i.e., the power supply voltage is decreased, the current provided by the bias circuit is increased, and the clock frequency of the oscillator is increased, thereby counteracting the influence of the power supply voltage change of the charge pump on the charge supply capacity of the charge pump and keeping the charge supply capacity of the charge pump constant.
For the oscillator embodiment and the charge pump embodiment, since they include the bias circuit described above, the description is relatively simple, and reference will be made to a partial description of the bias circuit embodiment for relevant points.
In this specification, each embodiment is described in a progressive manner, and each embodiment is mainly described by differences from other embodiments, and identical and similar parts between the embodiments are all enough to be referred to each other.
While preferred embodiments of the present invention have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. It is therefore intended that the following claims be interpreted as including the preferred embodiment and all such alterations and modifications as fall within the scope of the embodiments of the invention.
Finally, it is further noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or terminal that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or terminal. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article or terminal device comprising the element.
The foregoing has outlined a bias circuit, an oscillator and a charge pump in detail, and detailed description of the principles and embodiments of the invention have been provided herein with the application of the specific examples, the above examples being provided for the purpose of aiding in the understanding of the method of the invention and its core concept; meanwhile, as those skilled in the art will have variations in the specific embodiments and application scope in accordance with the ideas of the present invention, the present description should not be construed as limiting the present invention in view of the above.
Claims (8)
1. A bias circuit for use with an oscillator, the bias circuit comprising a first current mirror module and a second current mirror module, the bias circuit further comprising:
the shunt module is respectively connected with the output end of the first current mirror module, the input end of the second current mirror module and the enabling end of the oscillator, and when the amplitude of the enabling signal of the oscillator is larger than or equal to a preset value, the shunt module shunts the output current of the first current mirror module and outputs the shunted current to the second current mirror module;
the shunt current and the enable signal amplitude of the oscillator are in inverse relation, and the enable signal amplitude of the oscillator is the power supply voltage of the charge pump;
if the amplitude of the enabling signal is larger, the current provided by the bias circuit is smaller, and the clock frequency of the oscillator is smaller; if the amplitude of the enabling signal is smaller, the current provided by the bias circuit is larger, and the clock frequency of the oscillator is larger, so that the influence of the change of the power supply voltage of the charge pump on the charge providing capacity of the charge pump is counteracted.
2. The biasing circuit of claim 1, wherein the shunt module comprises:
the first current branch is respectively connected with the output end of the first current mirror module and the enabling end of the oscillator; the resistance value of the first current branch is inversely proportional to the enable signal amplitude of the oscillator;
the second current branch is respectively connected with the output end of the first current mirror module and the input end of the second current mirror module;
when the amplitude of the enabling signal of the oscillator is larger than or equal to the preset value, the first current branch circuit and the second current branch circuit are conducted;
when the amplitude of the enabling signal of the oscillator is smaller than the preset value, the first current branch is disconnected, and the second current branch is conducted.
3. The biasing circuit of claim 2, wherein the first current branch comprises:
the drain end of the first NMOS tube is connected with the output end of the first current mirror module, and the control end of the first NMOS tube is connected with the enabling end of the oscillator;
the drain end and the control end of the second NMOS tube are respectively connected with the source end of the first NMOS tube, and the source end of the second NMOS tube is grounded.
4. The bias circuit of claim 3 wherein the equivalent resistance of said first NMOS transistor is inversely proportional to the enable signal amplitude of said oscillator.
5. A biasing circuit according to claim 3, wherein said second current branch comprises:
the drain end of the third NMOS tube is connected with the output end of the first current mirror module, the control end of the third NMOS tube is connected with the input end of the second current mirror module, and the source end of the third NMOS tube is grounded.
6. The bias circuit of claim 5 wherein the size of said first NMOS transistor, the size of said second NMOS transistor, and the size of said third NMOS transistor are the same.
7. An oscillator comprising the bias circuit of any one of claims 1-6.
8. A charge pump comprising an oscillator as claimed in claim 7.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201710297563.5A CN108809080B (en) | 2017-04-28 | 2017-04-28 | Bias circuit, oscillator and charge pump |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201710297563.5A CN108809080B (en) | 2017-04-28 | 2017-04-28 | Bias circuit, oscillator and charge pump |
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| CN108809080B true CN108809080B (en) | 2024-02-20 |
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| CN111798905B (en) * | 2020-07-01 | 2021-03-16 | 深圳市芯天下技术有限公司 | Method, system, storage medium and terminal for reducing programming time of non-flash memory |
| CN115437453A (en) * | 2021-06-03 | 2022-12-06 | 上海艾为电子技术股份有限公司 | Biasing circuit and self-biased OSC circuit |
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| CN101202540A (en) * | 2007-12-06 | 2008-06-18 | 北京芯技佳易微电子科技有限公司 | Oscillator and design method thereof |
| EP2157437A1 (en) * | 2008-08-19 | 2010-02-24 | SMA Solar Technology AG | Method for measuring a current, particularly through an earthing device |
| CN102571018A (en) * | 2010-12-28 | 2012-07-11 | 杭州中科微电子有限公司 | Automatic frequency tuning circuit of on-chip filter |
| CN105406829A (en) * | 2015-12-03 | 2016-03-16 | 中国科学院电子学研究所 | Variable gain amplifier with continuously adjustable gain |
| CN207426972U (en) * | 2017-04-28 | 2018-05-29 | 合肥格易集成电路有限公司 | A kind of biasing circuit, oscillator and charge pump |
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2017
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Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101202540A (en) * | 2007-12-06 | 2008-06-18 | 北京芯技佳易微电子科技有限公司 | Oscillator and design method thereof |
| EP2157437A1 (en) * | 2008-08-19 | 2010-02-24 | SMA Solar Technology AG | Method for measuring a current, particularly through an earthing device |
| CN102571018A (en) * | 2010-12-28 | 2012-07-11 | 杭州中科微电子有限公司 | Automatic frequency tuning circuit of on-chip filter |
| CN105406829A (en) * | 2015-12-03 | 2016-03-16 | 中国科学院电子学研究所 | Variable gain amplifier with continuously adjustable gain |
| CN207426972U (en) * | 2017-04-28 | 2018-05-29 | 合肥格易集成电路有限公司 | A kind of biasing circuit, oscillator and charge pump |
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Address after: 230601 No.368 Qinghua Road, Hefei Economic and Technological Development Zone, Anhui Province Applicant after: HEFEI GEYI INTEGRATED CIRCUIT Co.,Ltd. Applicant after: Zhaoyi Innovation Technology Group Co.,Ltd. Address before: 230601 Building 1, Pearl Plaza, Hefei Economic and Technological Development Zone, Anhui Province Applicant before: HEFEI GEYI INTEGRATED CIRCUIT Co.,Ltd. Applicant before: GIGADEVICE SEMICONDUCTOR(BEIJING) Inc. |
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