CN108809071B - Soft start control circuit of switching power supply and switching power supply - Google Patents
Soft start control circuit of switching power supply and switching power supply Download PDFInfo
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- CN108809071B CN108809071B CN201810988012.8A CN201810988012A CN108809071B CN 108809071 B CN108809071 B CN 108809071B CN 201810988012 A CN201810988012 A CN 201810988012A CN 108809071 B CN108809071 B CN 108809071B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
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Abstract
The invention provides a soft start control circuit of a switching power supply, which comprises: a clock frequency generator for generating a frequency signal of a small duty cycle; the output end of the clock frequency generator is connected with the control end of the first switch module; the input end of the first switch module is connected with the power supply end, and the output end of the first switch module is connected with one end of the soft start control circuit, which is high in capacitance potential; the common terminal of the first switch module and the capacitor is also used for being connected with the non-inverting input terminal of the first comparator of the soft start control circuit. The invention also provides a switching power supply which comprises the main components of the soft start control circuit, the error amplifier, the pulse width modulation comparator, the switching tube driving unit and the like. According to the invention, the delay capacitor is charged by using uA-level current at a certain duty ratio, so that the problem of abnormal soft start of the switching power supply is solved. Meanwhile, the capacitance value of the delay capacitor is reduced, the space inside the chip is saved, and the cost of the chip is reduced.
Description
Technical Field
The invention relates to the technical field of switching power supplies, in particular to a soft start control circuit of a switching power supply and the switching power supply.
Background
Because of the advantages of high efficiency, high energy density and the like, the switching power supply is applied to more and more fields, and particularly, the DC-DC BOOST switching power supply is widely applied to mobile power supplies and portable electronic equipment.
Although the DC-DC BOOST switching power supply can convert the low voltage of a single common battery to a higher voltage to meet the use requirement of the device, the BOOST switching power supply can generate surge current and overshoot voltage when being started, and there may be a risk of damaging devices such as a switching tube and burning out a lithium battery for providing power for a chip. Therefore, a soft start control circuit is needed to be added to the BOOST switching power supply, and the generation of surge current and overshoot voltage during the start of the BOOST switching power supply can be inhibited by controlling the input reference voltage of the error amplifier in the BOOST switching power supply. In the existing soft start control circuit, delay is usually generated by charging a large capacitor by using nA-level current, so that the control of the input datum reference voltage of the error amplifier is realized.
But this approach may cause abnormal start-up of the BOOST switching power supply soft start control circuit. Secondly, as the output capacitance of the BOOST switching power supply increases, a larger capacitance is required to generate start-up delay, so that a large amount of chip space is occupied, the chip area is increased, and the cost of the chip is increased.
Disclosure of Invention
In view of the above, the embodiment of the invention provides a soft start control circuit of a switching power supply and the switching power supply, so as to solve the problem of abnormal start of the soft start control circuit of the switching power supply caused by the influence of a process on nA-level current, and simultaneously reduce the capacitance value of a capacitor for generating start delay.
In order to achieve the above object, the embodiment of the present invention provides the following technical solutions:
The invention provides a soft start control circuit of a switching power supply, which comprises:
A clock frequency generator for generating a frequency signal of a small duty cycle; the output end of the clock frequency generator is connected with the control end of the first switch module;
The input end of the first switch module is connected with the power supply end, and the output end of the first switch module is connected with one end of the soft start control circuit, which is high in capacitance potential;
the common terminal of the first switch module and the capacitor is also used for being connected with the non-inverting input terminal of the first comparator of the soft start control circuit.
Optionally, the inverting input end of the first comparator is connected with the output end of the reference voltage generating module of the soft start control circuit, and the output end of the first comparator is connected with the input end of the second switch module of the soft start control circuit.
Optionally, the clock frequency generator includes:
a comparison voltage generation module; the first port of the comparison voltage generation module outputs a first level signal, and the second port outputs a second level signal;
The non-inverting input end of the second comparator is respectively connected with the first port and the second port of the comparison voltage generation module; a first switch is arranged on a connecting branch of the second comparator and the first port of the comparison voltage generation module, and the control end of the first switch is controlled by a first signal; a second switch is arranged on a connecting branch of the second comparator and a second port of the comparison voltage generation module, and a control end of the second switch is controlled by the second signal;
the first NOT gate branch circuit is connected with the output end of the second comparator and comprises a first NOT gate and a second NOT gate which are sequentially connected;
A second NOT gate branch connected with the common end of the first NOT gate and the second NOT gate, wherein the second NOT gate branch comprises a third NOT gate and a fourth NOT gate which are sequentially connected;
the resistor branch is connected with the output port of the second NOT gate and comprises a first resistor and a second resistor which are sequentially connected, the first resistor is connected with a third switch in parallel, and the control end of the third switch is controlled by the first signal; the port, which is not connected with the first resistor, of the second resistor is connected with a capacitor, and the other end of the capacitor is grounded;
the common terminal of the second resistor and the capacitor is connected with the negative phase input terminal of the second comparator.
Optionally, the second switch module of the soft start control circuit includes: MOS switching transistors or pass gate switches.
Optionally, the first switch module includes: MOS switching transistors or pass gate switches.
The invention also provides a switching power supply, comprising:
A soft start control circuit as described above;
The non-inverting input end is connected with an error amplifier of the soft start control circuit; the inverting input end of the error amplifier is connected with the common end of the fourth resistor and the fifth resistor;
the positive input end of the pulse width modulation comparator is connected with the output end of the error amplifier; the negative input end of the pulse width modulation comparator receives slope compensation voltage;
And the driving unit of the switching tube is connected with the output end of the pulse width modulation comparator and is used for driving the on-off of the switching tube.
Optionally, the inverting input end of the first comparator is connected with the output end of the reference voltage generating module of the soft start control circuit, and the output end of the first comparator is connected with the input end of the second switch module of the soft start control circuit.
Optionally, the clock frequency generator includes:
a comparison voltage generation module; the first port of the comparison voltage generation module outputs a first level signal, and the second port outputs a second level signal;
The non-inverting input end of the second comparator is respectively connected with the first port and the second port of the comparison voltage generation module; a first switch is arranged on a connecting branch of the second comparator and the first port of the comparison voltage generation module, and the control end of the first switch is controlled by a first signal; a second switch is arranged on a connecting branch of the second comparator and a second port of the comparison voltage generation module, and a control end of the second switch is controlled by the second signal;
the first NOT gate branch circuit is connected with the output end of the second comparator and comprises a first NOT gate and a second NOT gate which are sequentially connected;
A second NOT gate branch connected with the common end of the first NOT gate and the second NOT gate, wherein the second NOT gate branch comprises a third NOT gate and a fourth NOT gate which are sequentially connected;
the resistor branch is connected with the output port of the second NOT gate and comprises a first resistor and a second resistor which are sequentially connected, the first resistor is connected with a third switch in parallel, and the control end of the third switch is controlled by the first signal; the port, which is not connected with the first resistor, of the second resistor is connected with a capacitor, and the other end of the capacitor is grounded;
the common terminal of the second resistor and the capacitor is connected with the negative phase input terminal of the second comparator.
Optionally, the second switch module of the soft start control circuit includes: MOS switching transistors or pass gate switches.
Optionally, the first switch module includes: MOS switching transistors or pass gate switches.
Compared with the prior art, the invention has the advantages that the clock frequency generator and the first switch module are added, so that the uA-level current can charge the delay capacitor with a certain duty ratio, and the problem of abnormal soft start of the switch power supply is solved. Meanwhile, the delay capacitor is charged in a mode of a certain duty ratio, so that the charging speed is reduced under the same condition, and the generated delay time is longer than that generated by the method in the prior art, so that the capacitance value of the delay capacitor is reduced, the space inside the chip is saved, and the cost of the chip is reduced.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings that are required to be used in the embodiments or the description of the prior art will be briefly described below, and it is obvious that the drawings in the following description are only embodiments of the present invention, and that other drawings can be obtained according to the provided drawings without inventive effort for a person skilled in the art.
Fig. 1 is a block diagram of a switching power supply in the prior art;
FIG. 2 is a block diagram of a prior art soft start control circuit;
Fig. 3 is a block diagram of a soft start control circuit of a switching power supply according to an embodiment of the present invention;
FIG. 4 is a block diagram of a clock frequency generator in a soft start control circuit of a switching power supply according to another embodiment of the present invention;
Fig. 5 is a block diagram of a switching power supply according to another embodiment of the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
In the prior art, in order to suppress the surge current and the overshoot voltage, a soft start control circuit is designed for the switching power supply, as shown in fig. 1 and fig. 2.
Referring to fig. 2, in the soft start control circuit, the power supply terminal charges the delay capacitor Cch by the nA-stage small current Ich, and the voltage of the non-inverting input terminal of the first comparator 202 connected to the end where the potential of the delay capacitor Cch is high gradually rises. When the voltage at the non-inverting input terminal of the first comparator 202 is smaller than the reference voltage VREF generated by the reference voltage generation module 203, the second switching module 201 selects the voltage at the non-inverting input terminal of the first comparator 202 as the output voltage of the soft start control circuit according to the VSEL signal.
Referring to fig. 1, when the output voltage of the soft start control circuit 101 is smaller than the feedback voltage VFB, the error amplifier 102 amplifies the error between the output voltage of the soft start control circuit 101 and the feedback voltage VFB to generate a voltage at the output end of the error amplifier 102, and the clamping unit 106 clamps the voltage at the output end of the error amplifier 102 at a lower potential, so that the time when the slope compensation voltage received by the negative input end of the pulse width modulation comparator 103 exceeds the voltage at the output end of the error amplifier 102 is short, and when the slope compensation voltage received by the negative input end of the pulse width modulation comparator 103 exceeds the voltage at the output end of the error amplifier 102, the lower power tube Mn is automatically turned off, so that the duty ratio of the output waveform of the pulse width modulation comparator 103 is reduced, and the purpose of suppressing the surge current is achieved.
When the voltage at the non-inverting input terminal of the first comparator 202 is greater than the reference voltage VREF, the second switch module 201 selects the reference voltage VREF generated by the reference voltage generation module 203 as the output voltage of the soft start control circuit according to the VSEL signal, and soft start is completed.
However, the nA-level current is easily affected by the process and may be too large or too small, if the nA-level current is too large, the generated delay time is too short, and the switching power supply can generate too large surge current when started; if the nA-level current is too small, the generated starting delay time is too long, and the switching power supply cannot be started normally.
When the output capacitance of the switching power supply increases, if the capacitance value of the delay capacitor Cch is not increased, the rising rate of the feedback voltage VFB of the switching power supply is smaller than the rising rate of the voltage at the non-inverting input terminal of the first comparator 202, the second switching module 201 selects the reference voltage VREF generated by the reference voltage generating module 203 as the output voltage of the soft start control circuit 101 according to the VSEL signal, and the output voltage is connected to the non-inverting input terminal of the error amplifier 102, at this time, the feedback voltage VFB has not risen to the preset output voltage of the switching power supply, so that the voltage at the output terminal of the error amplifier 102 is not clamped at a low potential, and a peak surge current is generated; to achieve the purpose of suppressing the surge current, the capacitance value of the delay capacitor must be increased to ensure that the rising rate of the feedback voltage VFB of the switching power supply is greater than the rising rate of the voltage at the non-inverting input terminal of the first comparator 202; the delay resistance increases and thus the area of the chip also needs to be increased.
Therefore, the embodiment of the invention discloses a soft start control circuit of a switching power supply and the switching power supply, which are used for solving the problem of abnormal start of the soft start control circuit of the switching power supply caused by the influence of a process on nA-level current, and reducing the capacitance value of a delay capacitor.
The embodiment of the invention provides a soft start control circuit, referring to fig. 3, comprising: the second switching module 301, the first comparator 302, the reference voltage generating module 303, the clock frequency generator 304 and the MOS switch tube 305; wherein:
The output end of the clock frequency generator 304 is connected with the control end of the MOS switch tube 305, the input end of the MOS switch tube 305 is connected with the power end, the output end of the MOS switch tube 305 is connected with the capacitor 306 of the soft start control circuit, and the other end of the capacitor 306 is grounded.
Wherein the clock frequency generator 304 may generate a frequency signal FS of small duty cycle; the capacitor 306 of the soft start control circuit functions to generate a delay time in the present invention and thus may also be referred to as a delay capacitor 306; when the control terminal of the MOS switch 305 is at high potential, the MOS switch 305 is turned on, and when the control terminal is at low potential, the MOS switch 305 is turned off.
Alternatively, the MOS switch 305 may be replaced by a transmission gate switch as the first switch module.
The common terminal of the delay capacitor 306 and the MOS switch tube 305 is connected to the non-inverting input terminal of the first comparator 302, the inverting input terminal of the first comparator 302 is connected to the output terminal of the reference voltage generating module 303, and the output terminal of the first comparator 302 is connected to the input terminal of the second switch module 301.
The second switch module 301 has a function of selecting a voltage according to the VSEL signal.
Alternatively, the second switching module 301 may be a MOS switch tube or a transmission gate switch.
The working principle of the soft start control circuit is as follows:
The clock frequency generator 304 generates a frequency signal FS with a small duty ratio, the control end of the MOS switch tube 305 receives the frequency signal FS, when the frequency signal FS is in a narrow high pulse, the MOS switch tube 305 is turned on, the power end charges the delay capacitor 306, the voltage of the delay capacitor 306 continuously rises, and the voltage of the non-inverting input end of the first comparator 302 also rises gradually; when the frequency signal FS is at a low level, the voltage of the delay capacitor 306 remains at a level and the voltage at the non-inverting input of the first comparator 302 slowly rises.
When the voltage at the non-inverting input terminal of the first comparator 302 is smaller than the reference voltage VREF generated by the reference voltage generating module 303, the VSEL signal output by the first comparator 302 is low, and the second switching module 301 selects the voltage at the non-inverting input terminal of the first comparator 302 as the output voltage of the soft start control circuit according to the VSEL signal.
When the voltage at the non-inverting input terminal of the first comparator 302 is greater than the reference voltage VREF generated by the reference voltage generating module 303, the VSEL signal output by the first comparator 302 is high, and the second switching module 301 selects the reference voltage VREF generated by the reference voltage generating module 303 as the output voltage of the soft start control circuit according to the VSEL signal.
The invention adopts the method that the uA-level current charges the delay capacitor to generate the starting delay, solves the problem that the nA-level current is easy to be influenced by the process to cause abnormal starting of the switching power supply, inhibits the surge current, ensures the normal starting of the switching power supply, can reduce the capacitance value of the delay capacitor, saves the space of a chip, and reduces the cost of the chip.
Optionally, in another embodiment of the present application, referring to fig. 4, the specific structure of the clock frequency generator includes: a comparison capacitance generating module 401 and a second comparator 402; wherein:
The non-inverting input end of the second comparator 402 is respectively connected with the first port and the second port of the comparison voltage generating module 401; the first port of the comparison voltage generating module 401 outputs the first level signal VL, and the second port outputs the second level signal VH.
A first switch S1 is arranged on a connection branch of the second comparator 402 and the first port of the comparison voltage generation module 401, and a control end of the first switch S1 is controlled by a first signal; the first switch S1 turns on or off the connection branch of the first port of the comparison voltage generating module 401 and the second comparator 402 according to the difference of the first signals.
A second switch S2 is arranged on a connection branch of the second comparator 402 and the second port of the comparison voltage generating module 401, and a control end of the second switch S2 is controlled by a second signal; the second switch S2 turns on or off the connection branch of the second comparator 402 and the second port of the comparison voltage generating module 401 according to the difference of the second signal.
Optionally, the second signal is VCTRLN signal, when the VCTRLN signal is high, the second switch S2 is turned on, and the second comparator 402 is connected to the connection branch of the second port of the comparison voltage generating module 401; when VCTRLN signal is low, the second switch S2 is turned off, and the second comparator 402 is connected to the connection branch of the second port of the comparison voltage generating module 401.
The first not gate branch is connected to the output of the second comparator 402, and comprises a first not gate 403 and a second not gate 404 connected in sequence.
The second not gate branch is connected to the common terminal of the first not gate and the second not gate, and the second not gate branch includes a third not gate 405 and a fourth not gate 406 which are sequentially connected.
The resistor branch is connected with the output port of the second NOT gate 404, the resistor branch comprises a first resistor R1 and a second resistor R2 which are sequentially connected, the first resistor R1 is connected with a third switch S3 in parallel, and the control end of the third switch S3 is controlled by the first signal; the third switch S3 turns on or off a branch connected in parallel with the first resistor R1 according to the difference of the first signals.
Optionally, the first signal is VCTRLP signal, when the VCTRLP signal is high, the first switch S1 turns on the connection branch of the second comparator 402 and the first port of the comparison voltage generating module 401 and the third switch S3 turns on the branch connected in parallel with the first resistor R1; when VCTRLP is low, the first switch S1 disconnects the connection branch of the second comparator 402 to the first port of the comparison voltage generation module 401 and the third switch S3 disconnects the branch in parallel with the first resistor R1.
The port of the second resistor R2 which is not connected with the first resistor R1 is connected with a capacitor C, and the other end of the capacitor C is grounded; the common terminal of the second resistor R2 and the capacitor C is connected to the negative input terminal of the second comparator 402.
The clock frequency generator works as follows:
when VCTRLP is high, the first switch S1 turns on the connection branch of the second comparator 402 and the first port of the comparison voltage generating module 401, the first level signal VL output from the first port is selected to the non-inverting input terminal of the second comparator 402, and the third switch S3 turns on the branch connected in parallel with the first resistor R1, so that the first resistor R1 is shorted, and the inverter 404 discharges the inverting input terminal of the second comparator 402.
When the voltage at the inverting input terminal of the second comparator 402 is smaller than the voltage of the first level signal VL output by the first port, the output of the second comparator 402 is high, at this time VCTRLN is high, VCTRLP is low, the first switching tube S1 disconnects the connection branch of the first port of the second comparator 402 and the comparison voltage generating module 401 and the third switching tube S3 disconnects the branch connected in parallel with the first resistor R1, the second switching tube S2 turns on the connection branch of the second comparator 402 and the second port of the comparison voltage generating module 401, the second port of the comparison voltage generating module 401 outputs the second level signal VH to the non-inverting input terminal of the second comparator 402, and the inverter 404 charges the inverting input terminal of the second comparator 402.
When the voltage at the inverting input terminal of the second comparator 402 is greater than the voltage at the second port of the comparison voltage generating module 401 for outputting the second level signal VH, the output of the second comparator 402 is low, and sequentially loops, and the frequency signal FS with different heights is continuously generated at the output terminal of the fourth not gate 406. And the duty cycle of the clock frequency generator output frequency FS can be adjusted by adjusting the first resistor R1 and the second resistor R2.
It should be noted that the clock frequency generator 304 may multiplex the clock generation circuit in the crystal oscillator 509 in fig. 5 and may not increase the area.
Another embodiment of the present invention further provides a switching power supply, as shown in fig. 5, including: a soft start control circuit 501, an error amplifier 502, a pulse width modulation comparator 503 and a driving unit 504 of a switching tube, wherein:
The non-inverting input end of the error amplifier 502 is connected with the output end of the soft start control circuit 501, and the inverting input end is connected with the common end of the fourth resistor R4 and the fifth resistor R5; the other end of the fourth resistor R4 is grounded, and the other end of the fifth resistor R5 is connected with the output end of the switching power supply; one end of the third resistor R3 is grounded, and the other end of the third resistor R3 is connected with the output end of the switching power supply; one end of the first capacitor C1 is grounded, and the other end of the first capacitor C is connected with the output end of the switching power supply.
As shown in fig. 3, the soft start control circuit 501 includes: the second switching module 301, the first comparator 302, the reference voltage generating module 303, the clock frequency generator 304 and the MOS switch tube 305; wherein: the output end of the clock frequency generator 304 is connected with the control end of the MOS switch tube 305, the input end of the MOS switch tube 305 is connected with the power end, the output end of the MOS switch tube 305 is connected with the capacitor 306 of the soft start control circuit, and the other end of the capacitor 306 is grounded.
The clock frequency generator 304 may generate a frequency signal FS of small duty cycle; the capacitor 306 of the soft start control circuit functions to generate a delay time in the present invention and thus may also be referred to as a delay capacitor 306; when the control terminal of the MOS switch 305 is at high potential, the MOS switch 305 is turned on, and when the control terminal is at low potential, the MOS switch 305 is turned off.
Alternatively, the MOS switch 305 may be replaced by a transmission gate switch as the first switch module.
The common terminal of the delay capacitor 306 and the MOS switch tube 305 is connected to the non-inverting input terminal of the first comparator 302, the inverting input terminal of the first comparator 302 is connected to the output terminal of the reference voltage generating module 303, and the output terminal of the first comparator 303 is connected to the input terminal of the second switch module 301.
The second switch module 301 has a function of selecting a voltage according to the VSEL signal.
Alternatively, the second switching module 301 may be a MOS switch tube or a transmission gate switch.
The positive input end of the pulse width modulation comparator 503 is connected with the output end of the error amplifier, the clamping unit 506 and the loop compensation capacitor 505; the negative input of the pwm comparator 503 receives the ramp compensation voltage by being connected to the sampling module 507 and the current generating module 508.
The clamping unit 506 has a function of clamping the output terminal of the error amplifier 502 to a desired level under a certain condition; the loop compensation capacitor 505 has a function of ensuring loop stability; the sampling module 507 has the function of sampling the current of the lower power tube; the current generation module 508 has a function of generating a slope compensation current.
The first input terminal of the driving unit 504 of the switching tube is connected to the output terminal of the pwm comparator 503, the second input terminal is connected to the output terminal of the crystal oscillator 509, the first output terminal is connected to the control terminal of the upper power tube Mp, and the second output terminal is connected to the control terminal of the lower power tube Mn.
The driving unit 504 of the switching tube is used for driving the switching tube to be turned on or off.
The output end of the upper power tube Mp is connected with the input end of the lower power tube Mn, and the input end of the upper power tube Mp is connected with the output end of the switching power supply; the output end of the lower power tube Mn is grounded; the common end of the upper power tube Mp and the lower power tube Mn is connected with the inductor L; the other end of the inductor L is connected with the input end of the switching power supply.
The working principle of the switching power supply is as follows:
When the second switch module 301 selects the voltage at the non-inverting input terminal of the first comparator 302 as the output voltage of the soft start control circuit 501, the voltage at the non-inverting input terminal of the first comparator 302 is smaller than the feedback voltage VFB, the error amplifier 502 amplifies the error between the feedback voltage VFB and the voltage at the non-inverting input terminal of the first comparator 302, so as to generate the voltage at the output terminal of the error amplifier 502, and at this time, since the voltage at the non-inverting input terminal of the error amplifier 502 is smaller than the voltage at the inverting input terminal of the error amplifier 502, that is, the output voltage of the soft start control circuit is smaller than the feedback voltage VFB, that is, the voltage at the non-inverting input terminal of the first comparator 302 is smaller than the feedback voltage VFB, the requirement of the clamp unit 506 is met, so that the voltage at the output terminal of the error amplifier 502 can be clamped at a low level, the time when the negative input terminal of the pulse width modulation comparator 503 receives the voltage to rise beyond the voltage at the output terminal of the error amplifier 502 is short, and the power tube Mn is turned off after the voltage at the output terminal of the ramp voltage exceeds the voltage at the output terminal of the error amplifier 502, so as to reduce the output duty ratio of the pulse width modulation comparator 503.
When the second switching module 301 selects the voltage of the inverting input terminal of the first comparator as the output voltage of the soft start control circuit 501, that is, when the output voltage of the soft start control circuit 501 is the reference voltage VREF, the switching power supply completes soft start.
The following calculation proves that the capacitance value of the delay capacitor can be reduced by adopting the switching power supply of the invention:
Since the soft start of the switching power supply is completed when the voltage at the non-inverting input terminal of the first comparator 302 is greater than the reference voltage, the maximum voltage of the delay capacitor is represented by VREF, the current charging the delay capacitor is represented by Ich, the duty ratio of the small duty ratio frequency signal provided by the clock frequency generator is represented by D, the capacitance value of the delay capacitor is represented by Cch, the delay time is represented by td, and it is assumed that vref=1.25 v, ich=0.2 uA, the duty ratio d=10%, and td=1 ms.
(1) By the method of the invention
(2) Using the prior art
From the result, when the duty ratio is 10%, the capacitance value of the delay capacitor of the switching power supply provided by the invention is one tenth of that of the delay capacitor of the switching power supply in the prior art, which indicates that the switching power supply provided by the invention can greatly reduce the capacitance value of the delay capacitor and save a large amount of space in a chip.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (8)
1. A soft start control circuit for a switching power supply, comprising:
A clock frequency generator for generating a frequency signal of a small duty cycle; the output end of the clock frequency generator is connected with the control end of the first switch module;
The input end of the first switch module is connected with the power supply end, and the output end of the first switch module is connected with one end of the soft start control circuit, which is high in capacitance potential;
the common end of the first switch module and the capacitor is also used for being connected with the non-inverting input end of the first comparator of the soft start control circuit;
The inverting input end of the first comparator is connected with the output end of the reference voltage generation module of the soft start control circuit, and the output end of the first comparator is connected with the input end of the second switch module of the soft start control circuit; the second switch module has a function of selecting output voltage according to the signal output by the first comparator.
2. The soft start control circuit of a switching power supply according to claim 1, wherein the clock frequency generator comprises:
a comparison voltage generation module; the first port of the comparison voltage generation module outputs a first level signal, and the second port outputs a second level signal;
The non-inverting input end of the second comparator is respectively connected with the first port and the second port of the comparison voltage generation module; a first switch is arranged on a connecting branch of the second comparator and the first port of the comparison voltage generation module, and the control end of the first switch is controlled by a first signal; a second switch is arranged on a connecting branch of the second comparator and a second port of the comparison voltage generation module, and a control end of the second switch is controlled by a second signal;
the first NOT gate branch circuit is connected with the output end of the second comparator and comprises a first NOT gate and a second NOT gate which are sequentially connected;
A second NOT gate branch connected with the common end of the first NOT gate and the second NOT gate, wherein the second NOT gate branch comprises a third NOT gate and a fourth NOT gate which are sequentially connected;
the resistor branch is connected with the output port of the second NOT gate and comprises a first resistor and a second resistor which are sequentially connected, the first resistor is connected with a third switch in parallel, and the control end of the third switch is controlled by the first signal; the port, which is not connected with the first resistor, of the second resistor is connected with a capacitor, and the other end of the capacitor is grounded;
the common terminal of the second resistor and the capacitor is connected with the negative phase input terminal of the second comparator.
3. The soft start control circuit of a switching power supply of claim 1, wherein the second switch module of the soft start control circuit comprises: MOS switching transistors or pass gate switches.
4. The soft start control circuit of a switching power supply of claim 1, wherein the first switching module comprises: MOS switching transistors or pass gate switches.
5. A switching power supply, comprising:
The soft start control circuit of claim 1;
The non-inverting input end is connected with an error amplifier of the soft start control circuit; the inverting input end of the error amplifier is connected with the common end of the fourth resistor and the fifth resistor;
the positive input end of the pulse width modulation comparator is connected with the output end of the error amplifier; the negative input end of the pulse width modulation comparator receives slope compensation voltage;
And the driving unit of the switching tube is connected with the output end of the pulse width modulation comparator and is used for driving the on-off of the switching tube.
6. The switching power supply of claim 5 wherein said clock frequency generator comprises:
a comparison voltage generation module; the first port of the comparison voltage generation module outputs a first level signal, and the second port outputs a second level signal;
The non-inverting input end of the second comparator is respectively connected with the first port and the second port of the comparison voltage generation module; a first switch is arranged on a connecting branch of the second comparator and the first port of the comparison voltage generation module, and the control end of the first switch is controlled by a first signal; a second switch is arranged on a connecting branch of the second comparator and a second port of the comparison voltage generation module, and a control end of the second switch is controlled by a second signal;
the first NOT gate branch circuit is connected with the output end of the second comparator and comprises a first NOT gate and a second NOT gate which are sequentially connected;
A second NOT gate branch connected with the common end of the first NOT gate and the second NOT gate, wherein the second NOT gate branch comprises a third NOT gate and a fourth NOT gate which are sequentially connected;
the resistor branch is connected with the output port of the second NOT gate and comprises a first resistor and a second resistor which are sequentially connected, the first resistor is connected with a third switch in parallel, and the control end of the third switch is controlled by the first signal; the port, which is not connected with the first resistor, of the second resistor is connected with a capacitor, and the other end of the capacitor is grounded;
the common terminal of the second resistor and the capacitor is connected with the negative phase input terminal of the second comparator.
7. The switching power supply of claim 5 wherein the second switch module of the soft start control circuit comprises: MOS switching transistors or pass gate switches.
8. The switching power supply of claim 5 wherein said first switching module comprises: MOS switching transistors or pass gate switches.
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| CN110323834A (en) * | 2019-07-22 | 2019-10-11 | 珠海格力电器股份有限公司 | line switch control system, method and device |
| CN112398326B (en) * | 2019-08-13 | 2022-04-05 | 国民技术股份有限公司 | Soft start device and method based on multi-output device, power supply and chip |
| CN110739840B (en) * | 2019-09-27 | 2022-02-18 | 西安电子科技大学 | On-chip soft start circuit for DC-DC switching power supply chip |
| CN111130318B (en) * | 2020-01-03 | 2023-09-05 | 深圳青铜剑技术有限公司 | Switching power supply control circuit and method thereof |
| CN111509967B (en) * | 2020-04-24 | 2023-09-05 | 深圳市元征科技股份有限公司 | DC-DC power-on self-starting control circuit and control method thereof |
| CN113659820B (en) * | 2021-07-08 | 2023-06-06 | 广州金升阳科技有限公司 | Soft start control method of LLC resonant converter |
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Address after: Room 1201, No.2, Lane 908, Xiuwen Road, Minhang District, Shanghai, 201199 Patentee after: SHANGHAI AWINIC TECHNOLOGY Co.,Ltd. Country or region after: China Address before: Room 303-39, building 33, 680 Guiping Road, Xuhui District, Shanghai 200233 Patentee before: SHANGHAI AWINIC TECHNOLOGY Co.,Ltd. Country or region before: China |