CN108768348A - A kind of high-frequency impulse limiting circuit - Google Patents
A kind of high-frequency impulse limiting circuit Download PDFInfo
- Publication number
- CN108768348A CN108768348A CN201810676841.2A CN201810676841A CN108768348A CN 108768348 A CN108768348 A CN 108768348A CN 201810676841 A CN201810676841 A CN 201810676841A CN 108768348 A CN108768348 A CN 108768348A
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- China
- Prior art keywords
- comparator
- flop
- limiting circuit
- switching tube
- rest
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003990 capacitor Substances 0.000 claims description 4
- 239000013078 crystal Substances 0.000 claims description 3
- 238000000034 method Methods 0.000 description 7
- 238000005516 engineering process Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 2
- 230000000737 periodic effect Effects 0.000 description 2
- 125000004122 cyclic group Chemical group 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/00006—Changing the frequency
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/01—Shaping pulses
- H03K5/08—Shaping pulses by limiting; by thresholding; by slicing, i.e. combined limiting and thresholding
Abstract
The present invention relates to IC design technical fields, a kind of high-frequency impulse limiting circuit of the present embodiment is provided, including rest-set flip-flop (4), switching tube (M1, M2), first comparator (1), second comparator (2) and third comparator (3), switching tube (M1, M2 base stage) is respectively connected to the anode of first comparator (1) and the second comparator (2), the output end access of first comparator (1) includes the input terminal of rest-set flip-flop (4), the output end of second comparator (2) and third comparator (3) is respectively connected to the input terminal of NAND gate (5)；The present invention can be by adjusting bias current IB1, IB2 and reference voltage V1, V2 size or adjusting capacitance C1, C2 sizes control, to realize that various ways limit the highest output frequency of pulse generator, the highest output frequency of pulse-generating circuit is limited, the expense of hardware system is saved.
Description
Technical field
The present invention relates to IC design technical fields, and in particular to a kind of high-frequency impulse limiting circuit.
Background technology
Traditional pulse-generating circuit is actually a comparator, and the principle of work is by input signal Vin and reference
Voltage Vref compares, and works as Vin>Output is 1 when Vref, otherwise output is 0.Thus periodic triangular signal is converted into
Pulse signal.Due in some applications, it is contemplated that the expense of hardware system, need not so high-frequency pulse, so need
The frequency of pulse-generating circuit is limited.
Invention content
The technical issues of solution
In view of the deficiencies of the prior art, the present invention provides a kind of high-frequency impulse limiting circuits, are generated for traditional pulse
The problem of highest frequency can not be limited in circuit, innovative proposes the pulse-generating circuit that frequency is limited with highest frequency.
Technical solution
In order to achieve the above object, the present invention is achieved by the following technical programs：
A kind of high-frequency impulse limiting circuit, including rest-set flip-flop (4), switching tube (M1, M2), first comparator (1), second
The base stage of comparator (2) and third comparator (3), the switching tube (M1, M2) is respectively connected to first comparator (1) and the second ratio
Compared with the anode of device (2), the output end access of the first comparator (1) includes the input terminal of rest-set flip-flop (4), second ratio
Compared with the input terminal that the output end of device (2) and third comparator (3) is respectively connected to NAND gate (5), the first comparator (1) with it is non-
Door (5) passes through another input terminal that nor gate (6) access includes rest-set flip-flop (4)；The output end of the rest-set flip-flop (4) is distinguished
Connect with the base stage of switching tube (M1, M2).
Further, the basic RS that the rest-set flip-flop is formed by two nor gate input terminals and output end interconnection
Trigger.
Further, the base stage of the switching tube (M1, M2) is connected with crystal amplifier, and has biasing respectively
Electric current IB1 and IB2.
Further, the switching tube (M1, M2) is made of triode and charging capacitor (C1, C2), the capacitance
The one end of (C1, C2) is grounded.
Further, the positive access period input signal Vin of the third comparator (3), cathode access reference
Signal Vref.
Further, the cathode of the first comparator (1) is connected with reference voltage V1, second comparator (2)
Cathode be connected with reference voltage V2.
Advantageous effect
The present invention provides a kind of high-frequency impulse limiting circuits, and compared with existing known technology, of the invention having is as follows
Advantageous effect：
1, when the frequency of input signal Vin is excessively high, the highest frequency of output signal can be by adjusting bias current
IB1, IB2 and reference voltage V1, V2 size adjust capacitance C1, C2 size to control, to realize that various ways limit
The highest output frequency of pulse generator limits the highest output frequency of pulse-generating circuit, saves the expense of hardware system.
Description of the drawings
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technology description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
Some embodiments of invention for those of ordinary skill in the art without creative efforts, can be with
Obtain other attached drawings according to these attached drawings.
Fig. 1 is the high-frequency impulse limiting circuit schematic diagram of the present invention；
Label in figure respectively represents：1- first comparators；The second comparators of 2-；3- third comparators；4-RS triggers；
5- NAND gates；6- nor gates.
Specific implementation mode
In order to make the object, technical scheme and advantages of the embodiment of the invention clearer, below in conjunction with the embodiment of the present invention
In attached drawing, technical scheme in the embodiment of the invention is clearly and completely described, it is clear that described embodiment is
A part of the embodiment of the present invention, instead of all the embodiments.Based on the embodiments of the present invention, those of ordinary skill in the art
The every other embodiment obtained without creative efforts, shall fall within the protection scope of the present invention.
Embodiment：
A kind of high-frequency impulse limiting circuit of the present embodiment, referring to Fig.1：Including rest-set flip-flop 4, switching tube M1, M2, first
The base stage of comparator 1, the second comparator 2 and third comparator 3, switching tube M1, M2 is respectively connected to the ratio of first comparator 1 and second
Compared with the anode of device 2, the output end access of first comparator 1 includes the input terminal of rest-set flip-flop 4, the second comparator 2 and third ratio
Compared with the input terminal that the output end of device 3 is respectively connected to NAND gate 5,1 NAND gate 5 of first comparator includes RS by the access of nor gate 6
Another input terminal of trigger 4；The output end of rest-set flip-flop 4 connects with the base stage of switching tube M1, M2 respectively.
The basic RS filpflop that rest-set flip-flop is formed by two nor gate input terminals and output end interconnection.
The base stage of switching tube M1, M2 are connected with crystal amplifier, and have bias current IB1 and IB2 respectively.
Switching tube M1, M2 are made of triode and charging capacitor C1, C2, one end ground connection of capacitance C1, C2.
The positive access period input signal Vin of third comparator 3, cathode incoming reference signal Vref.
The cathode of first comparator 1 is connected with reference voltage V1, and the cathode of the second comparator 2 is connected with reference voltage V2.
Operation principle：Periodic input signal Vin and reference signal Vref obtain cyclic pulse signal third through comparator
Comparator 3；C1 and C2 is charging capacitor, when the voltage of C1 and C2 is respectively greater than V1 and V2, the output result first of comparator
Comparator 1 and first comparator 2 become 1；When first comparator 1 is 1, Vpulse 0, if first comparator 2 and third ratio
It is closed compared with there is one in device 3 not and being 1 M1 pipe that M2 pipes are connected, C1 electric discharges C2 persistently charges, Vpulse 0, compares until first
When device 2 and third comparator 3 are 1 simultaneously, Vpulse 1.It is obtained periodically by the charging and discharging process of C1 and C2
Vpulse signals, it is assumed that the charging time of C1 and C2 is respectively T1 and T2, then the period of Vpulse is T1+T2.
When the frequency of input signal Vin is excessively high, the highest frequency of output signal can by adjusting bias current IB1,
IB2 and reference voltage V1, V2 size adjust capacitance C1, C2 size to control, to realize that various ways limit pulse
The highest output frequency of generator limits the highest output frequency of pulse-generating circuit, saves the expense of hardware system.
It should be noted that herein, relational terms such as first and second and the like are used merely to a reality
Body or operation are distinguished with another entity or operation, are deposited without necessarily requiring or implying between these entities or operation
In any actual relationship or order or sequence.Moreover, the terms "include", "comprise" or its any other variant are intended to
Non-exclusive inclusion, so that the process, method, article or equipment including a series of elements is not only wanted including those
Element, but also include other elements that are not explicitly listed, or further include for this process, method, article or equipment
Intrinsic element.In the absence of more restrictions, the element limited by sentence "including a ...", it is not excluded that
There is also other identical elements in process, method, article or equipment including the element.
The above embodiments are merely illustrative of the technical solutions of the present invention, rather than its limitations；Although with reference to the foregoing embodiments
Invention is explained in detail, it will be understood by those of ordinary skill in the art that：It still can be to aforementioned each implementation
Technical solution recorded in example is modified or equivalent replacement of some of the technical features；And these modification or
It replaces, the spirit and scope for various embodiments of the present invention technical solution that it does not separate the essence of the corresponding technical solution.
Claims (6)
1. a kind of high-frequency impulse limiting circuit, which is characterized in that compare including rest-set flip-flop (4), switching tube (M1, M2), first
The base stage of device (1), the second comparator (2) and third comparator (3), the switching tube (M1, M2) is respectively connected to first comparator
(1) and the anode of the second comparator (2), the output end access of the first comparator (1) include the input of rest-set flip-flop (4)
End, the output end of second comparator (2) and third comparator (3) are respectively connected to the input terminal of NAND gate (5), and described first
Comparator (1) NAND gate (5) passes through another input terminal that nor gate (6) access includes rest-set flip-flop (4)；The rest-set flip-flop
(4) output end connects with the base stage of switching tube (M1, M2) respectively.
2. a kind of high-frequency impulse limiting circuit according to claim 1, which is characterized in that the rest-set flip-flop (4) is by two
The basic RS filpflop that a nor gate input terminal and output end interconnection are formed.
3. a kind of high-frequency impulse limiting circuit according to claim 1, which is characterized in that the switching tube (M1, M2)
Base stage is connected with crystal amplifier, and has bias current IB1 and IB2 respectively.
4. a kind of high-frequency impulse limiting circuit according to claim 1, which is characterized in that the switching tube (M1, M2) by
Triode and charging capacitor (C1, C2) composition, one end ground connection of the capacitance (C1, C2).
5. a kind of high-frequency impulse limiting circuit according to claim 1, which is characterized in that the third comparator (3)
Positive access period input signal Vin, cathode incoming reference signal Vref.
6. a kind of high-frequency impulse limiting circuit according to claim 1, which is characterized in that the first comparator (1)
Cathode is connected with reference voltage V1, and the cathode of second comparator (2) is connected with reference voltage V2.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810676841.2A CN108768348A (en) | 2018-06-27 | 2018-06-27 | A kind of high-frequency impulse limiting circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810676841.2A CN108768348A (en) | 2018-06-27 | 2018-06-27 | A kind of high-frequency impulse limiting circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN108768348A true CN108768348A (en) | 2018-11-06 |
Family
ID=63977624
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201810676841.2A Pending CN108768348A (en) | 2018-06-27 | 2018-06-27 | A kind of high-frequency impulse limiting circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN108768348A (en) |
-
2018
- 2018-06-27 CN CN201810676841.2A patent/CN108768348A/en active Pending
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| PB01 | Publication | ||
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| WD01 | Invention patent application deemed withdrawn after publication | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20181106 |