CN108717278B - Multi-path parallel real-time digital judgment implementation method for PFC (power factor correction) rectifier module - Google Patents
Multi-path parallel real-time digital judgment implementation method for PFC (power factor correction) rectifier module Download PDFInfo
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- CN108717278B CN108717278B CN201810286316.XA CN201810286316A CN108717278B CN 108717278 B CN108717278 B CN 108717278B CN 201810286316 A CN201810286316 A CN 201810286316A CN 108717278 B CN108717278 B CN 108717278B
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- G05B19/00—Programme-control systems
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Abstract
The invention discloses a multi-path parallel real-time digital judgment implementation method for a PFC (power factor correction) rectification module, which judges whether the PFC rectification module and other PFC rectification modules are in a parallel working state or not through an online algorithm, thereby avoiding the output caused by the independent use of the PFC rectification module in a current sharing modeThe voltage output effect. The working principle is as follows: 1) rectifying the input current of the PFC rectifying moduleIsenseAnd parallel PFC rectification input current reference busIcbCarrying out analog-digital sampling; 2) using digital controllers for computingIsenseSampling signal andIcbsampling the signal difference to obtainIerrorThe signal is used as an input signal of a parallel judgment algorithm; 3) according to a parallel judgment algorithmIerrorThe maximum change rate of the signal is used for judging whether the current equalizing ring controller is used. The invention realizes effective judgment on whether the multiple PFC rectifying modules are in the current-sharing parallel working mode or not based on an online algorithm, so that the output voltage can not fluctuate due to the influence of a current-sharing loop controller when the PFC rectifying modules operate independently.
Description
Technical Field
The invention relates to the technical field of digital power supplies, in particular to a multi-path parallel real-time digital judgment implementation method for a PFC (power factor correction) rectification module.
Background
As shown in fig. 1, the DSP controller part of the prior art digital PFC rectifier module has no parallel judgment function. DSP controller calculates sampling signal IsenseAnd the sampled signal IcbDifference value of (I)errorThen, will directly handle IerrorAnd providing the current-sharing loop controller. In order to avoid that the digital PFC rectifying modules quit the system operation due to overcurrent or overtemperature when working in parallel and finally cause the whole system to be paralyzed, the current equalizing ring controller adjusts the reference voltage V of the voltage ring of the digital PFC rectifying modulesref *To achieve current sharing among multiple modules. So when the digital PFC rectifier module operates alone, due to the signal IsenseAnd signal IcbThere are sampling error and quantization error, difference signal IerrorAnd is not equal to 0. The DSP controller part of the existing digital PFC rectification module is not provided with a parallel connection judgment function, and a signal IsenseAnd signal IcbThe error value between the two is directly reflected to the power of the digital PFC rectifier module through the current sharing loop controllerReference voltage V of the pressure ringref *Therefore, the instability of the output voltage of the digital PFC rectifying module is increased, and the performance of the digital PFC rectifying module is reduced.
Disclosure of Invention
The invention aims to solve the defects in the prior art and provides a multi-path parallel real-time digital judgment implementation method for a PFC (power factor correction) rectification module.
The purpose of the invention can be achieved by adopting the following technical scheme:
a multi-path parallel real-time digital judgment implementation method for a PFC (power factor correction) rectification module comprises the following steps:
s1, maximum value calculation step: receiving a difference signal I calculated by a DSP controllererrorCalculating a difference signal IerrorAbsolute value of | IerrorI, then IerrorI and Ierror|maxAnd (3) comparing and judging the sizes: (1) if Ierror| is greater than original maximum | Ierror|maxThen, the variation Δ ═ I of the maximum value is calculatederror|-|Ierror|maxAnd for the maximum value | Ierror|maxAssign a new maximum value | IerrorAnd proceeds to the next step S2; (2) if IerrorI is less than the original maximum value Ierror|maxThen do nothing and wait for the next time to receive IerrorA difference signal;
s2, maximum value change speed detection step: comparing and judging the threshold of the variation delta of the maximum value, wherein the threshold comprises a loading threshold A and a parallel threshold B, (1) if the variation delta of the maximum value is larger than the loading threshold A, judging that the digital PFC rectifying module is in a loading working state, and resetting a counter N; (2) if the variation delta of the maximum value is smaller than the parallel threshold B, the digital PFC rectifying module is judged to be in a parallel working state, and 1 is added to a counter N; (3) if the variation delta of the maximum value is between the loading threshold A and the parallel threshold B, the counter N is kept unchanged;
s3, a parallel judgment decision step: and judging the working condition of the digital PFC rectifying module according to the value of the N value of the counter obtained in the step of detecting the maximum value change speed, and further controlling the starting of the current equalizing ring controller.
Further, the process of the step of S3, parallel judgment decision is as follows:
and if the value of the counter N is less than or equal to the comparison threshold value C, judging that the digital PFC rectifying module is in an independent working mode, and not starting the current sharing controller.
Further, the values of the loading threshold a and the parallel threshold B are obtained according to an actual circuit, and the value range intervals are respectively [ 40,60 ] and [ 5,15 ].
Further, the comparison threshold C is finely adjusted according to the sensitivity requirement in the parallel judgment method, and the value range is 2, 3, 4, 5 or 6.
Compared with the prior art, the invention has the following advantages and effects:
different from the prior art digital PFC rectifying module, the invention adds the parallel judgment software in the DSP controller part, so that the digital PFC rectifying module can judge whether the digital PFC rectifying module works in parallel with other PFC rectifying modules, thereby not starting the current-sharing loop controller when the digital PFC rectifying module operates alone, and avoiding the influence of the current-sharing loop controller on the fluctuation of the output voltage. And the parallel judgment scheme is realized by software, has a simple structure and can be applied to various digital PFC rectification modules realized by using DSP chips.
Drawings
Fig. 1 is a schematic diagram of a prior art digitally controlled parallel operation of PFC rectifier modules;
fig. 2 is a schematic diagram of the digitally controlled parallel operation of PFC rectifier modules of the present invention;
fig. 3 is a diagram illustrating an embodiment of the PFC rectifier module digital control parallel determination method according to the present invention;
fig. 4 is a flowchart of a digital control parallel connection determination method in an embodiment of a PFC rectifier module according to the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Examples
As shown in the attached figure 1, the attached figure 1 is a schematic diagram of parallel operation of digital PFC rectifier modules in the prior art, a DSP controller part is not provided with parallel judgment software, and a signal IsenseAnd signal IcbThe error value between the two reference voltages can be directly reflected to the reference voltage V of the voltage loop of the digital PFC rectifier module through the current sharing loop controllerref *Therefore, the output voltage of the PFC rectifier module is unstable, and the performance of the PFC rectifier module is reduced.
The invention provides a digital control parallel judgment implementation scheme for a PFC (power factor correction) rectification module, which is shown in the attached drawings 3 and 4, and comprises the following steps: s1, solving a maximum value; s2, detecting the maximum value change speed; and S3, parallel judgment decision making.
The invention relates to a digital control parallel judgment implementation scheme for a PFC (power factor correction) rectification module, which comprises the following steps of:
s1, maximum value calculation step: receiving I calculated by the DSP controllererrorDifference signal, by finding absolute value | IerrorI flow path calculating difference signal IerrorAbsolute value of | IerrorL, |; then, | IerrorI and Ierror|maxAnd (3) comparing and judging the sizes: (1) if Ierror| is greater than original maximum | Ierror|maxThen, the variation Δ ═ I of the maximum value is calculatederror|-Ierror|maxAnd for the maximum value | Ierror|maxAssign a new maximum value | IerrorAnd proceed to nextStep S2; (2) if IerrorI is less than the original maximum value Ierror|maxThen do nothing and wait for the next time to receive IerrorA difference signal.
S2, maximum value change speed detection step: maximum value | I in the step of finding the maximum valueerror|maxWhen the change occurs, the step of detecting the change speed of the maximum value starts to work. The maximum value change speed detection step receives the change amount Δ of the maximum value calculated in the maximum value calculation step, and performs threshold comparison determination on the change amount Δ (setting the loading threshold a to 50 and the parallel threshold B to 10): (1) if the variation delta of the maximum value is larger than the loading threshold value 50, the digital PFC rectifying module is in a loading working state, and the counter N is cleared; (2) if the variation delta of the maximum value is smaller than the parallel threshold 10, the maximum value | I of the difference signal is describederror|maxUnstable, maximum value | I of time difference signal when operating alone with digital PFC rectifier moduleerror|maxIf the phenomena of stability are contradictory, the PFC rectifying module is judged to be in a parallel working state, the counter N is increased by 1, and the size of the counter N indirectly reflects the probability of the digital PFC rectifying module in the parallel working state; (3) if the variation delta of the maximum value is neither more than 50 nor less than 10, whether the digital PFC rectifying module is in the parallel working state or not can not be judged, and the counter N is kept unchanged.
S3, a parallel judgment decision step: and judging the working condition of the PFC rectifying module according to the value of the counter N obtained in the step of detecting the maximum value change speed. The maximum change speed detection step compares and judges a threshold value of a counter N: (1) if the counter N is greater than the comparison threshold C (C is chosen to be 2)2, the maximum value | I of the difference signal is indicatederror|maxUndergoes three times of continuous small amplitude increase adjustment, which is equal to the maximum value | I of the difference signal when the digital PFC rectifying module operates aloneerror|maxThe phenomenon of fast reaching stability is inconsistent, so the parallel judgment decision step judges that the digital PFC rectifying module is in a parallel working state, and therefore the current-sharing loop controller is started to start the parallel current-sharing control on the digital PFC rectifying module; (2) if counterN is less than the comparison threshold C, the parallel judgment decision step can not make the judgment, no operation is carried out, and the next time I is receivederrorA difference signal.
In specific application, the loading threshold a and the parallel threshold B in the step of detecting the maximum value change speed may be modified according to different hardware parameters such as a sampling resistor of the digital PFC rectifier module in practical application.
In a specific application, the comparison threshold C in the parallel judgment decision step can be finely adjusted according to the requirement on the sensitivity of the parallel judgment technical scheme.
In summary, through the above parallel judgment, the digital PFC rectifier module may not start the current sharing loop controller when operating alone, thereby avoiding the signal IsenseAnd signal IcbSampling error between vs. voltage ring reference Vref *The influence of the voltage-sharing loop controller overcomes the defect that the current-sharing loop controller can cause the fluctuation and instability of the output voltage of the digital PFC rectifying module when the digital PFC rectifying module operates independently in the prior art.
The above embodiments are preferred embodiments of the present invention, but the present invention is not limited to the above embodiments, and any other changes, modifications, substitutions, combinations, and simplifications which do not depart from the spirit and principle of the present invention should be construed as equivalents thereof, and all such changes, modifications, substitutions, combinations, and simplifications are intended to be included in the scope of the present invention.
Claims (3)
1. A multi-path parallel real-time digital judgment implementation method for a PFC rectification module is characterized by comprising the following steps:
s1, maximum value calculation step: receiving a difference signal I calculated by a DSP controllererrorCalculating a difference signal IerrorAbsolute value of | IerrorI, then IerrorI and Ierror|maxAnd (3) comparing and judging the sizes: (1) if Ierror| is greater than original maximum | Ierror|maxThen, the variation Δ ═ I of the maximum value is calculatederror|-|Ierror|maxAnd is most suitable forLarge value | Ierror|maxAssign a new maximum value | IerrorAnd proceeds to the next step S2; (2) if IerrorI is less than the original maximum value Ierror|maxThen do nothing and wait for the next time to receive IerrorA difference signal;
s2, maximum value change speed detection step: comparing and judging the threshold of the variation delta of the maximum value, wherein the threshold comprises a loading threshold A and a parallel threshold B, (1) if the variation delta of the maximum value is larger than the loading threshold A, judging that the digital PFC rectifying module is in a loading working state, and resetting a counter N; (2) if the variation delta of the maximum value is smaller than the parallel threshold B, the digital PFC rectifying module is judged to be in a parallel working state, and 1 is added to a counter N; (3) if the variation delta of the maximum value is between the loading threshold A and the parallel threshold B, the counter N is kept unchanged;
s3, a parallel judgment decision step: judging the working condition of the digital PFC rectifier module according to the value of the counter N obtained in the step of detecting the maximum value change speed, and further controlling the starting of the current-sharing loop controller, wherein the parallel judgment decision step process comprises the following steps:
and if the value of the counter N is less than or equal to the comparison threshold value C, judging that the digital PFC rectifying module is in an independent working mode, and not starting the current sharing controller.
2. The method according to claim 1, wherein values of the loading threshold a and the parallel threshold B are obtained according to an actual circuit, and the value range intervals are [ 40,60 ] and [ 5,15 ], respectively.
3. The method according to claim 2, wherein the comparison threshold C is finely adjusted according to the sensitivity requirement of the parallel determination method, and has a value range of 2, 3, 4, 5, or 6.
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| CN1353497A (en) * | 2000-11-02 | 2002-06-12 | 翁征明 | Multi-channel parallelly connected step-up type power factor corrector |
| CN2466848Y (en) * | 2001-01-15 | 2001-12-19 | 广东南方通信集团公司 | Rectifying module for switching supply unit |
| TW200507431A (en) * | 2003-08-11 | 2005-02-16 | Delta Electronics Inc | Current-balancing method and device for controlling the power-factor-correction circuit interlacedly |
| US7038924B2 (en) * | 2003-11-04 | 2006-05-02 | Lockheed Martin Corporation | Surge current suppression in power-factor-corrected AC-to-DC converter with capacitive load |
| CN1315248C (en) * | 2003-11-21 | 2007-05-09 | 华南理工大学 | A single-stage power factor correcting circuit |
| CN100352151C (en) * | 2004-01-12 | 2007-11-28 | 南京航空航天大学 | Power factor correction transducer capable of parallel working |
| CN101237157A (en) * | 2007-12-07 | 2008-08-06 | 深圳市东盛兴科技有限公司 | Contact type energy-saving high-frequency switch DC power system |
| CN101217255B (en) * | 2008-01-16 | 2010-12-22 | 艾默生网络能源有限公司 | A PFC circuit with current sharing control module and the corresponding current sharing control method |
| CN101594049B (en) * | 2008-05-30 | 2012-06-06 | 艾默生网络能源有限公司 | Interleaved parallel PFC control circuit and control method |
| CN101986542B (en) * | 2010-11-02 | 2013-02-13 | 华南理工大学 | PFC (power factor correction) control method with high input power factor and control circuit thereof |
| CN102622037B (en) * | 2012-04-10 | 2013-10-09 | 东莞市乐科电子有限公司 | Parallel PFC (Power Factor Correction) rectifying modules and current sharing control method |
| US9013239B2 (en) * | 2012-05-15 | 2015-04-21 | Crestron Electronics Inc. | Audio amplifier power supply with inherent power factor correction |
| CN207039448U (en) * | 2017-08-03 | 2018-02-23 | 华南理工大学 | A kind of digital control adjustment circuit for wide operating frequency range interleaving PFC |
| CN107834816A (en) * | 2017-11-07 | 2018-03-23 | 深圳威迈斯电源有限公司 | Two-stage multi-channel parallel flow equalizing circuit, current equalizing method, storage device and mobile terminal |
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