JPH1090314A - Power failure detection method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To detect a momentary power failure or a power failure with a residual voltage at high speed by comparing a difference of data at two sampling times spaced via one cycle of an a.c. voltage with a predetermined power failure judgment level. SOLUTION: A voltage of one phase of a three-phase power system detected by a voltage detector 21 is converted to a digital signal by an A/D converter 22, and sampled with a constant electric angle synchronous with the voltage. The data are sequentially stored in a memory 24. A processor 23 reads out data at the present sampling time and at the same sampling time of one earlier cycle and operates a deviation of the data. If no power failure occurs and a voltage waveform is normal, the deviation is zero. If a power failure takes place in one cycle, the deviation shows a certain value. A suitable power failure judgment level is set beforehand. The presence/absence of a power failure is detected by comparing the deviation with the level.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an uninterruptible power supply called UPS or SPS, which is capable of reducing a power failure due to an instantaneous interruption of a commercial power supply voltage (hereinafter referred to as an instantaneous power failure) or a slow power failure in which a residual voltage remains. More particularly, the present invention relates to a power failure detection method for switching a control mode of an uninterruptible power supply and supplying an output voltage without instantaneous interruption to ensure stable operation.

[0002]

2. Description of the Related Art FIG. 6 is a block diagram showing a conventional power failure detection circuit. In the figure, reference numeral 11 denotes a three-phase full-wave rectifier circuit connected to a three-phase power system of a commercial power supply for detecting a power failure, 12 denotes a filter for removing a ripple component from a full-wave rectified waveform, and 13 denotes an output of the filter 12. And a preset power failure detection level to obtain a power failure determination output.

[0003]

In the above configuration, even if a momentary power failure occurs at time t1 in FIG. 7, the power failure determination output is delayed until time t2 due to the time constant of the filter 12. In addition, in the case of a single-phase power failure, since the system voltage is full-wave rectified, there is a problem that it is delayed to recognize the voltage drop.

Accordingly, the present invention can detect a high-speed power failure such as an instantaneous power failure or a low-speed power failure with a residual voltage at a high speed.
An object of the present invention is to provide a power failure detection method capable of reliably detecting a power failure of only one phase.

[0005]

In order to solve the above-mentioned problem, the invention according to claim 1 compares a difference between data at two sampling points separated by one cycle of an AC voltage with a predetermined power failure judgment level. This is to detect a power failure. That is, when the difference between the data at a certain sampling point one cycle before the AC voltage and the data at the same sampling point at present has a constant value, it is determined that a power failure has occurred.

According to a second aspect of the present invention, the absolute value of each of the three-phase AC voltages is calculated individually for each phase, and the sum of the absolute values of each phase is compared with a predetermined power failure determination level to detect a power failure. Things. Here, the power failure determination level is set lower than the lowest level of the sum of the absolute values of each phase in the normal state.

According to a third aspect of the present invention, a power failure is detected by calculating a rate of change of the AC voltage and comparing the rate of change with a predetermined power failure determination level. In the present invention, the absolute value of the change rate may be calculated and compared with a single power failure determination level, or the power failure determination level may be set on both positive and negative sides and compared with the change rate.

According to a fourth aspect of the present invention, the absolute value of the AC voltage and the absolute value of the rate of change of the AC voltage are calculated, the levels of the absolute values are added together, and the added value is added to a predetermined power failure. The power failure is detected by comparing with a determination level. In the present invention, the added value is a DC value without ripple, and a power failure can be detected by comparing this DC value with a smaller power failure determination level.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. First, FIG. 1 is a block diagram of a power failure detection circuit used in each embodiment of the present invention. In the figure, reference numeral 21 denotes a voltage detector which detects each phase voltage of a three-phase power system which is a commercial power supply, 22 denotes an A / D converter which converts a detected analog signal voltage into a digital signal, and 23 denotes an A / D converter. A processor that samples the output signal of the D converter 22 at a constant cycle and executes various arithmetic processing and power failure determination processing. A memory 24 stores the arithmetic result of the processor 23.

FIG. 2 is a waveform diagram showing an embodiment of the present invention. In this embodiment, the voltage for one phase (for example, R-phase voltage) detected by the voltage detector 21 is converted into a digital signal by the A / D converter 22, and a constant electrical angle synchronized with the voltage (for example, 30 °) ), And the data is sequentially stored in the memory 24.

The processor 23 reads out the data at the current sampling point (V _k in FIG. 2) and the data at the same sampling point one cycle before (V _k−1 ), and calculates the deviation ΔV between the two. (= V _k−1 −V _k ). If there is no power failure and the voltage waveform is normal, ΔV = 0
If a power failure occurs during this one cycle, ΔV has a certain value. Therefore, it is possible to detect the presence or absence of a power failure by setting an appropriate power failure determination level in advance and comparing it with ΔV. it can. Here, if the power failure determination level is reduced, the detection sensitivity can be improved.

In the time axis of FIG. 2, for convenience,
The times t1, t2, t3,... Are repeatedly used to indicate the same sampling point in each voltage cycle. In this embodiment, in order to maximize the power failure detection speed, the data V _k−1 one cycle before may be used as described above. Data may be used.

According to this embodiment, since the operation result is not filtered, an instantaneous interruption of the commercial power supply voltage can be detected at a high speed, and the switching of the control mode in the uninterruptible power supply can be performed quickly. Become. Further, a power failure of only one phase can be detected instantaneously.

Next, an embodiment of the present invention will be described. In this embodiment, the absolute values of the three-phase voltages detected by the voltage detector 21 are individually calculated, and the A / D
The three-phase addition is performed as a digital signal by the processor 23 via the converter 22.

FIG. 3 is a waveform diagram showing the absolute values of the R, S, and T phases and the three-phase addition values. The power failure determination level is set lower than the lowest part (lowest level) of the ripple of the three-phase addition value, and is determined depending on whether the lowest level of the three-phase addition value is lower than the power failure determination level. Determine the power outage.

Also in this embodiment, a power failure can be detected at a high speed because the calculation result is not filtered. Further, since the addition result of the absolute values of the three phases is used for the power failure determination, it is possible to reliably detect the power failure even when only one phase has failed.

Next, an embodiment of the invention described in claim 3 will be described. In this embodiment, certain phases (eg, R
Phase) is detected by the voltage detector 21 and this is detected as A /
After the digital signal is converted by the D converter 22, the voltage change rate is calculated by the processor 23.

As shown in FIG. 4, the voltage change rate of the R-phase voltage is a waveform whose phase is advanced by 90 ° from the R-phase voltage waveform.
Now, if a power failure occurs at time t1 in FIG. 4, the voltage change rate that has increased to the negative side exceeds the power failure determination level.
A power outage can be detected by comparing the two. Although not shown, the absolute value of the voltage change rate may be calculated, and this absolute value may be compared with a single power failure determination level. Alternatively, the power failure determination level may be set on both the positive and negative sides of the voltage change rate by the method of FIG. Also in this embodiment, a momentary power failure or a power failure of only one phase can be detected quickly and reliably.

Finally, an embodiment of the present invention will be described. In this embodiment, first, a voltage of a certain phase (for example, R phase) is detected by a voltage detector 21 and converted to a digital signal by an A / D converter 22 in the same manner as in the third embodiment of the present invention. And the processor 23 calculates the voltage change rate.

Thereafter, the processor 23 calculates the absolute value of the R-phase voltage, calculates the absolute value of the voltage change rate, and multiplies the absolute value by a predetermined gain, as shown in FIG. After matching the value and level, add both. The result of this addition is a DC value with little ripple.
The power failure is detected by comparing the DC value with a power failure determination level set to a level lower than the DC value. That is, since the above-described DC value decreases after the occurrence of the power failure, the power failure can be determined because the DC value has fallen below the power failure determination level.

Since the present embodiment does not require any filter processing, a power failure can be detected at high speed, and a power failure of only one phase can be reliably detected. Also, a low-speed power failure in which the voltage drops relatively slowly due to the residual voltage can be detected at a high speed.

The present invention can be applied not only to an uninterruptible power supply, but also to power failure detection of AC voltage in general.

[0023]

As described above, according to the present invention, the difference between the data at the same sampling point separated by one cycle of the AC voltage,
By comparing the three-phase addition value of the absolute value of the AC voltage, the voltage change rate, or the addition value of the absolute value of the AC voltage and the absolute value of the voltage change rate with a predetermined power failure determination level, the instantaneous power failure or residual voltage A certain power failure can be detected at high speed, and a power failure of only one phase can be reliably detected. As a result, the control mode of the uninterruptible power supply at the time of commercial power outage can be quickly switched, and stable and reliable power supply can be achieved.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a device configuration used in an embodiment of the present invention.

FIG. 2 is a waveform chart for explaining the embodiment of the invention described in claim 1;

FIG. 3 is a waveform chart for explaining the embodiment of the invention described in claim 2;

FIG. 4 is a waveform chart for explaining the embodiment of the invention described in claim 3;

FIG. 5 is a waveform chart for explaining the embodiment of the invention described in claim 4;

FIG. 6 is a block diagram showing a conventional power failure detection circuit.

FIG. 7 is a waveform chart showing a conventional power failure detection method.

[Explanation of symbols]

 Reference Signs List 21 voltage detector 22 A / D converter 23 processor 24 memory

Claims (4)

[Claims] 1. A power failure detection method, wherein a power failure is detected by comparing a difference between data at two sampling points separated by one cycle of an AC voltage with a power failure determination level. 2. A power failure detection method comprising: calculating an absolute value of a three-phase AC voltage for each phase individually; and comparing the sum of the absolute values of each phase with a power failure determination level to detect a power failure. . 3. A power failure detection method comprising calculating a rate of change of an AC voltage and comparing the rate of change with a power failure determination level to detect a power failure. 4. The power failure is calculated by calculating the absolute value of the AC voltage and the absolute value of the rate of change of the AC voltage, adding the levels of both absolute values together, and comparing the added value with the power failure determination level. Detecting a power failure.