CN108711561A - A kind of heat sinking channel for ceramic package - Google Patents
A kind of heat sinking channel for ceramic package Download PDFInfo
- Publication number
- CN108711561A CN108711561A CN201810287313.8A CN201810287313A CN108711561A CN 108711561 A CN108711561 A CN 108711561A CN 201810287313 A CN201810287313 A CN 201810287313A CN 108711561 A CN108711561 A CN 108711561A
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- Prior art keywords
- heat
- heat conduction
- substrate
- thermal conductive
- high thermal
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
- H01L23/3677—Wire-like or pin-like cooling fins or heat sinks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
- H01L23/3672—Foil-like cooling fins or heat sinks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3731—Ceramic materials or glass
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Ceramic Engineering (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
A kind of heat sinking channel for ceramic package, including high thermal conductive substrate, heat conduction through-hole, heat dissipating layer etc., the au bump of 30~60 μm of diameters on chip, including heat conduction salient point and signal connecting salient points.Chip with au bump is by way of ultrasonic thermocompression in upside-down mounting to high thermal conductive substrate, heat conduction through-hole connects in the pad and substrate that wherein heat conduction salient point passes through substrate surface, heat conduction through-hole extends vertically through substrate can generate connection inside substrate with heat dissipating layer, and result in formation of the excellent thermal conducting paths of chip-substrate；On the pad and substrate that signal connecting salient points pass through substrate surface electricity wiring connection, also increase chip to substrate the capacity of heat transmission.The present invention is under the premise of meeting device electric property, conventional encapsulant is replaced with au bump and AlN ceramic, and increase heat conduction through-hole and heat dissipating layer structure in a substrate, the structure of this encapsulation is simple, encapsulating material utilization rate is high, the heat-sinking capability of device can be greatly reinforced, reduces device to heat sink dependence.
Description
Technical field
The present invention relates to a kind of radiator structures of technical field of semiconductor encapsulation.
Background technology
Traditional semi-conductor flip-chip bonding encapsulating structure passes through shell, Al mostly2O3Ceramic substrate or it is heat sink radiate, it is main
It has the following disadvantages：
1, with the continuous development of semiconductor technology, the power consumption of chip can be increasing, cannot only have by shell heat dissipation
The distributing heat of effect, causes the temperature of device excessively high and damages.
2, traditional flip chip bonding packaging structure, chip tip upside down on Al by solder or conducting resinl2O3On substrate, due to this two
Kind interconnection material heat dissipation effect is bad, so the heat that chip generates cannot be effectively conducted to Al2O3Substrate.Even if chip can be with
Substrate is conducted heat to by salient point, but due to traditional Al2O3Ceramic substrate heat dissipation characteristics are bad, also make encapsulating structure whole
Temperature is excessively high.
Although 3, device heat dissipation performance can be improved using the structure of heat sink heat dissipation, it is bonded the additional technique mistake of heat sink needs
Journey increases process complexity.And heat sink usual shape is big, and it is complicated, increase the overall dimensions and weight of device.
Invention content
The technical problem to be solved by the present invention is to：Overcome the deficiencies in the prior art, the present invention provides one kind for making pottery
The heat sinking channel of porcelain encapsulation, can be applied to high-power flip chip bonding ceramic package device and the severe device of dissipating-heat environment, such as
Aerospace environment.The present invention devises chip-salient point-base plate heat radiation structure and greatly strengthens core using novel encapsulating material
The heat-sinking capability of piece-salient point-substrate passageways, to provide, a kind of heat-sinking capability is strong, simple in structure, encapsulating material utilization rate is high
Heat dissipation channel.
Technical solution of the invention is：A kind of heat sinking channel for ceramic package, including heat conduction salient point, letter
Number connecting salient points, heat conduction through-hole, heat dissipating layer, high thermal conductive substrate；Heat conduction salient point, signal connecting salient points are distributed in chip surface, core
In piece upside-down mounting to high thermal conductive substrate, heat conduction salient point is made to pass through heat conduction through-hole in the pad and high thermal conductive substrate on high thermal conductive substrate surface
It connects, the signal pad interconnection on signal connecting salient points and high thermal conductive substrate, heat conduction through-hole extends vertically through high thermal conductive substrate, radiates
Layer level is spread in inside high thermal conductive substrate, and heat conduction through-hole is connected to inside high thermal conductive substrate with heat dissipating layer.
The heat conduction salient point is to be produced on the au bump on chip using electroplating technology, and shape is cylindrical or square column type,
A diameter of 30~60 μm.
The signal connecting salient points are to be produced on the au bump on chip using electroplating technology, and shape is cylindrical or square column
Shape, a diameter of 30~60 μm.
The high thermal conductive substrate is made of AlN ceramic material.
The heat conduction salient point, signal connecting salient points pass through in ultrasonic thermocompression technique upside-down mounting to high thermal conductive substrate.
Tungsten and molybdenum material made of filled high-temperature co-firing technology in the heat conduction through-hole.
The heat dissipating layer is using tungsten and molybdenum material made of high temperature co-firing technique.
The advantages of the present invention over the prior art are that：
(1) present invention makes flip chip bonding device increase the good salient point of heat dissipation performance-substrate heat dissipation channel, can effectively dissipate
The heat that device generates is sent out, more can guarantee that device is operated in safe temperature range.
(2) present invention is due to the structure using au bump, AlN ceramic, heat conduction through-hole and heat dissipating layer, with conventional package
Material is very good compared to the capacity of heat transmission of au bump and AlN ceramic, and the structures such as heat conduction through-hole and heat dissipating layer contribute to heat to exist
The diffusion of substrate.
(3) heat dissipation performance of the invention is fine, and encapsulating material utilization rate is high, compared with conventional package, reduces device pair
Heat sink dependence, the structure of this encapsulation greatly simplified, reduces packaging process.The present invention is before meeting device electric property
It puts, replaces conventional encapsulant with au bump and AlN ceramic, and increase heat conduction through-hole and heat dissipating layer structure in a substrate, this
The structure of kind encapsulation is simple, and encapsulating material utilization rate is high, can greatly reinforce the heat-sinking capability of device, reduces device to heat sink
It relies on.
Description of the drawings
Fig. 1 is sectional view of the present invention for single heat conduction through-hole structure in the heat sinking channel of ceramic package；
Fig. 2 is sectional view of the present invention for multiple heat conduction through-hole interconnection structures in the heat sinking channel of ceramic package；
Fig. 3 is sectional view of the present invention for multiple heat conduction through-hole separate structures in the heat sinking channel of ceramic package；
Fig. 4 is various types of heat conduction through-holes used by heat sinking channel of the present invention for ceramic package.
Specific implementation mode
Invention is further explained with reference to the accompanying drawings and examples.
The present invention relates to a kind of heat sinking channel for ceramic package, including heat conduction salient point 2, signal connecting salient points 3,
Heat conduction through-hole 4, heat dissipating layer 5, high thermal conductive substrate 6.Heat conduction salient point 2, signal connecting salient points 3 are produced on chip 1 by electroplating technology
On, chip 1 is by the way that in ultrasonic thermocompression technique upside-down mounting to high thermal conductive substrate 6, wherein 6 material of high thermal conductive substrate is AlN ceramic, heat conduction
Salient point 2 is interconnected by the surface pads of high thermal conductive substrate 6 with the heat conduction through-hole 4 in high thermal conductive substrate 6, and signal connecting salient points 3
With the signal pad interconnection on high thermal conductive substrate 6, heat conduction through-hole 4 is connected with heat dissipating layer 5.Heat conduction through-hole 4 extends vertically through high heat conduction
Substrate 6,5 level of heat dissipating layer are spread in inside high thermal conductive substrate 6, and heat conduction through-hole 4 connects in 6 inside of high thermal conductive substrate with heat dissipating layer 5
It is logical.What institute's high thermal conductive substrate 6 was not contacted with heat conduction salient point 2, signal connecting salient points 3 is distributed with soldered ball 7 on one side, and ingredient is weldering
Material.
Heat conduction salient point 2, the signal connecting salient points 3 in the heat sinking channel for ceramic package are the au bump of plating, shape
Shape be cylinder or square column, a diameter of 30~60 μm.
Tungsten and molybdenum material is filled in heat conduction through-hole 4, runs through entire high thermal conductive substrate 6, and connect with heat dissipating layer 5.Heat conduction through-hole 5
Number needs to be determined according to heat conduction salient point 2, the arrangement density of signal connecting salient points 3 and heat conduction demand.
Heat dissipating layer 5 is tungsten and molybdenum material, is located among high thermal conductive substrate 6, and connect with heat conduction through-hole.Heat dissipating layer 5 is sprawled
Area needs to be determined according to 6 installation scenarios of high thermal conductive substrate and radiating requirements.Area, arrangement and the place layer of heat dissipating layer 5 connect up
Situation is related.In order to reinforce the heat-sinking capability of device, the space except this layer of wiring region all can serve as heat dissipating layer 5 in principle.
The structural schematic diagram of heat conduction through-hole 4 as shown in Figure 4, can according to actual conditions using single hole, it is porous interconnection and
The porous structures such as discrete, can also adjust thermal vias according to the radiating requirements of the wiring density of high thermal conductive substrate 6 and device
Diameter.Such as, when device power is larger and the wiring density of substrate is not high, can increase in a substrate multiple dedicated for heat conduction
Through-hole, contribute to conduction of the heat from salient point to substrate in this way.
The principle of said program is：
The heat conductivility of au bump is much better than solder bump and other simple substance salient points, can chip efficiently be generated heat
Vertical conduction is to heat conduction through-hole；Heat conduction through-hole 4 and heat dissipating layer 5 connect, and heat passes through 5 horizontal proliferation of heat dissipating layer to entire high heat conduction
Substrate 6；The heat conductivility of high thermal conductive substrate 6 is dedicated heat sink close to traditional devices heat dissipation, and heat will effectively pass through high heat conduction
Substrate 6 diffuses in environment.Above procedure realizes au bump to the heat dissipation channel of high thermal conductive substrate 6.
In conclusion the radiator structure of the present invention, increases the structure for contributing to heat to be connected, uses highly heat-conductive material
Traditional material is substituted, the radiating efficiency of device is considerably increased, it is excessive to external connection radiating device to solve high power device
The problem of dependence, improves the electric heating property and reliability of product.In addition this radiator structure realizes very high material use
Rate realizes good heat dissipation effect in original space, meets the trend requirement that semiconductor packages is light, thin, short, small.
Embodiment 1：
As shown in Figure 1, the sectional view of single heat conduction through-hole structure for the heat sinking channel for ceramic package；In reality
Since the wiring density of high thermal conductive substrate 6 is higher in, the number of heat conduction through-hole 4 in high thermal conductive substrate 6 is limited.In this reality
Applying heat conduction through-hole 4 in example has 1, positioned at 6 center of high thermal conductive substrate and extends vertically through high thermal conductive substrate 6, passes through high thermal conductive substrate 6
Pad is connected with heat conduction salient point 2, and connection can be generated with heat dissipating layer 5 inside substrate 6.
Embodiment 2：
As shown in Fig. 2, the sectional view of multiple heat conduction through-hole interconnection structures for the heat sinking channel for ceramic package；
The wiring density of high thermal conductive substrate 6 equally limits the number of heat conduction through-hole 4 in high thermal conductive substrate 6, but device is to cooling requirements
It is higher, so the heart has made the heat conduction through-hole 4 of multiple interconnection in the devices.Heat conduction through-hole 4 has 3 in the present embodiment, is located at
6 center of high thermal conductive substrate is simultaneously connected with each other, and is connected with heat conduction salient point 2 by 6 pad of high thermal conductive substrate, in high thermal conductive substrate 6
Portion can generate connection with heat dissipating layer.
Embodiment 3：
As shown in figure 3, the sectional view of multiple heat conduction through-hole separate structures for the heat sinking channel for ceramic package；
In practical applications since the wiring density of high thermal conductive substrate 6 is not high, allow to make multiple heat conduction through-holes in high thermal conductive substrate 6
4.Heat conduction through-hole 4 has 3 in the present embodiment, and distribution is positioned at 6 center and peripheral of high thermal conductive substrate and extends vertically through high heat conduction base
Plate 6 is connected by 6 pad of high thermal conductive substrate with heat conduction salient point 2, and connection can be generated with heat dissipating layer inside high thermal conductive substrate 6.
Unspecified part of the present invention belongs to common sense well known to those skilled in the art.
Claims (7)
1. a kind of heat sinking channel for ceramic package, it is characterised in that：Including heat conduction salient point (2), signal connecting salient points
(3), heat conduction through-hole (4), heat dissipating layer (5), high thermal conductive substrate (6)；Heat conduction salient point (2), signal connecting salient points (3) are distributed in chip
(1) surface in chip (1) upside-down mounting to high thermal conductive substrate (6), makes heat conduction salient point (2) pass through the pad on high thermal conductive substrate (6) surface
It is connect with the interior heat conduction through-hole (4) of high thermal conductive substrate (6), the signal pad on signal connecting salient points (3) and high thermal conductive substrate (6) is mutual
Even, heat conduction through-hole (4) extends vertically through high thermal conductive substrate (6), and heat dissipating layer (5) level spreads in high thermal conductive substrate (6) inside, heat conduction
Through-hole (4) is connected in high thermal conductive substrate (6) inside with heat dissipating layer (5).
2. a kind of heat sinking channel for ceramic package according to claim 1, it is characterised in that：The heat conduction is convex
Point (2) is to be produced on the au bump on chip (1) using electroplating technology, and shape is cylindrical or square column type, a diameter of 30~60 μ
m。
3. a kind of heat sinking channel for ceramic package according to claim 1 or 2, it is characterised in that：The letter
Number connecting salient points (3) are to be produced on the au bump on chip (1) using electroplating technology, and shape is cylindrical or square column type, diameter
It is 30~60 μm.
4. a kind of heat sinking channel for ceramic package according to claim 3, it is characterised in that：The height is led
Hot substrate (6) is made of AlN ceramic material.
5. a kind of heat sinking channel for ceramic package according to claim 4, it is characterised in that：The heat conduction is convex
Point (2), signal connecting salient points (3) pass through in ultrasonic thermocompression technique upside-down mounting to high thermal conductive substrate (6).
6. a kind of heat sinking channel for ceramic package according to claim 4 or 5, it is characterised in that：Described
Tungsten and molybdenum material made of the interior filled high-temperature co-firing technology of heat conduction through-hole (4).
7. a kind of heat sinking channel for ceramic package according to claim 6, it is characterised in that：The heat dissipation
Layer (5) is using tungsten and molybdenum material made of high temperature co-firing technique.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810287313.8A CN108711561A (en) | 2018-03-30 | 2018-03-30 | A kind of heat sinking channel for ceramic package |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810287313.8A CN108711561A (en) | 2018-03-30 | 2018-03-30 | A kind of heat sinking channel for ceramic package |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN108711561A true CN108711561A (en) | 2018-10-26 |
Family
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201810287313.8A Pending CN108711561A (en) | 2018-03-30 | 2018-03-30 | A kind of heat sinking channel for ceramic package |
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| Country | Link |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112908860A (en) * | 2021-01-18 | 2021-06-04 | 上海先方半导体有限公司 | High bandwidth memory structure and manufacturing method thereof |
| WO2022041949A1 (en) * | 2020-08-28 | 2022-03-03 | 长鑫存储技术有限公司 | Semiconductor structure |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1885514A (en) * | 2005-06-20 | 2006-12-27 | 南茂科技股份有限公司 | Packaging arrangement of flip chip on thin film |
| US20080277786A1 (en) * | 2007-05-07 | 2008-11-13 | Siliconware Precision Industries Co., Ltd. | Semiconductor package substrate |
| CN206042519U (en) * | 2016-09-20 | 2017-03-22 | 东莞联桥电子有限公司 | Circuit board capable of fast radiating heat |
| CN107768325A (en) * | 2017-09-04 | 2018-03-06 | 北京时代民芯科技有限公司 | A kind of flip chip bonding packaging structure and preparation method thereof |
-
2018
- 2018-03-30 CN CN201810287313.8A patent/CN108711561A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1885514A (en) * | 2005-06-20 | 2006-12-27 | 南茂科技股份有限公司 | Packaging arrangement of flip chip on thin film |
| US20080277786A1 (en) * | 2007-05-07 | 2008-11-13 | Siliconware Precision Industries Co., Ltd. | Semiconductor package substrate |
| CN206042519U (en) * | 2016-09-20 | 2017-03-22 | 东莞联桥电子有限公司 | Circuit board capable of fast radiating heat |
| CN107768325A (en) * | 2017-09-04 | 2018-03-06 | 北京时代民芯科技有限公司 | A kind of flip chip bonding packaging structure and preparation method thereof |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2022041949A1 (en) * | 2020-08-28 | 2022-03-03 | 长鑫存储技术有限公司 | Semiconductor structure |
| CN112908860A (en) * | 2021-01-18 | 2021-06-04 | 上海先方半导体有限公司 | High bandwidth memory structure and manufacturing method thereof |
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Application publication date: 20181026 |