CN108696163B - Modulation method suitable for diode clamping type arbitrary level converter - Google Patents

Modulation method suitable for diode clamping type arbitrary level converter Download PDF

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CN108696163B
CN108696163B CN201810474565.1A CN201810474565A CN108696163B CN 108696163 B CN108696163 B CN 108696163B CN 201810474565 A CN201810474565 A CN 201810474565A CN 108696163 B CN108696163 B CN 108696163B
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CN108696163A (en
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王金平
翟飞
李来保
李劲松
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Hefei Luyang Technology Innovation Group Co.,Ltd.
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Hefei University of Technology
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H02M7/487—Neutral point clamped inverters

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Abstract

The invention discloses a modulation method suitable for a diode-clamped type converter with any level, which relates to the technical field of modulation of a three-phase converter. Compared with the prior art, the invention can ensure that the converter can normally work under the condition of more levels, and compared with the modulation mode of the traditional diode-clamped arbitrary level converter, the invention can effectively reduce the switching loss and ensure the balance of capacitance and voltage within the full modulation degree and power factor range.

Description

Modulation method suitable for diode clamping type arbitrary level converter
Technical Field
The invention relates to the field of converters, in particular to a modulation method of a three-phase converter, and particularly relates to a novel modulation method which is applicable to a diode-clamped arbitrary level converter and can balance capacitor voltage in a full range.
Background
With the progress of power electronics technology, power electronics devices are rapidly developing towards high capacity and low loss. The diode clamped multilevel topology is a topology suitable for high voltage high power applications. The topology has the advantages of lower voltage stress, smaller output voltage distortion, lower system electromagnetic interference and the like, and is widely applied to the fields of new energy power generation, motor driving, electric energy quality and compensation.
In order to make the diode-clamped arbitrary level converter have good output characteristics, the efficient pulse width modulation method should satisfy the following two requirements:
1) the capacitor voltage balancing capability is good;
2) less switching losses to improve the efficiency of the system.
The modulation method suitable for the diode-clamped arbitrary level converter and the corresponding capacitance voltage control method are always the hot problems of research. The Virtual Space Vector Pulse Width Modulation (VSVPWM) method is firstly proposed aiming at the problem of midpoint voltage balance of the midpoint clamping type three-level converter, the method has excellent characteristics on midpoint voltage control of the midpoint clamping type three-level converter, and midpoint voltage in a single switching period can be unchanged within the range of full power factor and full modulation degree. When VSVPMs are extended to four-level or even any level converters, a perfect solution can be obtained, and a plurality of capacitor voltages can be effectively controlled.
Although VSVPMs exhibit excellent performance in balancing capacitor voltage capability, a total of 3N-5 switching events are generated by the three phases within a switching cycle. The switching loss is larger than that of CBPWM and SVPWM, and particularly when the power factor is lower, the instantaneous current corresponding to the voltage intermediate phase is larger, so that the switching loss of VSVPWM is obviously increased at low power factor.
Disclosure of Invention
In order to solve the defects of the prior art, the invention provides a modulation method suitable for a diode clamping type arbitrary level converter, which can keep the voltage of a capacitor unchanged within the range of full power factor and full modulation degree; and only 2N-3 times of switching actions exist in a single switching period, so that the switching loss is remarkably reduced, and the optimal control of the diode clamping type arbitrary level converter is realized.
The invention is realized by the following technical scheme:
the invention provides a modulation method suitable for a diode-clamped arbitrary level converter, which comprises the following steps of:
step S1: collecting capacitor voltage, three-phase output phase current and three-phase output phase voltage at the direct current side of the diode-clamped arbitrary level converter, and sequencing the three-phase output phase voltage to obtain the maximum value of the three-phase voltage, the minimum value of the three-phase voltage and the middle value of the three-phase voltage;
step S2: calculating three-phase duty ratios of the diode-clamped arbitrary level converter in different switching modes;
step S3: setting a three-phase duty ratio constraint condition, and selecting a proper switching mode on the basis of the set constraint condition and the realization of the minimum switching loss;
step S4: generating a modulation wave of each level of each phase according to the duty ratio of each level of each phase in the switching mode finally selected in step S3;
step S5: and comparing the modulation wave of each level of each phase with a single carrier to obtain a plurality of PWM sequences, and adding the plurality of PWM sequences of the same phase to obtain the whole PWM sequence of the phase, thereby realizing the modulation of the diode-clamped arbitrary level converter.
Preferably, the first and second electrodes are formed of a metal,
in step S1, the collected capacitor voltage at the dc side of the diode-clamped arbitrary-level converter is sequentially recorded as: voltage u of the 1 st capacitorC1,., the kth capacitor voltage uCk,., N-1 th capacitor voltage uCN-1K is 1,2, …, N-1; the three-phase output phase current is ia、ib、icThe three-phase output phase voltages are respectively ua、 ub、ucAnd sorting the three-phase output voltages to obtain a maximum voltage umax＝max(uA，uB，uC) Minimum voltage umin＝min(uA，uB，uC) Intermediate voltage umid＝mid(uA，uB，uC)；
In step S2, the diode-clamped arbitrary-level converter has six switching modes, and the method for calculating the three-phase duty ratios in the six switching modes includes:
mode 1: when the voltage maximum phase has no switching action, the voltage maximum phase is clamped to the N-1 level; the voltage intermediate phase has N-1 times of switching actions and passes through all levels; the minimum voltage phase has N-2 switching actions and consists of a 0 level, … and an N-2 level, and the three-phase duty ratio model calculation method under the mode 1 is as follows:
Figure BDA0001664133820000031
Figure BDA0001664133820000032
dmin,N-1＝0
Figure BDA0001664133820000033
Figure BDA0001664133820000034
Figure BDA0001664133820000035
dmax,N-1＝1,dmax,N-2＝...＝dmax,1＝0,dmax,0＝0
K＝-imid/imin
in the formula (d)kn(k ═ max, min, mid; N ═ 0,1.. N-1) denotes umaxPhase umidPhase sum uminDuty cycle of the 0,1.. N-1 level of the phase;
mode 2: when the voltage maximum phase has no switching action, the voltage maximum phase is clamped to the N-1 level; the voltage intermediate phase has N-2 switching actions, the output consists of 1 level, the output consists of N-1 levels, the voltage minimum phase has N-1 switching actions, all levels are covered, and the three-phase duty ratio model calculation method under the mode 2 is as follows:
Figure BDA0001664133820000041
Figure BDA0001664133820000042
Figure BDA0001664133820000043
dmid,0＝0
Figure BDA0001664133820000044
Figure BDA0001664133820000045
dmax,0＝0,dmax,N-2＝…＝dmax,1＝0,dmax,N-1＝1
K＝-imid/imin
mode 3: when the voltage maximum phase has no switching action, the voltage maximum phase is clamped to the N-1 level; the voltage intermediate phase has N-2 switching actions, the output consists of 0, a, N-2 levels, the voltage minimum phase has N-1 switching actions, all levels are covered, and the three-phase duty ratio model calculation method under the mode 3 is as follows:
Figure BDA0001664133820000046
Figure BDA00016641338200000410
Figure BDA0001664133820000047
Figure BDA0001664133820000048
Figure BDA0001664133820000049
dmid,N-1＝0
dmax,0＝0
dmax,N-2＝...＝dmax,1＝0
dmax,N-1＝1
K＝-imid/imin
mode 4: when the voltage minimum phase has no switching action, the voltage minimum phase is clamped to 0 level; the voltage intermediate phase has N-2 switching actions and consists of 1 level, a, N-1 level; the maximum voltage phase has N-1 switching actions, and the three-phase duty ratio model calculation method under the mode 4 is as follows:
dmin,0＝1,dmin,N-2＝…＝dmin,1＝0,dmin,N-1＝0
dmid,0＝0
Figure BDA0001664133820000051
Figure BDA0001664133820000052
Figure BDA00016641338200000510
Figure BDA0001664133820000053
Figure BDA0001664133820000054
K＝-imid/imax
mode 5: when the voltage minimum phase has no switching action, the voltage minimum phase is clamped to 0 level; the voltage intermediate phase has N-2 switching actions and consists of a 0 level, a. The maximum voltage phase has N-1 switching actions, and the three-phase duty ratio model calculation method under the mode 5 is as follows:
dmin,0＝1
dmin,N-2＝…＝Dmin,1＝0
dmin,N-1＝0
Figure BDA0001664133820000059
Figure BDA0001664133820000055
dmid,N-1＝0
Figure BDA0001664133820000056
Figure BDA0001664133820000057
Figure BDA0001664133820000058
K＝-imid/imax
mode 6: the minimum voltage phase has no switching action and is clamped to 0 level, the voltage intermediate phase has N-1 switching actions, and after all levels, the maximum voltage phase has N-2 switching actions and consists of 1 level, … and N-1 levels, and the three-phase duty ratio model calculation method under the mode 6 is as follows:
dmin,0＝1
dmin,N-2＝…＝dmin,1＝0
dmin,N-1＝0
Figure BDA0001664133820000061
Figure BDA0001664133820000062
Figure BDA0001664133820000063
dmax,0＝0
Figure BDA0001664133820000064
Figure BDA0001664133820000065
K＝-imid/imax
in step S3, the three-phase duty ratio constraint condition is satisfied:
0＜dkn＜1
the method for selecting the proper switching mode by taking the set constraint condition and the implementation minimum switching loss as the criteria comprises the following steps:
step S301: selecting a certain mode meeting set constraint conditions as an optimization alternative mode;
step S302: respectively calculating the total three-phase switching loss P of each mode under different power factor anglesSLAnd the switching loss of each phase is related to the phase current and the switching times, i.e.:
Figure BDA0001664133820000066
wherein f iskThe switching times of k phases in a single switching period;
step S303: selecting total switching losses P of three phasesSLThe smallest optimized alternative mode is the final switching mode.
In step S4, the modulated wave of each phase at each level is:
Figure BDA0001664133820000071
the invention has the beneficial effects that:
1. aiming at the modulation problem of a diode-clamped arbitrary level converter, the invention calculates the duty ratio of each level of three phases obtained in various modes, and determines the final switching mode by taking the minimum switching loss as the target on the premise of meeting the constraint condition of the three-phase duty ratio. Therefore, the switching loss of a system is effectively reduced, the operating efficiency of the converter is improved, and the capacitor voltage balance in a switching period is realized in the full power factor and full modulation range, so that the optimal control of the diode-clamped arbitrary level converter is realized.
2. The invention can inhibit the low-frequency oscillation of the capacitor voltage, and compared with the traditional VSVPWM, the invention has the modulation method of only 2N-3 switching actions in a single switching period, thereby reducing the switching times and the switching loss.
3. The invention does not need to add any peripheral equipment, has low system cost and simple control method and is easy to realize.
Drawings
FIG. 1 is a flow chart of a modulation method of a diode-clamped arbitrary level converter according to the present invention
FIG. 2 illustrates a single carrier wave and multiple modulation wave comparison method for implementing the modulation method of the present invention;
FIG. 3 is a graph of switching losses for the modulation method and VSVPMs of the present invention at different power factors and modulation levels;
fig. 4(a) is an experimental result of the modulation method of the present invention at m 0.3 and phi pi/12;
fig. 4(b) is an experimental result of the modulation method of the present invention at m 0.3 and phi 5 pi/12;
fig. 4(c) shows the experimental results of the modulation method of the present invention at m 0.9 and phi pi/12;
FIG. 4(d) is the experimental results of the modulation method of the present invention at m 0.9 and φ 5 π/12;
Detailed Description
In order to make the technical means, the creation characteristics, the achievement purposes and the effects of the invention easy to understand, the invention is further explained below by combining the specific drawings.
Example 1
As shown in fig. 1, the discontinuous pulse width modulation method for a diode-clamped arbitrary level converter according to the present invention is a flowchart, which detects output phase voltages and phase currents of a three-level converter in real time, and determines a magnitude relationship of three-phase output voltages, and first calculates duty ratios of respective phases 0,1, and 2 levels in six modes, and further selects a suitable mode according to a three-phase duty ratio constraint condition and a criterion of realizing minimum switching loss, and finally obtains a switching sequence of the three-level converter by comparing a single carrier with a multi-modulation wave, so as to realize modulation of the arbitrary level converter, specifically, the method comprises the following steps:
step S1: collecting the 1 st capacitor voltage u at the DC side of the diode-clamped arbitrary level converterC1,., the kth capacitor voltage uCk,., N-1 th capacitor voltage uCN-1K is 1,2, …, N-1; the three-phase output phase current is ia、ib、icThe three-phase output phase voltages are respectively ua、ub、ucAnd sorting the three-phase output voltage to obtain a maximum voltage umax＝max(uA，uB，uC) Minimum voltage umin＝min(uA， uB，uC) Intermediate voltage umid＝mid(uA，uB，uC)；
Step S2: calculating three-phase duty ratios of the diode-clamped arbitrary level converter in six switching modes, including;
mode 1: when the voltage maximum phase has no switching action and is clamped to the N-1 level, the voltage intermediate phase has N-1 times of switching actions and goes through all levels; the minimum voltage phase has N-2 switching actions and consists of a 0 level, … and an N-2 level, and the three-phase duty ratio model calculation method under the mode 1 is as follows:
Figure BDA0001664133820000091
Figure BDA0001664133820000092
dmin,N-1＝0
Figure BDA0001664133820000093
Figure BDA0001664133820000094
Figure BDA0001664133820000095
dmax,N-1＝1,dmax,N-2＝...＝dmax,1＝0,dmax,0＝0
K＝-imid/imin
in the formula (d)kn(k ═ max, min, mid; N ═ 0,1.. N-1) denotes umaxPhase umidPhase sum uminDuty cycle of the 0,1.. N-1 level of the phase;
mode 2: when the voltage maximum phase has no switching action, the voltage maximum phase is clamped to the N-1 level; the voltage intermediate phase has N-2 switching actions, the output consists of 1 level, the output consists of N-1 levels, the voltage minimum phase has N-1 switching actions, all levels are covered, and the three-phase duty ratio model calculation method under the mode 2 is as follows:
Figure BDA0001664133820000096
Figure BDA0001664133820000097
Figure BDA0001664133820000098
dmid,0＝0
Figure BDA0001664133820000099
Figure BDA00016641338200000910
dmax,0＝0,dmax,N-2＝…＝dmax,1＝0,dmax,N-1＝1
K＝-imid/imin
mode 3: when the voltage maximum phase has no switching action, the voltage maximum phase is clamped to the N-1 level; the voltage intermediate phase has N-2 switching actions, the output consists of 0, a, N-2 levels, the voltage minimum phase has N-1 switching actions, all levels are covered, and the three-phase duty ratio model calculation method under the mode 3 is as follows:
Figure BDA0001664133820000101
Figure BDA0001664133820000102
Figure BDA0001664133820000103
Figure BDA0001664133820000104
Figure BDA0001664133820000105
dmid,N-1＝0
dmax,0＝0
dmax,N-2＝...＝dmax,1＝0
dmax,N-1＝1
K＝-imid/imin
mode 4: when the voltage minimum phase has no switching action, the voltage minimum phase is clamped to 0 level; the voltage intermediate phase has N-2 switching actions and consists of 1 level, a, N-1 level; the maximum voltage phase has N-1 switching actions, and the three-phase duty ratio model calculation method under the mode 4 is as follows:
dmin,0＝1,dmin,N-2＝…＝dmin,1＝0,dmin,N-1＝0
dmid,0＝0
Figure BDA0001664133820000106
Figure BDA0001664133820000107
Figure BDA0001664133820000108
Figure BDA0001664133820000109
Figure BDA00016641338200001010
K＝-imid/imax
mode 5: when the voltage minimum phase has no switching action, the voltage minimum phase is clamped to 0 level; the voltage intermediate phase has N-2 switching actions and consists of a 0 level, a. The maximum voltage phase has N-1 switching actions, and the three-phase duty ratio model calculation method under the mode 5 is as follows:
dmin,0＝1
dmin,N-2＝…＝Dmin,1＝0
dmin,N-1＝0
Figure BDA0001664133820000111
Figure BDA0001664133820000112
dmid，N-1＝0
Figure BDA0001664133820000114
Figure BDA0001664133820000115
Figure BDA0001664133820000116
K＝-imid/imax
mode 6: the minimum voltage phase has no switching action and is clamped to 0 level, the voltage intermediate phase has N-1 switching actions, and after all levels, the maximum voltage phase has N-2 switching actions and consists of 1 level, … and N-1 levels, and the three-phase duty ratio model calculation method under the mode 6 is as follows:
dmin,0＝1
dmin,N-2＝…＝dmin,1＝0
dmin,N-1＝0
Figure BDA0001664133820000117
Figure BDA0001664133820000118
Figure BDA0001664133820000119
dmax,0＝0
Figure BDA00016641338200001110
Figure BDA00016641338200001111
K＝-imid/imax
step S3: selecting a proper mode according to a three-phase duty ratio constraint condition and a criterion of realizing minimum switching loss, wherein the selection mode comprises the following steps:
step S301: selecting a certain mode satisfying the constraint condition of the following formula as an optimization alternative mode:
0＜dkn＜1
step S302: respectively calculating the switching loss of each mode under different power factor angles and the total switching loss P of three phasesSLIs the sum of the switching losses of each phase, and the switching losses of each phase are related to the phase current and the switching times, i.e.:
Figure BDA0001664133820000121
wherein f iskThe switching times of k phases in a single switching period;
step S303: selecting total switching losses P of three phasesSLThe smallest optimized alternative mode is the final switching mode.
Step S4: generating a modulated wave of each phase at each level according to the duty ratio of each phase at each level in the switching mode finally selected in step S3:
the invention adopts a mode of comparing a single carrier wave with multiple modulation waves, a mode of realizing a PWM sequence of a modulation method of a diode-clamped arbitrary level converter is shown in figure 2, and the multiple modulation waves are easily obtained according to a geometrical relationship by combining the duty ratio of each level of each phase of the mode selected in the step S3:
Figure BDA0001664133820000122
step S5: and comparing the modulated wave of each level of each phase with a single carrier to obtain a plurality of PWM sequences, and adding the plurality of PWM sequences of the same phase to obtain the whole PWM sequence of the phase.
In order to verify the effect of the modulation method of the present invention, in this embodiment, the switching losses of the two conventional modulation methods, i.e. the modulation method of the present invention and the vsvpm, are calculated in one fundamental wave period, as shown in fig. 3, it can be seen that, when the power factor is high, the switching loss of the vsvpm is close to the switching loss of the modulation strategy proposed by the present invention; and when the power factor is lower, the VSVPWM switching loss is obviously larger than the modulation strategy switching loss provided by the invention.
And finally, generating a switching sequence of the diode-clamped arbitrary level converter according to the selected mode, and realizing modulation of the diode-clamped arbitrary level converter.
Taking three levels as an example, the modulation method of the present invention is verified by performing experiments on (a) m is 0.3, phi is pi/12, (b) m is 0.3, phi is 5 pi/12, (c) m is 0.9, phi is pi/12, (d) m is 0.9, and phi is 5 pi/12. u. ofABThe line voltage waveform obtained by the present invention. As can be seen from fig. 4, the phase voltage of the modulation method proposed by the present invention is clamped in some regions, there are two switching operations in some regions, there are only one switching operation in some regions, and the two switching operation regions and the clamped region are approximately equal in one fundamental period, so that each phase switching operation is performed as one time in each switching period, and three switching operations occur in total. Compared with VSVPWM, the switching action frequency and the switching loss can be effectively reduced.
The above-mentioned embodiments only express several embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the present invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.

Claims (4)

1. A modulation method suitable for a diode-clamped arbitrary level converter is characterized by comprising the following steps of:
step S1: collecting capacitor voltage, three-phase output phase current and three-phase output phase voltage at the direct current side of the diode-clamped arbitrary level converter, and sequencing the three-phase output phase voltage to obtain the maximum value of the three-phase voltage, the minimum value of the three-phase voltage and the middle value of the three-phase voltage; wherein, the three-phase output phase current is ia、ib、icThe three-phase output phase voltages are respectively uA，uB，uCAnd sorting the three-phase output voltages to obtain a maximum voltage umax＝max(uA，uB，uC) Minimum voltage umin＝min(uA，uB，uC) Intermediate voltage umid＝mid(uA，uB，uC)；
Step S2: the method for calculating the three-phase duty ratio of the diode-clamped arbitrary level converter under different switching modes comprises the following steps:
mode 1: when the voltage maximum phase has no switching action and is clamped to the N-1 level, the voltage intermediate phase has N-1 times of switching actions and goes through all levels; the minimum voltage phase has N-2 switching actions and consists of a 0 level, … and an N-2 level, and the three-phase duty ratio model calculation method under the mode 1 is as follows:
Figure FDA0002357443070000011
Figure FDA0002357443070000012
dmin,N-1＝0
Figure FDA0002357443070000013
Figure FDA0002357443070000014
Figure FDA0002357443070000015
dmax,N-1＝1,dmax,N-2＝...＝dmax,1＝0,dmax,0＝0
K＝-imid/imin
in the formula (d)knRepresents umaxPhase umidPhase sum uminDuty cycle of the 0,1.. N-1 level of the phase, k ═ max, min, mid; n-1, 0,1.. N;
mode 2: when the voltage maximum phase has no switching action, the voltage maximum phase is clamped to the N-1 level; the voltage intermediate phase has N-2 switching actions, the output consists of 1 level, the output is composed of N-1 levels, the voltage minimum phase has N-1 switching actions, and all levels are covered; the three-phase duty cycle model calculation method in the mode 2 is as follows:
Figure FDA0002357443070000021
Figure FDA0002357443070000022
Figure FDA0002357443070000023
dmid,0＝0
Figure FDA0002357443070000024
Figure FDA0002357443070000025
dmax,0＝0,dmax,N-2＝…＝dmax,1＝0,dmax,N-1＝1
K＝-imid/imin
mode 3: when the voltage maximum phase has no switching action, the voltage maximum phase is clamped to the N-1 level; the voltage intermediate phase has N-2 switching actions, the output consists of 0,1, N-2 levels, and the voltage minimum phase has N-1 switching actions and passes through all levels; the three-phase duty cycle model calculation method in mode 3 is as follows:
Figure FDA0002357443070000031
Figure FDA0002357443070000032
Figure FDA0002357443070000033
Figure FDA0002357443070000034
Figure FDA0002357443070000035
dmid,N-1＝0
dmax,0＝0
dmax,N-2＝...＝dmax,1＝0
dmax,N-1＝1
K＝-imid/imin
mode 4: when the voltage minimum phase has no switching action, the voltage minimum phase is clamped to 0 level; the voltage intermediate phase has N-2 switching actions and consists of 1 level, a, N-1 level; the maximum voltage phase has N-1 times of switching action and passes through all levels;
the three-phase duty ratio model calculation method in the mode 4 is as follows:
dmin,0＝1,dmin,N-2＝…＝dmin,1＝0,dmin,N-1＝0
dmid,0＝0
Figure FDA0002357443070000036
Figure FDA0002357443070000037
Figure FDA0002357443070000038
Figure FDA0002357443070000039
Figure FDA00023574430700000310
K＝-imid/imax
mode 5: when the voltage minimum phase has no switching action, the voltage minimum phase is clamped to 0 level; the voltage intermediate phase has N-2 switching actions and consists of a 0 level, a. The maximum voltage phase has N-1 times of switching action and passes through all levels; the three-phase duty cycle model calculation method in mode 5 is as follows:
dmin,0＝1
dmin,N-2＝…＝Dmin,1＝0
dmin,N-1＝0
Figure FDA0002357443070000041
Figure FDA0002357443070000042
dmid,N-1＝0
Figure FDA0002357443070000043
Figure FDA0002357443070000044
Figure FDA0002357443070000045
K＝-imid/imax
mode 6: the minimum voltage phase has no switching action and is clamped to 0 level, the voltage intermediate phase has N-1 switching actions, and the maximum voltage phase has N-2 switching actions and consists of 1 level, … and N-1 levels after all levels are passed; the three-phase duty cycle model calculation method in mode 6 is as follows:
dmin,0＝1
dmin,N-2＝…＝dmin,1＝0
dmin,N-1＝0
Figure FDA0002357443070000051
Figure FDA0002357443070000052
Figure FDA0002357443070000053
dmax,0＝0
Figure FDA0002357443070000054
Figure FDA0002357443070000055
K＝-imid/imax，
wherein imidRepresents the intermediate current, imaxRepresents the maximum current;
step S3: setting a three-phase duty ratio constraint condition, and selecting a mode with the minimum total switching loss of three phases as a final switching mode according to the set constraint condition and the criterion of realizing the minimum switching loss;
step S4: generating a modulation wave of each level of each phase according to the duty ratio of each level of each phase in the switching mode finally selected in step S3;
step S5: and comparing the modulation wave of each level of each phase with a single carrier to obtain a plurality of PWM sequences, and adding the plurality of PWM sequences of the same phase to obtain the whole PWM sequence of the phase, thereby realizing the modulation of the diode-clamped arbitrary level converter.
2. The modulation method according to claim 1, wherein in step S3, the method for selecting the mode with the minimum total switching loss of three phases as the final switching mode based on the set constraint and the minimum switching loss is as follows:
step S301: selecting a certain mode meeting set constraint conditions as an optimization alternative mode;
step S302: respectively calculating the total three-phase switching loss P of each mode under different power factor anglesSLAnd the switching loss of each phase is related to the phase current and the switching times, i.e.:
Figure FDA0002357443070000061
wherein f iskThe switching times of k phases in a single switching period;
step S303: selecting total switching losses P of three phasesSLThe smallest optimized alternative mode is the final switching mode.
3. The modulation method of the diode-clamped arbitrary level converter according to claim 2, wherein the three-phase duty ratio constraint condition is satisfied:
0＜dkn＜1。
4. the modulation method according to claim 3, wherein in step S4, the modulation wave of each level of each phase is:
Figure FDA0002357443070000062
wherein, UdcRepresenting the dc bus voltage.
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