CN108695231A - The preparation method of super thick soi wafer oxide layer - Google Patents
The preparation method of super thick soi wafer oxide layer Download PDFInfo
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- CN108695231A CN108695231A CN201710225958.4A CN201710225958A CN108695231A CN 108695231 A CN108695231 A CN 108695231A CN 201710225958 A CN201710225958 A CN 201710225958A CN 108695231 A CN108695231 A CN 108695231A
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- oxide layer
- oxidation
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- preparation
- silicon
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
Abstract
A kind of preparation method of super thick soi wafer oxide layer, including oxidation step, bonding steps, annealing steps, remove silicon layer step, in the oxidation step, the bonding steps, are integrally formed superposition step except silicon layer step at annealing steps, the superposition step carries out after the completion of oxidation step, the implementation number of the superposition step is at least once that the bonded silica piece quantity aoxidized in the oxidation step is equal with the superposition implementation number of step.Advantage is:By multiple bonding thicken in the way of, reduce oxidization time, production efficiency greatly improved.Meanwhile the heating process time is being reduced, the defect of substrate is less, can preferably integrate other oxidation technologies, reduces oxidation production type, reduces oxidation technology complexity and promotes the product quality of silicon oxide film to improve oxidation technology quality.
Description
Technical field
Chemical vapor motor field in being prepared the present invention relates to semiconductor, especially a kind of super thick soi wafer oxide layer
Preparation method.
Background technology
Present optical communication field is required at 4 microns or more, part of devices very to device to the thickness of silicon oxide film
It needs to prepare using the oxide film silicon chip of 16um.Super thick oxidation film is directly grown, no matter to oxidation technology technology, or to oxygen
Change equipment, is all a greatly challenge.Demand of the IC industries to silicon oxide film, generally based on 3um or less.General heat
Oxide thickness is between 300nm-1.5um.If necessary to grow the silicon oxide film of 4um, need in 1150 degree of oxidation boiler tube,
Grow 46 hours.It if necessary to grow the silicon oxide film of 20um, theoretically needs in 1150 degree again of oxidation boiler tube, grows
170 hours.This, no matter for oxidation furnaces or the silicon chip aoxidized, is all an extremely serious test.Certain special
Situation, such as heavily doped or high resistant piece are very easy to that defect is made to assemble, lead to fragment if overlong time in the high temperature environment
Or product rejection, it cannot be satisfied demand of the SOI products to silicon oxide layer.Oxidation furnace hardware, in the state of long-term 1150 degree of high temperature
Under, also it is susceptible to very much failure.The maintenance period and service life that equipment can greatly be shortened are brought prodigious negative to enterprise
Load.
Invention content
The purpose of the present invention is to solve the above problems, devise a kind of preparation method of super thick soi wafer oxide layer.
Specifically design scheme is:
A kind of preparation method of super thick soi wafer oxide layer, including oxidation step, bonding steps, annealing steps, remove silicon layer
Silicon substrate, bonding silicon chip in the oxidation step, are carried out oxidation and form oxide layer, in the bonding steps, will served as a contrast by step
Bottom silicon chip and the opposite fitting of the oxide layer for being bonded silicon chip form bonding oxide layer, it is described except in silicon layer step, make bonding silicon chip with
It is bonded oxide layer to be detached from, the bonding steps, are integrally formed superposition step, the superposition step except silicon layer step at annealing steps
It is carried out after the completion of oxidation step, the implementation number of the superposition step is the key aoxidized in the oxidation step at least once
It is equal with the superposition implementation number of step to close silicon chip quantity.
The silicon substrate, bonding silicon chip generate oxygen in the oxidation step by PECVD, LPCVD high-temperature thermal oxidation
Change layer, the thickness of the oxide layer is 0.3 μm -4 μm.
In the annealing steps, annealing temperature is 300 DEG C -1250 DEG C.
Described to remove in silicon layer step, bonding silicon chip includes grinding and polishing, burn into plasma quarter with the method for being bonded oxide layer disengaging
Erosion after being bonded silicon chip and being bonded oxide layer disengaging, needs the defect for removing the bonding oxidation layer surface.
In the oxidation step, oxidation reaction formula is:
Si+O2=SiO2。
In the bonding steps, bonding reaction formula is:
Si-OH+HO-Si→Si-O-Si+H2O。
It when Wafer Cleaning, is cleaned using hydrogen peroxide, HF, reaction equation is when cleaning:
Si+H2O2→SiO2+H2O;
SiO2+6HF→H2+SiF6+2H2O
The preparation method for the super thick soi wafer oxide layer that above-mentioned technical proposal through the invention obtains, advantage
It is:
By multiple bonding thicken in the way of, reduce oxidization time, production efficiency greatly improved.Meanwhile it reducing
In the case of the heating process time, the defect of substrate is less.
Other oxidation technologies can be preferably integrated, oxidation production type is reduced, oxidation technology complexity is reduced, to carry
High oxidation processing quality promotes the product quality of silicon oxide film.
Description of the drawings
Fig. 1 is the process flow chart of the preparation method of super thick soi wafer oxide layer of the present invention;In figure, 1, substrate silicon
Piece;2, it is bonded silicon chip;3, oxide layer;4, it is bonded oxide layer.
Specific implementation mode
The present invention is specifically described below in conjunction with the accompanying drawings.
A kind of preparation method of super thick soi wafer oxide layer, including oxidation step, bonding steps, annealing steps, remove silicon layer
Silicon substrate, bonding silicon chip in the oxidation step, are carried out oxidation and form oxide layer, in the bonding steps, will served as a contrast by step
Bottom silicon chip and the opposite fitting of the oxide layer for being bonded silicon chip form bonding oxide layer, it is described except in silicon layer step, make bonding silicon chip with
It is bonded oxide layer to be detached from, the bonding steps, are integrally formed superposition step, the superposition step except silicon layer step at annealing steps
It is carried out after the completion of oxidation step, the implementation number of the superposition step is the key aoxidized in the oxidation step at least once
It is equal with the superposition implementation number of step to close silicon chip quantity.
The silicon substrate, bonding silicon chip generate oxygen in the oxidation step by PECVD, LPCVD high-temperature thermal oxidation
Change layer, the thickness of the oxide layer is 0.3 μm -4 μm.
In the annealing steps, annealing temperature is 300 DEG C -1250 DEG C.
Described to remove in silicon layer step, bonding silicon chip includes grinding and polishing, burn into plasma quarter with the method for being bonded oxide layer disengaging
Erosion after being bonded silicon chip and being bonded oxide layer disengaging, needs the defect for removing the bonding oxidation layer surface.
In the oxidation step, oxidation reaction formula is:
Si+O2=SiO2。
In the bonding steps, bonding reaction formula is:
Si-OH+HO-Si→Si-O-Si+H2O。
It when Wafer Cleaning, is cleaned using hydrogen peroxide, HF, reaction equation is when cleaning:
Si+H2O2→SiO2+H2O;
SiO2+6HF→H2+SiF6+2H2O。
Embodiment 1
Prepare the soi wafer that thickness is 15 μm:
Step 1 carries out oxidation technology to silicon chip;One of silicon substrate 1 is oxidized to 4 μm, two bonding oxidations of silicon chips 2
To 4 μm, a bonding silicon chip 2 is oxidized to 2 μm;
Silicon substrate 1 in step 1 is carried out being bonded work by step 2 with the two panels oxide layer 3 that 3 thickness of oxide layer is 4 μm
Skill;
Step 3, to the bonding pad in step 2, carry out annealing process;Annealing temperature is 300-1200 degree;
Step 4, to the bonding pad in step 3, top layer silicon is removed by grinding and polishing, goes 3 surface defect of removing oxide layer together;
Step 5 aoxidizes piece to the bonding in step 4, and being 4 μm with another 3 thickness of oxide layer is bonded silicon chip 2, repeats
Step 3, step 4;
Step 6 aoxidizes piece to the bonding in step 5, takes the bonding silicon chip 2 that 3 thickness of last a piece of oxide layer is 2 μm, weight
Multiple step 3, step 4;
Step 7 goes 3 surface defect of removing oxide layer by etching mode to the bonding oxidation piece in step 6, and makes its thickness
Degree is reduced to 15 μm.
Embodiment 2
Prepare the soi wafer that thickness is 15 μm:
Step 1 carries out oxidation technology to silicon chip;One of silicon substrate 1 is oxidized to 2 μm, bonding silicon chip 2 and aoxidizes
To 7 μm;
Silicon substrate 1 in step 1 is bonded the progress bonding technology of silicon chip 2 by step 2 with one;
Step 3, to the bonding pad in step 2, carry out annealing process;Annealing temperature is 300-1200 degree;
Top layer silicon is removed by overlooking to the bonding pad in step 3,3 surface of removing oxide layer is gone to lack together by step 4
It falls into;
Step 5 aoxidizes piece to the bonding in step 4, is bonded silicon chip 2 with other, is repeated in step 3, step 4;
Step 6 aoxidizes piece to the bonding in step 5, goes 3 surface defect of removing oxide layer, and its thickness is made to be reduced to 15 μm;
Step 7 goes 3 surface defect of removing oxide layer to the bonding oxidation piece in step 6 by plasma etching mode, and
Its thickness is set to be reduced to 15 μm.
Embodiment 3
Embodiment 2 is repeated, it is 0.3 μm that silicon substrate in step 11, which is generated oxidated layer thickness control, and is changed to use 52
Piece is bonded silicon chip 2, and each oxidated layer thickness for being bonded silicon chip 2 is 0.3 μm.
Embodiment 1 compared with Example 3, uses the less superposition step, but consumes longer oxidization time.
Embodiment 2 compared with Example 3, total oxide thickness than actual needs oxide thickness it is 1 μm big, embodiment 3 it is total
Oxide thickness needs thickness 0.9 μm big than reagent, when carrying out defect repair to 3 surface of oxide layer, can lose a part of thickness.
Above-mentioned technical proposal only embodies the optimal technical scheme of technical solution of the present invention, those skilled in the art
The principle of the present invention is embodied to some variations that some of which part may be made, belongs to the scope of protection of the present invention it
It is interior.
Claims (7)
1. a kind of preparation method of super thick soi wafer oxide layer, including oxidation step, bonding steps, annealing steps, walk except silicon layer
Suddenly, in the oxidation step, silicon substrate, bonding silicon chip is subjected to oxidation and form oxide layer, in the bonding steps, by substrate
Silicon chip fitting opposite with the oxide layer for being bonded silicon chip forms bonding oxide layer, described to remove in silicon layer step, makes bonding silicon chip and key
It closes oxide layer to be detached from, which is characterized in that the bonding steps, annealing steps are integrally formed superposition step except silicon layer step, described
Superposition step carries out after the completion of oxidation step, and the implementation number of the superposition step is at least once, in the oxidation step
The bonded silica piece quantity of oxidation is equal with the superposition implementation number of step.
2. according to the preparation method of the super thick soi wafer oxide layer described in claim 1, which is characterized in that the substrate silicon
Piece, bonding silicon chip generate oxide layer, the thickness of the oxide layer in the oxidation step by PECVD, LPCVD high-temperature thermal oxidation
Degree is 0.3 μm -4 μm.
3. according to the preparation method of the super thick soi wafer oxide layer described in claim 1, which is characterized in that the annealing step
In rapid, annealing temperature is 300 DEG C -1250 DEG C.
4. according to the preparation method of the super thick soi wafer oxide layer described in claim 1, which is characterized in that described to remove silicon layer
In step, bonding silicon chip includes grinding and polishing, burn into plasma etching with the method for being bonded oxide layer disengaging, is bonded silicon chip and is bonded
After oxide layer is detached from, the defect for removing the bonding oxidation layer surface is needed.
5. according to the preparation method of the super thick soi wafer oxide layer described in claim 1, which is characterized in that the oxidation step
In rapid, oxidation reaction formula is:
Si+O2=SiO2。
6. according to the preparation method of the super thick soi wafer oxide layer described in claim 1, which is characterized in that the bonding step
In rapid, bonding reaction formula is:
Si-OH+HO-Si→Si-O-Si+H2O。
7. according to the preparation method of the super thick soi wafer oxide layer described in claim 1, which is characterized in that when Wafer Cleaning,
It is cleaned using hydrogen peroxide, HF, reaction equation is when cleaning:
Si+H2O2→SiO2+H2O;
SiO2+6HF→H2+SiF6+2H2O。
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1132408A (en) * | 1995-12-12 | 1996-10-02 | 吉林大学 | Thin silicon chip material on diamond film and its prepn. |
| CN101101891A (en) * | 2006-07-07 | 2008-01-09 | 上海新傲科技有限公司 | Silicon of insulator and its making technology |
| CN102148183A (en) * | 2011-03-10 | 2011-08-10 | 上海宏力半导体制造有限公司 | Method for forming SOI (Silicon On Insulator) with stepped buried oxide layer |
| CN104925749B (en) * | 2015-04-17 | 2017-01-25 | 上海华虹宏力半导体制造有限公司 | Silicon wafer bonding method |
| CN106409649A (en) * | 2015-07-30 | 2017-02-15 | 沈阳硅基科技有限公司 | Multilayer SOI material and preparation method thereof |
-
2017
- 2017-04-08 CN CN201710225958.4A patent/CN108695231A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1132408A (en) * | 1995-12-12 | 1996-10-02 | 吉林大学 | Thin silicon chip material on diamond film and its prepn. |
| CN101101891A (en) * | 2006-07-07 | 2008-01-09 | 上海新傲科技有限公司 | Silicon of insulator and its making technology |
| CN102148183A (en) * | 2011-03-10 | 2011-08-10 | 上海宏力半导体制造有限公司 | Method for forming SOI (Silicon On Insulator) with stepped buried oxide layer |
| CN104925749B (en) * | 2015-04-17 | 2017-01-25 | 上海华虹宏力半导体制造有限公司 | Silicon wafer bonding method |
| CN106409649A (en) * | 2015-07-30 | 2017-02-15 | 沈阳硅基科技有限公司 | Multilayer SOI material and preparation method thereof |
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