CN108667432A - A kind of high efficiency high linearity envelop modulator - Google Patents
A kind of high efficiency high linearity envelop modulator Download PDFInfo
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- CN108667432A CN108667432A CN201810541124.9A CN201810541124A CN108667432A CN 108667432 A CN108667432 A CN 108667432A CN 201810541124 A CN201810541124 A CN 201810541124A CN 108667432 A CN108667432 A CN 108667432A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/32—Modifications of amplifiers to reduce non-linear distortion
- H03F1/3211—Modifications of amplifiers to reduce non-linear distortion in differential amplifiers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/56—Modifications of input or output impedances, not otherwise provided for
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
- H03F3/211—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only using a combination of several amplifiers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
- H03F3/45179—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/45—Indexing scheme relating to differential amplifiers
- H03F2203/45031—Indexing scheme relating to differential amplifiers the differential amplifier amplifying transistors are compositions of multiple transistors
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Abstract
The invention discloses a kind of high efficiency high linearity envelop modulators, including sequentially connected envelope shaping unit, bias voltage tracking unit, linear amplifier stage, electric current sensing unit, hysteresis comparator, switch drive unit and switching amplifying stages.Envelope shaping unit is input to linear amplifier stage and bias voltage tracking unit after carrying out direct current displacement and peak clipping processing to input envelope.Bias voltage tracking unit exports positive shift voltage after the grid voltage of the AB class output nmos transistors of linear amplifier stage is fed back to envelope shaping unit.The resistance-feedback network of linear amplifier stage is to envelope signal Linear Amplifer shaping, and the ripple current of compensating switch amplifying stage.Electric current sensing unit detects the output current of linear amplifier stage, and pressure drop is generated on sensing resistor.Switch drive unit reinforces hysteresis comparator output signal to drive rear class switching amplifying stages to work.The linearity of envelop modulator of the present invention is high, low in energy consumption.
Description
Technical field
The invention belongs to wireless communication technology fields, are related to a kind of high efficiency applied in envelope tracking power amplifier
High linearity envelop modulator.
Background technology
Envelop following technology is improve efficiency power amplifier under power amplifier processing height power ratio signal one
Kind technology, envelop modulator generate dynamic electric voltage and power to the drain electrode of power tube or collector.The input of power amplifier is amplitude and phase
Position does not detach signal so that requirement of the system to delay declines；Supply voltage very need not accurately track envelope letter simultaneously
Number.In envelope-tracking system, since often not detach signal than the envelope phase of base band much bigger for envelope signal bandwidth,
Envelop modulator is difficult to ensure the efficiency of its output in Linear Amplifer envelope signal.The mixed type envelope modulation that connection in series-parallel combines
It must change the same period that device design, which needs supply voltage and envelope signal, thus will be between noise bandwidth and efficiency when design
Weighed.In addition the envelop modulator of big bandwidth is realized there is also certain difficulty, low-loss in mixed type envelope amplifier
The current sensing unit design of low-power consumption equally exists challenge；The power consumption for reducing hysteresis comparator in envelope amplifier is also current
Another difficult point faced.Currently used several envelop modulator structures are efficient simultaneously in realization, often face line
The deterioration of property degree.
Invention content
In view of the problems of the existing technology the present invention, provides a kind of high efficiency high linearity envelop modulator, utilizes packet
Network shaping technique is re-fed into envelop modulator after handling envelope, in combination with bias voltage tracking circuit, by linear amplifier stage
AB class output nmos transistor grid voltages feed back to envelope shaping circuit and generate positive shift voltage, it is efficient to realize
Rate and high linearity.
To achieve the above object, the present invention uses following technical scheme.
A kind of high efficiency high linearity envelop modulator of the present invention, it is characterised in that：It is whole including sequentially connected envelope
Shape unit, bias voltage tracking unit, linear amplifier stage, electric current sensing unit, hysteresis comparator, switch drive unit and switch amplification
Grade.
Envelope shaping unit carries out input envelope being input to after the processing of direct current displacement and peak clipping linear amplifier stage and partially
Set tracking cell.
The AB class output nmos transistor grid voltages of linear amplifier stage are fed back to envelope shaping list by bias voltage tracking unit
Member, makes and envelope shaping unit exports positive shift voltage.
Linear amplifier stage, including collapsible broadband operational amplifier OTA, AB class output Buffer, resistance-feedback network；Institute
The AB classes output Buffer stated includes the first transistor M1 and second transistor M2；The linear amplifier stage will pass through its electricity
The envelope signal for hindering feedback network carries out Linear Amplifer shaping, and the ripple current that compensating switch amplifying stage generates simultaneously.
Electric current sensing unit detects the output current of linear amplifier stage；Sensing of the output current in electric current sensing unit
Resistance RsenUpper generation pressure drop, the pressure drop are compared with the window voltage of hysteresis comparator, if hysteresis comparator output voltage is
Fiveth transistor M5 of the low level then in switching amplifying stages open, the 6th transistor M6 shutdowns, if hysteresis comparator output voltage
For high level, then the 5th transistor M5 shutdowns, the 6th transistor M6 are opened.
Switch drive unit amplifies level work for reinforcing hysteresis comparator output signal with driving switch.
Switching amplifying stages, the electric current for providing the overwhelming majority to load, aftercurrent are provided by linear amplifier stage.
Further, the input of the envelope shaping unit terminates envelope signal, output termination bias voltage tracking unit
Input terminal；The grid voltage that AB classes export the second transistor M2 of Buffer connects bias voltage tracking unit；Bias voltage tracking unit
Output end feed back to envelope shaping unit；It is single that the grid of the first transistor M1 of AB classes output Buffer is connected to electric current induction
The grid of the third transistor M3 of member, the grid of second transistor M2 are connected to the grid of the 4th transistor M4 of electric current sensing unit
Pole；The drain electrode of the third transistor M3 and the 4th transistor M4 of electric current sensing unit and electric current inductive reactance RsenAnode, together
When be connected to the positive input terminal of hysteresis comparator；The output end of hysteresis comparator is connected to the input terminal of switch drive unit；It opens
The output end for closing driving unit is connected to the input terminal of switching amplifying stages；The output ends of switching amplifying stages, the first transistor M1 and
The drain electrode of second transistor M2, electric current inductive reactance RsenNegative terminal and hysteresis comparator negative input end simultaneously be connected to load
Resistance RloadAnode, load resistance RloadOutput signal of the positive terminal voltage as envelop modulator.
Further, the envelope shaping unit, including transconductance stage, V-I converting units, biasing feedback unit, the 20th
Transistor M20, the 21st transistor M21, the 25th transistor M25 and the 26th transistor M26；20th transistor
M20 and the 21st transistor M21 is a pair of of current mirror, and the 25th transistor M25 and the 26th transistor M26 are electric current
Bias transistor；The output of transconductance stage is connected to the input of V-I converting units, biases the output connection V-I conversions of feedback unit
Unit.
Further, the transconductance stage includes the 7th transistor M7, the 8th transistor M8, the 9th transistor M9 and the tenth
Transistor M10, the 11st transistor M11 and the tenth two-transistor M12, the 13rd transistor M13, the 14th transistor M14,
15 transistor M15, the 16th transistor M16, the 17th transistor M17, the 18th transistor M18, the 19th transistor
M19.V-I converting units include the 20th two-transistor M22, the 23rd transistor M23, the 24th transistor M24.Biasing
Feedback unit includes the 23rd transistor M23, the 24th transistor M24, the 27th transistor M27, the 28th crystalline substance
Body pipe M28, the 29th transistor M29, the 30th transistor M30.The grid of 7th transistor M7 connects input envelope signal
Venv,i, the source electrode of the 7th transistor M7 and the 8th transistor M8 connects the drain electrode of the 11st transistor M11, the leakage of the 7th transistor M7
Pole connects the drain electrode of the 16th transistor M16, and the grid of the 8th transistor M8 connects the grid and the 8th transistor of the 9th transistor M9
The drain electrode of the drain electrode of M8, the 8th transistor M8 connects the drain electrode of the 9th transistor M9 and the drain electrode of the 19th transistor M19, and the 9th is brilliant
The source electrode of body pipe M9 and the tenth transistor M10 connect the drain electrode of the tenth two-transistor M12, and the drain electrode of the tenth transistor M10 connects the tenth
The grid of the drain and gate of seven transistor M17, the tenth transistor M10 connects the source electrode of the 20th two-transistor M22, and the 11st is brilliant
The grid of body pipe M11 and the grid of the tenth two-transistor M12 connect bias voltage VB1, the source electrode and the tenth of the 11st transistor M11
The source electrode of two-transistor M12 connects supply voltage, and the source electrode of the 13rd transistor M13 and the 14th transistor M14 connect supply voltage,
The grid of 13rd transistor M13 connects the drain electrode of the grid and the 13rd transistor M13 of the 14th transistor M14, and the 13rd is brilliant
The drain electrode of body pipe M13 connects the drain electrode of the 15th transistor M15, and the drain electrode of the 14th transistor M14 connects the 18th transistor M18's
Drain electrode, the grid of the 15th transistor M15 meet grid and the drain electrode of the 16th transistor M16, the 15th transistor M15 and the tenth
The source electrode of six transistor M16 is grounded, and the grid of the 18th transistor M18 connects grid and the drain electrode of the 17th transistor M17, and the tenth
The source electrode of seven transistor M17 and the 18th transistor M18 is grounded, and the grid of the 19th transistor M19 meets bias voltage VB2, the
The source electrode of 19 transistor M19 is grounded, the source electrode ground connection of the 20th transistor M20 and the 21st transistor M21, and the 21st
The grid of transistor M21 connects grid and the drain electrode of the 20th transistor M20, and the drain electrode of the 20th transistor M20 connects the 22nd
The drain electrode of transistor M22, the drain electrode of the 21st transistor M21 connect the drain electrode of the 24th transistor M24, the 22nd crystal
The grid of pipe M22 connects the drain electrode of the 18th transistor M18, and the source electrode of the 20th two-transistor M22 meets the 23rd transistor M23
Drain and gate, the grid of the 23rd transistor M23 connects the grid and the 27th transistor of the 24th transistor M24
The source electrode of the drain electrode of M27, the 23rd transistor M23 meets the drain electrode of the 25th transistor M25, the 24th transistor M24
Source electrode connect the drain electrode of the 26th transistor M26, the grid of the 25th transistor M25 and the 26th transistor M26 connect
The source electrode of bias voltage VB1, the 25th transistor M25 and the 26th transistor M26 connect supply voltage, the 24th crystal
The drain electrode of pipe M24 and the drain electrode of the 21st transistor M21 meet output envelope signal Venv,o, the grid of the 27th transistor M27
Pole connects grid and the drain electrode of the 28th transistor M28, the source electrode of the 27th transistor M27 and the 28th transistor M28
Ground connection, the drain electrode of the 28th transistor M28 connect the drain electrode of the 29th transistor M29, the grid of the 29th transistor M29
The source electrode for meeting voltage VP1, the 29th transistor M29 connects the drain electrode of the 30th transistor M30, the grid of the 30th transistor M30
Pole meets voltage VP2, and the source electrode of the 30th transistor M30 connects supply voltage.
Further, the bias voltage tracking unit, including the 31st transistor M31, the 30th two-transistor M32,
33 transistor M33, filter resistance RLWith filter capacitor CL；The grid of 31st transistor M31 meets bias voltage Vn, the
The source electrode of 31 transistor M31 is grounded, the drain electrode of the 31st transistor M31 connect the drain electrode of the 30th two-transistor M32 with
The source electrode of the grid of 33rd transistor M33, the 30th two-transistor M32 connects the drain electrode of the 33rd transistor M33, third
The source electrode of 13 transistor M33 connects supply voltage, and the grid of the 30th two-transistor M32 meets filter resistance RLWith filter capacitor CL,
Filter resistance RLAnother termination envelope signal Venv,o, filter capacitor CLThe other end ground connection.
Compared with prior art, the present invention includes having the following advantages and beneficial effect：
1, by will be used as the input of envelope amplifier after envelope signal progress shaping, biasing circuit will linearly be put the present invention
The grid voltage of the AB class output nmos transistors of big grade feeds back to envelope shaping unit and generates positive shift voltage in output,
The envelope feedback loop for forming automatic biasing, to improve the linearity of envelope-tracking system；
2, the envelope modulator circuit that the present invention designs, by carrying out a degree of direct current displacement and packet to envelope signal
Network peak clipping makes the power consumption of integrated circuit substantially reduce.
Description of the drawings
Fig. 1 is a kind of embodiment electrical block diagram of the high efficiency high linearity envelop modulator of the present invention.
Fig. 2 is a kind of electrical block diagram of the envelope shaping unit of embodiment of the present invention.
Fig. 3 is a kind of electrical block diagram of the bias voltage tracking unit of embodiment of the present invention.
Fig. 4 is a kind of circuit envelope signal simulation result figure by envelope shaping unit of embodiment of the present invention.
Fig. 5 is the simulation result of the linear amplifier stage and the consumption of switching amplifying stages transient current of a kind of embodiment of the present invention
Figure.
Fig. 6 is the simulation result diagram of embodiment output third order intermodulation point OIP3 of the present invention a kind of.Its abscissa indicates defeated
Enter power, ordinate indicates OIP3, and unit is dBm.
Specific implementation mode
Further detailed description is done to the present invention below in conjunction with the accompanying drawings.
It is as shown in Figure 1 a kind of embodiment circuit structure signal of the high efficiency high linearity envelop modulator of the present invention
Figure.Fig. 2 is a kind of electrical block diagram of the envelope shaping unit of embodiment of the present invention.Fig. 3 is a kind of reality of the present invention
Apply the electrical block diagram of the bias voltage tracking unit of example.M1 shown in wherein Fig. 1-Fig. 3, M2 ... ... M33, can respectively according to
It is secondary to be expressed as the first transistor M1, the 33rd transistor M33 of second transistor M2 ... ....
The high efficiency high linearity envelop modulator of embodiment as shown in Figure 1, including sequentially connected envelope shaping unit
1, bias voltage tracking unit 2, linear amplifier stage 3, electric current sensing unit 4, hysteresis comparator 5, switch drive unit 6 and switch amplification
Grade 7.Wherein envelope shaping unit 1 after the processing of the progress direct current displacement of input envelope and peak clipping to being input to 3 He of linear amplifier stage
Bias voltage tracking unit.The AB class output nmos transistor grid voltages of linear amplifier stage 3 are fed back to envelope by bias voltage tracking unit 2
Shaping unit 1, and envelope shaping unit 1 is made to export positive shift voltage.Linear amplifier stage 3 includes collapsible broadband operation amplifier
Device OTA, AB class exports Buffer, resistance-feedback network.The AB classes output Buffer includes transistor M1 and M2.Described
Linear amplifier stage 3 will carry out Linear Amplifer shaping by the envelope signal of its resistance-feedback network, and compensating switch amplifies simultaneously
The ripple current that grade 7 generates.Electric current sensing unit 4 detects the output current of linear amplifier stage 3；The output current incudes in electric current
The sensing resistor R of unit 4senUpper generation pressure drop, the pressure drop are compared with the window voltage of hysteresis comparator 5.If sluggishness is relatively
The output voltage of device 5 is low level, then the M5 in switching amplifying stages 7 is opened, M6 is turned off.If the output voltage of hysteresis comparator 5
For high level, then M5 shutdowns, M6 are opened.Switch drive unit 6, for reinforcing the output signal of hysteresis comparator 5 to drive out
Amplifying stage 7 is closed to work；Switching amplifying stages 7 are used to provide the electric current of the overwhelming majority to load, and aftercurrent is carried by linear amplifier stage 3
For.
Wherein, the input of envelope shaping unit 1 terminates envelope signal, the input terminal of output termination bias voltage tracking unit 2.
AB classes export the grid voltage connection bias voltage tracking unit 2 of the transistor M2 of Buffer, the output end feedback of bias voltage tracking unit 2
To envelope shaping unit 1.The grid of the transistor M1 of AB classes output Buffer is connected to the transistor M3's of electric current sensing unit 4
Grid, the grid of transistor M2 are connected to the grid of the transistor M4 of electric current sensing unit 4.The transistor of electric current sensing unit 4
The drain electrode of M3 and M4 and electric current inductive reactance RsenAnode, while being connected to the positive input terminal of hysteresis comparator 5.Sluggish ratio
Compared with the input terminal that the output end of device 5 is connected to switch drive unit 6.The output end of switch drive unit 6 is connected to switch amplification
The input terminal of grade 7.The output end of switching amplifying stages 7, the drain electrode of transistor M1 and transistor M2, electric current inductive reactance RsenIt is negative
The negative input end of end and hysteresis comparator 5 is connected to load resistance R simultaneouslyloadAnode, load resistance RloadPositive terminal voltage
Output signal as envelop modulator.
The envelope shaping unit of embodiment as shown in Figure 2, including transconductance stage, V-I converting units, biasing feedback unit,
Current mirror M20, current mirror M21, current-biased transistors M25 and current-biased transistors M26；The output of transconductance stage is connected to V-
The input of I converting units biases the output connection V-I converting units of feedback unit, big to change the electric current in V-I converting units
It is small.
Transconductance stage as shown in Figure 2 includes input transistors M7, M8, M9 and M10, tail current source transistor M11 and M12,
Current mirror transistor M13, M14, M15, M16, M17, M18, source negative feedback transistor M19.V-I converting units include M22,
M23、M24.Biasing feedback unit includes M23, M24, current mirror transistor M27, M28, biasing transistor M29, M30.The grid of M7
Pole meets input envelope signal Venv,i, the source electrode of M7 and M8 connects the drain electrode of M11, and the drain electrode of M7 connects the drain electrode of M16, and the grid of M8 meets M9
Grid and M8 drain electrode, the drain electrode of M8 connects the drain electrode of M9 and the drain electrode of M19, and the source electrode of M9 and M10 connect the drain electrode of M12, M10's
Drain electrode connects the drain and gate of M17, and the grid of M10 connects the source electrode of M22, and the grid of M11 and the grid of M12 meet bias voltage VB1,
The source electrode of M11 and the source electrode of M12 connect supply voltage, and the source electrode of M13 and M14 connect supply voltage, and the grid of M13 connects the grid of M14
With the drain electrode of M13, the drain electrode of M13 connects the drain electrode of M15, and the drain electrode of M14 connects the drain electrode of M18, the grid of M15 connect M16 grid and
The grid of the source electrode ground connection of drain electrode, M15 and M16, M18 connects grid and the drain electrode of M17, the source electrode ground connection of M17 and M18, the grid of M19
Pole connects the source electrode ground connection of bias voltage VB2, M19, the source electrode ground connection of M20 and M21, and the grid of M21 connects grid and the drain electrode of M20,
The drain electrode of M20 connects the drain electrode of M22, and the drain electrode of M21 connects the drain electrode of M24, and the grid of M22 connects the drain electrode of M18, and the source electrode of M22 meets M23
Drain and gate, the grid of M23 connects the drain electrode of the grid and M27 of M24, and the source electrode of M23 connects the drain electrode of M25, and the source electrode of M24 connects
The source electrode that the grid of the drain electrode of M26, M25 and M26 meet bias voltage VB1, M25 and M26 meets supply voltage, the drain electrode of M24 and M21
Drain electrode meet output envelope signal Venv,o, the grid of M27 connects grid and the drain electrode of M28, the source electrode ground connection of M27 and M28, M28's
Drain electrode connects the drain electrode of M29, and the source electrode that the grid of M29 meets voltage VP1, M29 connects the drain electrode of M30, and the grid of M30 meets voltage VP2,
The source electrode of M30 connects supply voltage.
Transconductance stage is amplified input envelope signal, and wherein M1 and M4 improve circuit line by the form of source-electrode degradation
Property degree, M16 as source follower simultaneously drive active load M17, to realize conversion of the voltage to electric current.M16 is M15 electricity
The mirror image of stream.The grid voltage biasing of M19 and M20 is provided by current source circuit, by using the offset information of VP1 and VP2, profit
The bias current between M17 and M18 electric currents is generated with M21, M22, M23 and M24, and then is obtained relative to input envelope signal
Venv,iShaping after carry positive bias voltage output envelope signal Venv,o.Electric current on M21 is used for adjusting the total of output branch
Size of current, to change Venv,oBias size.Since VP1 and VP2 directly reflect the electric current and packet of linear amplifier stage output
Network information of voltage, therefore allow Venv,oIt is that the condition based on dc-dc converter is relatively adjustable.By different direct current piezoelectricity
After prosposition moves, envelop modulator can be met and be supplied to voltage swing needed for power amplifier.
The bias voltage tracking unit of embodiment as shown in Figure 3, including transistor M31, M32, M33, filter resistance RLAnd filtering
Capacitance CL.The grid of M31 connects the source electrode ground connection of bias voltage Vn, M31, and the drain electrode of M31 connects drain electrode and the grid of M33 of M32,
The source electrode of M32 connects the drain electrode of M33, and the source electrode of M33 connects supply voltage, and the grid of M32 meets RLAnd CL, RLAnother termination envelope letter
Number Venv,o, CLThe other end ground connection.Respectively as VP1 and VP2 signals, VP1 and VP2 are right respectively for the grid of M32 and the grid of M33
Answer the grid voltage of M29 and M30 in envelope shaping circuit.Since envelope peak voltage change is excessively violent, using to a certain degree
Low-pass filter as aid in treatment, the envelope signal after bandwidth slightly declines can be obtained.
As shown in figure 4, in the case where input signal is the signal of LTE 16-QAM 10MHz, the original envelope emulated is passed through
Output envelope signal after envelope shaping unit, it can be seen that the bandwidth of envelope signal compared to being declined originally, to save
Power consumption.
As shown in figure 5, input signal be LTE 16-QAM 10MHz signal under, emulate based on the present invention one
Transient current consumption on the linear amplifier stage and switching amplifying stages of the high efficiency high linearity envelop modulator of a embodiment is bent
Line, the average current that linear amplifier stage consumption is obtained by calculation are 56mA, and the average current of switching amplifying stages consumption is 78mA,
Applied in different envelope tracking power amplifier systems, the efficiency of whole system can be further calculated out.
Be illustrated in figure 6 under the LTE 16-QAM 10MHz signals of centre frequency 1.8GHz that emulation obtains based on this hair
The output third order intermodulation point OIP3 of the high efficiency high linearity envelop modulator of bright one embodiment is 53.06dBm.
In conclusion the present invention is by will be used as the input of linear amplifier stage, bias voltage tracking after envelope signal progress shaping
The AB class output nmos transistor grid voltages of linear amplifier stage are fed back to the circuit of envelope shaping unit simultaneously by the circuit of unit
Positive shift voltage is generated in output, to improve the linearity of envelope tracking power amplifier system；Simultaneously by packet
Network signal carries out a degree of direct current displacement and envelope peak clipping realizes high efficiency to save the power consumption of integrated circuit
The envelop modulator of high linearity.
Claims (5)
1. a kind of high efficiency high linearity envelop modulator, it is characterised in that：
Including sequentially connected envelope shaping unit (1), bias voltage tracking unit (2), linear amplifier stage (3), electric current sensing unit
(4), hysteresis comparator (5), switch drive unit (6) and switching amplifying stages (7)；
Envelope shaping unit (1) carries out input envelope being input to after the processing of direct current displacement and peak clipping linear amplifier stage and partially
Set tracking cell；
The AB class output nmos transistor grid voltages of linear amplifier stage are fed back to envelope shaping list by bias voltage tracking unit (2)
First (1), makes and envelope shaping unit (1) exports positive shift voltage；
Linear amplifier stage (3), including collapsible broadband operational amplifier OTA, AB class output Buffer, resistance-feedback network；Institute
The AB classes output Buffer stated includes the first transistor M1 and second transistor M2；The linear amplifier stage (3), will pass through it
The envelope signal of resistance-feedback network carries out Linear Amplifer shaping, and the ripple current that compensating switch amplifying stage (7) generates simultaneously；
Electric current sensing unit (4), the output current of detection linear amplifier stage (3)；The output current is in electric current sensing unit (4)
Sensing resistor RsenUpper generation pressure drop, which is compared with the window voltage of hysteresis comparator (5), if hysteresis comparator is defeated
Go out voltage for the 5th transistor M5 unlatchings, the 6th transistor M6 shutdowns in low level then switching amplifying stages (7), if sluggish compare
Device output voltage is that then the 5th transistor M5 shutdowns, the 6th transistor M6 are opened high level；
Switch drive unit (6) is worked for reinforcing hysteresis comparator (5) output signal with driving switch amplifying stage (7)；
Switching amplifying stages (7), the electric current for providing the overwhelming majority to load, aftercurrent are provided by linear amplifier stage (3).
2. a kind of high efficiency high linearity envelop modulator according to claim 1, which is characterized in that the envelope is whole
The input of shape unit (1) terminates envelope signal, the input terminal of output termination bias voltage tracking unit (2)；AB classes export Buffer
Second transistor M2 grid voltage connection bias voltage tracking unit (2)；The output end of bias voltage tracking unit (2) feeds back to envelope
Shaping unit (1)；The grid of the first transistor M1 of AB classes output Buffer is connected to the third crystal of electric current sensing unit (4)
The grid of pipe M3, the grid of second transistor M2 are connected to the grid of the 4th transistor M4 of electric current sensing unit (4)；Electric current sense
Answer drain electrode and the electric current inductive reactance R of the third transistor M3 and the 4th transistor M4 of unit (4)senAnode, connect simultaneously
To the positive input terminal of hysteresis comparator (5)；The output end of hysteresis comparator (5) is connected to the input terminal of switch drive unit (6)；
The output end of switch drive unit (6) is connected to the input terminal of switching amplifying stages (7)；The output end of switching amplifying stages (7), first
The drain electrode of transistor M1 and second transistor M2, electric current inductive reactance RsenNegative terminal and hysteresis comparator (5) negative input end it is same
When be connected to load resistance RloadAnode, load resistance RloadOutput signal of the positive terminal voltage as envelop modulator.
3. a kind of high efficiency high linearity envelop modulator according to claim 1, which is characterized in that the envelope shaping
Unit (1) includes transconductance stage (8), V-I converting units (9), biasing feedback unit (10), the 20th transistor M20, the 21st
Transistor M21, the 25th transistor M25 and the 26th transistor M26；20th transistor M20 and the 21st crystal
Pipe M21 is a pair of of current mirror, and the 25th transistor M25 and the 26th transistor M26 are current-biased transistors；Transconductance stage
(8) output is connected to the input of V-I converting units (9), the output connection V-I converting units (9) of biasing feedback unit (10).
4. a kind of high efficiency high linearity envelop modulator according to claim 3, it is characterised in that：The transconductance stage
(8) include the 7th transistor M7, the 8th transistor M8, the 9th transistor M9 and the tenth transistor M10, the 11st transistor M11
With the tenth two-transistor M12, the 13rd transistor M13, the 14th transistor M14, the 15th transistor M15, the 16th crystal
Pipe M16, the 17th transistor M17, the 18th transistor M18, the 19th transistor M19；
V-I converting units (9) include the 20th two-transistor M22, the 23rd transistor M23, the 24th transistor M24；
It includes the 23rd transistor M23, the 24th transistor M24, the 27th transistor to bias feedback unit (10)
M27, the 28th transistor M28, the 29th transistor M29, the 30th transistor M30；
The grid of 7th transistor M7 meets input envelope signal Venv,i, the source electrode of the 7th transistor M7 and the 8th transistor M8 connects
The drain electrode of 11 transistor M11, the drain electrode of the 7th transistor M7 connect the drain electrode of the 16th transistor M16, the 8th transistor M8's
Grid connects the drain electrode of the grid and the 8th transistor M8 of the 9th transistor M9, and the drain electrode of the 8th transistor M8 meets the 9th transistor M9
Drain electrode and the 19th transistor M19 drain electrode, the source electrode of the 9th transistor M9 and the tenth transistor M10 connects the tenth two-transistor
The drain electrode of M12, the drain electrode of the tenth transistor M10 connect the drain and gate of the 17th transistor M17, the grid of the tenth transistor M10
Pole connects the source electrode of the 20th two-transistor M22, and the grid of the 11st transistor M11 and the grid of the tenth two-transistor M12 connect partially
Voltage VB1 is set, the source electrode of the 11st transistor M11 and the source electrode of the tenth two-transistor M12 connect supply voltage, the 13rd transistor
The source electrode of M13 and the 14th transistor M14 connect supply voltage, and the grid of the 13rd transistor M13 connects the 14th transistor M14's
The drain electrode of grid and the 13rd transistor M13, the drain electrode of the 13rd transistor M13 connect the drain electrode of the 15th transistor M15, and the tenth
The drain electrode of four transistor M14 connects the drain electrode of the 18th transistor M18, and the grid of the 15th transistor M15 connects the 16th transistor
The source electrode of the grid of M16 and drain electrode, the 15th transistor M15 and the 16th transistor M16 are grounded, the 18th transistor M18's
Grid connects grid and the drain electrode of the 17th transistor M17, the source electrode ground connection of the 17th transistor M17 and the 18th transistor M18,
The grid of 19th transistor M19 meets bias voltage VB2, the source electrode ground connection of the 19th transistor M19, the 20th transistor M20
It is grounded with the source electrode of the 21st transistor M21, the grid of the 21st transistor M21 connects the grid of the 20th transistor M20
And drain electrode, the drain electrode of the 20th transistor M20 connect the drain electrode of the 20th two-transistor M22, the drain electrode of the 21st transistor M21
Connecing the drain electrode of the 24th transistor M24, the grid of the 20th two-transistor M22 connects the drain electrode of the 18th transistor M18, and second
The source electrode of ten two-transistor M22 connects the drain and gate of the 23rd transistor M23, and the grid of the 23rd transistor M23 connects
The source electrode of the drain electrode of the grid and the 27th transistor M27 of 24th transistor M24, the 23rd transistor M23 connects
The drain electrode of 25 transistor M25, the source electrode of the 24th transistor M24 connect the drain electrode of the 26th transistor M26, and the 20th
The grid of five transistor M25 and the 26th transistor M26 meets bias voltage VB1, the 25th transistor M25 and the 26th
The source electrode of transistor M26 connects supply voltage, and the drain electrode of the 24th transistor M24 and the drain electrode of the 21st transistor M21 connect
Export envelope signal Venv,o, the grid of the 27th transistor M27 connects grid and the drain electrode of the 28th transistor M28, and second
The source electrode of 17 transistor M27 and the 28th transistor M28 is grounded, and the drain electrode of the 28th transistor M28 connects the 29th
The grid of the drain electrode of transistor M29, the 29th transistor M29 meets voltage VP1, and the source electrode of the 29th transistor M29 connects
The grid of the drain electrode of 30 transistor M30, the 30th transistor M30 meets voltage VP2, and the source electrode of the 30th transistor M30 connects electricity
Source voltage.
5. a kind of high efficiency high linearity envelop modulator according to claim 1, it is characterised in that：The bias voltage tracking
Unit (2) includes the 31st transistor M31, the 30th two-transistor M32, the 33rd transistor M33, filter resistance RLWith
Filter capacitor CL；The grid of 31st transistor M31 meets bias voltage Vn, and the source electrode of the 31st transistor M31 is grounded, the
The drain electrode of 31 transistor M31 connects drain electrode and the grid of the 33rd transistor M33 of the 30th two-transistor M32, third
The source electrode of ten two-transistor M32 connects the drain electrode of the 33rd transistor M33, and the source electrode of the 33rd transistor M33 connects power supply electricity
Pressure, the grid of the 30th two-transistor M32 meet filter resistance RLWith filter capacitor CL, filter resistance RLAnother termination envelope letter
Number Venv,o, filter capacitor CLThe other end ground connection.
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