CN206835052U - A kind of operational amplifier - Google Patents
A kind of operational amplifier Download PDFInfo
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- CN206835052U CN206835052U CN201720551612.9U CN201720551612U CN206835052U CN 206835052 U CN206835052 U CN 206835052U CN 201720551612 U CN201720551612 U CN 201720551612U CN 206835052 U CN206835052 U CN 206835052U
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Abstract
The utility model discloses a kind of operational amplifier, including input stage circuit, biasing circuit and output-stage circuit, the input stage circuit includes Differential Input module, first and second gain bootstrap module, the biasing circuit includes biasing module and common-mode feedback module, and the output-stage circuit turns single-ended block including difference；Common-mode feedback module provides a bias voltage for Differential Input module, and there is common-mode feedback function, feedback signal eliminates offset voltage by controlling the tail current source of Differential Input module, and difference turns to export with single port after two differential signals that single-ended block exports input stage circuit inversely add.The utility model can effectively improve the gain of operational amplifier.
Description
Technical field
It the utility model is related to a kind of semiconductor integrated circuit, and in particular to a kind of operational amplifier.
Background technology
Operational amplifier obtains a wide range of applications in many analog circuits.In many application scenarios, it is desirable to computing
Amplifier has high multiplication factor, and conventional structure is using the operational amplifier of two-stage amplification and using gain bootstrap technology
Operational amplifier.
New oxide thin film transistor device is warm in recent years because its excellent performance, simple manufacturing process become
Door research object, but oxide thin film transistor is N-type device, two be present：1st, lack complementary P-type device, cause
The op-amp gain being made up of N-type pipe is low.Therefore two gain bootstrap modules have been used, have improved gain.2nd, there is threshold value
The characteristic of voltage drift, influence circuit job stability., can be because of oxide if not taking indemnifying measure or feedback module
Thin film transistor (TFT) threshold voltage shift and cause operation amplifier circuit job insecurity, as gain and bandwidth change, very
Can not normal work to circuit.In order to suppress unstable caused by the threshold voltage shift of oxide thin film transistor, use
Simple common-mode feedback technology, on the premise of the complexity of circuit is not increased, effectively improves common-mode rejection ratio and elimination
Offset voltage.
Utility model content
In order to overcome shortcoming and deficiency existing for prior art, it is good that the utility model provides a kind of high-gain, stability
Operational amplifier.
The utility model adopts the following technical scheme that：
A kind of operational amplifier, including input stage circuit, biasing circuit and output-stage circuit；
The input stage circuit includes Differential Input module 15, first and second gain bootstrap module 13,14, the biasing
Circuit includes biasing module 11 and common-mode feedback module 12, and the output-stage circuit turns single-ended block 16 including difference；
The output signal of biasing module 11 includes bias voltage node Bias1 and bias voltage node Bias2；
The output signal of common-mode feedback module 12 includes bias voltage node Bias3；
The signal of first gain bootstrap module 13 includes normal phase input end IN1+, inverting input IN1-, positive output end
OUT1+ and reversed-phase output OUT1-；
The input signal of second gain bootstrap module 14 includes normal phase input end IN2+ and inverting input IN2-, and it is exported
Signal includes positive output end OUT2+ and reversed-phase output OUT2-；
The input signal of Differential Input module 15, which includes normal phase input end IN+ and inverting input IN-, output signal, to be included
Positive output end OUT+ and reversed-phase output OUT-；
The biasing module 11 is made up of the first transistor M1, second transistor M2 and third transistor M3, and described first
Transistor M1 drain electrode and grid are connected with power end VDD, the source electrode of the first transistor M1 respectively with second transistor M2
Drain and gate connection, and be used as bias voltage node Bias2；The source electrode of the second transistor M2 respectively with the 3rd crystal
Pipe M3 drain electrode and grid connection, and it is used as bias voltage node Bias1, the source electrode and earth terminal of the third transistor M3
GND connections；
The common-mode feedback module 12 is made up of the 4th transistor M4, the 5th transistor M5 and the 6th transistor M6, described
4th transistor M4 and the 5th transistor M5 drain electrode is connected with power end VDD, the source electrode and the 5th of the 4th transistor
Drain electrode of the transistor M5 source electrode respectively with the 6th transistor M6 is connected, the grid and the 6th transistor of the 6th transistor M6
M6 drain electrode connection, and bias voltage node Bias3 is used as, its source electrode is connected with earth terminal GND, the 4th transistor M4's
Grid is connected with the positive output end OUT+ of Differential Input module, grid and the Differential Input module of the 5th transistor M5
Reversed-phase output OUT- connections；
The first gain bootstrap module 13 is by the 16th transistor M16, the 17th transistor M17, the 18th transistor
M18, the 19th transistor M19 and the 20th transistor M20 are formed；The grid of the 16th transistor M16 and drain electrode with
Power end VDD connections, its source electrode are connected with the 18th transistor M18 drain electrode, the drain electrode conduct of the 18th transistor M18
The positive output end OUT1+ of first gain bootstrap module, its grid are connected with the reversed-phase output OUT- of Differential Input module, institute
The source electrode for stating the 18th transistor M18 is connected with drain electrode of the 19th transistor M19 source electrode with the 20th transistor M20,
Reversed-phase output OUT1- of the 19th transistor M19 drain electrode as the first gain bootstrap module, the 19th transistor M19's
Grid is connected with the positive output end OUT+ of Differential Input module, grid and the bias voltage section of the 20th transistor M20
Point Bias1 connections, the source electrode of the 20th transistor M20 are connected with earth terminal GND；
The second gain bootstrap module 14 is by the 21st transistor M21, the 20th two-transistor M22, the 23rd
Transistor M23, the 24th transistor M24 and the 25th transistor M25 are formed；
21st transistor M21 grid and drain electrode are connected with power end VDD, its source electrode and the 23rd crystal
The positive output end OUT2+ that pipe M23 drain electrode is connected as the second gain bootstrap module, the 20th two-transistor M22 grid
It is connected with drain electrode with power end VDD, its source electrode is connected with the 24th transistor M24 drain electrode, and as the second gain certainly
Module reversed-phase output OUT2- is lifted, its grid is connected with the positive output end OUT+ of Differential Input module, and the described 23rd is brilliant
Body pipe M23 grid is connected with the reversed-phase output OUT- of Differential Input module, the drain electrode point of the 25th transistor M25
Source electrode not with the 23rd transistor M23 and the 24th transistor M24 is connected, the 25th transistor M25 grid with
The bias voltage node Bias1 of biasing module is connected, and the source electrode of the 25th transistor M25 is connected with earth terminal GND；
The Differential Input module is by the 7th transistor M7, the 8th transistor M8, the 9th transistor M9, the tenth transistor
M10, the 11st transistor M11, the tenth two-transistor M12, the 13rd transistor M13, the 14th transistor M14 and the 15th are brilliant
Body pipe M15 is formed；
The drain electrode of the 7th transistor M7 is connected with power end VDD, and its grid is anti-phase with the first gain bootstrap module
Output end OUT1- is connected, and its source electrode is connected with the 8th transistor M8 drain electrode, and the grid of the 8th transistor M8 and second increases
The reversed-phase output OUT2- of beneficial bootstrap module is connected, and its source electrode is connected with the 9th transistor M9 drain electrode, the 9th transistor M9's
The reversed-phase output OUT- to drain as Differential Input module, its grid are connected with the bias voltage node Bias2 of biasing module,
The source electrode of the 9th transistor M9 is connected with the tenth transistor M10 drain electrode, and the tenth transistor M10 grid is defeated as difference
The drain electrode for entering the normal phase input end IN+, the tenth transistor M10 of module source electrode and the 11st transistor M11 is brilliant with the 15th
Body pipe M15 source electrode connection, the 11st transistor M11 grid are connected with the bias voltage node Bias3 of common mode feedback module,
11st transistor M11 source electrode is connected with earth terminal GND, and the grid of the 15th transistor M15 is as Differential Input mould
The inverting input IN-, the 15th transistor M15 of block drain electrode are connected with the 14th transistor M14 source electrode, and the 14th
The bias voltage section of positive output end OUT+ of the transistor M14 drain electrode as Differential Input module, its grid and biasing module
Point Bias2 is connected, and the drain electrode of the 14th transistor M14 is connected with the 13rd transistor M13 source electrode, the tenth two-transistor
M12 drain electrode is connected with power end VDD, and its grid is connected with the positive output end OUT1+ of the first gain bootstrap module, its source electrode
Drain electrode with the 13rd transistor M13 is connected；13rd transistor M13 grid and the positive of the second gain bootstrap module export
End OUT2+ is connected；
The difference turns single-ended block by the 26th transistor M26, the 27th transistor M27, the 28th crystal
Pipe M28 and the 29th transistor M29 are formed, and the 26th transistor M26 drain electrode is connected with power end VDD, its grid and
The positive output end OUT+ of Differential Input module is connected, and its source electrode is connected with the 27th transistor M27 drain electrode；27th
Transistor M27 grid drains with it to be connected, and its source electrode is connected with earth terminal GND；28th transistor M28 drain electrode and electricity
Source VDD is connected, and its grid is connected with the reversed-phase output OUT- of Differential Input module, its source electrode and the 29th transistor
M29 drain electrode is connected, and as the output end OUT of whole operational amplifier；29th transistor M29 grid and the 20th
Seven transistor M27 drain electrode is connected, and its source electrode is connected with earth terminal GND.
All transistors are N-type TFT.
The positive output end OUT+ of the Differential Input module and reversed-phase output OUT- of Differential Input module is respectively as altogether
Mould feedback module, the first gain bootstrap module, the second gain bootstrap module and difference turn the input signal of single-ended block.
The beneficial effects of the utility model：
(1) operation amplifier circuit of institute's utility model is by two gain bootstrap modules, compared to single gain bootstrap mould
The operational amplifier of block, there is provided more stable gain bootstrap function, the gain of operational amplifier can be effectively improved.
(2) common-mode feedback module is utilized, compensate for due to temperature drift or transistor characteristic decay and caused static work
Make point drift, and do not increase the complexity of circuit, effectively improve common-mode rejection ratio and eliminate offset voltage, increase circuit
Job stability.
(3) turn single-ended block using difference, differential signal is converted into single port output, turns into double-width grinding Single-end output
Operational amplifier, be adapted to popularization and application.
Brief description of the drawings
Fig. 1 is circuit theory diagrams of the present utility model；
Fig. 2 is structural representation of the present utility model.
Embodiment
With reference to embodiment and accompanying drawing, the utility model is described in further detail, but reality of the present utility model
Apply mode not limited to this.
Embodiment
As shown in Figures 1 and 2, a kind of operational amplifier, including input stage circuit, biasing circuit and output-stage circuit.
The input stage circuit includes Differential Input module 15, first and second gain bootstrap module 13,14.Gain bootstrap
Module improves the gain of whole operational amplifier by positive feedback；The biasing circuit includes biasing module 11 and common-mode feedback mould
Block 12.Biasing module provides two bias voltages for Differential Input module；Common-mode feedback module 12 provides for Differential Input module
One bias voltage, and there is common-mode feedback function, feedback signal is eliminated by controlling the tail current source of Differential Input module
Offset voltage；The output-stage circuit turns single-ended block 16 including difference.Difference turns what single-ended block exported input stage circuit
Two differential signals are exported after inversely adding with single port.
The output signal of biasing module includes bias voltage node Bias1 and bias voltage node Bias2；
The output signal of common-mode feedback module includes bias voltage node Bias3；
The signal of first gain bootstrap module 13 includes normal phase input end IN1+, inverting input IN1-, positive output end
OUT1+ and reversed-phase output OUT1-；
The input signal of second gain bootstrap module 14 includes normal phase input end IN2+ and inverting input IN2-, and it is exported
Signal includes positive output end OUT2+ and reversed-phase output OUT2-；
The input signal of Differential Input module includes normal phase input end IN+ and inverting input IN-, and output signal is included just
Phase output terminal OUT+ and reversed-phase output OUT-, the two output signals are respectively as common-mode feedback module, the first gain bootstrap
Module, the second gain bootstrap module and difference turn the input of single-ended block；
The biasing module 11 is made up of the first transistor M1, second transistor M2 and third transistor M3, and described first
Transistor M1 drain electrode and grid are connected with power end VDD, the source electrode of the first transistor M1 respectively with second transistor M 2
Drain and gate connection, and be used as bias voltage node Bias2；The source electrode of the second transistor M2 respectively with the 3rd crystal
Pipe M3 drain electrode and grid connection, and it is used as bias voltage node Bias1, the source electrode and earth terminal of the third transistor M3
GND connections；
The common-mode feedback module 12 is made up of the 4th transistor M4, the 5th transistor M5 and the 6th transistor M6, described
4th transistor M4 and the 5th transistor M5 drain electrode is connected with power end VDD, the source electrode of the 4th transistor M4 and
Drain electrode of the five transistor M5 source electrode respectively with the 6th transistor M6 is connected, the grid and the 6th crystal of the 6th transistor M6
Pipe M6 drain electrode connection, and bias voltage node Bias3 is used as, its source electrode is connected with earth terminal GND, the 4th transistor M4
Grid be connected with the positive output end OUT+ of Differential Input module 15, the grid of the 5th transistor M5 and Differential Input mould
The reversed-phase output OUT- connections of block 15；
The first gain bootstrap module 13 is by the 16th transistor M16, the 17th transistor M17, the 18th transistor
M18, the 19th transistor M19 and the 20th transistor M20 are formed；The grid of the 16th transistor M16 and drain electrode with
Power end VDD connections, its source electrode are connected with the 18th transistor M18 drain electrode, the drain electrode conduct of the 18th transistor M18
The positive output end OUT1+ of first gain bootstrap module, its grid are connected with the reversed-phase output OUT- of Differential Input module, institute
The source electrode for stating the 18th transistor M18 is connected with drain electrode of the 19th transistor M19 source electrode with the 20th transistor M20,
Reversed-phase output OUT1- of 19th transistor M 19 drain electrode as the first gain bootstrap module, the 19th transistor M19's
Grid is connected with the positive output end OUT+ of Differential Input module, grid and the bias voltage section of the 20th transistor M20
Point Bias1 connections, the source electrode of the 20th transistor M20 are connected with earth terminal GND；
The second gain bootstrap module 14 is by the 21st transistor M21, the 20th two-transistor M22, the 23rd
Transistor M23, the 24th transistor M24 and the 25th transistor M25 are formed；
21st transistor M21 grid and drain electrode are connected with power end VDD, its source electrode and the 23rd crystal
The positive output end OUT2+ that pipe M23 drain electrode is connected as the second gain bootstrap module, the 20th two-transistor M22 grid
It is connected with drain electrode with power end VDD, its source electrode is connected with the 24th transistor M24 drain electrode, and as the second gain certainly
Module reversed-phase output OUT2- is lifted, its grid is connected with the positive output end OUT+ of Differential Input module, and the described 23rd is brilliant
The grid of body pipe is connected with the reversed-phase output OUT- of Differential Input module, the drain electrode difference of the 25th transistor M25
It is connected with the source electrode of the 23rd transistor and the 24th transistor, the 25th transistor M25 grid and biasing module
Bias voltage node Bias1 be connected, the source electrode of the 25th transistor is connected with earth terminal GND；
The Differential Input module 15 is by the 7th transistor M7, the 8th transistor M8, the 9th transistor M9, the tenth transistor
M10, the 11st transistor M11, the tenth two-transistor M12, the 13rd transistor M13, the 14th transistor M14 and the 15th are brilliant
Body pipe M15 is formed；
The drain electrode of the 7th transistor M7 is connected with power end VDD, and its grid is anti-phase with the first gain bootstrap module
Output end OUT1- is connected, and its source electrode is connected with the 8th transistor M8 drain electrode, and the grid of the 8th transistor M8 and second increases
The reversed-phase output OUT2- of beneficial bootstrap module is connected, and its source electrode is connected with the 9th transistor M9 drain electrode, the 9th transistor M9's
The reversed-phase output OUT- to drain as Differential Input module, its grid are connected with the bias voltage node Bias2 of biasing module,
The source electrode of the 9th transistor M9 is connected with the tenth transistor M10 drain electrode, and the tenth transistor M10 grid is defeated as difference
Enter the normal phase input end IN+ of module, the drain electrode of the source electrode and the 11st transistor M11 of the tenth transistor with the 15th transistor
Source electrode connection, the 11st transistor M11 grid is connected with the bias voltage node Bias3 of common mode feedback module, the 11st
Transistor M11 source electrode is connected with earth terminal GND, and the grid of the 15th transistor is as the anti-phase defeated of Differential Input module
Enter and hold IN-, the drain electrode of the 15th transistor is connected with the 14th transistor M14 source electrode, the 14th transistor M14 leakage
Positive output end OUT+ of the pole as Differential Input module, its grid are connected with the bias voltage node Bias2 of biasing module, institute
The drain electrode for stating the 14th transistor is connected with the source electrode of the 13rd transistor, the tenth two-transistor M12 drain electrode and power end VDD
It is connected, its grid is connected with the positive output end OUT1+ of the first gain bootstrap module, its source electrode and the 13rd transistor M13's
Drain electrode is connected；13rd transistor M13 grid is connected with the positive output end OUT2+ of the second gain bootstrap module；
The difference turns single-ended block 16 by the 26th transistor M26, the 27th transistor M27, the 28th crystalline substance
Body pipe M28 and the 29th transistor M29 is formed, and the 26th transistor M26 drain electrode is connected with power end VDD, its grid
It is connected with the positive output end OUT+ of Differential Input module, its source electrode is connected with the 27th transistor M27 drain electrode；20th
Seven transistor M27 grid drains with it to be connected, and its source electrode is connected with earth terminal GND；28th transistor M28 drain electrode with
Power end VDD is connected, and its grid is connected with the reversed-phase output OUT- of Differential Input module, its source electrode and the 29th transistor
M29 drain electrode is connected, and as the output end OUT of whole operational amplifier；29th transistor M29 grid and the 20th
Seven transistor M27 drain electrode is connected, and its source electrode is connected with earth terminal GND.
All transistors are N-type TFT.
Above-described embodiment is the preferable embodiment of the utility model, but embodiment of the present utility model is not by described
The limitation of embodiment, it is other it is any without departing from Spirit Essence of the present utility model with made under principle change, modify, replace
Generation, combination, simplify, should be equivalent substitute mode, be included within the scope of protection of the utility model.
Claims (3)
1. a kind of operational amplifier, it is characterised in that including input stage circuit, biasing circuit and output-stage circuit；
The input stage circuit includes Differential Input module (15), first and second gain bootstrap module (13,14), the biasing
Circuit includes biasing module (11) and common-mode feedback module (12), and the output-stage circuit turns single-ended block (16) including difference；
The output signal of biasing module (11) includes bias voltage node Bias1 and bias voltage node Bias2；
The output signal of common-mode feedback module (12) includes bias voltage node Bias3；
The signal of first gain bootstrap module (13) includes normal phase input end IN1+, inverting input IN1-, positive output end
OUT1+ and reversed-phase output OUT1-；
The input signal of second gain bootstrap module (14) includes normal phase input end IN2+ and inverting input IN2-, and it exports letter
Number include positive output end OUT2+ and reversed-phase output OUT2-；
The input signal of Differential Input module (15) includes normal phase input end IN+ and inverting input IN-, and output signal is included just
Phase output terminal OUT+ and reversed-phase output OUT-；
The biasing module (11) is made up of the first transistor (M1), second transistor (M2) and third transistor (M3), described
The drain electrode of the first transistor (M1) and grid are connected with power end VDD, and the source electrode of the first transistor (M1) is respectively with second
The drain and gate connection of transistor (M 2), and as bias voltage node Bias2；The source electrode of the second transistor (M2)
The drain electrode with third transistor (M3) and grid are connected respectively, and are used as bias voltage node Bias1, the third transistor
(M3) source electrode is connected with earth terminal GND；
The common-mode feedback module (12) is made up of the 4th transistor (M4), the 5th transistor (M5) and the 6th transistor (M6),
The drain electrode of 4th transistor (M4) and the 5th transistor (M5) is connected with power end VDD, the source of the 4th transistor
Drain electrode of the source electrode of pole and the 5th transistor (M5) respectively with the 6th transistor (M6) is connected, the grid of the 6th transistor (M6)
Pole is connected with the drain electrode of the 6th transistor (M6), and is used as bias voltage node Bias3, and its source electrode is connected with earth terminal GND, institute
The grid for stating the 4th transistor (M4) is connected with the positive output end OUT+ of Differential Input module, the 5th transistor (M5)
Grid is connected with the reversed-phase output OUT- of Differential Input module；
The first gain bootstrap module (13) is by the 16th transistor (M16), the 17th transistor (M17), the 18th crystal
(M18), the 19th transistor (M19) and the 20th transistor (M20) is managed to form；The grid of 16th transistor (M16)
And drain electrode is connected with power end VDD, its source electrode is connected with the drain electrode of the 18th transistor (M18), the 18th transistor
(M18) positive output end OUT1+ of the drain electrode as the first gain bootstrap module, its grid are anti-phase defeated with Differential Input module
Go out to hold OUT- to be connected, the source electrode of the 18th transistor (M18) and the source electrode of the 19th transistor (M19) are brilliant with the 20th
The drain electrode connection of body pipe (M20), the reversed-phase output to drain as the first gain bootstrap module of the 19th transistor (M19)
OUT1-, the grid of the 19th transistor (M19) are connected with the positive output end OUT+ of Differential Input module, and the described 20th is brilliant
The grid of body pipe (M20) is connected with bias voltage node Bias1, source electrode and the earth terminal GND of the 20th transistor (M20)
Connection；
The second gain bootstrap module (14) is by the 21st transistor (M21), the 20th two-transistor (M22), the 20th
Three transistors (M23), the 24th transistor (M24) and the 25th transistor (M25) are formed；
The grid of 21st transistor (M21) and drain electrode are connected with power end VDD, its source electrode and the 23rd transistor
(M23) the positive output end OUT2+ that drain electrode is connected as the second gain bootstrap module, the grid of the 20th two-transistor (M22)
Pole and drain electrode are connected with power end VDD, and its source electrode is connected with the drain electrode of the 24th transistor (M24), and increase as second
Beneficial bootstrap module reversed-phase output OUT2-, its grid are connected with the positive output end OUT+ of Differential Input module, and the described 20th
The grid of three transistors (M23) is connected with the reversed-phase output OUT- of Differential Input module, the 25th transistor (M25)
Source electrode of the drain electrode respectively with the 23rd transistor (M23) and the 24th transistor (M24) be connected, the 25th transistor
(M25) grid is connected with the bias voltage node Bias1 of biasing module, the source electrode of the 25th transistor (M25) with
Earth terminal GND connections；
The Differential Input module is by the 7th transistor (M7), the 8th transistor (M8), the 9th transistor (M9), the tenth transistor
(M10), the 11st transistor (M11), the tenth two-transistor (M12), the 13rd transistor (M13), the 14th transistor (M14)
And the 15th transistor (M15) form；
The drain electrode of 7th transistor (M7) is connected with power end VDD, and its grid is anti-phase defeated with the first gain bootstrap module
Go out to hold OUT1- to be connected, its source electrode is connected with the drain electrode of the 8th transistor (M8), the grid and second of the 8th transistor (M8)
The reversed-phase output OUT2- of gain bootstrap module is connected, and its source electrode is connected with the drain electrode of the 9th transistor (M9), the 9th transistor
(M9) bias voltage node of reversed-phase output OUT- of the drain electrode as Differential Input module, its grid and biasing module
Bias2 is connected, and the source electrode of the 9th transistor (M9) is connected with the drain electrode of the tenth transistor (M10), the tenth transistor (M10)
Normal phase input end IN+ of the grid as Differential Input module, the source electrode and the 11st transistor of the tenth transistor (M10)
(M11) source electrode of the drain electrode with the 15th transistor (M15) is connected, the grid and common-mode feedback of the 11st transistor (M11)
The bias voltage node Bias3 of module is connected, and the source electrode of the 11st transistor (M11) is connected with earth terminal GND, and the described 15th
Inverting input IN- of the grid of transistor (M15) as Differential Input module, the drain electrode of the 15th transistor (M15)
It is connected with the source electrode of the 14th transistor (M14), the drain electrode of the 14th transistor (M14) is defeated as the positive of Differential Input module
Go out to hold OUT+, its grid is connected with the bias voltage node Bias2 of biasing module, the drain electrode of the 14th transistor (M14)
Be connected with the source electrode of the 13rd transistor (M13), the drain electrode of the tenth two-transistor (M12) is connected with power end VDD, its grid with
The positive output end OUT1+ of first gain bootstrap module is connected, and its source electrode is connected with the drain electrode of the 13rd transistor (M13)；The
The grid of 13 transistors (M13) is connected with the positive output end OUT2+ of the second gain bootstrap module；
The difference turns single-ended block by the 26th transistor (M26), the 27th transistor (M27), the 28th crystal
To manage (M28) and the 29th transistor (M29) is formed, the drain electrode of the 26th transistor (M26) is connected with power end VDD, its
Grid is connected with the positive output end OUT+ of Differential Input module, and its source electrode is connected with the drain electrode of the 27th transistor (M27)；
The grid of 27th transistor (M27) drains with it to be connected, and its source electrode is connected with earth terminal GND；28th transistor
(M28) drain electrode is connected with power end VDD, and its grid is connected with the reversed-phase output OUT- of Differential Input module, its source electrode with
The drain electrode of 29th transistor (M29) is connected, and as the output end OUT of whole operational amplifier；29th transistor
(M29) grid is connected with the drain electrode of the 27th transistor (M27), and its source electrode is connected with earth terminal GND.
2. a kind of operational amplifier according to claim 1, it is characterised in that all transistors are N-type film crystalline substance
Body pipe.
A kind of 3. operational amplifier according to claim 1, it is characterised in that the positive output end of Differential Input module
The OUT+ and reversed-phase output OUT- of Differential Input module is respectively as common-mode feedback module, the first gain bootstrap module, second
Gain bootstrap module and difference turn the input signal of single-ended block.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720551612.9U CN206835052U (en) | 2017-05-18 | 2017-05-18 | A kind of operational amplifier |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720551612.9U CN206835052U (en) | 2017-05-18 | 2017-05-18 | A kind of operational amplifier |
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| Publication Number | Publication Date |
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| CN206835052U true CN206835052U (en) | 2018-01-02 |
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| CN201720551612.9U Expired - Fee Related CN206835052U (en) | 2017-05-18 | 2017-05-18 | A kind of operational amplifier |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107134983A (en) * | 2017-05-18 | 2017-09-05 | 华南理工大学 | A kind of operational amplifier |
| CN111277235A (en) * | 2020-02-26 | 2020-06-12 | 华南理工大学 | Gain-adjustable cross-coupling operational amplification circuit |
| CN113341212A (en) * | 2021-06-05 | 2021-09-03 | 晶通微电子(南京)有限公司 | Differential voltage detection circuit with wide voltage input range |
-
2017
- 2017-05-18 CN CN201720551612.9U patent/CN206835052U/en not_active Expired - Fee Related
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107134983A (en) * | 2017-05-18 | 2017-09-05 | 华南理工大学 | A kind of operational amplifier |
| CN111277235A (en) * | 2020-02-26 | 2020-06-12 | 华南理工大学 | Gain-adjustable cross-coupling operational amplification circuit |
| CN111277235B (en) * | 2020-02-26 | 2023-06-20 | 华南理工大学 | Gain-adjustable cross-coupling operational amplifier circuit |
| CN113341212A (en) * | 2021-06-05 | 2021-09-03 | 晶通微电子(南京)有限公司 | Differential voltage detection circuit with wide voltage input range |
| CN113341212B (en) * | 2021-06-05 | 2022-08-02 | 晶通微电子(南京)有限公司 | Differential voltage detection circuit with wide voltage input range |
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| CF01 | Termination of patent right due to non-payment of annual fee | ||
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Granted publication date: 20180102 |