CN108663914B

CN108663914B - Baking method

Info

Publication number: CN108663914B
Application number: CN201710202963.3A
Authority: CN
Inventors: 赵家峥; 王忠诚
Original assignee: Taiwan Semiconductor Manufacturing Co TSMC Ltd
Current assignee: Taiwan Semiconductor Manufacturing Co TSMC Ltd
Priority date: 2017-03-30
Filing date: 2017-03-30
Publication date: 2021-10-08
Anticipated expiration: 2037-03-30
Also published as: CN108663914A

Abstract

The embodiment of the disclosure provides a baking method, which comprises the steps of respectively moving a first wafer and a second wafer into a first baking unit and a second baking unit. And heating the first heating plate and the second heating plate to a preset temperature. The first and second support pins are raised to support the first wafer above the first heating plate and the second wafer above the second heating plate. And then, the first supporting pin is adjusted to be lowered, so that the first wafer is placed on the first heating plate and is baked at a preset temperature. During baking the first wafer, the second support pins are kept lifted and support the second wafer above the second heating plate to preheat the second wafer. After the first supporting pin is adjusted down, the second supporting pin is adjusted down, so that the second wafer is placed on the second heating plate and is baked at a preset temperature.

Description

Baking method

Technical Field

The present disclosure relates to a baking method, and more particularly, to a baking method applicable to a Post Exposure Baking (PEB) process.

Background

The semiconductor integrated circuit industry has experienced rapid growth, and advances in integrated circuit materials and design techniques have resulted in several generations of integrated circuits, each generation having smaller and more complex circuits than the previous generation. In the development of integrated circuits, the number of devices per chip area has increased and the geometry has decreased in size. To ensure that the components forming the circuit have the correct dimensions (i.e., do not have the wrong overlap or connection with each other), design rules are typically used to define parameters in designing the circuit. For example, the Critical Dimension (CD) defines the minimum line width of a circuit or the minimum distance between two elements, and can be used to evaluate and control the graphic processing accuracy of a process in an integrated circuit process. The critical dimension may also be referred to as a critical dimension or minimum feature size.

Integrated circuit processing typically includes depositing a layer of material, such as a dielectric layer, a conductive layer, or a semiconductor layer, on a semiconductor substrate, and patterning the layer of material (e.g., a photolithography process and/or an etching process) to form integrated circuit devices on the semiconductor substrate. The photolithography process generally includes the main steps of coating a photoresist, exposing, developing, and the like. Specifically, a pattern required for a device is first formed on a photomask, an exposure process is used to cause a photochemical reaction (e.g., generation of a photo acid) in a region of the photoresist not shielded by the photomask pattern, thereby changing the properties of the portion of the photoresist, and then a development process is performed, in which the exposed portion of the photoresist is dissolved and removed using an appropriate developer in the case of a positive photoresist, and the unexposed portion of the photoresist is dissolved and removed in the case of a negative photoresist, thereby leaving the same photoresist pattern as the photomask pattern. Thereafter, the photoresist pattern is transferred to the material layer to be patterned using an etching process to form the integrated circuit device.

The exposed photoresist is typically subjected to a post-exposure bake process prior to the development process, which causes the photoacid in the exposed photoresist to diffuse, thereby increasing or decreasing the solubility of the photoresist in the subsequent development process. As the solubility changes, the geometry of the photoresist pattern changes, and the post-exposure bake process affects the critical dimensions of the integrated circuit device.

In view of the foregoing, a baking method capable of precisely controlling a post-exposure baking process is required to facilitate manufacturing of integrated circuit devices with good Critical Dimension Uniformity (CDU).

Disclosure of Invention

The disclosed embodiments provide a baking method. The baking method includes moving a first wafer and a second wafer into a first baking unit and a second baking unit, respectively. The first baking unit comprises a first heating plate and a plurality of first supporting pins which are positioned in the first heating plate and can lift, and the second baking unit comprises a second heating plate and a plurality of second supporting pins which are positioned in the second heating plate and can lift. The baking method also comprises the step of heating the first heating plate and the second heating plate to a preset temperature. The baking method further comprises lifting the first support pin and the second support pin to support the first wafer above the first heating plate and the second wafer above the second heating plate. Furthermore, the baking method comprises the step of adjusting and descending the first supporting pin so that the first wafer is placed on the first heating plate and is baked at a preset temperature. During baking the first wafer, the second support pins are kept lifted and support the second wafer above the second heating plate to preheat the second wafer. The baking method further comprises the step of lowering the second supporting pin after lowering the first supporting pin, so that the second wafer is placed on the second heating plate and is baked at a preset temperature.

The embodiment of the disclosure provides a baking method, which includes setting a first preheating time of a first baking unit and a second preheating time of a second baking unit. The baking method further comprises moving a first substrate and a second substrate into the first baking unit and the second baking unit, respectively. The baking method further comprises the step of providing heat energy to the first substrate by the first baking unit in the first preheating time so as to heat a first photoresist layer on the first substrate. Furthermore, the baking method comprises the step that the second baking unit provides heat energy to the second substrate in the second preheating time so as to heat a second photoresist layer on the second substrate. The baking method further comprises baking the first photoresist layer at a predetermined temperature by the first baking unit within a predetermined baking time. The baking method further comprises baking the second photoresist layer at a predetermined temperature by the second baking unit within a predetermined baking time. The first warm-up time is set to be different from the second warm-up time.

The embodiment of the disclosure provides a baking method, which includes heating a first heating plate and a second heating plate to a predetermined temperature. The first heating plate is provided with a plurality of first spacing pins and a plurality of liftable first supporting pins, and the second heating plate is provided with a plurality of second spacing pins and a plurality of liftable second supporting pins. The baking method further includes placing a first substrate on the first support pins to heat a first photoresist layer exposed on the first substrate. The baking method further includes placing a second substrate on the second support pins to heat a second photoresist layer exposed on the second substrate. The second substrate is placed on the second support pins for a time greater than the time the first substrate is placed on the first support pins. Furthermore, the baking method includes lowering the first support pin until the first spacing pin contacts and supports the first substrate, so that the first heating plate bakes the first photoresist layer at a predetermined temperature. The baking method further includes lowering the second support pins until the second spacer pins contact and support the second substrate such that the second heater plate bakes the second photoresist layer at a predetermined temperature.

Drawings

FIG. 1 is a schematic diagram of a toasting apparatus according to some embodiments.

FIG. 2A illustrates a top view of a bake unit, according to some embodiments.

FIG. 2B illustrates a cross-sectional view of a bake unit according to some embodiments.

FIGS. 3A-3N are schematic cross-sectional views illustrating a baking method according to some embodiments.

FIG. 4 is a graph depicting time versus temperature for a baking method according to some embodiments.

Description of reference numerals:

100 baking device

110. 120, 130 baking unit

110A, 120A, 130A load bearing element

110B, 120B, 130B heating element

111. 121, 131 moving arm

112. 122, 132 Carrier

113. 123, 133 heating plate

114. 124, 134 support pin

115. 125, 135 space pin

210. 220, 230, 310, 320, 330 substrate

211 semiconductor layer

212 material layer

213 Photoresist layer

410. 420, 430 temperature change curve

T₀Initial temperature

T₁Baking temperature

T₂、T₃Preheating temperature

t₀Initial time

t₁End time

t₂、t₃End time of preheating

t₂’、t₃' end time of baking

t_bTime of baking

Detailed Description

The following disclosure provides many different embodiments, or examples, for implementing different features of the disclosure. Rather, the following disclosure of the present invention describes specific examples of components and arrangements thereof in order to simplify the present disclosure. Of course, these specific examples are not intended to limit the disclosure. For example, if the following disclosure of the present specification recites forming a first feature on or over a second feature, that includes embodiments in which the first feature and the second feature are formed in direct contact, also includes embodiments in which additional features may be formed between the first feature and the second feature, such that the first feature and the second feature may not be in direct contact. In addition, various examples in the description of the present disclosure may use repeated reference characters and/or words. These repeated symbols or words are provided for simplicity and clarity and are not intended to limit the relationship between the various embodiments and/or the appearance structure.

Furthermore, spatially relative terms, such as "under", "below", "lower", "over", "upper" and the like, may be used herein for convenience in describing the relationship of an element or feature to another element(s) or feature(s) in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The device may be otherwise oriented (e.g., rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly. It will be appreciated that additional operational steps may be provided before, during and after the method, and that in some method embodiments, some of the operational steps may be replaced or omitted.

The embodiments described below may discuss specific details such as the application of the baking method to a post-exposure baking process in a photolithography process, however, one skilled in the art can readily appreciate from the disclosure that other various applications are contemplated in other embodiments, such as the application of the baking method to any suitable heating process, and not limited to a post-exposure baking process. It should be noted that the embodiments discussed herein may not necessarily recite every operational step for a baking method, and the baking method may be discussed in a particular order of progression, although in other method embodiments, the progression may be in any reasonable order. The embodiments described below may be applied to any suitable technology generation, such as 7 nanometers (or more than 7 nanometers) and 5 nanometers (or less than 5 nanometers).

The advanced photolithography processes, methods, and materials described in embodiments of the present disclosure may be suitable for use in many applications, including fin-type field effect transistors (finfets). For example, fin structures may be patterned to create relatively small spaces between structures, to which embodiments of the present disclosure are suitably applied. Furthermore, embodiments of the present disclosure may be applied to processes for forming spacers (spacers) of fin structures of finfet transistors.

Before explaining the embodiments in detail, some of the advantageous features and aspects of the embodiments of the present disclosure are briefly described. Generally, the baking apparatus includes a plurality of baking units, and one baking unit heats one wafer at a time. However, the total heat (or heat equivalent) absorbed by different wafers may be different from one another in different baking units, resulting in differences in baking among the wafers, for example, errors in critical dimensions among the wafers. Accordingly, the embodiments of the present disclosure provide a baking method, which compensates for insufficient heat absorption by one or more wafers by additionally heating the wafers (e.g., pre-heating or supplemental heating), so that the total heat absorption by all the wafers is substantially the same, thereby reducing or eliminating the difference in baking among different wafers, for example, enabling the wafers to have a uniform critical dimension. Furthermore, according to the actual requirement, one of the wafers may be additionally heated for a longer time to supplement more heat energy which is not absorbed sufficiently, and the other wafer may be additionally heated for a shorter time to supplement a small amount of heat energy which is not absorbed sufficiently. In other words, the additional heating time required for each wafer in the different baking units is respectively different and can be flexibly adjusted, so that the total heat absorbed by each wafer from the different baking units is approximately the same, thereby ensuring the quality of all wafers and greatly improving the production efficiency.

Some embodiments of the disclosure are described in detail below. Fig. 1 is a schematic diagram illustrating a baking apparatus according to some embodiments, and fig. 2A and 2B are schematic diagrams illustrating a top view and a cross-sectional view of a baking unit according to some embodiments, respectively.

FIG. 1 illustrates a baking apparatus 100. The baking apparatus 100 is a heating device applied to a post-exposure baking process, that is, the baking apparatus 100 is a heating device installed in a photolithography system, but the embodiment of the disclosure is not limited thereto. The baking apparatus 100 includes a plurality of baking units, such as the baking unit 110, the baking unit 120, and the baking unit 130 shown in fig. 1. In order to simplify the drawings, fig. 1 mainly illustrates three baking units, but the embodiment of the disclosure is not limited thereto, and the baking apparatus 100 may include more than three baking units or less than three baking units. For example, the number of bake units within the bake device 100 may be two to fifteen in total.

Referring to fig. 2A and 2B, the chamber of the baking unit 110 includes a carrying element 110A and a heating element 110B. In some embodiments, the carrier device 110A has a moving arm 111 and a carrier 112 connected to the moving arm 111. The moving arm 111 can move horizontally along a track (not shown) in the carrying element 110A, for example, in a direction approaching the heating element 110B and in a direction away from the heating element 110B. The carrier 112 is fixed on the moving arm 111, and the carrier 112 is used for carrying a substrate (e.g., a wafer) to be heated and also for carrying the heated substrate.

As shown in fig. 2A and 2B, in some embodiments, the heating element 110B has a heating plate 113, a plurality of support pins 114 and a plurality of spacer pins (gap pins) 115, wherein the support pins and the spacer pins may also be referred to as support pins and spacer pins, respectively. The heating plate 113 is used to bake the substrate to be heated, for example, by supplying heat energy through a heater (not shown). In some embodiments, the heater is an infrared heater, an electromagnetic heater, or other suitable heater. In some embodiments, the heater plate 113 comprises a metallic material, a ceramic material, or other suitable material.

The support pins 114 are used to support a substrate to be heated, and the support pins 114 are elevating members that can move up and down with respect to the heating plate 113, for example, can be elevated from inside the heating plate 113 to above the heating plate 113 and elevated from above the heating plate 113 to inside the heating plate 113. In some embodiments, support pins 114 comprise a metallic material, a ceramic material, or other suitable material. The spacer pins 115 are fixed to the surface of the heater plate 113, and the spacer pins 115 serve to separate the substrate being heated from direct contact with the heater plate 113 during the baking process. In some embodiments, the spacing pin 115 comprises a metallic material, a ceramic material, or other suitable material.

In some embodiments, the support pins 114 and the spacer pins 115 have a substantially circular top profile, as shown in FIG. 2A. However, embodiments of the present disclosure are not limited thereto, and the support pins 114 and the spacing pins 115 may have a rectangular or other shape in top view profile. In some embodiments, the height of the spacer pins 115 is less than the height of the support pins 114, as shown in FIG. 2B. Fig. 2A and 2B illustrate the baking unit 110 as an example, but the embodiment of the disclosure has many variations and is not limited to fig. 2A and 2B, and the shape, size, number, position and arrangement of the supporting pins 114 and the spacing pins 115 can be changed according to actual requirements.

The following describes steps of performing a baking process using the baking unit 110 of the baking apparatus 100. First, a substrate (e.g., a wafer) to be heated is moved into the bake unit 110 of the bake device 100. Before the baking process, the carrier 112 supports the substrate to be baked, and the moving arm 111 moves along the track toward the heating element 110B, so that the carrier 112 and the substrate to be baked move to a position right above the heating element 110B. In some embodiments, carrier plate 112 has an opening or groove, as shown in fig. 2A, which overlaps support pins 114 when carrier plate 112 is moved over heating element 110B. Then, the support pins 114 are lifted from the inside of the heating plate 113 onto the heating plate 113, and the support pins 114 pass through the openings of the carrier plate 112 until supporting the substrate waiting for baking, so that the substrate waiting for baking is separated from the carrier plate 112. Then, the moving arm 111 moves away from the heating element 110B to move the carrier plate 112 away. Then, the support pins 114 are lowered into the heating plate 113, so that the substrate waiting for baking is separated from the support pins 114 and becomes supported by the spacer pins 115 on the surface of the heating plate 113 to start the baking process for the substrate. The substrate is supported by spacer pins 115 and may also be considered as being placed on a heater plate 113.

After the baking process is finished, the support pins 114 are lifted from the inside of the heater plate 113 onto the heater plate 113 until the baked substrate is supported, so that the baked substrate is separated from the spacer pins 115 and becomes supported by the support pins 114. Then, the moving arm 111 moves toward the heating element 110B, so that the carrier plate 112 moves to a position right above the heating element 110B. Thereafter, the support pins 114 are lowered into the heating plate 113, so that the baked substrate is separated from the support pins 114 and becomes carried by the carrier plate 112. The moving arm 111 then moves away from the heating element 110B, moving the baked substrate away from the heating element 110B. The baked substrate is subsequently removed from the baking unit 110 of the baking apparatus 100 to continue with other processes.

The structures of the

baking units

120 and 130 of the baking apparatus 100 are substantially the same as those of the baking unit 110, and thus, reference may be made to the descriptions of fig. 2A and 2B, and a description thereof will not be repeated. Furthermore, the steps of performing the baking process by using the

baking units

120 and 130 of the baking apparatus 100 are substantially the same as the steps of performing the baking process by using the baking unit 110, so that reference may be made to the description of the foregoing embodiments, and the description will not be repeated.

The baking method of the embodiment of the disclosure can be applied to a post-exposure baking process in a photolithography process. Referring to fig. 3A, in some embodiments, a substrate 210 (e.g., a wafer) includes a semiconductor layer 211, and the semiconductor layer 211 may include silicon or other semiconductor materials. A material layer 212 is deposited on the semiconductor layer 211, and the material layer 212 may include a dielectric material, a conductive material, or a semiconductor material. To form the material layer 212 into a desired pattern, a photolithography process is performed on the material layer 212. In some embodiments, the photolithography process may include coating a photoresist, soft baking (soft baking), exposure, post-exposure baking, development, hard baking (hard baking), and other suitable processing steps.

For example, a photoresist layer 213 is coated on the material layer 212, and the photoresist layer 213 may include a positive photoresist material or a negative photoresist material. In some embodiments, the photoresist layer 213 includes a sensitizer (sensitizer), a polymer material (e.g., a resin), and a solvent. In some embodiments, the photoresist layer 213 may include a photoacid generator, a photolytic base, or a combination thereof. In some embodiments, the photoresist layer 213 may be subjected to a soft baking step to remove and reduce the solvent in the photoresist layer 213 and harden the photoresist layer 213.

Next, an exposure step is performed, using a photomask having the desired pattern of the material layer 212, to apply light energy through the photomask onto the photoresist layer 213 to define a photoresist pattern. Examples of the optical energy may include ion beam, X-ray, Deep Ultraviolet (DUV), Extreme Ultraviolet (EUV), and electron-beam writing.

In detail, in the exposure step, the photoresist layer 213 is exposed to light energy, the areas of the photoresist layer 213 not shielded by the photomask are photochemically reacted to form exposed portions, and the areas of the photoresist layer 213 shielded by the photomask are formed unexposed portions. The exposed portions of the photoresist layer 213 generate photoacid (or acid) from the irradiation of light energy, which affects the solubility (solubility) of the exposed portions of the photoresist layer 213 to a developer in a subsequent development step. For example, when the photoresist layer 213 is made of a positive photoresist material, the acid cleaves the positive photoresist material and breaks bonds, so that the exposed portion of the photoresist layer 213 becomes more hydrophilic and more soluble, and thus the exposed portion of the photoresist layer 213 can be dissolved and removed using an appropriate developer. On the other hand, when the photoresist layer 213 is composed of a negative photoresist material, the acid-catalyzed negative photoresist material cross-links with each other, so that the exposed portion of the photoresist layer 213 has higher hydrophobicity (oleophilicity) and becomes less soluble, and thus the unexposed portion of the photoresist layer 213 can be dissolved and removed using an appropriate developer.

In some embodiments, the post-exposure baking of the photoresist layer 213 may enhance photo-acid amplification (acid amplification) or photo-acid diffusion, or generate thermal acid (thermal acid) due to providing thermal energy to the photoresist layer 213. During the step of performing the post-exposure bake, the acid has a higher free thermal energy, causing the acid to move and resulting in a more uniform distribution of the acid. The diffusion effect of the acid is more pronounced as the temperature of the post-exposure bake is higher. The acid needs to diffuse into the appropriate locations (e.g., the boundaries of the photoresist pattern) in the exposed portions of the photoresist layer 213 in order to form a precise photoresist pattern within the photoresist layer 213. In other words, since the post-exposure bake step affects the diffusion of the acid, the degree of the acid diffusion will affect the formed photoresist pattern, and thus the pattern formed by the subsequent material layer 212 and its critical dimension will also be affected by the post-exposure bake step. For example, as the post-exposure bake temperature is higher, the critical dimension of the photoresist pattern of the positive photoresist material (which also corresponds to the critical dimension of the pattern formed by the material layer 212) is larger, while the critical dimension of the photoresist pattern of the negative photoresist material is smaller.

Furthermore, the greater the sensitivity of the photoresist material to temperature, the greater the impact of the post-exposure bake step on the critical dimensions of the photoresist pattern and the pattern formed by the material layer 212. In general, negative photoresist materials are more sensitive to temperature than positive photoresist materials, and therefore the post-exposure bake step has a greater impact on the critical dimension of the photoresist pattern of the negative photoresist material relative to the positive photoresist material. In some embodiments, the sensitivity of the photoresist layer 213 to temperature ranges from-2 nm/deg.C to-10 nm/deg.C, for example, 1 deg.C higher per liter, the critical dimension of the photoresist pattern may be reduced by 2-10 nm.

As previously described, in some embodiments, the photoresist layer 213 includes a photo acid generator and/or a photo-degradable base, and after the exposure and/or post-exposure baking steps, the photo acid generator and/or the photo-degradable base in the exposed portions of the photoresist layer 213 are activated by the irradiation of light energy, the photo acid generator decomposes and forms a small amount of acid, and the photo-degradable base generates a weak acid to neutralize the base itself or become a weak base, thereby further increasing or decreasing the solubility of the exposed portions of the photoresist layer 213 to the developer. Where the photolytic base can buffer or neutralize acids and affect the availability of the generated acids, the photolytic base can help increase the acid/base contrast between exposed and unexposed portions, thereby increasing the solubility differential between exposed and unexposed portions.

After the post-exposure baking step on the substrate 210, the photoresist layer 213 is developed with a positive or negative developer (not shown) to remove the exposed or unexposed portions of the photoresist layer 213, thereby forming the patterned photoresist layer 213. Next, a hard baking step (not shown) is performed on the patterned photoresist layer 213 to remove the solvent in the photoresist layer 213 and increase the adhesion and etching resistance of the photoresist layer 213. After the photolithography process of the above steps is completed, an etching process (not shown) is performed on the material layer 212 under the photoresist layer 213 by using the patterned photoresist layer 213 as a mask, and the pattern is transferred to the material layer 212 to form the desired integrated circuit device.

The baking method according to the embodiment of the present disclosure is described in detail below with reference to fig. 3A to 3N. Fig. 3A to 3N are schematic cross-sectional views illustrating a baking method according to some embodiments, which includes different stages of performing a baking process, but the embodiments of the present disclosure are not limited to the various stages illustrated in fig. 3A to 3N. For simplicity and clarity, only three bake units are used as an example, but the embodiments of the present disclosure can be applied to other numbers of bake units.

First, a plurality of substrates (e.g., wafers) to be heated are provided, including substrate 210, substrate 220, and substrate 230. The structure and formation method of the substrate 220 and the substrate 230 are substantially the same as those of the substrate 210, and thus, reference may be made to the description of the foregoing embodiments without repeated descriptions. In some embodiments, each of the photoresist layers in the

substrates

210, 220, and 230 is made of the same material (e.g., a negative photoresist material), so that the sensitivity to temperature of each of the photoresist layers in the

substrates

210, 220, and 230 is substantially the same.

Referring to fig. 3A, the substrate 210, the substrate 220, and the substrate 230 are respectively moved into the

baking units

110, 120, and 130 of the baking apparatus 100. The carrier 112 of the bake unit 110 supports the substrate 210 waiting to be baked, the carrier 122 of the bake unit 120 supports the substrate 220 waiting to be baked, and the carrier 132 of the bake unit 130 supports the substrate 230 waiting to be baked. In some embodiments, the substrate 210, the substrate 220, and the substrate 230 are moved into the baking apparatus 100 simultaneously.

The

heating plates

113, 123, and 133 of the

baking units

110, 120, and 130 are heated to a predetermined baking temperature. In some embodiments, the heater plate 113, the heater plate 123, and the heater plate 133 are raised to substantially the same baking temperature. In some embodiments, the baking temperature of the post-exposure baking process is in the range of 70 ℃ to 120 ℃, for example, 88 ℃, 90 ℃, or 100 ℃.

Then, the moving arm 111 of the baking unit 110 moves the carrier plate 112 and the substrate 210 waiting to be baked to be directly above the heating element 110B, and the supporting pin 114 is lifted from the heating plate 113 onto the heating plate 113 until the substrate 210 waiting to be baked is supported. Then, the carrier plate 112 is moved away from the heating element 110B by the moving arm 111, as shown in fig. 3B. Similarly, the moving arm 121 of the baking unit 120 moves the carrier plate 122 and the substrate 220 waiting to be baked to a position right above the heating element 120B, and the supporting pin 124 is lifted from the heating plate 123 onto the heating plate 123 until the substrate 220 waiting to be baked is supported, and the moving arm 121 and the carrier plate 122 are removed. Furthermore, the moving arm 131 of the baking unit 130 moves the carrier 132 and the substrate 230 waiting to be baked to a position right above the heating element 130B, and the support pins 134 are lifted from the heating plate 133 onto the heating plate 133 until the substrate 230 waiting to be baked is supported, and the moving arm 131 and the carrier 132 are removed.

Referring to fig. 3C, the support pins 114 of the baking unit 110 are lowered into the heating plate 113, so that the substrate 210 waiting to be baked is lowered and becomes supported by the spacer pins 115 to start the post-exposure baking process for the substrate 210. In some embodiments, the bake time of the post-exposure bake process ranges from 30 seconds(s) to 150 seconds. This baking time refers to the time that the substrate 210 is placed on the spacer pins 115.

The heater plate 113, which has been raised to the baking temperature, provides heat energy to the substrate 210 placed on the spacer pins 115, and the heater plate 113 provides heat energy mainly in a radiation manner, so the spaced distance between the heater plate 113 and the substrate 210 (i.e., the height of the spacer pins 115) will affect the heat energy absorbed by the substrate 210 from the heater plate 113, e.g., the farther the distance between the heater plate 113 and the substrate 210, the less heat energy absorbed by the substrate 210 from the heater plate 113.

In some cases, the heating elements of different baking units in the same baking device may have heating efficiency and/or heat dissipation efficiency that are not exactly the same. For example, the height of the spacer pins on different heater plates (which height is measured from the bottom surface of the spacer pin connecting the heater plates to the top surface of the spacer pins) may not be exactly the same. Differences in baking may occur between different substrates due to the fact that there may be height differences between the spacer pins of multiple heater plates, resulting in inconsistent spacing distances between different heater plates and the substrate being heated, resulting in inconsistent total heat absorption by the substrate from different heater plates. As mentioned above, the post-exposure bake process affects the diffusion of acid within the photoresist material, and the degree of acid diffusion affects the critical dimension, especially the negative photoresist material. Therefore, when the total heat absorbed by the photoresist material from different heating plates is not uniform, a deviation of critical dimensions may occur, and it is difficult to ensure good process quality.

On the other hand, in some cases, in order to improve the process quality and reduce the critical dimension deviation, one or more baking units with larger heat supply difference in the same baking apparatus may be shut down (i.e., the heating plate with larger critical dimension difference is stopped). However, the reduction of the number of baking units operating in the same baking apparatus may result in a reduction of process efficiency. Therefore, good process quality and process efficiency are difficult to achieve.

The embodiments of the present disclosure provide an improved baking method, which compensates for insufficient heat absorbed by the substrate by additionally heating the substrate, so that the total heat absorbed by all the substrates is substantially the same, thereby reducing or eliminating the baking difference between different substrates, and therefore the diffusion degree of the acid in the photoresist material in different substrates can be adjusted to be substantially the same, so that the critical dimension between different substrates is converged and tends to be uniform. In some embodiments, the influence of the deviations of the

baking units

110, 120, and 130 on the critical dimension (or the average value of the critical dimension) during the baking process can be counted according to the historical process data of the baking apparatus 100, and the difference of the total heat absorbed by the different substrates in the

baking units

110, 120, and 130 can be obtained from the statistical result, and the additional heating time required for supplementing the lacking heat in the

baking units

110, 120, and 130 can be set and adjusted based on the difference. For example, one of the substrates may be additionally heated for a longer time to compensate for more thermal energy, while the other substrate is additionally heated for a shorter time to compensate for a smaller amount of thermal energy, with the result that all substrates are able to absorb nearly the same total heat. Furthermore, it is not necessary to shut down the roasting unit having a large difference in heat supply in the roasting apparatus 100, so that it is possible to ensure good process quality while also achieving high productivity, such as high WPH (waters per hour).

In some embodiments, the additional heating of the substrate includes pre-heating and/or supplemental heating. The pre-heating refers to additional heating of the substrate before the post-exposure bake process is performed, and the supplementary heating refers to additional heating of the substrate after the post-exposure bake process is performed. The preheating method will be described as an example, but the present disclosure is not limited thereto.

In some embodiments, the substrate 210 may absorb sufficient total heat from the heating plate 113 of the bake unit 110 during the post-exposure bake process, and thus no additional heating of the substrate 210 is required, that is, the additional heating time (e.g., pre-heating time) required within the bake unit 110 is 0 seconds. However, the embodiments of the present disclosure are not limited, and in some other embodiments, the total amount of heat that the substrate 210 may absorb from the heating plate 113 of the bake unit 110 during the post-exposure bake process is insufficient, thus requiring additional heating of the substrate 210. In this case, when the substrate 210 waiting to be baked is placed on the support pins 114, the support pins 114 are not immediately turned down, but the substrate 210 waiting to be baked is maintained to be supported by the support pins 114, and at this time, the heating plate 113, which has been raised to the baking temperature, radiatively supplies additional heat energy to the substrate 210 placed on the support pins 114, so that it is possible to compensate for insufficient heat energy that may be absorbed during the post-exposure baking process in advance. After additional heating of the substrate 210 to be baked, the support pins 114 are lowered into the heating plate 113 so that the substrate 210 to be baked becomes supported by the spacer pins 115 to start the post-exposure baking process for the substrate 210.

In some embodiments, the time that the substrate 210 waiting to be baked is placed on the support pins 114 ranges from 0 seconds to 30 seconds. In some embodiments, the time that the substrate 210 waiting to be baked is placed on the support pins 114 is less than the time that the substrate 210 being baked is placed on the spacer pins 115. The time that the substrate 210 waiting to be baked remains placed on the support pins 114 may also be referred to as an additional heating time (e.g., a preheating time), in other words, the additional heating time within the baking unit 110 is less than the baking time of the post-exposure baking process.

In some embodiments, the substrate 210 waiting to be baked is placed on the support pins 114 for preheating, so that the acid in the photoresist layer 213 in the substrate 210 is uniformly diffused to obtain a stable critical dimension and a precise photoresist pattern. In contrast, if the photoresist material is placed directly on the spacer pins for preheating (or the bake time is directly increased), it may result in too aggressive acid diffusion within the photoresist material and less control of the critical dimensions.

According to some embodiments of the present disclosure, during the post-exposure bake process, the total heat absorbed by another substrate 220 from the heating plate 123 of the bake unit 120 is insufficient, and thus the substrate 220 may be additionally heated. In this case, the support pins 124 remain raised to continue to support the substrate 220 waiting for baking, as shown in FIG. 3C. At this time, the heating plate 123, which has been raised to the baking temperature, provides additional thermal energy to the substrate 220 placed on the support pins 124 in a radiation manner to compensate for insufficient thermal energy that may be absorbed during the post-exposure baking process in advance.

In some embodiments, the time that the substrate 220 waiting to be baked is placed on the support pins 124 ranges from 0 seconds to 30 seconds. In some embodiments, the total amount of heat absorbed by the substrate 220 from the baking unit 120 during the post-exposure baking process is less than the total amount of heat absorbed by the substrate 210 from the baking unit 110 during the post-exposure baking process, and thus the time for which the substrate 220 waiting to be baked is placed on the support pins 124 is set to be greater than the time for which the substrate 210 waiting to be baked is placed on the support pins 114, such that the total amount of heat eventually absorbed by the substrate 220 from the baking unit 120 is substantially equal to the total amount of heat eventually absorbed by the substrate 210 from the baking unit 110. As shown in fig. 3C, when the substrate 210 is placed on the spacer pins 115 and the post-exposure bake process is started, the substrate 220 still remains placed on the support pins 124 for additional heating, and the post-exposure bake process has not yet been started. That is, the preheating time in the baking unit 120 is longer than the preheating time in the baking unit 110 (or the baking unit 120 needs to be preheated and the baking unit 110 does not need to be preheated), so as to enhance the compensation of the insufficient heat energy absorbed during the post-exposure baking process.

According to some embodiments of the present disclosure, during the post-exposure bake process, the total heat absorbed by another substrate 230 from the heating plate 133 of the bake unit 130 is insufficient, and thus the substrate 230 may be additionally heated. Similar to the baking unit 120, the support pins 134 are kept elevated to continuously support the substrate 230 waiting for baking to supply radiant heat to the substrate 230 through the heating plate 123, as shown in fig. 3C.

In some embodiments, the time that the substrate 230 waiting to be baked is placed on the support pins 134 ranges from 0 seconds to 30 seconds. In some embodiments, the total amount of heat absorbed by the substrate 230 from the bake unit 130 during the post-exposure bake process is less than the total amount of heat absorbed by the substrate 210 from the bake unit 110 during the post-exposure bake process, so as shown in fig. 3C, when the substrate 210 is placed on the spacer pins 115 and the post-exposure bake process is started, the substrate 230 remains placed on the support pins 134 for additional heating, and the post-exposure bake process has not yet been started. In some embodiments, the substrate 210 is subjected to a post-exposure bake process while the substrate 220 and the substrate 230 are both kept preheated. That is, the preheating time in the

baking units

120 and 130 is longer than the preheating time in the baking unit 110 (the preheating time may be 0 second). The preheat time in the bake unit 130 may then be greater than, equal to, or less than the preheat time in the bake unit 120, depending on how different the total heat absorbed from the different bake units is.

Referring to fig. 3D, when the pre-heating time set in the baking unit 120 is reached, the additional heating step for the substrate 220 to be baked is completed. Next, the support pins 124 are lowered into the heating plate 123 so that the substrate 220 waiting for baking becomes supported by the spacer pins 125 to start the post-exposure baking process for the substrate 220. In some embodiments, substrate 210 continues with a post-exposure bake process, substrate 220 begins with a post-exposure bake process, and substrate 230 remains preheated.

Referring to fig. 3E, after the pre-heat time set in the baking unit 130 is reached, the supporting pins 134 are lowered into the heating plate 133, so that the substrate 230 waiting to be baked becomes supported by the spacing pins 135, and the post-exposure baking process for the substrate 230 is started. At this time, the substrate 210, the substrate 220 and the substrate 230 are all subjected to the post-exposure baking process, however, the time for baking the substrate 210 is longer than the time for baking the substrate 220 and the substrate 230, and the time for baking the substrate 220 is longer than the time for baking the substrate 230.

Referring to fig. 3F, the baking unit 110 finishes the post-exposure baking process of the substrate 210 after reaching the baking time. Next, the support pins 114 are lifted from the inside of the heating plate 113 until the baked substrate 210 is supported, so that the baked substrate 210 is separated from the spacer pins 115 and becomes placed on the support pins 114. In some embodiments, the baking time for the post-exposure baking process for the substrate 210, the substrate 220, and the substrate 230 is the same, for example, 30-150 seconds. Since the pre-heating time of the

substrates

210, 220, and 230 is different, the time points at which the post-exposure baking process starts and ends for the

substrates

210, 220, and 230 are also different. As a result, when the substrate 210 in the baking unit 110 ends the post-exposure baking process, the substrate 220 in the baking unit 120 and the substrate 230 in the baking unit 130 continue to perform the post-exposure baking process.

As previously mentioned, the means for additional heating may include means for supplemental heating. In some embodiments, when the baked substrate 210 is placed on the support pins 114, the baked substrate 210 is not immediately removed from the heating elements 110B, but the baked substrate 210 is maintained supported by the support pins 114. at this time, the heating plate 113, which maintains the baking temperature, radiatively provides additional thermal energy to the substrate 210 placed on the support pins 114, thereby making it possible to subsequently supplement the thermal energy that is not absorbed sufficiently during the post-exposure baking process.

However, embodiments of the present disclosure are not limited, and in some other embodiments, the substrate 210 may absorb sufficient total heat from the heating plate 113 of the bake unit 110 during the post-exposure bake process, and thus supplemental heating of the substrate 210 after the post-exposure bake process is not required. At the end of the post-exposure bake process, the baked substrate 210 in the bake unit 110 is placed on the support pins 114, and the carrier plate 112 is moved by the moving arm 111 to a position directly above the heating element 110B. Thereafter, the support pins 114 are lowered into the heating plate 113, so that the baked substrate 210 is separated from the support pins 114 and becomes carried by the carrier plate 112. Next, the baked substrate 210 is moved away from the heating element 110B by the moving arm 111, as shown in FIG. 3G. The baked substrate 210 is subsequently removed from the baking unit 110 of the baking apparatus 100 to continue other processes (e.g., a developing process).

In some embodiments, the baking time of the baking unit 120 to the substrate 220 is reached during or after the baked substrate 210 is moved away from the heating element 110B, thereby completing the post-exposure baking process of the substrate 220. Alternatively, the post-exposure bake process of the substrate 220 is completed during or after the substrate 210 is removed from the bake unit 110 of the bake apparatus 100. At this time, the support pins 124 are lifted from the inside of the heating plate 123 until the baked substrate 220 is supported, so that the baked substrate 220 becomes placed on the support pins 124, as shown in fig. 3G. In some embodiments, the baked substrate 220 may be supplemented with insufficient heat energy absorbed during the post-exposure baking process according to actual requirements. When the post-exposure baking process of the substrate 220 in the baking unit 120 is finished, the substrate 230 in the baking unit 130 continues to perform the post-exposure baking process, as shown in fig. 3G. In some other embodiments, the substrate 230 and the substrate 220 may end the post-exposure bake process at the same time.

When the baking unit 120 finishes the post-exposure baking process, the carrier 122 is moved by the moving arm 121 to a position directly above the heating element 120B, and the supporting pins 124 are lowered into the heating plate 123, so that the baked substrate 220 becomes carried by the carrier 122. Next, the baked substrate 220 is removed from the heating element 120B by the moving arm 121, as shown in FIG. 3H. The baked substrate 220 is subsequently removed from the baking unit 120 of the baking apparatus 100 to continue with other processes. During or after the substrate 220 is removed from the heating element 120B, the substrate 230 in the baking unit 130 continues to undergo a post-exposure baking process, as shown in fig. 3H.

During or after the substrate 220 is removed from the heating element 120B, a new substrate 310 is moved into the baking unit 110 in the baking apparatus 100, and the substrate 310 waiting to be baked is supported by the carrier plate 112, as shown in fig. 3H. The structure and formation method of the substrate 310 are substantially the same as those of the substrate 210, and thus, reference may be made to the description of the foregoing embodiments without repeated descriptions. In some embodiments, the substrate 210 and the substrate 310 are subjected to the same batch of post-exposure baking processes in the baking unit 110, and the sensitivity of the photoresist layer in the substrate 310 to temperature is substantially the same as the sensitivity of the photoresist layer 213 in the substrate 210 to temperature. However, there are many variations of embodiments of the present disclosure. In some other embodiments, the substrate 210 and the substrate 310 are subjected to different batches of post-exposure baking processes in the baking unit 110 (the same baking temperature and/or the same baking time may be set), and the sensitivity of the photoresist layer in the substrate 310 to the temperature is less than the sensitivity of the photoresist layer 213 in the substrate 210 to the temperature. That is, the critical dimension of the photoresist layer in the substrate 310 changes less than the critical dimension of the photoresist layer 213 in the substrate 210 for every 1 degree of change in temperature. For example, in some examples, a 1 ℃ increase in temperature may result in a decrease in the critical dimension of the photoresist layer in substrate 310 of 3.5nm (i.e., a sensitivity with respect to temperature of -3.5 nm/. degree.C.), while a decrease in the critical dimension of the photoresist layer 213 in substrate 210 is expressed as a reduction in the critical dimension of 6.8nm (i.e., a sensitivity with respect to temperature of -6.8 nm/. degree.C.).

In a situation in which photoresist layer 213 in substrate 210 is more sensitive to temperature than the photoresist layer in substrate 310 with respect to temperature, a single bake unit 110 may be subjected to a pre-heat for the same time for both a first batch of substrates 210 and a second batch of substrates 310 prior to initiating a post-exposure bake process. Similarly, the single baking unit 120 performs the preheating for the same time for the first batch of substrates and the second batch of substrates, and the single baking unit 130 performs the preheating for the same time for the first batch of substrates and the second batch of substrates. All substrates (including the substrate 210) of the first lot baked from the

respective bake units

110, 120, and 130 have the same critical dimension, and all substrates (including the substrate 310) of the second lot baked from the

respective bake units

110, 120, and 130 can also have the same critical dimension. The uniform cd in the first lot is different from the uniform cd in the second lot, but the embodiment of the disclosure is not limited thereto, and the uniform cd in the first lot may be equal to the uniform cd in the second lot.

Referring to FIG. 3I, the substrate 310 waiting to be baked is moved to a position right above the heating element 110B, and the support pins 114 are lifted from the heating plate 113 until the substrate 310 waiting to be baked is supported. As mentioned above, the substrate 310 to be baked may be preheated according to actual requirements. In some embodiments, the total heat absorbed by different substrates from the same baking unit 110 is substantially the same, that is, the total heat absorbed by the substrate 310 from the baking unit 110 is substantially equal to the total heat absorbed by the substrate 210 from the baking unit 110, so that the substrate 310 and the substrate 210 have the same preheating time.

However, the embodiments of the present disclosure are not limited, and in some other embodiments, the carrier board 112 may absorb heat energy from the substrate 210 to increase the temperature when carrying the baked substrate 210, and then the substrate 310 waiting to be baked may absorb a small amount of heat energy from the carrier board 112 with the remaining temperature when carrying the substrate 310 waiting to be baked, so that the substrate 310 waiting to be baked compensates for the small amount of heat energy by the carrier board 112 with the remaining temperature, and the time required for preheating may be shortened. In contrast, the substrate 210 requires a longer preheating time, so that the total heat absorbed by the substrate 210 and the substrate 310 from the same baking unit 110 is approximately the same, and therefore the preheating time of the substrate 210 may be set to be longer than that of the substrate 310.

During or after the substrate 310 waiting to be baked in the baking unit 110 is moved to a position right above the heating element 110B, a new substrate 320 is moved into the baking unit 120 in the baking apparatus 100, and the substrate 320 waiting to be baked is supported by the carrier plate 122, while the substrate 230 continues to be subjected to the post-exposure baking process, as shown in fig. 3I. The structure and formation method of the substrate 320 are substantially the same as those of the substrate 210.

Referring to fig. 3J, the substrate 310 in the baking unit 110 is placed on the spacer pins 115 to start the post-exposure baking process. The substrate 320 waiting for baking in the baking unit 120 is moved onto the support pins 124 and is preheated. After the substrate 230 in the baking unit 130 completes the post-exposure baking process, the supporting pins 134 lift and support the baked substrate 230, and the moving arm 121 moves the carrier plate 122 to a position right above the heating element 120B to carry the baked substrate 230 and move the baked substrate 230 away from the heating element 130B, as shown in fig. 3K. The baked substrate 230 is subsequently removed from the baking unit 130 of the baking apparatus 100 to continue with other processes. It is understood that although FIG. 3J illustrates the substrate 320 in the baking unit 120 supported by the support pins 124 and the substrate 230 in the baking unit 130 supported by the support pins 134, the substrate 320 is an unbaked substrate and the substrate 230 is a baked substrate.

Referring to fig. 3L, the substrate 310 in the baking unit 110 continues to perform a post-exposure baking process. The substrate 320 waiting for baking in the baking unit 120 ends the pre-heating step, and the substrate 320 is placed on the spacer pins 125 to start the post-exposure baking process. The new substrate 330 is moved into the baking unit 130 in the baking apparatus 100, and the substrate 330 waiting for baking is supported by the carrier plate 132. The structure and formation method of the substrate 330 are substantially the same as those of the substrate 210.

Referring to fig. 3M, the substrate 310 in the baking unit 110 and the substrate 320 in the baking unit 120 are subjected to a post-exposure baking process. The substrate 330 waiting to be baked in the baking unit 130 is moved onto the support pins 134 and is preheated. After sufficient pre-heating, the substrate 330 is placed on the spacer pins 125 to begin the post-exposure bake process, as shown in FIG. 3N. Thereafter, fig. 3F and subsequent steps may be repeated to perform a post-exposure bake process on a large number of substrates.

FIG. 4 is a graph depicting time versus temperature for a baking method according to some embodiments. The horizontal axis (or X-axis) represents time in seconds(s) and the vertical axis (or Y-axis) represents temperature in degrees celsius. Fig. 4 illustrates a temperature variation curve 410 of the substrate 210 in the baking unit 110, a temperature variation curve 420 of the substrate 220 in the baking unit 120, and a temperature variation curve 430 of the substrate 230 in the baking unit 130, and the pre-heating method is taken as an example.

In some embodiments, the

substrates

210, 220, and 230 are moved into the baking apparatus 100 at the same time pointA baking unit 110, a baking unit 120, and a baking unit 130. The substrate 210, the substrate 220 and the substrate 230 have the same initial temperature T₀. Then, the substrate 210, the substrate 220, and the substrate 230 are respectively moved to positions right above the

heating elements

110B, 120B, and 130B. In some embodiments, the

substrates

210, 220, and 230 are at the same initial time t₀Each supported by a

corresponding support pin

114, 124, and 134.

In some embodiments, the substrate 210 may absorb sufficient total heat from the bake unit 110 during the post-exposure bake process, so the bake unit 110 does not need to set the preheat time (or, the preheat time of the bake unit 110 is set to 0 seconds). Since the substrate 210 does not need to be heated in advance, it is at the initial time t₀At this time, the support pins 114 are lowered so that the substrate 210 is directly placed on the spacer pins 115, and the post-exposure bake process is immediately started. The substrate 210 is continuously heated to a predetermined baking temperature T₁And a predetermined baking time t elapses_bAfter baking finish time t₁The post exposure bake process is stopped. Baking time t for substrate 210 to be heated_bI.e. equal to the baking finish time t₁-initial time t₀As shown in fig. 4. At the baking finish time t₁At this time, the support pins 114 are raised to support the substrate 210, and the substrate 210 is moved away from the heating element 110B, so that the temperature of the substrate 210 begins to gradually decrease, as shown by the temperature change curve 410. Thereafter, the substrate 210 is moved out of the baking unit 110.

In some embodiments, the total amount of heat absorbed by the substrate 220 from the baking unit 120 during the post-exposure baking process is less than the total amount of heat absorbed by the substrate 210 from the baking unit 110 during the post-exposure baking process, so the baking unit 120 performs the step of preheating and sets the preheating time (e.g., the preheating time of the baking unit 120 is set to be greater than 0 second). At an initial time t₀Thereafter, the support pins 124 in the bake unit 120 remain elevated to continue supporting the substrate 220 to begin preheating. After a predetermined preheating time, the substrate 220 is gradually heated to the preheating temperature T₂And at the preheating end time t₂Stop preheating. The preheating time of the substrate 220 is equal to the preheating end time t₂-initial time t₀As shown in fig. 4.

When the preheating is stopped, the support pins 124 are lowered so that the substrate 220 is directly placed on the spacer pins 125, and the post-exposure baking process is immediately started. The substrate 220 is continuously heated to a predetermined baking temperature T₁And after a predetermined baking time, at a baking end time t₂' the post exposure bake process is stopped. The baking time for heating the substrate 220 is equal to the baking end time t₂' -end time t of preheating₂As shown in fig. 4. At the baking finish time t₂' at this time, the support pins 124 are raised to support the substrate 220, and the substrate 220 is moved away from the heating element 120B, so that the temperature of the substrate 220 begins to gradually decrease, as shown by the temperature change curve 420. Thereafter, the substrate 220 is removed from the baking unit 120.

In some embodiments, the total amount of heat absorbed by the substrate 230 from the baking unit 130 during the post-exposure baking process is less than the total amount of heat absorbed by the substrate 220 from the baking unit 120 during the post-exposure baking process, so the baking unit 130 also performs the preheating step and sets the preheating time (e.g., the preheating time of the baking unit 130 is set to be greater than the preheating time of the baking unit 120). At an initial time t₀Thereafter, the support pins 134 in the bake unit 130 are kept elevated to continue supporting the substrate 230 to start preheating. After a predetermined preheating time, the substrate 230 is gradually heated to the preheating temperature T₃And at the preheating end time t₃The preheating is stopped. The preheating time of the substrate 230 is equal to the preheating end time t₃-initial time t₀As shown in fig. 4.

When the preheating is stopped, the support pins 134 are lowered so that the substrate 230 is directly placed on the spacer pins 135, and the post-exposure baking process is immediately started. The heating rate of the substrate 220 in the post-exposure baking process is higher than the heating rate of the substrate 220 in the preheating period. The substrate 230 is continuously heated to a predetermined baking temperature T₁And after a predetermined baking time, at a baking end time t₃' the post exposure bake process is stopped. Base ofThe baking time of the bottom 230 is equal to the baking finish time t₃' -end time t of preheating₃As shown in fig. 4. At the baking finish time t₃At this point, the support pins 134 are raised to support the substrate 230 and the substrate 230 is moved away from the heating element 130B, so that the temperature of the substrate 230 begins to gradually decrease, as shown by the temperature profile 430. Thereafter, the substrate 230 is moved out of the baking unit 130.

In some embodiments, the baking time of the substrate 230 is equal to the baking time of the substrate 220 and the baking time t of the substrate 210_b. As shown in fig. 4, at an initial time t₀To preheating end time t₃At any point in time during the period, the

bake units

110, 120, and 130 are not performing the post-exposure bake process simultaneously. Similarly, at the baking end time t₁To the baking finish time t₃At any point in time during the period of' the

bake units

110, 120 and 130 are not performing the post-exposure bake process simultaneously.

According to some embodiments of the present disclosure, the preheating time of the

different baking units

110, 120 and 130 may be controlled by adjusting parameters of the process recipe (recipe). However, there are many variations of embodiments of the present disclosure. In some other embodiments, the baking apparatus 100 has a pre-heating time parameter that can be set, and different pre-heating times can be adjusted for

different baking units

110, 120, and 130 without changing the recipe, thereby simplifying the process management.

The preheating time of a single baking unit can be further adjusted according to different baking temperatures, types of photoresist materials, sensitivity of the photoresist materials to the temperature and other factors. For example, different preheating times can be set when the same baking unit is used for baking different photoresist materials. However, there are many variations of embodiments of the present disclosure. In some embodiments, (as mentioned above, the sensitivity of the photoresist layer in the substrate 310 to temperature is less than the sensitivity of the photoresist layer 213 in the substrate 210), the baking unit can set the pre-heating time for the photoresist material with high temperature sensitivity and can also be applied to other photoresist materials with lower temperature sensitivity without collecting the historical process data, counting the cd deviation and setting the pre-heating time for the photoresist material with low temperature sensitivity. Therefore, the efficiency of adjusting parameters can be improved and the process design can be simplified no matter the parameter of recipe or the control parameter of the machine itself.

The present disclosure provides various embodiments of a baking method. Embodiments of the present disclosure have many advantages. By additionally heating the wafers (e.g., pre-heating or supplemental heating), the thermal energy of one or more wafers under heating is compensated for, so that the total heat absorbed by all wafers is substantially the same as possible, thereby reducing or eliminating the difference in baking among different wafers, e.g., enabling the wafers to have a uniform critical dimension. Furthermore, the extra heating time required by each wafer can be flexibly adjusted in different baking units according to actual requirements, so that the total heat absorbed by each wafer from different baking units is approximately the same, thereby ensuring that all wafers have consistent quality and remarkably improving the production efficiency.

According to some embodiments of the present disclosure, a baking method includes moving a first wafer and a second wafer into a first baking unit and a second baking unit, respectively. The first baking unit comprises a first heating plate and a plurality of first supporting pins which are positioned in the first heating plate and can lift, and the second baking unit comprises a second heating plate and a plurality of second supporting pins which are positioned in the second heating plate and can lift. The baking method also comprises the step of heating the first heating plate and the second heating plate to a preset temperature. The baking method further comprises lifting the first support pin and the second support pin to support the first wafer above the first heating plate and the second wafer above the second heating plate. Furthermore, the baking method comprises the step of adjusting and descending the first supporting pin so that the first wafer is placed on the first heating plate and is baked at a preset temperature. During baking the first wafer, the second support pins are kept lifted and support the second wafer above the second heating plate to preheat the second wafer. The baking method further comprises the step of lowering the second supporting pin after lowering the first supporting pin, so that the second wafer is placed on the second heating plate and is baked at a preset temperature.

In some embodiments, the baking method further comprises lifting the first support pin after lowering the second support pin to support the first wafer above the first heater plate. During the period of lifting the first supporting pin, the second supporting pin maintains the adjustment and descending, so that the second wafer is continuously placed on the second heating plate for baking.

In some embodiments, the baking method further comprises removing the first wafer from the first baking unit, and removing the second wafer from the second baking unit after removing the first wafer from the first baking unit. The time for baking the first wafer on the first heating plate at the preset temperature is the same as the time for baking the second wafer on the second heating plate at the preset temperature.

In some embodiments, the baking method further comprises transferring a third wafer into a third baking unit. The third baking unit comprises a third heating plate and a plurality of third supporting pins which are positioned in the third heating plate and can lift. The third heating plate is heated to a predetermined temperature. The third support pins are raised to support the third wafer above the third heating plate. After the first supporting pin is adjusted and lowered, the third supporting pin is adjusted and lowered, so that the third wafer is placed on the third heating plate and is baked at a preset temperature. The third support pin supports the third wafer above the third heating plate at a time different from a time when the second support pin supports the second wafer above the second heating plate.

According to some embodiments of the present disclosure, the baking method includes setting a first preheating time of a first baking unit and a second preheating time of a second baking unit. The baking method further comprises moving a first substrate and a second substrate into the first baking unit and the second baking unit, respectively. The baking method further comprises the step of providing heat energy to the first substrate by the first baking unit in the first preheating time so as to heat a first photoresist layer on the first substrate. Furthermore, the baking method comprises the step that the second baking unit provides heat energy to the second substrate in the second preheating time so as to heat a second photoresist layer on the second substrate. The baking method further comprises baking the first photoresist layer at a predetermined temperature by the first baking unit within a predetermined baking time. The baking method further comprises baking the second photoresist layer at a predetermined temperature by the second baking unit within a predetermined baking time. The first warm-up time is set to be different from the second warm-up time.

In some embodiments, the baking method further comprises moving a third substrate into the first baking unit. Providing heat energy to the third substrate during the first preheating time to heat a third photoresist layer on the third substrate. And baking the third photoresist layer at a predetermined temperature within a predetermined baking time. The sensitivity of the first photoresist layer to temperature is equal to the sensitivity of the second photoresist layer to temperature and greater than the sensitivity of the third photoresist layer to temperature.

According to some embodiments of the present disclosure, the baking method includes heating a first hot plate and a second hot plate to a predetermined temperature. The first heating plate is provided with a plurality of first spacing pins and a plurality of liftable first supporting pins, and the second heating plate is provided with a plurality of second spacing pins and a plurality of liftable second supporting pins. The baking method further includes placing a first substrate on the first support pins to heat a first photoresist layer exposed on the first substrate. The baking method further includes placing a second substrate on the second support pins to heat a second photoresist layer exposed on the second substrate. The second substrate is placed on the second support pins for a time greater than the time the first substrate is placed on the first support pins. Furthermore, the baking method includes lowering the first support pin until the first spacing pin contacts and supports the first substrate, so that the first heating plate bakes the first photoresist layer at a predetermined temperature. The baking method further includes lowering the second support pins until the second spacer pins contact and support the second substrate such that the second heater plate bakes the second photoresist layer at a predetermined temperature.

In some embodiments, the time that the first substrate contacts the first spacing pins is the same as the time that the second substrate contacts the second spacing pins, and the time that the first substrate is placed on the first support pins is less than the time that the first substrate contacts the first spacing pins.

In some embodiments, the baking method further includes raising the first support pin until the first substrate contacts the first support pin and is spaced apart from the first spacer pin to stop baking the first photoresist layer. And moving the first substrate away from the first supporting pin so as to carry out a subsequent developing process on the baked first photoresist layer on the first substrate. A third substrate is placed on the first supporting pin to heat a third photoresist layer exposed on the third substrate. And lowering the first supporting pin until the first spacing pin contacts and supports the third substrate, so that the first heating plate can bake the third photoresist layer at a preset temperature. The second spacer pins maintain contact and support the second substrate during placement of the third substrate on the first support pins to continue baking the second photoresist layer.

In some embodiments, the baking method further comprises stopping baking the first photoresist layer and removing the first substrate from the first heated plate. A third substrate is placed on the first supporting pin to heat a third photoresist layer exposed on the third substrate. And lowering the first supporting pin until the first spacing pin contacts and supports the third substrate, so that the first heating plate can bake the third photoresist layer at a preset temperature. The time that the first substrate contacts the first spacing pins is the same as the time that the third substrate contacts the first spacing pins, and the time that the first substrate is placed on the first supporting pins is longer than the time that the third substrate is placed on the first supporting pins.

The foregoing has outlined features of several embodiments of the present disclosure so that those skilled in the art may better understand the detailed description of the disclosure that follows. It should be appreciated by those skilled in the art that the present disclosure may be readily utilized as a basis for modifying or designing other structures or processes for carrying out the same purposes and/or achieving the same advantages of the embodiments of the present disclosure. It will be understood by those skilled in the art that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the disclosure as defined by the appended claims.

Claims

1. A method of baking comprising:

respectively moving a first wafer and a second wafer into a first baking unit and a second baking unit, wherein the first baking unit comprises a first heating plate and a plurality of first supporting pins which are positioned in the first heating plate and can lift, and the second baking unit comprises a second heating plate and a plurality of second supporting pins which are positioned in the second heating plate and can lift;

starting from an initial time, providing heat energy to the first substrate by the first baking unit within a first preheating time so as to heat a first photoresist layer on the first substrate;

starting from the initial time, providing heat energy to the second substrate by the second baking unit within a second preheating time so as to heat a second photoresist layer on the second substrate, wherein the first preheating time is different from the second preheating time;

heating the first heating plate and the second heating plate to a predetermined temperature;

lifting the first and second support pins to support the first wafer above the first heating plate and the second wafer above the second heating plate;

lowering the plurality of first supporting pins to enable the first wafer to be placed on the first heating plate and to be baked at the preset temperature, wherein during baking of the first wafer, the plurality of second supporting pins are kept lifted and support the second wafer above the second heating plate so as to pre-heat the second wafer; and

after the first support pins are lowered, the second support pins are lowered, so that the second wafer is placed on the second heating plate and is baked at the preset temperature, wherein the total heat absorbed by the first photoresist layer from the first baking unit is the same as the total heat absorbed by the second photoresist layer from the second baking unit.

2. The baking method of claim 1, further comprising:

after the second supporting pins are lifted, the first supporting pins are lifted to support the first wafer above the first heating plate, wherein the second supporting pins are kept lifted during the lifting of the first supporting pins, so that the second wafer is continuously placed on the second heating plate for baking.

3. The baking method of claim 1 or 2, further comprising:

removing the first wafer from the first baking unit; and

and after the first wafer is removed from the first baking unit, removing the second wafer from the second baking unit, wherein the time for baking the first wafer on the first heating plate at the preset temperature is the same as the time for baking the second wafer on the second heating plate at the preset temperature.

4. The baking method of claim 1 or 2, further comprising:

moving a third wafer into a third baking unit, wherein the third baking unit comprises a third heating plate and a plurality of third supporting pins which are positioned in the third heating plate and can lift;

heating the third heating plate to the predetermined temperature;

lifting the third support pins to support the third wafer above the third heating plate; and

after the first support pins are lowered, the third support pins are lowered so that the third wafer is placed on the third heating plate and baked at the predetermined temperature, wherein the time for the third support pins to support the third wafer above the third heating plate is different from the time for the second support pins to support the second wafer above the second heating plate.

5. A method of baking comprising:

setting a first preheating time of a first baking unit and a second preheating time of a second baking unit;

respectively moving a first substrate and a second substrate into the first baking unit and the second baking unit;

starting from an initial time, providing heat energy to the first substrate by the first baking unit within the first preheating time so as to heat a first photoresist layer on the first substrate;

starting from the initial time, providing heat energy to the second substrate by the second baking unit within the second preheating time so as to heat a second photoresist layer on the second substrate;

the first baking unit is used for baking the first photoresist layer at a preset temperature within a preset baking time; and

and baking the second photoresist layer at the predetermined temperature by the second baking unit within the predetermined baking time, wherein the first preheating time is set to be different from the second preheating time, so that the total heat absorbed by the first photoresist layer from the first baking unit is the same as the total heat absorbed by the second photoresist layer from the second baking unit.

6. The baking method of claim 5, further comprising:

moving a third substrate into the first baking unit;

during the first preheating time, the first baking unit provides heat energy to the third substrate so as to heat a third photoresist layer on the third substrate; and

the first baking unit bakes the third photoresist layer, wherein the sensitivity of the first photoresist layer to temperature is equal to the sensitivity of the second photoresist layer to temperature and is greater than the sensitivity of the third photoresist layer to temperature.

7. A method of baking comprising:

heating a first heating plate and a second heating plate to a preset temperature, wherein the first heating plate is provided with a plurality of first spacing pins and a plurality of liftable first supporting pins, and the second heating plate is provided with a plurality of second spacing pins and a plurality of liftable second supporting pins;

placing a first substrate on the plurality of first supporting pins to heat a first photoresist layer exposed on the first substrate from an initial time;

placing a second substrate on the second support pins to heat an exposed second photoresist layer on the second substrate from the initial time, wherein the second substrate is placed on the second support pins for a time period longer than the time period for which the first substrate is placed on the first support pins;

lowering the first support pins until the first spacer pins contact and support the first substrate, so that the first heating plate bakes the first photoresist layer at the predetermined temperature; and

and lowering the plurality of second supporting pins until the plurality of second spacing pins contact and support the second substrate, so that the second heating plate bakes the second photoresist layer at the preset temperature, and the total heat absorbed by the first photoresist layer from the first baking unit is the same as the total heat absorbed by the second photoresist layer from the second baking unit.

8. The baking method of claim 7, wherein the first substrate contacts the first plurality of spacer pins for the same time as the second substrate contacts the second plurality of spacer pins, and wherein the first substrate is placed on the first plurality of support pins for a time less than the time the first substrate contacts the first plurality of spacer pins.

9. The baking method of claim 7 or 8, further comprising:

lifting the first support pins until the first substrate contacts the first support pins and is separated from the first spacing pins to stop baking the first photoresist layer;

removing the first substrate from the plurality of first supporting pins to perform a subsequent developing process on the baked first photoresist layer on the first substrate;

placing a third substrate on the plurality of first supporting pins to heat a third photoresist layer exposed on the third substrate; and

and lowering the plurality of first supporting pins until the plurality of first spacing pins contact and support the third substrate, so that the first heating plate bakes the third photoresist layer at the preset temperature, wherein the plurality of second spacing pins maintain contact and support the second substrate during the third substrate is placed on the plurality of first supporting pins, so as to continuously bake the second photoresist layer.

10. The baking method of claim 7 or 8, further comprising:

stopping baking the first photoresist layer and removing the first substrate from the first heating plate;

and lowering the plurality of first supporting pins until the plurality of first spacing pins contact and support the third substrate, so that the first heating plate bakes the third photoresist layer at the predetermined temperature, wherein the time for which the first substrate contacts the plurality of first spacing pins is the same as the time for which the third substrate contacts the plurality of first spacing pins, and wherein the time for which the first substrate is placed on the plurality of first supporting pins is longer than the time for which the third substrate is placed on the plurality of first supporting pins.