CN108648702A - Pixel driving circuit, driving method thereof, display panel and display device - Google Patents

Pixel driving circuit, driving method thereof, display panel and display device Download PDF

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Publication number
CN108648702A
CN108648702A CN201810251860.0A CN201810251860A CN108648702A CN 108648702 A CN108648702 A CN 108648702A CN 201810251860 A CN201810251860 A CN 201810251860A CN 108648702 A CN108648702 A CN 108648702A
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China
Prior art keywords
transistor
pixel
control signal
line
signal line
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CN201810251860.0A
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Chinese (zh)
Inventor
周良
王会
周九斌
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Shanghai Tianma Microelectronics Co Ltd
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Shanghai Tianma Microelectronics Co Ltd
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Priority to CN201810251860.0A priority Critical patent/CN108648702A/en
Publication of CN108648702A publication Critical patent/CN108648702A/en
Pending legal-status Critical Current

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3607—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals for displaying colours or for displaying grey scales with a specific pixel layout, e.g. using sub-pixels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3685—Details of drivers for data electrodes
    • G09G3/3688—Details of drivers for data electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/021—Power management, e.g. power saving

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal Display Device Control (AREA)

Abstract

The invention discloses a pixel driving circuit, a driving method thereof, a display panel and a display device. The pixel driving circuit comprises a first switch unit, a second switch unit, a pixel capacitor, a first storage capacitor, a second storage capacitor, a scanning line, a data line, a common voltage line and a control signal line; the control end of the first switch unit is electrically connected with the scanning line; the control end of the second switch unit is electrically connected with the control signal line, the first end of the second switch unit is electrically connected with the common voltage line, and the second end of the second switch unit is electrically connected with the second pole of the second storage capacitor; the control signal line is used for controlling the second switch unit to be switched on or switched off; the pixel driving circuit comprises a low-frequency output state and a high-frequency output state, and the control signal line provides a first signal in the low-frequency output state; in the high-frequency output state, the control signal line supplies a second signal. The invention can realize the switching between the low-frequency output display and the high-frequency output display during the static display and the dynamic display, and can realize the effect of reducing the power consumption.

Description

Pixel driving circuit, driving method thereof, display panel and display device
Technical Field
The present invention relates to the field of display technologies, and in particular, to a pixel driving circuit, a driving method thereof, a display panel, and a display device.
Background
The existing display panel includes a liquid crystal display panel and an organic light emitting display panel. The liquid crystal display panel generally comprises an array substrate, a color film substrate and a liquid crystal molecular layer positioned between the array substrate and the color film substrate, wherein an electric field is formed in the liquid crystal display panel by applying voltage on a pixel electrode and a common electrode to control the deflection of liquid crystal molecules, so that the transmission of light rays is realized, and the display of the display panel is further realized.
With the development of technology and the improvement of user requirements, the existing display panel industry is more and more competitive. The full screen, high screen ratio, high contrast, low power consumption, etc. become the main selling points of various manufacturers.
Therefore, it is an urgent need in the art to provide a pixel driving circuit with low power consumption, a driving method thereof, a display panel and a display device.
Disclosure of Invention
In view of the above, the present invention provides a pixel driving circuit, a driving method thereof, a display panel and a display device, which solve the technical problem of reducing power consumption.
In order to solve the above technical problem, the present invention provides a pixel driving circuit, including:
the pixel circuit comprises a first switch unit, a second switch unit, a pixel capacitor, a first storage capacitor, a second storage capacitor, a scanning line, a data line, a common voltage line and a control signal line;
the control end of the first switch unit is electrically connected with the scanning line, the first end of the first switch unit is electrically connected with the data line, and the second end of the first switch unit is respectively and electrically connected with the first pole of the pixel capacitor, the first pole of the first storage capacitor and the first pole of the second storage capacitor;
the control end of the second switch unit is electrically connected with the control signal line, the first end of the second switch unit is electrically connected with the common voltage line, and the second end of the second switch unit is electrically connected with the second pole of the second storage capacitor;
the second pole of the pixel capacitor is electrically connected with the common voltage line;
the second pole of the first storage capacitor is electrically connected with the common voltage line;
the scanning line provides a scanning signal;
the data line provides a data signal;
the common voltage line provides a common voltage signal;
the control signal line provides a first signal and a second signal, the first signal controls the second switch unit to be turned on, and the second signal controls the second switch unit to be turned off;
the working state of the pixel driving circuit comprises a low-frequency output state and a high-frequency output state; scanning lines and data lines, the frequency of signal output in the low frequency output state being less than the frequency of signal output in the high frequency output state;
wherein, in the low-frequency output state, the control signal line provides a first signal; in the high frequency output state, the control signal line supplies a second signal.
Further, in order to solve the above technical problem, the present invention also provides a driving method of a pixel driving circuit, for driving any one of the pixel driving circuits provided by the present invention,
in a low-frequency output state, controlling a scanning line to provide scanning signals according to a first frequency, controlling a data line to provide data signals according to the first frequency, controlling a common voltage line to provide common voltage signals, and controlling a signal line to provide first signals;
in a high frequency output state, the scan lines are controlled to supply scan signals at a second frequency, the data lines are controlled to supply data signals at the second frequency, the common voltage lines are controlled to supply common voltage signals, the control signal lines are controlled to supply second signals,
wherein the first frequency is less than the second frequency.
Further, in order to solve the above technical problem, the present invention further provides a display panel, including any one of the pixel driving circuits provided by the present invention, the pixel driving circuit is used for driving a plurality of sub-pixels of the display panel,
the sub-pixels comprise pixel electrodes, a common electrode and a first electrode, the pixel electrodes and the common electrode form two polar plates of a pixel capacitor, the pixel electrodes and part of common voltage lines form two polar plates of a first storage capacitor, and the pixel electrodes and the first electrode form two polar plates of a second storage capacitor;
the display panel comprises a low frame frequency refreshing state, a high frame frequency refreshing state, a scanning line and a data line, wherein the frequency of signal output in the low frame frequency refreshing state is less than that in the high frame frequency refreshing state;
in a low-frame frequency refreshing state, the scanning lines provide scanning signals, the data lines provide data signals, the common voltage lines provide common voltage signals, and the control signal lines provide first signals to control the second switch units to be opened;
in the high frame frequency refreshing state, the scanning lines provide scanning signals, the data lines provide data signals, the common voltage lines provide common voltage signals, and the control signal lines provide second signals to control the second switch units to be closed.
Further, in order to solve the above technical problem, the present invention further provides a display device including any one of the display panels provided by the present invention.
Compared with the prior art, the pixel driving circuit, the driving method thereof, the display panel and the display device of the invention have the following beneficial effects:
when the pixel driving circuit provided by the invention is applied to a display panel, the change of the voltage applied to the data line can realize the brightness change of the sub-pixel display for the sub-pixels in the display panel. When the display panel displays a picture, a static picture and a dynamic picture usually exist, and when the display panel displays the picture, the pixel driving circuit works in a low-frequency output state, and the brightness of the sub-pixels is unchanged; in the case of a dynamic image, the pixel driving circuit operates in a high-frequency output state, and the luminance of the sub-pixel changes. In the conventional pixel driving circuit, there is only one fixed storage capacitor or no storage capacitor, and when the storage capacitor is used for driving the sub-pixel to display, the time for which the sub-pixel can keep displaying is fixed, so that the output frequency of the pixel driving circuit is the same whether in dynamic picture display or static picture display. Compared with the conventional driving circuit, the invention can realize the switching of low-frequency output and high-frequency output during static and dynamic display, ensure the display effect and simultaneously realize the effect of reducing power consumption.
Other features of the present invention and advantages thereof will become apparent from the following detailed description of exemplary embodiments thereof, which proceeds with reference to the accompanying drawings.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description, serve to explain the principles of the invention.
Fig. 1 is a schematic structural diagram of a pixel driving circuit according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of an alternative implementation of a pixel driving circuit according to an embodiment of the present invention;
FIG. 3 is a timing diagram of the pixel driving circuit provided in the embodiment of FIG. 2;
fig. 4 is a schematic structural diagram of another alternative implementation of the pixel driving circuit according to the embodiment of the present invention;
FIG. 5 is a timing diagram of the pixel driving circuit provided in the embodiment of FIG. 4;
fig. 6 is a flowchart of a driving method of a pixel driving circuit according to an embodiment of the invention;
fig. 7 is a flowchart of an alternative implementation of a driving method of a pixel driving circuit according to an embodiment of the present invention;
FIG. 8 is a schematic top view of a portion of an alternative embodiment of a display panel according to an embodiment of the present invention;
FIG. 9 is a timing diagram of a low frame rate refresh state and a high frame rate refresh state of a display panel according to an embodiment of the present invention;
FIG. 10 is a partial top view of another alternative embodiment of a display panel according to an embodiment of the present invention;
FIG. 11 is a cross-sectional view of the display panel at the location along line A-A' of FIG. 10;
FIG. 12 is a partial top view of another alternative embodiment of a display panel according to an embodiment of the present invention;
FIG. 13 is a partial top view of another alternative embodiment of a display panel according to an embodiment of the present invention;
fig. 14 is a schematic view of a display device according to an embodiment of the invention.
Detailed Description
Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that: the relative arrangement of the components and steps, the numerical expressions and numerical values set forth in these embodiments do not limit the scope of the present invention unless specifically stated otherwise.
The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the invention, its application, or uses.
Techniques, methods, and apparatus known to those of ordinary skill in the relevant art may not be discussed in detail but are intended to be part of the specification where appropriate.
In all examples shown and discussed herein, any particular value should be construed as merely illustrative, and not limiting. Thus, other examples of the exemplary embodiments may have different values.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, further discussion thereof is not required in subsequent figures.
Fig. 1 is a schematic structural diagram of a pixel driving circuit according to an embodiment of the present invention. As shown in FIG. 1, the present invention provides a pixelA drive circuit, comprising: first switch unit 1, second switch unit 2, pixel capacitance CLCA first storage capacitor C1A second storage capacitor C2A scanning line G, a data line D, a common voltage line V and a control signal line S; the control end 11 of the first switch unit 1 is electrically connected to the scan line G, the first end 12 of the first switch unit 1 is electrically connected to the data line D, and the second end 13 of the first switch unit 1 is electrically connected to the pixel capacitor CLCFirst pole C ofLC1. A first storage capacitor C1First pole C of11 and a second storage capacitor C2First pole C of21; the control end 21 of the second switch unit 2 is electrically connected to the control signal line S, the first end 22 of the second switch unit 2 is electrically connected to the common voltage line V, and the second end 23 of the second switch unit 2 is electrically connected to the second storage capacitor C2Second pole C of22, electrically connecting; pixel capacitance CLCSecond pole C ofLC2 is electrically connected with a common voltage line V; a first storage capacitor C1Second pole C of12 is electrically connected with a common voltage line V; the scanning line G provides a scanning signal; the data line D provides a data signal; the common voltage line V supplies a common voltage signal; the control signal line S provides a first signal and a second signal, the first signal controls the second switch unit 2 to be opened, and the second storage capacitor C can be realized after the second switch unit 2 is opened2Second pole C of22 is electrically connected with a common voltage line V to realize the direction from the common voltage line V to a second storage capacitor C2Charging of (1); the second signal controls the second switch unit 2 to turn off, and after the second switch unit 2 is turned off, the common voltage line V and the second storage capacitor C are connected2Second pole C of22 is disconnected and does not go to the second storage capacitor C2Charging; the working state of the pixel driving circuit comprises a low-frequency output state and a high-frequency output state; scanning lines G and data lines D, the frequency of signal output in the low frequency output state being smaller than the frequency of signal output in the high frequency output state; wherein, in the low-frequency output state, the control signal line S provides a first signal; in the high frequency output state, the control signal line S supplies the second signal.
The pixel driving circuit provided by the embodiment of the invention is used for driving the sub-pixels in the display panel to display, in the working state of the circuit, the data line and the common voltage line simultaneously charge the pixel capacitor to realize the display of the sub-pixels, and a storage capacitor, namely the first storage capacitor in the invention, needs to be arranged in the pixel driving circuit for keeping the sub-pixel display for a certain time. The invention is provided with a second storage capacitor, and two polar plates of the second storage capacitor are respectively and electrically connected with the data line and the common voltage line. In a low-frequency output state, the control signal line provides a first signal, the first signal controls the second switch unit to be opened, after the second switch unit is opened, the second pole of the second storage capacitor can be electrically connected with the common voltage line, the common voltage line is charged to the second storage capacitor, and equivalently, in the low-frequency output state, the first storage capacitor and the second storage capacitor can both discharge the pixel capacitor, so that the storage capacitors in the pixel driving circuit are properly increased, and further the retention time of sub-pixel display can be prolonged. According to the formula: Δ U is Δ Q/Cs, where Δ U is the voltage between two plates in the capacitor, Δ Q is the charge, and Cs is the storage capacitor, and when the retention time is prolonged, the storage capacitor is increased, so that the voltage variation caused by charge loss can be reduced, and the sub-pixel display effect can be maintained. In a high-frequency output state, the control signal line provides a second signal, the second signal controls the second switch unit to be closed, the common voltage line is disconnected from the second pole of the second storage capacitor, the second storage capacitor is not charged, and only the first storage capacitor discharges the pixel capacitor.
When the pixel driving circuit provided by the invention is applied to a display panel, for the sub-pixels in the display panel, the change of the magnitude of the voltage applied on the data line (usually, the data line is electrically connected with the pixel electrode, and the pixel electrode is one polar plate of the pixel capacitor) can realize the brightness change of the sub-pixel display. When the display panel displays a picture, a static picture and a dynamic picture usually exist, and when the display panel displays the picture, the pixel driving circuit works in a low-frequency output state, and the brightness of the sub-pixels is unchanged; in the case of a dynamic image, the pixel driving circuit operates in a high-frequency output state, and the luminance of the sub-pixel changes. In the conventional pixel driving circuit, there is only one fixed storage capacitor or no storage capacitor, and when the storage capacitor is used for driving the sub-pixel to display, the time for which the sub-pixel can keep displaying is fixed, so that the output frequency of the pixel driving circuit is the same whether in dynamic picture display or static picture display. Compared with the conventional driving circuit, the invention can realize the switching of low-frequency output and high-frequency output during static and dynamic display, ensure the display effect and simultaneously realize the effect of reducing power consumption.
Further, fig. 2 is a schematic structural diagram of an alternative implementation of the pixel driving circuit according to the embodiment of the present invention. As shown in fig. 2, the first switch unit 1 includes a first transistor T1, a control terminal T11 of the first transistor T1 is electrically connected to the scan line G, a first terminal T12 of the first transistor T1 is electrically connected to the data line D, and a second terminal T13 of the first transistor T1 is electrically connected to the pixel capacitor CLCFirst pole C ofLC1. A first storage capacitor C1First pole C of11 and a second storage capacitor C21 first pole C21; the second switching unit 2 includes a second transistor T2, a control terminal T21 of the second transistor T2 is electrically connected to the control signal line S, a first terminal T22 of the second transistor T2 is electrically connected to the common voltage line V, and a second terminal T23 of the second transistor T2 is electrically connected to the second storage capacitor C2Second pole C of22 are electrically connected.
Fig. 3 is a timing diagram of the pixel driving circuit provided in the embodiment of fig. 2. Fig. 3 is a timing diagram of driving a single sub-pixel by the pixel driving circuit, where the signal on the data line D is the data signal on the sub-pixel, and the data line correspondingly provides the data signal when the scan line provides the scan signal. As shown in fig. 3, in the low frequency output state DP, the signal output frequencies of the scan lines G and the data lines D are smaller than the output frequency in the high frequency output state GP. Referring to fig. 2, in the high frequency output state GP, the scan line G provides a scan signal, the first transistor T1 is turned on, and the data line D supplies the pixel capacitor CLCFirst pole C ofLC1 providing data voltage signals, data lines in high frequency output state GPD can be changed in the middle gray-scale voltage value to realize different changes of the brightness of the sub-pixels, the common voltage line V provides a constant voltage signal, the control signal line S provides a second signal (taking the second signal as a low-level signal and the first signal as a high-level signal as an example), the second signal controls the second transistor T2 to be turned off, and then the common voltage line V and the second storage capacitor C are turned off2Second pole C of2The connection of 2 is broken. The magnitude of the signal supplied from the data line D in the high frequency output state GP may vary, and the magnitude of the data signal voltage supplied on the data line D in fig. 3 is only a schematic representation.
With continued reference to fig. 2 and 3, in the low frequency output state DP, the scan line G provides the scan signal, the first transistor T1 is turned on, and the data line D supplies the pixel capacitor C with the scan signalLCFirst pole C ofLC1 providing data voltage signal, in low frequency output state DP, the voltage provided by data line D only changes in two kinds of voltage value of 0 gray scale and 255 gray scale to realize that the brightness of sub-pixel does not change due to leakage in a certain time, common voltage line V provides constant voltage signal, control signal line S provides first signal, first signal controls second transistor T2 to be opened, common voltage line V and second storage capacitor C2Second pole C of22.
This embodiment provides the pixel driving circuit in which the first switching unit 1 includes the first transistor T1, and the voltage signal on the scan line G controls the on or off state of the first transistor T1. The second switching unit 2 includes a second transistor T2, and the voltage signal on the control signal line S controls the open or closed state of the second transistor T1. In the low frequency output state, the first signal is provided on the control signal line S, and the first signal controls the second transistor T2 to be turned on, so that the second storage capacitor C can be realized2Second pole C of22 is electrically connected with a common voltage line V to realize the direction from the common voltage line V to a second storage capacitor C2In the low-frequency output state, the first storage capacitor C1And a second storage capacitor C2Can be applied to the pixel capacitor CLCDischarging is performed to increase the voltage in the pixel driving circuitAnd the storage capacitor can further prolong the retention time of the sub-pixel display. In the high frequency output state, the second signal is provided on the control signal line S, the second signal controls the second transistor T2 to be turned off, and the common voltage line V and the second storage capacitor C are connected to the common voltage line V2Second pole C of22 is disconnected and does not go to the second storage capacitor C2Charging, i.e. in the high-frequency output state, only the first storage capacitor C1To pixel capacitance CLCAnd discharging to realize the maintenance of the sub-pixel display. Compared with the conventional pixel driving circuit, the embodiment can realize the switching of low-frequency output and high-frequency output during static and dynamic display, and can realize the effect of reducing power consumption while ensuring the display effect.
Further, fig. 4 is a schematic structural diagram of another alternative implementation of the pixel driving circuit according to the embodiment of the present invention. As shown in fig. 4, the first switch unit 1 includes a first transistor T1, a control terminal T11 of the first transistor T1 is electrically connected to the scan line G, a first terminal T12 of the first transistor T1 is electrically connected to the data line D, and a second terminal T13 of the first transistor T1 is electrically connected to the pixel capacitor CLCFirst pole C ofLC1. A first storage capacitor C1First pole C of11 and a second storage capacitor C21 first pole C21; the second switching unit 2 includes a second transistor T2 and a third transistor T3, the third transistor T3 is connected in parallel with the second transistor T2, and the control signal lines include a first control signal line S1 and a second control signal line S2; a control terminal T21 of the second transistor T2 is electrically connected to the first control signal line S1, a first terminal T22 of the second transistor T2 is electrically connected to the common voltage line V, and a second terminal T23 of the second transistor T2 is electrically connected to the second storage capacitor C2Second pole C of22, electrically connecting; a control terminal T31 of the third transistor T3 is electrically connected to the second control signal line S2, a first terminal T32 of the third transistor T3 is electrically connected to the common voltage line V, and a second terminal T33 of the third transistor T3 is electrically connected to the second storage capacitor C2Second pole C of22, electrically connecting; in the low frequency output state, the first control signal line S1 and the second control signal line S2 alternately supply the first signal to control the second transistor T2 and the third transistor T2T3 is alternately turned on; in the high frequency output state, the first control signal line S1 and the second control signal line S2 both provide the second signal, controlling both the second transistor T2 and the third transistor T3 to be turned off.
Fig. 5 is a timing diagram of the pixel driving circuit provided in the embodiment of fig. 4. Fig. 5 is a timing diagram of driving a single sub-pixel by the pixel driving circuit, where the signal on the data line D is the data signal on the sub-pixel, and when the scan line G provides the scan signal, the data line D correspondingly provides the data signal, and the magnitude of the voltage of the data signal provided on the data line D is only schematically shown. As shown in fig. 5, in the low frequency output state DP, the signal output frequencies of the scan lines G and the data lines D are smaller than the output frequency in the high frequency output state GP. In the high frequency output state GP, the scan line G provides a scan signal, the data line D provides a data signal, the first control signal line S1 and the second control signal line S2 both provide a second signal (low level signal), and the second transistor and the third transistor are both turned off; in the low frequency output state DP, the scan line G supplies a scan signal, the data line D supplies a data signal, and the first control signal line S1 and the second control signal line S2 alternately supply a first signal (a high level signal) to control the second transistor and the third transistor to be alternately turned on.
This embodiment provides the pixel driving circuit in which the second switching unit 2 includes a second transistor T2 and a third transistor T3, and the control line signal lines include a first control signal line S1 and a second control signal line S2, wherein the first control signal line S1 controls the second transistor T2 to be turned on or off, and the second control signal line S2 controls the third transistor T3 to be turned on or off. In the low-frequency output state, the first control signal line S1 and the second control signal line S2 alternately provide the first signal to control the second transistor T2 and the third transistor T3 to be alternately turned on, so that the leakage phenomenon occurring when the second transistor T2 or the third transistor T3 is in a normally-on state is avoided. The second transistor T2 and the third transistor T3 are alternately turned on, so that the second storage capacitor C can be realized in a low frequency output state2Second pole C of22 is electrically connected with a common voltage line V to realize the direction from the common voltage line V to a second storage capacitor C2Charging of (2). In the low frequency output state, the first storage capacitor C1And a second storage capacitor C2The pixel capacitor can be discharged, the storage capacitor in the pixel driving circuit is increased, and the retention time of sub-pixel display can be prolonged. In the high frequency output state, the first control signal line S1 and the second control signal line S2 both provide the second signal, the second transistor T2 and the third transistor T3 are controlled to be turned off, and the common voltage line V and the second storage capacitor C are connected to each other2Second pole C of22 is disconnected and does not go to the second storage capacitor C2Charging, i.e. in the high-frequency output state, only the first storage capacitor C1To pixel capacitance CLCAnd discharging to realize the maintenance of the sub-pixel display. Compared with the conventional pixel driving circuit, the embodiment can realize the switching of low-frequency output and high-frequency output during static and dynamic display, can realize the effect of reducing power consumption while ensuring the display effect, and avoids the phenomenon that the second transistor or the third transistor is in a normally open state and has electric leakage to influence the display effect of the sub-pixel because the second transistor and the third transistor are alternately opened in a low-frequency output state.
It should be noted that the transistors in the pixel driving circuit provided by the present invention may be n-type transistors or p-type transistors, and the drawings illustrate only n-type transistors in the embodiments of the present invention.
Furthermore, the invention also provides a driving method of the pixel driving circuit, which is used for driving any one of the pixel driving circuits provided by the invention. The signal output frequency (first frequency) of the data lines and the scan lines in the low frequency output state is smaller than the signal output frequency (second frequency) of the data lines and the scan lines in the high frequency output state.
Fig. 6 is a flowchart of a driving method of the pixel driving circuit according to an embodiment of the invention. As shown in fig. 6, the driving method provided by the present invention includes:
step S101: at low levelIn a frequency output state, controlling a scanning line to provide scanning signals according to a first frequency, controlling a data line to provide data signals according to the first frequency, controlling a common voltage line to provide common voltage signals, and controlling a signal line to provide first signals; continuing with the timing diagram shown in fig. 3, in the low frequency output state DP, the scan time of the scan line G is shorter and the hold time is longer in one scan period of the scan line G. Referring to the structure diagram of the pixel driving circuit shown in fig. 1, in the low-frequency output state, after the control signal line S provides the first signal, the second switch unit 2 is controlled to be opened, so as to implement the second storage capacitor C2Second pole C of22 is electrically connected with a common voltage line V to realize the direction from the common voltage line V to a second storage capacitor C2During the holding time, the first storage capacitor C1And a second storage capacitor C2Can be applied to the pixel capacitor CLCThe storage capacitance in the pixel driving circuit is properly increased by discharging, and the retention time of the sub-pixel display can be prolonged. The low-frequency output state can be adapted to the situation that the display brightness of the sub-pixels is not changed within a certain time.
Step S102: in the high-frequency output state, the scanning lines are controlled to provide scanning signals according to a second frequency, the data lines provide data signals according to the second frequency, the common voltage lines provide common voltage signals, and the control signal lines provide second signals, wherein the first frequency is smaller than the second frequency. With continuing reference to the timing diagram shown in fig. 3 and the structure diagram of the pixel driving circuit shown in fig. 1, in the high-frequency output state GP, the control signal line S provides the second signal to control the second switch unit 2 to be turned off, and then the common voltage line V and the second storage capacitor C are connected to each other2Second pole C of22 is disconnected and does not go to the second storage capacitor C2Charging, i.e. only the first storage capacitor C during the holding time1To pixel capacitance CLCAnd discharging is performed. When the sub-pixel display brightness changes frequently, the sub-pixel does not need too long holding time, the signal output frequency of the scanning line and the data line is required to be high, and the high-frequency output state GP is suitable for driving the sub-pixel to display the brightness change.
The driving method of the pixel driving circuit provided by the invention comprises a low-frequency output state and a high-frequency output state. When the pixel driving circuit is applied to display driving of a display panel, the brightness of the sub-pixels is unchanged under the low-frequency output state of the pixel driving circuit, and the pixel driving circuit is suitable for static picture display; the pixel driving circuit works in a high-frequency output state, the brightness of the sub-pixels changes, and the pixel driving circuit is suitable for displaying dynamic pictures. The invention can realize the switching work of the display panel in a low-frequency output state and a high-frequency output state and can realize the effect of reducing power consumption.
Further, in some alternative embodiments, the driving method of the pixel driving circuit provided by the present invention, wherein the control signal line includes a single signal line, and the controlling the control signal line to provide the first signal includes controlling the control signal line to continuously provide the first signal; controlling the control signal line to provide the second signal includes controlling the control signal line to continuously provide the second signal. As shown in fig. 2, the control signal line includes a single signal line, and in the low-frequency output state, the control scan line is controlled to provide a scan signal according to a first frequency, the data line is controlled to provide a data signal according to the first frequency, the common voltage line is controlled to provide a common voltage signal, and the control signal line is controlled to continuously provide the first signal, so as to ensure that the second switch unit in the pixel driving circuit is always in an on state in the low-frequency output state; and in a high-frequency output state, the scanning lines are controlled to provide scanning signals according to a second frequency, the data lines provide data signals according to the second frequency, the common voltage lines provide common voltage signals, and the control signal lines continuously provide the second signals, so that a second switch unit in the pixel driving circuit is ensured to be always in a closed state in the high-frequency output state.
Further, in some alternative embodiments, the driving method of the pixel driving circuit provided by the present invention, the control signal line includes a first control signal line and a second control signal line. The structure of the pixel driving circuit according to this embodiment can be seen with reference to fig. 4. Fig. 7 is a flowchart of an alternative implementation of a driving method of a pixel driving circuit according to an embodiment of the present invention. As shown in fig. 7, the driving method provided by the present invention includes:
step S201: in a low-frequency output state, the scanning line is controlled to provide scanning signals according to a first frequency, the data line provides data signals according to the first frequency, the common voltage line provides common voltage signals, the first control signal line and the second control signal line are controlled to alternately provide the first signals, the second transistor and the third transistor in the pixel driving circuit are guaranteed to be alternately opened, and the second storage capacitor is electrically connected with the common voltage line.
Step S202: in a high-frequency output state, the scanning line is controlled to provide scanning signals according to a second frequency, the data line provides data signals according to the second frequency, the common voltage line provides common voltage signals, the first control signal line and the second control signal line are controlled to continuously provide the second signals, the second transistor and the third transistor in the pixel driving circuit are guaranteed to be closed, and the second storage capacitor is disconnected with the common voltage line.
The driving method of the pixel driving circuit provided by the embodiment can realize switching between low-frequency output and high-frequency output during static and dynamic display, can realize the effect of reducing power consumption while ensuring the display effect, and can prevent the second transistor or the third transistor from being in a normally open state to cause a leakage phenomenon to affect the display effect of the sub-pixel when the second transistor and the third transistor are in the low-frequency output state.
Fig. 8 is a schematic partial top view of an alternative embodiment of the display panel according to an embodiment of the present invention, and as shown in fig. 8, the display panel includes a plurality of sub-pixels sp, a plurality of scan lines G, a plurality of data lines D, a plurality of common voltage lines V, and a plurality of control signal lines S. The display panel includes any one of the pixel driving circuits provided by the present invention, the pixel driving circuit is used for driving a plurality of sub-pixels of the display panel, a schematic structural diagram of the pixel driving circuit provided by the present invention can be referred to as fig. 1, and the pixel driving circuit includes: first switch unit 1, second switch unit 2, pixel capacitance CLCA first storage capacitor C1A second storage capacitor C2Scanning line G, data line D, common voltage line V and control signal line S.
With continued reference to FIG. 8, a subpixel sp in the display panel includes a pixel electrode 101, a common electrode 102, and a first electrode 103, the pixel electrode 101 and the common electrode 102 forming a pixel capacitance CLCThe pixel electrode 101 and a part of the common voltage line V form a first storage capacitor C1The pixel electrode 101 and the first electrode 103 form a second storage capacitor C2Two pole plates of (a); it should be noted that the shape of the common electrode 102 in the display panel is only schematically represented, the common electrode 102 may be one block of the whole surface, or the entire display panel includes a plurality of block-shaped common electrodes 102, and the common electrode 102 may be reused as a touch electrode of the display panel when the common electrode 102 is block-shaped; the various traces in fig. 8 are also only schematically represented.
The display panel provided by the invention comprises a low frame frequency refreshing state, a high frame frequency refreshing state, a scanning line G and a data line D, wherein the frequency of signal output in the low frame frequency refreshing state is less than that in the high frame frequency refreshing state.
In the low frame frequency refreshing state, the scanning line G provides scanning signals step by step, the data line D provides data signals, the common voltage line V provides common voltage signals, and the control signal line S provides a first signal to control the second switch unit to be opened. Referring to the circuit structure diagram of fig. 1 correspondingly, the second storage capacitor C can be realized after the second switch unit is opened2The second pole of the first storage capacitor is electrically connected with the common voltage line V to realize the direction from the common voltage line V to the second storage capacitor C2Corresponding to the first storage capacitor C1And a second storage capacitor C2Can be applied to the pixel capacitor CLCThe storage capacitor in the pixel driving circuit is increased by discharging, so that the display retention time of the display panel can be prolonged, and the display panel refreshes the display picture at a low frame frequency, thereby being suitable for displaying the static picture of the display panel.
In the high frame rate refresh state of the video signal,the scan line G provides a scan signal, the data line D provides a data signal, the common voltage line V provides a common voltage signal, the control signal line S provides a second signal to control the second switch unit (not shown in the figure) to be turned off, the common voltage line V and the second storage capacitor C2Is disconnected from the second storage capacitor C2Charging, i.e. only the first storage capacitor C1To pixel capacitance CLCAnd discharging is carried out, and the display panel refreshes the display picture at a high frame frequency, so that the method is suitable for displaying the dynamic picture of the display panel.
According to the display panel provided by the invention, the second storage capacitor is arranged in the pixel driving circuit of the display panel, the storage capacitor of the pixel driving circuit is added, and the second storage capacitor is controlled by the second switch unit. When a static picture is displayed, refreshing the screen at a low frame frequency, controlling the second switch unit to be opened, communicating the common voltage line with the second storage capacitor, and enabling the first storage capacitor and the second storage capacitor to discharge electricity to the pixel capacitor so as to prolong the picture retention time; when a dynamic picture is displayed, the screen is refreshed at a high frame frequency, the second switch unit is controlled to be closed, the common voltage line is disconnected with the second storage capacitor, only the first storage capacitor discharges for the pixel capacitor, and the dynamic display effect is ensured. The invention can realize the display of static pictures in a low frame frequency refreshing state, the display of dynamic pictures in a high frame frequency refreshing state, and the switching between a normal mode (namely, a high frame frequency refreshing state) and a low power consumption mode (namely, a low frame frequency refreshing state) according to the updating rate of the pictures, thereby achieving the effect of reducing the power consumption. In addition, the second storage capacitor is arranged, so that the storage capacitor of the pixel driving circuit is increased, the pixel voltage change caused by charge loss can not be caused under the condition that the lighting holding time of the sub-pixel is prolonged in the low-frame-frequency refreshing state, and the display effect in the low-frame-frequency refreshing state (namely static image display) is ensured.
In the conventional display panel, in order to ensure the smoothness of the picture, the frame frequency of the screen is typically 60 Hz. The static picture is the same as the dynamic picture, and the display panel updates the picture with the same refresh frequency. Fig. 9 is a timing diagram of a low frame rate refresh state and a high frame rate refresh state of a display panel according to an embodiment of the invention. As shown in fig. 9, the scanning lines in the display panel are scanned step by step, and assuming that the display panel includes n scanning lines, where n is a positive integer, the display of one frame of picture is called after completing the scanning signals from the first scanning line G1 to the nth scanning line Gn. Where Dm represents the mth data line, m is also a positive integer, and one data line in the display panel provides signals for a plurality of rows of sub-pixels in the display panel, so there should be a plurality of impulse signals on the data line in one frame time, and the impulse signals of the mth data line in fig. 9 are only schematically shown. Taking the frequency f1 of the high frame frequency refreshed GPS as normal 60Hz as an example, the effective frame refreshing time when the high frame frequency refreshed GPS is 1s/60, where the effective frame is the scanning signal for completing the scanning from the first scanning line G1 to the nth scanning line Gn. And the frequency f2 of the low frame frequency refreshing DPS is less than 60Hz, in the state of the low frame frequency refreshing DPS, the refreshing time of the effective frame is still 1s/60, and the holding time t is prolonged, and the signals of the scanning lines and the data lines are stopped to be provided in the holding time t. Fig. 9 only takes as an example that the frequency of the low frame rate refresh is 1s refresh 1 time, that is, f2 is 1 Hz. When the GPS is refreshed at a high frame rate and the DPS is refreshed at a low frame rate, the effective frame refresh time is unchanged, while the retention time t (i.e., the discharge time) is significantly prolonged during the refresh at the low frame rate. In the present invention, the retention time t during the low frame rate refresh is preferably as long as the liquid crystal does not have characteristic destruction or display with obvious image sticking due to the long-term exposure to the same voltage, and in fig. 9, the one-frame time is 1s, and the retention time is less than 1s, but the retention time t during the low frame rate refresh is not limited to that shown in fig. 9, and may be less than 3 to 4 seconds, for example.
Further, fig. 10 is a partial top view of another alternative implementation of the display panel according to the embodiment of the present invention, and fig. 11 is a cross-sectional view of the display panel at a position along the tangent line a-a' in fig. 10. Fig. 2 is a schematic structural diagram of a pixel driving circuit in a display panel provided in this embodiment mode.
Referring to fig. 10 and 11 together, wherein fig. 10 only illustrates one sub-pixel, in the display panel provided by the present invention, as shown in fig. 11, the first switching unit 1 includes a first transistor T1, and the first transistor T1 includes an active layer T14, a gate T15, a source T16, and a drain T17; the second switching unit 2 includes a second transistor T2, the second transistor T2 including an active layer T24, a gate T25, a source T26, and a drain T27; the display panel comprises an array substrate 11 and a color film substrate 12 which are arranged oppositely, and a liquid crystal layer 13 is further arranged between the array substrate 11 and the color film substrate 12.
Continuing to refer to fig. 11, the array substrate 11 includes a substrate layer 111, a first metal layer 112, a semiconductor active layer 113, a second metal layer 114, a first electrode layer 115, and a pixel electrode layer 116, which are arranged in sequence; the active layer T14 of the first transistor T1 and the active layer T24 of the second transistor T2 are located on the semiconductor active layer 113, the gate T15 of the first transistor T1 and the gate T25 of the second transistor T2 are located on the first metal layer 112, and the source T16 and the drain T17 of the first transistor T1 and the source T26 and the drain T27 of the second transistor T2 are located on the second metal layer 114.
A scanning line G, a common voltage line V and a control signal line S in the display panel are positioned in a first metal layer 112, a data line D is positioned in a second metal layer 114, a first electrode 103 is positioned in a first electrode layer 115, and a pixel electrode 101 is positioned in a pixel electrode layer 116; the gate T15 of the first transistor T1 is electrically connected to the scan line G, the source T16 of the first transistor T1 is electrically connected to the data line D, and the drain T17 of the first transistor T1 is electrically connected to the pixel electrode 101 through the first via K1; the gate T25 of the second transistor T2 is electrically connected to the control signal line S, the source T26 of the second transistor T2 is electrically connected to the common voltage line V through the second via hole K2, and the drain T27 of the second transistor T2 is electrically connected to the first electrode 103.
In the display panel provided by the invention, the first electrode and the second transistor are arranged, so that when the second transistor is in an open state, a capacitor can be formed between the first electrode and the pixel electrode, and the storage capacitor can be increased in the process of driving the sub-pixel to display. When a static picture is displayed, refreshing at a low frame frequency, controlling the second transistor to be opened, communicating the first electrode with the common voltage line, forming a storage capacitor between the first electrode and the pixel electrode, and prolonging the picture retention time; when a dynamic picture is displayed, the screen is refreshed at a high frame frequency, the second transistor is controlled to be closed, the common voltage line is disconnected with the first electrode, and only a storage capacitor is formed between the pixel electrode and part of the common voltage line, so that the dynamic display effect is ensured. The invention can realize the display of static pictures in a low frame frequency refreshing state, the display of dynamic pictures in a high frame frequency refreshing state, and the switching between a normal mode (namely, a high frame frequency refreshing state) and a low power consumption mode (namely, a low frame frequency refreshing state) according to the updating rate of the pictures, thereby achieving the effect of reducing the power consumption.
Optionally, with continued reference to fig. 11, the color filter substrate 12 includes a common electrode layer 121, and the common electrode 104 is located on the common electrode layer 121. In the display panel provided in this embodiment, the common electrode 104 is connected to a common voltage line (not shown), and after a voltage is applied to the common electrode 104 and the pixel electrode 101, an electric field is formed to control the liquid crystal molecules to deflect, so as to realize the transmission of light, and further realize the display of the display panel.
Further, fig. 12 is a partial top view of another alternative implementation of the display panel according to the embodiment of the present invention. Fig. 4 is a schematic structural diagram of a pixel driving circuit in a display panel provided in this embodiment mode. As shown in fig. 12, the second switching unit includes a third transistor T3, the third transistor T3 is connected in parallel with the second transistor T2, and the control signal line includes a first control signal line S1 and a second control signal line S2; the third transistor T3 is located at the same position in the film structure of the display panel as the second transistor T2. The third transistor T3 includes an active layer T34, a gate electrode (directly under the active layer T34, not shown), a source electrode T36 and a drain electrode T37, the active layer T34 of the third transistor T3 is located on the semiconductor active layer, the gate electrode of the third transistor T3 is located on the first metal layer, and the source electrode T36 and the drain electrode T37 of the third transistor T3 are located on the second metal layer; a gate (not shown) of the second transistor T2 is electrically connected to the first control signal line S1; the gate of the third transistor T3 is electrically connected to the second control signal line S2, the source T36 of the third transistor T3 is electrically connected to the common voltage line V through the third via hole K3, and the drain T37 of the third transistor is electrically connected to the first electrode 103.
In the display panel provided by the embodiment, the first control line is arranged to control the second transistor to be turned on or turned off, the second control line is arranged to control the third transistor to be turned on or turned off, when the low frame frequency is refreshed, the second transistor and the third transistor are alternately turned on to control the first electrode to be communicated with the common voltage line, the storage capacitor is formed between the first electrode and the pixel electrode, the picture holding time is prolonged, and the phenomenon that the second transistor or the third transistor is in a normally open state to cause electric leakage is avoided, so that the display effect of the sub-pixel is not affected.
The display panel provided by the invention has the advantages that the storage capacitance in the pixel driving circuit is increased during low frame frequency refreshing, and the display effect of a static picture is ensured. However, the situation of small leakage current is not avoided, the display pixels are very sensitive to leakage current when displaying the intermediate gray scale, and the slight change of the voltage can cause great change of light transmittance, so that the picture flickers when displaying the intermediate gray scale.
Further, fig. 13 is a partial top view of another alternative implementation of the display panel according to the embodiment of the present invention. As shown in fig. 13, a subpixel sp in the display panel includes a large subpixel dpsp and a small subpixel Xsp, and an opening area of the large subpixel dpsp is larger than that of the small subpixel Xsp; the display panel includes a plurality of sub-pixel cells spY, each sub-pixel cell spY including a large sub-pixel dps and a small sub-pixel Xsp; the plurality of sub-pixel cells spY includes a first color sub-pixel cell spY1, a second color sub-pixel cell spY2, and a third color sub-pixel cell spY 3. Optionally, the color of the first color sub-pixel unit spY1 is red, the color of the second color sub-pixel unit spY2 is green, and the color of the third color sub-pixel unit spY3 is blue. Optionally, the plurality of sub-pixel elements spY may also include a white sub-pixel element.
In the display panel provided by the embodiment of the invention, the sub-pixels are all driven by the pixel driving circuit provided by the embodiment of the invention, so that the static picture is displayed by refreshing at a low frame rate, and the dynamic picture is displayed by refreshing at a high frame rate. In the invention, although the storage capacitor is increased in the low-frequency refreshing state, the small electric leakage is not avoided, and the large sub-pixel and the small sub-pixel are designed to replace the picture display of the middle gray scale of a single sub-pixel, so that the picture flickering phenomenon caused by the sensitivity of the middle gray scale to the small electric leakage can be avoided.
In the embodiment of the present invention, a sub-pixel unit includes a large sub-pixel and a small sub-pixel, and each sub-pixel unit can realize 4 gray scales, that is, the large sub-pixel and the small sub-pixel are both turned off, the large sub-pixel is turned off, the small sub-pixel is turned on, the large sub-pixel is turned on, and the small sub-pixel and the large sub-pixel are both turned on. The two gray scale modes of opening the large sub-pixel and closing the small sub-pixel and opening the large sub-pixel can replace the original intermediate gray scale mode, each large sub-pixel or small sub-pixel only has two states of opening or closing, and the two states are insensitive to micro electric leakage, so that the display panel is prevented from serious flicker.
Optionally, when the sub-pixel units of three colors in the display panel form one display pixel, a 4 × 4 — 64 color screen display can be realized. The size ratio of the opening areas of the large sub-pixel and the small sub-pixel is not limited in the present invention, and for example, the size ratio of the opening areas of the large sub-pixel and the small sub-pixel may be 2: 1.
Further, the invention also provides a display device comprising any one of the display panels provided by the invention. Fig. 14 is a schematic view of a display device according to an embodiment of the invention. The display device provided by the embodiment of the invention can be any electronic product with a display function, including but not limited to the following categories: the mobile terminal comprises a television, a notebook computer, a desktop display, a tablet computer, a digital camera, a mobile phone, an intelligent bracelet, intelligent glasses, a vehicle-mounted display, medical equipment, industrial control equipment, a touch interaction terminal and the like.
According to the embodiments, the pixel driving circuit, the driving method thereof, the display panel and the display device of the invention have the following advantages:
when the pixel driving circuit provided by the invention is applied to a display panel, the change of the voltage applied to the data line can realize the brightness change of the sub-pixel display for the sub-pixels in the display panel. When the display panel displays a picture, a static picture and a dynamic picture usually exist, and when the display panel displays the picture, the pixel driving circuit works in a low-frequency output state, and the brightness of the sub-pixels is unchanged; in the case of a dynamic image, the pixel driving circuit operates in a high-frequency output state, and the luminance of the sub-pixel changes. In the conventional pixel driving circuit, there is only one fixed storage capacitor or no storage capacitor, and when the storage capacitor is used for driving the sub-pixel to display, the time for which the sub-pixel can keep displaying is fixed, so that the output frequency of the pixel driving circuit is the same whether in dynamic picture display or static picture display. Compared with the conventional driving circuit, the switching between low-frequency output and high-frequency output during static and dynamic display can be realized, the normal display of the sub-pixels is ensured while the display effect is ensured, and the effect of reducing power consumption can be realized.
Although some specific embodiments of the present invention have been described in detail by way of examples, it should be understood by those skilled in the art that the above examples are for illustrative purposes only and are not intended to limit the scope of the present invention. It will be appreciated by those skilled in the art that modifications may be made to the above embodiments without departing from the scope and spirit of the invention. The scope of the invention is defined by the appended claims.

Claims (12)

1. A pixel driving circuit, comprising:
the pixel circuit comprises a first switch unit, a second switch unit, a pixel capacitor, a first storage capacitor, a second storage capacitor, a scanning line, a data line, a common voltage line and a control signal line;
a control end of the first switch unit is electrically connected with the scanning line, a first end of the first switch unit is electrically connected with the data line, and a second end of the first switch unit is respectively and electrically connected with a first pole of the pixel capacitor, a first pole of the first storage capacitor and a first pole of the second storage capacitor;
a control end of the second switching unit is electrically connected with the control signal line, a first end of the second switching unit is electrically connected with the common voltage line, and a second end of the second switching unit is electrically connected with a second pole of the second storage capacitor;
a second pole of the pixel capacitor is electrically connected to the common voltage line;
a second pole of the first storage capacitor is electrically connected to the common voltage line;
the scanning lines provide scanning signals;
the data line provides a data signal;
the common voltage line provides a common voltage signal;
the control signal line provides a first signal and a second signal, the first signal controls the second switch unit to be turned on, and the second signal controls the second switch unit to be turned off;
the working state of the pixel driving circuit comprises a low-frequency output state and a high-frequency output state; the scanning lines and the data lines, the frequency of signal output in the low-frequency output state is less than the frequency of signal output in the high-frequency output state;
wherein, in the low frequency output state, the control signal line provides the first signal; in the high frequency output state, the control signal line provides the second signal.
2. The pixel driving circuit according to claim 1,
the first switch unit comprises a first transistor, a control end of the first transistor is electrically connected with the scanning line, a first end of the first transistor is electrically connected with the data line, and a second end of the first transistor is respectively and electrically connected with a first pole of the pixel capacitor, a first pole of the first storage capacitor and a first pole of the second storage capacitor;
the second switching unit includes a second transistor, a control terminal of the second transistor is electrically connected to the control signal line, a first terminal of the second transistor is electrically connected to the common voltage line, and a second terminal of the second transistor is electrically connected to a second pole of the second storage capacitor.
3. The pixel driving circuit according to claim 2,
the second switching unit further includes a third transistor connected in parallel to the second transistor, and the control signal line includes a first control signal line and a second control signal line; wherein,
the control end of the second transistor is electrically connected with the first control signal line;
a control end of the third transistor is electrically connected to the second control signal line, a first end of the third transistor is electrically connected to the common voltage line, and a second end of the third transistor is electrically connected to the second pole of the second storage capacitor;
in the low-frequency output state, the first control signal line and the second control signal line alternately provide the first signal to control the second transistor and the third transistor to be alternately turned on; in the high-frequency output state, the first control signal line and the second control signal line both provide the second signal, and control both the second transistor and the third transistor to be turned off.
4. A driving method of a pixel driving circuit for driving the pixel driving circuit according to any one of claims 1 to 3,
in the low-frequency output state, the scanning lines are controlled to provide scanning signals according to a first frequency, the data lines provide data signals according to the first frequency, the common voltage lines provide common voltage signals, and the control signal lines provide the first signals;
in the high-frequency output state, the scanning lines are controlled to provide scanning signals according to a second frequency, the data lines provide data signals according to the second frequency, the common voltage lines provide common voltage signals, the control signal lines provide the second signals,
wherein the first frequency is less than the second frequency.
5. The driving method of the pixel driving circuit according to claim 4,
the control signal line comprises a single signal line, and controlling the control signal line to provide the first signal comprises controlling the control signal line to continuously provide the first signal;
controlling the control signal line to provide the second signal includes controlling the control signal line to continuously provide the second signal.
6. The driving method of the pixel driving circuit according to claim 4,
the control signal line comprises a first control signal line and a second control signal line, and the control of the control signal line to provide the first signal comprises the control of the first control signal line and the second control signal line to alternately provide the first signal;
controlling the control signal line to provide the second signal includes controlling both the first control signal line and the second control signal line to continuously provide the second signal.
7. A display panel comprising a plurality of pixel driving circuits according to any one of claims 1 to 3 for driving a plurality of sub-pixels of the display panel,
the sub-pixel comprises a pixel electrode, a common electrode and a first electrode, the pixel electrode and the common electrode form two polar plates of the pixel capacitor, the pixel electrode and a part of the common voltage line form two polar plates of the first storage capacitor, and the pixel electrode and the first electrode form two polar plates of the second storage capacitor;
the display panel comprises a low frame frequency refreshing state and a high frame frequency refreshing state, the scanning lines and the data lines, and the frequency of signal output in the low frame frequency refreshing state is less than that in the high frame frequency refreshing state;
in the low frame frequency refreshing state, the scanning lines provide scanning signals, the data lines provide data signals, the common voltage lines provide common voltage signals, and the control signal lines provide first signals to control the second switch units to be opened;
in the high frame frequency refreshing state, the scan lines provide scan signals, the data lines provide data signals, the common voltage lines provide common voltage signals, and the control signal lines provide second signals to control the second switch units to be turned off.
8. The display panel according to claim 7,
the first switching unit includes a first transistor including an active layer, a gate electrode, a source electrode, and a drain electrode; the second switching unit includes a second transistor including an active layer, a gate electrode, a source electrode, and a drain electrode;
the display panel comprises an array substrate and a color film substrate which are oppositely arranged, wherein the array substrate comprises a substrate layer, a first metal layer, a semiconductor active layer, a second metal layer, a first electrode layer and a pixel electrode layer which are sequentially arranged; wherein
The active layer of the first transistor and the active layer of the second transistor are located on the semiconductor active layer, the gate electrode of the first transistor and the gate electrode of the second transistor are located on the first metal layer, and the source electrode and the drain electrode of the first transistor and the source electrode and the drain electrode of the second transistor are located on the second metal layer;
the scanning line, the common voltage line and the control signal line are located in the first metal layer, the data line is located in the second metal layer, the first electrode is located in the first electrode layer, and the pixel electrode is located in the pixel electrode layer; wherein,
the grid electrode of the first transistor is electrically connected with the scanning line, the source electrode of the first transistor is electrically connected with the data line, and the drain electrode of the first transistor is electrically connected with the pixel electrode through a first through hole;
the gate of the second transistor is electrically connected to the control signal line, the source of the second transistor is electrically connected to the common voltage line through a second via hole, and the drain of the second transistor is electrically connected to the first electrode.
9. The display panel according to claim 8,
the second switching unit includes a third transistor connected in parallel with the second transistor, and the control signal line includes a first control signal line and a second control signal line; wherein,
the third transistor comprises an active layer, a gate electrode, a source electrode and a drain electrode, the active layer of the third transistor is positioned on the semiconductor active layer, the gate electrode of the third transistor is positioned on the first metal layer, and the source electrode and the drain electrode of the third transistor are positioned on the second metal layer;
the gate of the second transistor is electrically connected to the first control signal line;
the gate of the third transistor is electrically connected to the second control signal line, the source of the third transistor is electrically connected to the common voltage line through a third via, and the drain of the third transistor is electrically connected to the first electrode.
10. The display panel according to claim 8,
the color film substrate comprises a common electrode layer, and the common electrode is located on the common electrode layer.
11. The display panel according to claim 7,
the sub-pixels comprise large sub-pixels and small sub-pixels, and the opening area of the large sub-pixels is larger than that of the small sub-pixels;
the display panel comprises a plurality of sub-pixel units, each sub-pixel unit comprises one large sub-pixel and one small sub-pixel;
the plurality of sub-pixel units comprise a first color sub-pixel unit, a second color sub-pixel unit and a third color sub-pixel unit.
12. A display device characterized by comprising the display panel according to any one of claims 7 to 11.
CN201810251860.0A 2018-03-26 2018-03-26 Pixel driving circuit, driving method thereof, display panel and display device Pending CN108648702A (en)

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CN112419996A (en) * 2020-12-01 2021-02-26 厦门天马微电子有限公司 Pixel circuit, driving method thereof, display panel and display device
CN112652276A (en) * 2020-12-31 2021-04-13 绵阳惠科光电科技有限公司 Display panel, driving method thereof and display device
CN113506549A (en) * 2021-07-13 2021-10-15 晶门科技（深圳）有限公司 Thin film transistor liquid crystal display device operable at a wide range of frame rates
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WO2021248566A1 (en) * 2020-06-09 2021-12-16 武汉华星光电技术有限公司 Pixel drive circuit and display panel
CN114187876A (en) * 2021-11-26 2022-03-15 绵阳惠科光电科技有限公司 Pixel driving circuit, display panel and electronic equipment
CN114745586A (en) * 2022-04-14 2022-07-12 福州京东方光电科技有限公司 Image transmission method and device and readable storage medium
CN114937438A (en) * 2022-05-19 2022-08-23 惠科股份有限公司 Common voltage drive circuit, display device and electronic apparatus
WO2022227111A1 (en) * 2021-04-26 2022-11-03 武汉华星光电技术有限公司 Multiplexing circuit, display panel, and method for driving display panel
CN115472137A (en) * 2022-09-16 2022-12-13 北京京东方显示技术有限公司 Pixel circuit, driving method thereof, display panel and display device
WO2023138360A1 (en) * 2022-01-19 2023-07-27 荣耀终端有限公司 Electrowetting substrate, electrowetting display panel and electrowetting display apparatus
WO2024031319A1 (en) * 2022-08-09 2024-02-15 京东方科技集团股份有限公司 Pixel driving method, pixel driving circuit, and display device

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CN109830205A (en) * 2019-04-17 2019-05-31 京东方科技集团股份有限公司 A kind of array substrate, its driving method, display panel and display device
CN109830205B (en) * 2019-04-17 2022-05-20 京东方科技集团股份有限公司 Array substrate, driving method thereof, display panel and display device
CN110310600A (en) * 2019-08-16 2019-10-08 上海天马有机发光显示技术有限公司 Driving method, display drive apparatus and the electronic equipment of display panel
CN113711298B (en) * 2020-03-18 2023-02-07 京东方科技集团股份有限公司 Shifting register unit, driving method thereof, grid driving circuit and display device
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WO2021248566A1 (en) * 2020-06-09 2021-12-16 武汉华星光电技术有限公司 Pixel drive circuit and display panel
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CN112652276B (en) * 2020-12-31 2022-07-08 绵阳惠科光电科技有限公司 Display panel, driving method thereof and display device
CN112652276A (en) * 2020-12-31 2021-04-13 绵阳惠科光电科技有限公司 Display panel, driving method thereof and display device
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WO2022227111A1 (en) * 2021-04-26 2022-11-03 武汉华星光电技术有限公司 Multiplexing circuit, display panel, and method for driving display panel
CN113506549A (en) * 2021-07-13 2021-10-15 晶门科技（深圳）有限公司 Thin film transistor liquid crystal display device operable at a wide range of frame rates
CN114187876A (en) * 2021-11-26 2022-03-15 绵阳惠科光电科技有限公司 Pixel driving circuit, display panel and electronic equipment
CN116500774A (en) * 2022-01-19 2023-07-28 荣耀终端有限公司 Electrowetting substrate, electrowetting display panel and electrowetting display device
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CN114745586A (en) * 2022-04-14 2022-07-12 福州京东方光电科技有限公司 Image transmission method and device and readable storage medium
CN114937438A (en) * 2022-05-19 2022-08-23 惠科股份有限公司 Common voltage drive circuit, display device and electronic apparatus
US11915663B2 (en) 2022-05-19 2024-02-27 HKC Corporation Limited Common voltage driving circuit, display device, and electronic device
WO2024031319A1 (en) * 2022-08-09 2024-02-15 京东方科技集团股份有限公司 Pixel driving method, pixel driving circuit, and display device
CN115472137A (en) * 2022-09-16 2022-12-13 北京京东方显示技术有限公司 Pixel circuit, driving method thereof, display panel and display device
CN115472137B (en) * 2022-09-16 2023-11-03 北京京东方显示技术有限公司 Pixel circuit, driving method thereof, display panel and display device

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