CN114187876A - Pixel driving circuit, display panel and electronic equipment - Google Patents
Pixel driving circuit, display panel and electronic equipment Download PDFInfo
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- CN114187876A CN114187876A CN202111425319.5A CN202111425319A CN114187876A CN 114187876 A CN114187876 A CN 114187876A CN 202111425319 A CN202111425319 A CN 202111425319A CN 114187876 A CN114187876 A CN 114187876A
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- 239000003990 capacitor Substances 0.000 claims abstract description 54
- 230000000295 complement effect Effects 0.000 claims abstract description 13
- 239000010409 thin film Substances 0.000 claims description 29
- 230000005611 electricity Effects 0.000 claims 2
- 206010047571 Visual impairment Diseases 0.000 abstract description 3
- 239000004065 semiconductor Substances 0.000 description 12
- 238000010586 diagram Methods 0.000 description 6
- 239000004973 liquid crystal related substance Substances 0.000 description 6
- 239000000969 carrier Substances 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 230000014759 maintenance of location Effects 0.000 description 2
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3674—Details of drivers for scan electrodes
- G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0247—Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0257—Reduction of after-image effects
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Abstract
The application provides a pixel driving circuit, a display panel and an electronic device, wherein the pixel driving circuit comprises at least one first switch unit, a second switch unit and a first capacitor, the first switch unit is used for receiving a first scanning signal, the first scanning signal is used for controlling the conduction state of the first switch unit, the second switch unit is used for receiving a second scanning signal, the second scanning signal is used for controlling the conduction state of the second switch unit, the first switch unit is connected with the second switch unit in parallel, when the first scanning signal controls the first switch unit to be started and the second scanning signal controls the second switch unit to be started, the first switch unit and the second switch unit are further used for charging the same first capacitor according to a data signal, and the first switch unit and the second switch unit are complementary. Because the first switch unit and the second switch unit are complementary, the voltage drop of the data signal is compensated by the first switch unit and the second switch unit, thereby improving stroboflash and afterimage.
Description
Technical Field
The present disclosure relates to display circuits, and particularly to a pixel driving circuit, a display panel and an electronic device.
Background
At present, most electronic devices have a function of displaying images, and a liquid crystal display panel is one of the important research directions in the field of display technology as a main application device in the electronic devices. In the prior art, due to the rapid drop of the voltage value of the data signal or the influence of the leakage current of the Thin Film Transistor (TFT) controlling the on-state, the phenomenon of insufficient charging of the liquid crystal capacitor may be caused, resulting in the occurrence of flicker and image sticking of the liquid crystal display panel.
Disclosure of Invention
The application discloses a pixel driving circuit which can solve the technical problems of flicker and residual image of a liquid crystal display panel.
In a first aspect, the present application provides a pixel driving circuit comprising at least a first switching unit, a second switching unit and a first capacitor, the first switch unit is used for receiving a first scanning signal, the first scanning signal is used for controlling the conducting state of the first switch unit, the second switch unit is used for receiving a second scanning signal, the second scanning signal is used for controlling the conducting state of the second switch unit, the first switch unit is connected with the second switch unit in parallel, when the first scanning signal controls the first switch unit to be turned on and the second scanning signal controls the second switch unit to be turned on, the first switch unit and the second switch unit are also used for charging the same first capacitor according to a data signal, wherein the first switch unit and the second switch unit are complementary.
Because the first switch unit and the second switch unit are complementary, the voltage drop of the data signal is mutually compensated through the first switch unit and the second switch unit, and the influence of the voltage drop of the data signal on display is reduced. Meanwhile, the first switch unit and the second switch unit are the same as the first capacitor, so that the charging efficiency is improved.
Optionally, the first switch unit is an n-type thin film transistor, and the second switch unit is a p-type thin film transistor, or the first switch unit is a p-type thin film transistor, and the second switch unit is an n-type thin film transistor.
Optionally, a gate of the first switching unit is configured to receive the first scan signal, and a first electrode of the first switching unit is configured to receive a data signal; the gate of the second switch unit is used for receiving the second scanning signal, the first electrode of the second switch unit is used for receiving the data signal, the second electrode of the first switch unit is electrically connected with the second electrode of the second switch unit and one end of the first capacitor, and the other end of the first capacitor is electrically connected with the common electrode.
Optionally, the pixel driving circuit further includes a scanning signal generating module, where the scanning signal generating module includes at least one first scanning signal line, a second scanning signal line, and an inverting sub-module, the scanning signal generating module is configured to generate the first scanning signal, the first scanning signal line is electrically connected to the gate of the first switch unit, the second scanning signal line is electrically connected to the gate of the second switch unit, the first scanning signal line is configured to transmit the first scanning signal, an input end of the inverting sub-module is electrically connected to the first scanning signal line, an output end of the inverting sub-module is electrically connected to the second scanning signal line, the inverting sub-module is configured to generate the second scanning signal according to the first scanning signal, and the second scanning signal line is configured to transmit the second scanning signal.
Optionally, the phase of the first scanning signal is different from that of the second scanning signal by 180 °.
Optionally, the scan signal generating module is further configured to receive a first control signal and a second control signal, and the scan signal generating module generates the first scan signal according to the first control signal and the second control signal.
Optionally, the pixel driving circuit further includes a second capacitor, one end of the second capacitor is electrically connected to one end of the first capacitor, and the other end of the second capacitor is electrically connected to the common electrode.
Optionally, the pixel driving circuit further includes a data signal generating module, where the data signal generating module includes at least one data signal line, the data signal generating module is configured to generate a data signal, the data signal line is configured to transmit the data signal, and the corresponding first switch unit and the corresponding second switch unit are electrically connected to the same data signal line.
In a second aspect, the present application further provides a display panel, where the display panel includes pixel units distributed in an array and the pixel driving circuit according to the first aspect, and the pixel driving circuit is configured to drive the pixel units to operate.
In a third aspect, the present application further provides an electronic device, which includes a housing and the display panel as described in the second aspect, where the housing is used for bearing and mounting the display panel.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for a person skilled in the art to obtain other drawings based on the drawings without any inventive exercise.
Fig. 1 is a schematic diagram of a pixel driving circuit according to an embodiment of the present disclosure.
Fig. 2 is a schematic cross-sectional view of an N-type thin film transistor according to an embodiment of the present disclosure.
Fig. 3 is a schematic cross-sectional view of a P-type thin film transistor according to an embodiment of the present disclosure.
Fig. 4 is a timing signal diagram according to an embodiment of the present application.
Fig. 5 is a comparison diagram provided in accordance with an embodiment of the present application.
Fig. 6 is a schematic top view of a display panel according to an embodiment of the present disclosure.
Fig. 7 is a schematic top view of an electronic device according to an embodiment of the present disclosure.
The reference numbers illustrate: the pixel driving circuit comprises a pixel driving circuit-1, a first switch unit-11, a second switch unit-12, a first capacitor-13, a scanning signal generating module-14, a first scanning signal line-141, a second scanning signal line-142, an inverting sub-module-143, a second capacitor-15, a data signal generating module-16, a data signal line-161, a display panel-2, a pixel unit-21, an electronic device-3, a shell-31, a first scanning signal-CLKn, a second scanning signal-CLKnB, a data signal-Vdataan, a gate-g, an insulating layer-I, a common electrode-Vcom, a first control signal-CKV and a second control signal-STV.
Detailed Description
The technical solutions in the embodiments of the present application will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present application, and it is obvious that the described embodiments are only some embodiments of the present application, not all embodiments. All other embodiments obtained by a person of ordinary skill in the art without any inventive work based on the embodiments in the present application are within the scope of protection of the present application.
Referring to fig. 1, fig. 1 is a schematic diagram of a pixel driving circuit 1 according to an embodiment of the present disclosure. The pixel driving circuit 1 comprises at least one first switching unit 11, a second switching unit 12 and a first capacitor 13, the first switch unit 11 is configured to receive a first scan signal CLKnA, the first scan signal CLKnA is configured to control a conducting state of the first switch unit 11, the second switch unit 12 is configured to receive a second scan signal CLKnB, the second scan signal CLKnB is configured to control a conducting state of the second switch unit 12, the first switch unit 11 is connected in parallel with the second switch unit 12, when the first scan signal CLKnA controls the first switch unit 11 to be turned on, and the second scan signal CLKnB controls the second switch unit 12 to be turned on, the first switch unit 11 and the second switch unit 12 are further configured to charge the same first capacitor 13 according to a data signal Vdatan, where the first switch unit 11 and the second switch unit 12 are complementary.
As shown in fig. 1, the pixel driving circuit 1 generally includes a plurality of first switch units 11, second switch units 12 and first capacitors 13 distributed in an array to drive a plurality of pixel units, so as to form a display screen. The letter "n" in the first scan signal CLKnA, the second scan signal CLKnB, and the data signal Vdatan represents signals with different serial numbers, such as the first scan signal CLK1A, the second scan signal CLK1B, the first scan signal CLK2A, the second scan signal CLK2B, the data signal Vdata1, the data signal Vdata2 in fig. 1, and the like, which will not be described in detail in the following description.
In this embodiment, the first capacitor 13 is a liquid crystal capacitor. The data signal Vdatan is a signal carrying a voltage value, and when the first switch unit 11 or the second switch unit 12 is turned on, the data signal Vdatan is transmitted to the first capacitor 13 through the first switch unit 11 or the second switch unit 12, so that a voltage difference is generated between two ends of the first capacitor 13 to adjust light emitted by the pixel unit, thereby implementing a display function.
Specifically, the first switch unit 11 and the second switch unit 12 are complementary, which means that the properties of the first switch unit 11 and the second switch unit 12 are opposite, for example, the N-type thin film transistor and the P-type thin film transistor are a pair of complementary transistors. It is understood that, in other possible embodiments, the first switch unit 11 and the second switch unit 12 may also be other electronic components, which is not limited in this application.
It is understood that, in the present embodiment, the first switching unit 11 and the second switching unit 12 are arranged in parallel without affecting each other. Since the first switch unit 11 and the second switch unit 12 are complementary, the voltage drop of the data signal Vdatan is compensated by the first switch unit 11 and the second switch unit 12, so that the influence of the voltage drop of the data signal Vdatan on the first capacitor 13 is reduced, and the phenomena of stroboflash and afterimage are improved. Meanwhile, the first switch unit 11 and the second switch unit 12 charge the same first capacitor 13, so that the charging efficiency is improved.
In one possible implementation, please refer to fig. 2 and fig. 3 together, wherein fig. 2 is a schematic cross-sectional view of an N-type thin film transistor according to an embodiment of the present disclosure; fig. 3 is a schematic cross-sectional view of a P-type thin film transistor according to an embodiment of the present disclosure. The first switch unit 11 is an N-type thin film transistor, and the second switch unit 12 is a P-type thin film transistor, or the first switch unit 11 is a P-type thin film transistor, and the second switch unit 12 is an N-type thin film transistor.
Specifically, as shown in fig. 2, the N-type transistor is formed by a gate g and a P-type semiconductor wrapping two N-type semiconductors, wherein one N-type semiconductor is a source s and the other is a drain d. Since pentavalent element impurities are doped in the N-type semiconductor material, most carriers in the N-type semiconductor are electrons, and the electrons are negatively charged. When the first switching transistor is an N-type thin film transistor, a high potential is applied to the gate g of the first switching unit 11, and two N-type semiconductors form a channel to turn on the source s and the drain d of the second switching unit 12.
As shown in fig. 3, the P-type tft is formed by a gate g and an N-type semiconductor wrapping two P-type semiconductors, wherein one P-type semiconductor is a source s and the other is a drain d. The gate g is a metal electrode, and an insulating layer I is further disposed between the gate g and the source s and the drain d. As trivalent element impurities are doped in the P-type semiconductor material, most carriers in the P-type semiconductor are holes, and the holes are positively charged. When the second switch unit 12 is a P-type thin film transistor, a low potential is applied to the gate g of the second switch unit 12, and the two P-type semiconductors form a channel to conduct the source s and the drain d of the second switch unit 12.
It can be understood that, in this embodiment, since the N-type thin film transistor and the P-type thin film transistor are complementary, the voltage drop of the data signal Vdatan is compensated by the N-type thin film transistor and the P-type thin film transistor, so that the influence of the voltage drop of the data signal Vdatan on the first capacitor 13 is reduced, and the phenomena of stroboflash and image retention are improved.
It should be noted that fig. 2 and fig. 3 are only schematic illustrations of one possible embodiment of the first switch unit 11 and the second switch unit 12, and do not represent limitations of the present application on the structures of the first switch unit 11 and the second switch unit 12.
In a possible implementation, referring to fig. 1 again, the gate of the first switch unit 11 is used for receiving the first scan signal CLKnA, and the first electrode of the first switch unit 11 is used for receiving the data signal Vdatan; a gate of the second switch unit 12 is configured to receive a second scan signal CLKnB, a first electrode of the second switch unit 12 is configured to receive a data signal Vdatan, a second electrode of the first switch unit 11 is electrically connected to the second electrode of the second switch unit 12 and one end of the first capacitor 13, and another end of the first capacitor 13 is electrically connected to the common electrode Vcom.
Specifically, when the first switch unit 11 is an N-type thin film transistor and the second switch unit 12 is a P-type thin film transistor, the first scan signal CLKnA is a high potential signal, and the second scan signal CLKnB is a low potential signal, so that the first switch unit 11 and the second switch unit 12 are turned on at the same time.
On the contrary, when the first switch unit 11 is a P-type thin film transistor and the second switch unit 12 is an N-type thin film transistor, the first scan signal CLKnA is a low potential signal and the second scan signal CLKnB is a high potential signal, so that the first switch unit 11 and the second switch unit 12 are turned on at the same time.
In general, the potential of the common electrode Vcom is 0V, i.e., a ground terminal of the pixel driving circuit 1. That is, after the voltage value of the data signal Vdatan is transmitted to one end of the first capacitor 13 through the first switch unit 11 and the second switch unit 12, the voltage value across the first capacitor 13 is theoretically equal to the voltage value of the data signal Vdatan.
It can be understood that, in the present embodiment, the first switching unit 11 and the second switching unit 12 are connected in parallel to simultaneously charge the first capacitor 13, so that the charging efficiency is improved. Meanwhile, if one of the first switch unit 11 or the second switch unit 12 fails, the data signal Vdatan may also be transmitted to the first capacitor 13 through the non-failed switch unit to charge the first capacitor 13, so as to improve the stability of the circuit.
In this embodiment, the first electrode serves as the source s, and the second electrode serves as the drain d. It is understood that, in other possible embodiments, the first electrode may also serve as the drain electrode d, and the second electrode serves as the source electrode s, which is not limited in this application.
In a possible implementation manner, referring to fig. 1 again, the pixel driving circuit 1 further includes a scan signal generating module 14, the scan signal generating module 14 includes at least one first scan signal line 141, a second scan signal line 142 and an inverting submodule 143, the first scan signal line 141 is electrically connected to the gate of the first switch unit 11, the second scan signal line 142 is electrically connected to the gate of the second switch unit 12, the scan signal generating module 14 is configured to generate the first scan signal CLKnA, the first scan signal line 141 is used to transmit the first scan signal CLKnA, the input end of the inverting submodule 143 is electrically connected to the first scan signal line 141, the output end of the inverting submodule 143 is electrically connected to the second scan signal line 142, the inverting submodule 143 is configured to generate the second scan signal CLKnB according to the first scan signal CLKnA, the second scan signal line 142 is used for transmitting the second scan signal CLKnB.
In this embodiment, the inverting submodule 143 outputs the second scan signal CLKnB, which is opposite to the first scan signal CLKnA, to simultaneously control the first switch unit 11 and the second switch unit 12, which are complementary to each other, so as to realize the same conduction state. For example, when the first scan signal CLKnA is at a high level, the inversion sub-module 143 generates the second scan signal CLKnB at a low level.
Specifically, the inverting submodule 143 may be a non-gated logic circuit. It is understood that, in other possible embodiments, the inverting submodule 143 may also be other types of circuits, which are not limited in this application.
In one possible embodiment, the first scan signal CLKnA and the second scan signal CLKnB are 180 ° out of phase.
Specifically, the phase difference between the first scan signal CLKnA and the second scan signal CLKnB of 180 ° means that "signs" of the first scan signal CLKnA and the second scan signal CLKnB are opposite, for example, when the voltage value of the first scan signal CLKnA is a positive voltage, the voltage value of the second scan signal CLKnB is a negative voltage, and the absolute value of the voltage value of the first scan signal CLKnA is equal to the absolute value of the voltage value of the second scan signal CLKnB.
In one possible implementation, referring to fig. 1 again, the scan signal generating module 14 is further configured to receive a first control signal CKV and a second control signal STV, and the scan signal generating module 14 generates the first scan signal CLKnA according to the first control signal CKV and the second control signal STV.
Specifically, in this embodiment, the first control signal CKV is a start pulse signal, the second control signal STV is an addressing scanning pulse signal, and the scanning signal generating module 14 selects one of the first scanning signal lines 141 to output the first scanning signal CLKnA under the combined action of the first control signal CKV and the second control signal STV, so as to control the corresponding first switch unit 11 and the second switch unit 12 to be turned on.
In a possible implementation manner, referring to fig. 1 again, the pixel driving circuit 1 further includes a second capacitor 15, one end of the second capacitor 15 is electrically connected to one end of the first capacitor 13, and the other end is electrically connected to the common electrode Vcom.
In the present embodiment, the second capacitor 15 serves as a storage capacitor. Due to the existence of the second capacitor 15, the data signal Vdatan charges the first capacitor 13 through the first switch unit 11 and the second switch unit 12, and simultaneously charges the second capacitor 15, so that the second capacitor 15 can maintain the voltage at two ends of the first capacitor 13 in a state that the first switch unit 11 and the second switch unit 12 are turned off, thereby realizing a function of maintaining a display screen.
In a possible implementation manner, referring to fig. 1 again, the pixel driving circuit 1 further includes a data signal generating module 16, the data signal generating module 16 includes at least one data signal line 161, the data signal generating module 16 is configured to generate a data signal Vdatan, the data signal line 161 is configured to transmit the data signal Vdatan, and the corresponding first switch unit 11 and the corresponding second switch unit 12 are electrically connected to the same data signal line 161.
Specifically, the scan signal generating module 14 selectively turns on the corresponding first switch unit 11 and the second switch unit 12, and the data signal generating module 16 generates the corresponding data signal Vdatan, and transmits the data signal Vdatan to the first capacitors 13 through the corresponding first switch unit 11 and the second switch unit 12, so as to charge each first capacitor 13, thereby achieving the effect of displaying the image.
In this embodiment, the data signal generating module 16 may generate the data signal Vdatan with different voltage values according to an electrical signal transmitted by a processing chip (MCU) or the like. In other possible embodiments, the present application does not limit the manner in which the data signal generating module 16 generates the data signal Vdatan.
Referring to fig. 4, fig. 4 is a timing signal diagram according to an embodiment of the present disclosure. As shown in fig. 4, in the present embodiment, due to the existence of the phase inversion submodule 143, the first scan signal CLKnA and the second scan signal CLKnB are "inverted", that is, are 180 ° out of phase, so that one first scan signal line 141 can simultaneously control the on/off of the first switch unit 11 and the second switch unit 12.
It is understood that, in other possible embodiments, the present application does not limit the timing signal as long as the first switch unit 11 and the second switch unit 12 are not affected to charge the same first capacitor 13.
Referring to fig. 5, fig. 5 is a comparison diagram provided in an embodiment of the present application. Specifically, VGL is a low level voltage signal, VGH is a high level voltage signal, Vd is a voltage value of the first capacitor 13 under an ideal condition, and Vth is a voltage drop.
As shown in fig. 5 by the circular dashed line box, since the first switch unit 11 and the second switch unit 12 are complementary, compared with the conventional driving circuit, the influence of the voltage drop of the data signal Vdatan and the leakage current of the switch unit on the first capacitor 13 is reduced, so that the phenomena of display stroboflash and afterimage are improved.
Fig. 6 is a schematic top view of a display panel 2 according to an embodiment of the present disclosure. The display panel 2 comprises pixel units 21 distributed in an array and the pixel driving circuit 1 as described above, and the pixel driving circuit 1 is used for driving the pixel units 21 to operate. Specifically, the pixel driving circuit 1 refers to the above description, and is not described herein again. Each pixel unit 21 and each first capacitor 13 in the pixel driving circuit 1 are arranged in a one-to-one correspondence manner, so that the first capacitors 13 are used as liquid crystal capacitors, and light emitted by the pixel units 21 can be adjusted to realize a display function.
It can be understood that, in the present embodiment, since the first switch unit 11 and the second switch unit 12 are of a complementary type, the voltage drop of the data signal Vdatan is compensated by the first switch unit 11 and the second switch unit 12, so that the influence of the voltage drop of the data signal Vdatan on the first capacitor 13 is reduced, and the phenomena of stroboflash and image retention that may occur to the display panel 2 are improved.
As shown in fig. 1, the display panel 2 includes a plurality of first and second scanning signal lines 141 and 142, and a plurality of data signal lines 161, the first and second scanning signal lines 141 and 142 may be disposed at intervals in a row direction, and the plurality of data signal lines 161 may be disposed at intervals in a column direction, wherein each pixel unit 21 is defined by two data signal lines 161 and the first and second scanning signal lines 141 and 142, which are independent of each other.
Fig. 7 is a schematic top view of an electronic device 3 according to an embodiment of the present disclosure, and fig. 7 is a schematic top view of the electronic device. The electronic device 3 comprises a housing 31 and the display panel 2 as described above, wherein the housing 31 is used for bearing and mounting the display panel 2. Specifically, please refer to the above description for the display panel 2, which is not described herein again.
It is understood that the electronic device 3 may be implemented in various forms. For example, the electronic device 3 described in the present application may include a mobile terminal such as a mobile phone, a tablet computer, a notebook computer, a palm computer, a Personal Digital Assistant (PDA), a Portable Media Player (PMP), a navigation device, a wearable device, a smart band, a pedometer, a charger, and a fixed terminal such as a Digital TV, a desktop computer, and the like, which is not limited in this application.
The principle and the embodiment of the present application are explained herein by applying specific examples, and the above description of the embodiment is only used to help understand the core idea of the present application; meanwhile, for a person skilled in the art, according to the idea of the present application, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present application.
Claims (10)
1. A pixel driving circuit is characterized in that the pixel driving circuit comprises at least a first switch unit, a second switch unit and a first capacitor, the first switch unit is used for receiving a first scanning signal, the first scanning signal is used for controlling the conducting state of the first switch unit, the second switch unit is used for receiving a second scanning signal, the second scanning signal is used for controlling the conducting state of the second switch unit, the first switch unit is connected with the second switch unit in parallel, when the first scanning signal controls the first switch unit to be turned on and the second scanning signal controls the second switch unit to be turned on, the first switch unit and the second switch unit are also used for charging the same first capacitor according to a data signal, wherein the first switch unit and the second switch unit are complementary.
2. The pixel driving circuit according to claim 1, wherein the first switching unit is an n-type thin film transistor and the second switching unit is a p-type thin film transistor, or wherein the first switching unit is a p-type thin film transistor and the second switching unit is an n-type thin film transistor.
3. The pixel driving circuit according to claim 2, wherein a gate of the first switching unit is configured to receive the first scan signal, and a first electrode of the first switching unit is configured to receive a data signal; the grid of second switch unit is used for receiving the second scanning signal, the first electrode of second switch unit is used for receiving data signal, the second electrode electricity of first switch unit is connected the second electrode of second switch unit and the one end of first electric capacity, the second electrode of second switch unit with the second electrode of first switch unit is connected the same one end of first electric capacity, the other end of first electric capacity is used for the electricity to connect the common electrode.
4. The pixel driving circuit according to claim 3, further comprising a scan signal generating module, the scanning signal generating module comprises at least one first scanning signal line, a second scanning signal line and an inverting submodule, the first scanning signal line is electrically connected to the gate of the first switching unit, the second scanning signal line is electrically connected to the gate of the second switching unit, the scanning signal generating module is used for generating the first scanning signal, the first scanning signal line is used for transmitting the first scanning signal, the input end of the phase-inverting submodule is electrically connected with the first scanning signal line, the output end of the phase-inverting submodule is electrically connected with the second scanning signal line, the phase inversion sub-module is used for generating the second scanning signal according to the first scanning signal, and the second scanning signal line is used for transmitting the second scanning signal.
5. The pixel driving circuit according to claim 4, wherein the first scanning signal and the second scanning signal are different in phase by 180 °.
6. The pixel driving circuit according to claim 4, wherein the scan signal generating module is further configured to receive a first control signal and a second control signal, and the scan signal generating module generates the first scan signal according to the first control signal and the second control signal.
7. The pixel driving circuit according to claim 3, wherein the pixel driving circuit further comprises a second capacitor, one end of the second capacitor is electrically connected to one end of the first capacitor, and the other end of the second capacitor is electrically connected to the common electrode.
8. The pixel driving circuit according to claim 1, further comprising a data signal generating module, wherein the data signal generating module comprises at least one data signal line, the data signal generating module is configured to generate a data signal, the data signal line is configured to transmit the data signal, and the corresponding first switching unit and the second switching unit are electrically connected to the same data signal line.
9. A display panel, comprising pixel units distributed in an array and a pixel driving circuit according to any one of claims 1 to 8, wherein the pixel driving circuit is configured to drive the pixel units to operate.
10. An electronic device, comprising a housing and the display panel of claim 9, wherein the housing is configured to carry the display panel.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111425319.5A CN114187876A (en) | 2021-11-26 | 2021-11-26 | Pixel driving circuit, display panel and electronic equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111425319.5A CN114187876A (en) | 2021-11-26 | 2021-11-26 | Pixel driving circuit, display panel and electronic equipment |
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| CN114187876A true CN114187876A (en) | 2022-03-15 |
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| CN202111425319.5A Pending CN114187876A (en) | 2021-11-26 | 2021-11-26 | Pixel driving circuit, display panel and electronic equipment |
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101833186A (en) * | 2009-03-10 | 2010-09-15 | 立景光电股份有限公司 | Pixel circuit of display device |
| CN106940981A (en) * | 2017-05-04 | 2017-07-11 | 成都晶砂科技有限公司 | The pixel compensation circuit and display device of single crystal silicon pipe CMOS driving displays |
| CN106991969A (en) * | 2017-06-09 | 2017-07-28 | 京东方科技集团股份有限公司 | Display panel, the compensation circuit of pixel and compensation method |
| CN108648702A (en) * | 2018-03-26 | 2018-10-12 | 上海天马微电子有限公司 | Pixel-driving circuit and its driving method, display panel and display device |
| CN110738974A (en) * | 2019-10-28 | 2020-01-31 | 京东方科技集团股份有限公司 | Liquid crystal pixel circuit, driving method thereof, display panel and display device |
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2021
- 2021-11-26 CN CN202111425319.5A patent/CN114187876A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101833186A (en) * | 2009-03-10 | 2010-09-15 | 立景光电股份有限公司 | Pixel circuit of display device |
| CN106940981A (en) * | 2017-05-04 | 2017-07-11 | 成都晶砂科技有限公司 | The pixel compensation circuit and display device of single crystal silicon pipe CMOS driving displays |
| CN106991969A (en) * | 2017-06-09 | 2017-07-28 | 京东方科技集团股份有限公司 | Display panel, the compensation circuit of pixel and compensation method |
| CN108648702A (en) * | 2018-03-26 | 2018-10-12 | 上海天马微电子有限公司 | Pixel-driving circuit and its driving method, display panel and display device |
| CN110738974A (en) * | 2019-10-28 | 2020-01-31 | 京东方科技集团股份有限公司 | Liquid crystal pixel circuit, driving method thereof, display panel and display device |
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Application publication date: 20220315 |