CN106940981A - The pixel compensation circuit and display device of single crystal silicon pipe CMOS driving displays - Google Patents
The pixel compensation circuit and display device of single crystal silicon pipe CMOS driving displays Download PDFInfo
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- CN106940981A CN106940981A CN201710309780.1A CN201710309780A CN106940981A CN 106940981 A CN106940981 A CN 106940981A CN 201710309780 A CN201710309780 A CN 201710309780A CN 106940981 A CN106940981 A CN 106940981A
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Classifications
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
- G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3266—Details of drivers for scan electrodes
Abstract
The pixel compensation circuit and display device of single crystal silicon pipe CMOS driving displays, including driving transistor, its source electrode are electrically connected with operating voltage positive pole；First input end；Second input terminal, for inputting the secondary signal for N haplotype data signal codes, is electrically connected with the row parasitic capacitance of pixel；Electric capacity；First switch unit, is connected across between the grid of driving transistor and the drain electrode of driving transistor, is turned off or on by the control of the first scanning signal；Second switch unit, is connected across between the drain electrode of driving transistor and second input terminal, is turned off or on by the control of the first scanning signal；3rd switch element, is connected across between the drain electrode of driving transistor and the anode of luminescent device, is turned off or on by switching signal control；When the first scanning signal controls first and second switch element to close and switching signal controls the 3rd switch element to open, the first signal jumps to high level by low level.The threshold voltage of its compensation for drive transistor, improves display quality.
Description
Technical field
The present invention, which is set, is related to pixel compensation technology, and in particular to the pixel compensation electricity of single crystal silicon pipe CMOS driving displays
Road and display device.
Background technology
OLED, which can light, to be driven by the driving transistor DM electric currents produced, because input identical gray scale voltage
When, different threshold voltage vt h can produce different driving currents, cause the inconsistency of driving current, while mobility u
Can be uneven, cause the inconsistency of electric current.
During glass panel TFT driving displays, TFT processing procedure upper threshold voltages Vth uniformity is excessively poor, while threshold voltage
Vth also has drift, and mobility u is also uneven, operating voltage Vdd IR-drop（Pressure drop caused by electric current X resistance）Also deposit always
So traditional 2T1C circuit brightness uniformities are very poor always.
During monocrystalline silicon wafer mos driving displays, can also there are some slight threshold voltage vt h, mobility u inequality,
Also there is the unmatched problem of electric current, Vdd IR-drop also exists always.Thus, traditional 2T1C circuit homogeneity is bad,
PPI is very low always simultaneously.
Glass panel is limited by cost and processing procedure, is driven using the TFT of single type, such as LTPS uses PTFT, the IGZO to be
NTFT.Monocrystalline silicon wafer technique originally CMOS technology, so generally using CMOS drivings.
For this reason, it may be desirable to seek a kind of technical scheme, at least to mitigate above mentioned problem.
The content of the invention
The technical problem to be solved in the present invention is to provide a kind of monocrystalline silicon wafer for the threshold voltage that can eliminate driving transistor
The pixel compensation circuit and display device of body pipe CMOS driving displays.
In order to solve the above technical problems, the present invention uses following technical proposals.
A kind of pixel compensation circuit of single crystal silicon pipe CMOS drivings display, including：
Driving transistor, its source electrode is electrically connected with operating voltage positive pole；
First input end, it is used to input the first signal；
Second input terminal, it is used to input the secondary signal for N haplotype data signal codes, its row parasitic capacitance electricity with pixel
Gas is connected；
Electric capacity, it is connected across between the grid of the driving transistor and the first input end；
First switch unit, it is connected across between the grid of the driving transistor and the drain electrode of the driving transistor, and it is by first
Scanning signal control is turned off or on；
Second switch unit, it is connected across between the drain electrode of the driving transistor and second input terminal, and it is by the first scanning
Signal control is turned off or on；
3rd switch element, it is connected across between the drain electrode of the driving transistor and the anode of luminescent device, and it is by switching signal
Control is turned off or on；
Wherein, the negative electrode of the luminescent device is electrically connected with common ground；
When first scanning signal control first and second switch element close and the switching signal control the 3rd switch element open
Qi Shi, first signal jumps to high level by low level.
Also include：
3rd input terminal, it is used to input the 3rd signal；
4th switch element, it is connected across between the drain electrode of the driving transistor and the 3rd input terminal, and it is by the second scanning
Signal control is turned off or on.
4th switch element includes the 4th transistor, the first end of the 4th transistor and the 3rd input terminal
Electrical connection, the second end of the 4th transistor is electrically connected with the drain electrode of the driving transistor, second scanning signal
Inputted from the 3rd end of the 4th transistor.
When the second scanning signal controls the 4th switch element to open, low level 3rd signal writes the luminescent device
Anode, remove the voltage of the anode of the luminescent device.
The first switch unit includes the first transistor, the first end of the first transistor and the driving transistor
Grid is electrically connected, and the second end of the first transistor is electrically connected with the drain electrode of the driving transistor, first scanning
Signal is inputted from the 3rd end of the first transistor.
The second switch unit includes transistor seconds, the first end of the transistor seconds and second input terminal
Electrical connection, the second end of the transistor seconds is electrically connected with the drain electrode of the driving transistor, first scanning signal
Inputted from the 3rd end of the transistor seconds.
3rd switch element includes third transistor, the first end of the third transistor and the driving transistor
Drain electrode electrical connection, the second end of the third transistor is connected with the anode electrical of the luminescent device, the switching signal from
The 3rd end input of the third transistor.
When the first scanning signal control first and second switch element open, switching signal control the 3rd switch element close with
And first signal when being low level, the secondary signal writes the grid of the driving transistor, and the secondary signal overcomes pixel
The parasitic capacitance of alignment.
A kind of display device, includes the pixel compensation circuit of above-mentioned single crystal silicon pipe CMOS driving displays.
The present invention has following Advantageous Effects.
The present invention is driven using electric current, and when writing secondary signal, driving transistor is connected into diode, utilizes the second letter
Number control driving transistor, then pass through the first signal and write threshold voltage to the grid of driving transistor, compensation for drive transistor
Threshold voltage so that threshold voltage is free of in driving current, to reach the uniform purpose of display, improves display quality.
Brief description of the drawings
The circuit diagram for the pixel compensation circuit that Fig. 1 shows for a kind of single crystal silicon pipe CMOS drivings of the present invention.
Fig. 2 is the timing diagram of each signal in pixel compensation circuit shown in Fig. 1.
Fig. 3 is the equivalent circuit diagram of T2 periods of the Fig. 1 in timing diagram shown in Fig. 2.
Fig. 4 is the equivalent circuit diagram of T3 periods of the Fig. 1 in timing diagram shown in Fig. 2.
The circuit diagram for the pixel compensation circuit that Fig. 5 shows for another single crystal silicon pipe CMOS drivings of the present invention.
Fig. 6 is the timing diagram of each signal in pixel compensation circuit shown in Fig. 5.
Fig. 7 is the equivalent circuit diagram of T1 periods of the Fig. 5 in timing diagram shown in Fig. 6.
Fig. 8 is the equivalent circuit diagram of T2 periods of the Fig. 5 in timing diagram shown in Fig. 6.
Fig. 9 is the equivalent circuit diagram of T3 periods of the Fig. 5 in timing diagram shown in Fig. 6.
The circuit diagram for the pixel compensation circuit that Figure 10 shows for another single crystal silicon pipe CMOS drivings of the present invention.
Figure 11 is the timing diagram of each signal in pixel compensation circuit shown in Figure 10.
The circuit diagram for the pixel compensation circuit that Figure 12 shows for the 4th kind of single crystal silicon pipe CMOS drivings of the present invention.
Figure 13 is the timing diagram of each signal in pixel compensation circuit shown in Figure 12.
The circuit diagram for the pixel compensation circuit that Figure 14 shows for the 5th kind of single crystal silicon pipe CMOS drivings of the present invention.
Figure 15 is the timing diagram of each signal in pixel compensation circuit shown in Figure 14.
Embodiment
For the technical characteristic and effect of the present invention can be described in detail, and it can be realized according to the content of this specification, below
Embodiments of the present invention are further illustrated.
The pixel that Fig. 1 illustrates a kind of single crystal silicon pipe CMOS driving displays in numerous embodiments of the invention is mended
Repay the embodiment of circuit.The pixel compensation circuit of single crystal silicon pipe CMOS driving displays includes driving transistor DM, first
Input terminal A, the second input terminal B, electric capacity C1, first switch unit 1, second switch unit 2, the 3rd switch element 3.
Driving transistor DM source S is electrically connected with operating voltage positive pole, and Vdd represents operating voltage.
First input end A is used to input the first signal Va.
Second input terminal B is used to input the secondary signal for N haplotype data signal codes Idt, and its row with pixel is parasitic
Electric capacity C2 is electrically connected.
Electric capacity C is connected across between driving transistor DM grid G and first input end A.
First switch unit 1 is connected across between driving transistor DM grid and driving transistor DM drain electrode, and it is by
Scan signal Scan controls are turned off or on.
Second switch unit 2 is connected across between driving transistor Scan drain D and the second input terminal B, and it is by first
Scanning signal Scan controls are turned off or on.
3rd switch element 3 is connected across between driving transistor DM drain electrode and luminescent device L anode, and it is believed by switch
Number Em control is turned off or on.
Luminescent device L negative electrode is electrically connected with common ground Vss.
When the first scanning signal Scan controls first and second switch element 1,2 to close and the switch of switching signal Em controls the 3rd
When unit is opened, the first signal jumps to high level by low level.
The embodiment presented hereinafter with reference to Fig. 2-4 couples of Fig. 1 is illustrated.
Fig. 2 is the timing diagram of each signal in pixel compensation circuit shown in Fig. 1.Fig. 3 is Fig. 1 in timing diagram shown in Fig. 2
The equivalent circuit diagram of T2 periods.Fig. 4 is the equivalent circuit diagram of T3 periods of the Fig. 1 in timing diagram shown in Fig. 2.
Referring to Fig. 2,3, in the T2 periods, the period, luminescent device L did not lighted.First scanning signal Scan is high level,
First and second switch element 1,2 is opened, and driving transistor DM connects for diode.Switching signal Em is low level, and the 3rd switch is single
Member 3 is closed.Now, the electric current of secondary signal is N*Idt, and according to saturation region current formula, reference current N*Idt meets following formula
（1）：
N*Idt=K(Vg-Vdd-Vth)^2 （1）
Wherein, formula（1）In, Vg represents the voltage of driving transistor DM grids, and Vth represents driving transistor DM threshold value electricity
Pressure, K is the constant in saturation region current formula.
By formula（1）Obtain formula（2）：
Vg=-(N*Idt/K)^1/2+Vdd+Vth （2）
First signal Va is low level VL, now, posting for alignment is overcome using N haplotype data signal codes Idt is secondary signal
Raw electric capacity C2, to hold C1 quick charges to pixel internal storage storing up electricity.
It can be seen that, when the first scanning signal Scan controls first and second switch element 1,2 to open, switching signal Em controls the 3rd
When switch element 3 is closed and the first signal is low level, secondary signal write driver transistor DM grid, the secondary signal
The quick electric capacity C1 in pixel charges, and overcomes the parasitic capacitance C2 of pixel alignment, N times of amplification charging stream.
Referring to Fig. 2,4, in the T3 periods, the period is that luminescent device L lights the holding stage.First scanning signal Scan is
Low level, first and second switch element 1,2 is closed, and driving transistor DM connects for diode.Switching signal Em is high level, the
Three switch elements 3 are opened.Now, the first signal Va jumps to high level VH, δ V=VH-VL from low level VL, because driving crystal
Pipe DM grid G suspension joint, the coupling amount that driving transistor DM grid G receives first input end A is also δ V=VH-VL, then root
According to formula（2）, driving transistor DM grid G voltage is Vg=- (N*Idt/K) ^1/2+Vdd+Vth+VH-VL, then promote driving
Transistor DM gate source voltage Vgs=Vg-Vs=- (N*Idt/K) ^1/2+Vth+VH-VL.
In the T3 periods, if driving transistor DM is operated in saturation region, the electric current for flowing through luminescent device L is I1, according to full
With area's current formula, I1 meets following formula（3）, according to formula（3）, flow through luminescent device L electric current I1 and driving transistor DM
Threshold voltage vt h is unrelated, eliminates threshold voltage vt h influence, the driving current of luminescent device is reached consistent and migration
Rate u is uniform, it is to avoid drifts of the threshold voltage vt h in luminescence process is impacted to luminescent device, uniform, bright to reach display
The consistent purpose of degree.
I1=K(Vgs-Vth)^2= K(-(N*Idt/K)^1/2+VH-VL)^2 （3）
In the T3 periods, if driving transistor DM is operated in subthreshold region, the electric current for flowing through optical device L is I2, according to sub-threshold region
Current formula, I2 meets following formula（4）, according to formula（4）, flow through luminescent device L electric current I2 and driving transistor DM threshold value
Voltage Vth is unrelated, eliminates threshold voltage vt h influence, the driving current of luminescent device is reached that consistent and mobility u is equal
It is even, it is to avoid drifts of the threshold voltage vt h in luminescence process is impacted to luminescent device, show uniform, brightness one to reach
The purpose of cause.
I2=I0*(W/L)*e(q*(Vgs-Vth)/kT) = I0*(W/L)*e(q*(-(N*Idt/K)^1/2+VH-VL)/kT)（4）
Wherein, small k is Boltzmann constant.
In certain embodiments, first switch unit 1 include the first transistor M2, the first transistor M1 first end with
Driving transistor DM grid electrical connection, the first transistor M1 the second end electrically connects with driving transistor DM drain electrode
Connect, the first scanning signal Scan is inputted from the 3rd end of the first transistor, i.e. the first scanning signal Scan control first crystals
Pipe M1 first and second end connection disconnects.
In certain embodiments, second switch unit 2 include transistor seconds M2, transistor seconds M2 first end with
Second input terminal B is electrically connected, and transistor seconds M2 the second end is electrically connected with driving transistor DM drain electrode, and first
Scanning signal Scan is inputted from transistor seconds M2 the 3rd end, i.e. the first scanning signal Scan control transistor secondses M2's
First and second end connects or disconnected.
In certain embodiments, the 3rd switch element 3 include third transistor M3, third transistor M3 first end with
Driving transistor DM drain electrode electrical connection, third transistor M3 the second end is connected with luminescent device L anode electrical, opened
OFF signal Em is inputted from third transistor M3 the 3rd end, i.e. switching signal Em control third transistor M3 first and second end
Connection disconnects.
The circuit diagram for the pixel compensation circuit that Fig. 5 shows for another single crystal silicon pipe CMOS drivings of the present invention.Fig. 5
The embodiment presented is in that current embodiment difference is with Fig. 1, and the embodiment that Fig. 5 is presented also includes the 3rd input
Sub- C and the 4th switch element 4.3rd input terminal C is used to input the 3rd signal, and Vini represents the voltage of the 3rd signal.4th
Switch element 4 is connected across between driving transistor DM drain electrode and the 3rd input terminal C, and it is controlled by the second scanning signal Scan-1
System is turned off or on.In addition, other are in that current embodiment is identical with Fig. 1.
Referring to Fig. 6,7, in the T1 periods, the period removes luminescent device L anode voltages, removes luminescent device L anodes electricity
Lotus.Second scanning signal Scan-1 is high level, and the 4th switch element 4 is opened, and the 3rd signal is low level, the write-in of the 3rd signal
Luminescent device L anodes, with the voltage for the anode for removing luminescent device L, lift display effect.Preferably, switching signal Em is
Low level, the 3rd switch element 3 is closed.
Fig. 1 is in that current embodiment does not include the 4th switch element 4, and it is to sacrifice some display effects, to reduce mos pipes
Number.
The course of work and Fig. 1 of the embodiment that Fig. 5 is presented in T2, T3 period are in current embodiment in T2, T3 time
The course of work of section is identical, specifically incorporated by reference to Fig. 6,8,9 and be in that current embodiment works in T2, T3 period with reference to above-mentioned Fig. 1
The description of process.
The circuit diagram for the pixel compensation circuit that Figure 10 shows for another single crystal silicon pipe CMOS drivings of the present invention.Figure
11 be the timing diagram of each signal in pixel compensation circuit shown in Figure 10.Figure 12 is the 4th kind of single crystal silicon pipe CMOS of the invention
Drive the circuit diagram of the pixel compensation circuit of display.Figure 13 is the timing diagram of each signal in pixel compensation circuit shown in Figure 12.Figure
The circuit diagram of the 14 pixel compensation circuits shown for the 5th kind of single crystal silicon pipe CMOS drivings of the present invention.Figure 15 is Figure 14 institutes
Show the timing diagram of each signal in pixel compensation circuit.Specific work process is drawn with reference to above-mentioned.
The embodiment that Figure 10, Figure 12, Figure 14 are presented can cancel the 4th transistor M4.
In certain embodiments, the 4th switch element 4 includes the 4th transistor M4, the 4th transistor M4 first end and the
Three input terminal C are electrically connected, and the 4th transistor M4 the second end is electrically connected with driving transistor DM drain electrode, the second scanning
Signal Scan-1 is inputted from the 4th transistor M4 the 3rd end, i.e. the second scanning signal Scan-1 controls the 4th transistor M4's
First and second end connects or disconnected.
It can be seen that, the present invention is driven using electric current, when the first signal writes C1 to driving transistor DM grid, because existing
Larger row parasitic capacitance C2 so that charging setup time is elongated；To overcome this shortcoming, this patent first uses N haplotype data electric currents
Idt is secondary signal write driver transistor DM grid, obtains a less voltage, then makes in first input end A
Increase driving transistor DM grid voltage with the saltus step of the first signal so that driving transistor DM is during luminous or defeated
Go out a suitable electric current.
The present invention also describes a kind of display device, includes the pixel compensation electricity of above-mentioned single crystal silicon pipe CMOS driving displays
Road.
It should be noted that each particular technique feature described in above-mentioned embodiment, in reconcilable feelings
Under condition, it can be combined by any suitable mode.In order to avoid unnecessary repetition, the present invention is to various possible groups
Conjunction mode is not described further.
Above with reference to embodiment to the present invention have been described in detail, it is illustrative and not restrictive, is not taking off
From changing and modifications under present general inventive concept, within protection scope of the present invention.
Claims (9)
1. a kind of pixel compensation circuit of single crystal silicon pipe CMOS drivings display, it is characterised in that including：
Driving transistor, its source electrode is electrically connected with operating voltage positive pole；
First input end, it is used to input the first signal；
Second input terminal, it is used to input the secondary signal for N haplotype data signal codes, its row parasitic capacitance electricity with pixel
Gas is connected；
Electric capacity, it is connected across between the grid of the driving transistor and the first input end；
First switch unit, it is connected across between the grid of the driving transistor and the drain electrode of the driving transistor, and it is by first
Scanning signal control is turned off or on；
Second switch unit, it is connected across between the drain electrode of the driving transistor and second input terminal, and it is by the first scanning
Signal control is turned off or on；
3rd switch element, it is connected across between the drain electrode of the driving transistor and the anode of luminescent device, and it is by switching signal
Control is turned off or on；
Wherein, the negative electrode of the luminescent device is electrically connected with common ground；
When first scanning signal control first and second switch element close and the switching signal control the 3rd switch element open
Qi Shi, first signal jumps to high level by low level.
2. the pixel compensation circuit of single crystal silicon pipe CMOS drivings display according to claim 1, it is characterised in that also
Including：
3rd input terminal, it is used to input the 3rd signal；
4th switch element, it is connected across between the drain electrode of the driving transistor and the 3rd input terminal, and it is by the second scanning
Signal control is turned off or on.
3. the pixel compensation circuit of single crystal silicon pipe CMOS drivings display according to claim 2, it is characterised in that institute
Stating the 4th switch element includes the 4th transistor, and the first end of the 4th transistor is electrically connected with the 3rd input terminal,
Second end of the 4th transistor is electrically connected with the drain electrode of the driving transistor, and second scanning signal is brilliant from the 4th
The 3rd end input of body pipe.
4. the pixel compensation circuit of single crystal silicon pipe CMOS drivings display according to claim 2, it is characterised in that when
When second scanning signal controls the unlatching of the 4th switch element, low level 3rd signal writes the anode of the luminescent device.
5. the pixel compensation circuit of single crystal silicon pipe CMOS drivings display according to claim 1, it is characterised in that institute
Stating first switch unit includes the first transistor, and the grid of the first end of the first transistor and the driving transistor electrically connects
Connect, the second end of the first transistor and the drain electrode of the driving transistor are electrically connected, first scanning signal from this
The 3rd end input of one transistor.
6. the pixel compensation circuit of single crystal silicon pipe CMOS drivings display according to claim 1, it is characterised in that institute
Stating second switch unit includes transistor seconds, and the first end of the transistor seconds is electrically connected with second input terminal,
Second end of the transistor seconds and the drain electrode of the driving transistor are electrically connected, and first scanning signal is second brilliant from this
The 3rd end input of body pipe.
7. the pixel compensation circuit of single crystal silicon pipe CMOS drivings display according to claim 1, it is characterised in that institute
Stating the 3rd switch element includes third transistor, and the drain electrode of the first end of the third transistor and the driving transistor electrically connects
Connect, the second end of the third transistor is connected with the anode electrical of the luminescent device, the switching signal is from the 3rd crystal
The 3rd end input of pipe.
8. the pixel compensation circuit of the single crystal silicon pipe CMOS driving displays according to any one of claim 1 to 7, it is special
Levy and be, when the first scanning signal control first and second switch element open, switching signal control the 3rd switch element close and
When first signal is low level, the secondary signal writes the grid of the driving transistor, and the secondary signal overcomes pixel column
The parasitic capacitance of line.
9. a kind of display device, it is characterised in that driven including the single crystal silicon pipe CMOS described in any one of claim 1 to 8
The pixel compensation circuit of dynamic display.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
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