CN108630670B - Packaging module and stacked packaging structure - Google Patents

Packaging module and stacked packaging structure Download PDF

Info

Publication number
CN108630670B
CN108630670B CN201810275746.1A CN201810275746A CN108630670B CN 108630670 B CN108630670 B CN 108630670B CN 201810275746 A CN201810275746 A CN 201810275746A CN 108630670 B CN108630670 B CN 108630670B
Authority
CN
China
Prior art keywords
module
packaging
package
substrate
switching unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201810275746.1A
Other languages
Chinese (zh)
Other versions
CN108630670A (en
Inventor
杨望来
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Vivo Mobile Communication Co Ltd
Original Assignee
Vivo Mobile Communication Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Vivo Mobile Communication Co Ltd filed Critical Vivo Mobile Communication Co Ltd
Priority to CN201810275746.1A priority Critical patent/CN108630670B/en
Publication of CN108630670A publication Critical patent/CN108630670A/en
Priority to PCT/CN2019/080091 priority patent/WO2019184980A1/en
Application granted granted Critical
Publication of CN108630670B publication Critical patent/CN108630670B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0657—Stacked arrangements of devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49833—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the chip support structure consisting of a plurality of insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/10—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers
    • H01L25/105—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L27/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
    • H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
    • H01L2225/1017—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement the lowermost container comprising a device support
    • H01L2225/1023—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement the lowermost container comprising a device support the support being an insulating substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
    • H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
    • H01L2225/1041—Special adaptations for top connections of the lowermost container, e.g. redistribution layer, integral interposer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
    • H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
    • H01L2225/1047—Details of electrical connections between containers
    • H01L2225/1058—Bump or bump-like electrical connections, e.g. balls, pillars, posts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
    • H01L2924/1533—Connection portion the connection portion being formed on the die mounting surface of the substrate the connection portion being formed both on the die mounting surface of the substrate and outside the die mounting surface of the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate

Abstract

The invention discloses a packaging module and a stacking packaging structure, which comprise a substrate, a switching unit, an electronic component and a packaging colloid, wherein the bottom surface of the switching unit is arranged on the substrate, the electronic component is arranged on the substrate, the packaging colloid covers the substrate, the switching unit except the top surface is wrapped by the packaging colloid, and the electronic component is completely wrapped by the packaging colloid. By using the switching unit as an electrical connection channel between the stacked package structures, the step of electrically connecting the stacked packages by a complicated process can be omitted, and the package modules are stacked, so that various stacked package structures (such as forward stacking or backward stacking) can be provided, and a more flexible stacked use mode can be provided for users.

Description

Packaging module and stacked packaging structure
Technical Field
The invention relates to the field of stack packaging, in particular to a packaging module and a stack packaging structure.
Background
With the development of technology, more and more functions are integrated into a mobile terminal. However, since the portable terminal is required to be portable, the area of the main board of the portable terminal is very limited, and a Package on Package (PoP) is more and more popular in order to put more chips on the limited area of the main board. The general packaging structure has the advantages of complex production process, higher production cost and small flexibility of arrangement and design, and is only suitable for forward stacking among specific packages. The conventional package structure has a small applicable range, and most of the conventional package structures are only used for a stacked package structure between a central processing unit and a dynamic random access memory of a mobile terminal. Therefore, the applicable range of the conventional package structure is quite limited and is only suitable for a specific stacking manner.
Disclosure of Invention
Embodiments of the present invention provide a package module and a stack package structure, so as to solve the problems of complex manufacturing process and high manufacturing cost of the stack package technology, and the known stack package is only suitable for a specific product, and the range of products that can be applied to stack package is small.
In order to solve the technical problem, the invention is realized as follows:
the utility model provides a packaging module, it includes base plate, switching unit, electronic component and encapsulation colloid, the bottom surface of switching unit set up in on the base plate, electronic component set up in on the base plate, the encapsulation colloid covers on the base plate, switching unit except the top surface all by the encapsulation colloid wraps up, and electronic component by the encapsulation colloid wraps up completely.
Provided is a package on package structure, including: the substrate of one of the package modules has a first surface and a second surface which are opposite to each other, the first surface is provided with a substrate connection point, the switching unit has a body, a first connection point and a second connection point, the body has a first body surface and a second body surface which are opposite to each other, the first connection point is arranged on the first body surface, the second connection point is arranged on the second body surface, the first connection point is electrically connected to the second connection point through the inside of the body, the second surface is provided with a board bottom connection point, the board bottom connection point is electrically connected to the substrate connection point through the inside of the substrate, and the package module is represented by the first package module; the substrate of the other package module has a first surface and a second surface which are opposite to each other, a substrate connection point is arranged on the first surface, the switching unit has a body, a first connection point and a second connection point, the body has a first body surface and a second body surface which are opposite to each other, the first connection point is arranged on the first body surface, the second connection point is arranged on the second body surface, the first connection point is electrically connected to the second connection point through the inside of the body, and the other package module is represented by the second package module; the second surface of the first package module faces the package adhesive of the second package module, and the board bottom connection point of the first package module is connected to the second connection point of the second package module.
Another package on package structure is provided, which includes: the substrates of the plurality of packaging modules are provided with a first surface and a second surface which are opposite, substrate connection points are arranged on the first surface, the switching unit is provided with a body, a first connection point and a second connection point, the body is provided with a first body surface and a second body surface which are opposite, the first connection point is arranged on the first body surface, the second connection point is arranged on the second body surface, and the first connection point is electrically connected to the second connection point through the inside of the body; the packaging colloid of at least two adjacent packaging modules is arranged oppositely, and the second connection points of the two packaging modules are connected with each other.
In the embodiment of the invention, the electrical connection structure which originally needs to be subjected to the complicated process for stack packaging is designed into the electrical component of a single switching unit, and the switching unit is directly used as the electrical connection channel between the stack packaging structures, so that the step of electrically connecting the stack packaging by the complicated process can be omitted, the production process of the switching unit is simple, and the switching unit can be matched with various stack packaging structures (such as LGA or BGA) for use.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the invention and not to limit the invention. In the drawings:
fig. 1 is a schematic view of a package module of a first embodiment of the present invention.
Fig. 2 is a schematic diagram of a package module of a second embodiment of the present invention.
Fig. 3 is a schematic diagram of a package on package structure according to a third embodiment of the invention.
Fig. 4 is a diagram of a package on package structure according to a fourth embodiment of the invention.
Fig. 5 is a diagram of a package on package structure according to a fifth embodiment of the invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Please refer to fig. 1, which is a schematic diagram of a package module according to a first embodiment of the invention; as shown in the drawings, the present embodiment provides a package module 1, in which the electrical connection structure is designed as an electrical component, and the electrical component is used as an electrical connection channel between the stacked package structures, so as to facilitate the convenience of subsequently stacking and packaging a plurality of package modules 1. The package module 1 of the present embodiment includes a substrate 11, a transferring unit 13, an electronic component 15 and a molding compound 17.
It holds above, the bottom surface of switching unit 13 sets up on base plate 11, and electronic component 15 is located switching unit 13 one side, and on encapsulation colloid 17 covered base plate 11, switching unit 13 all was wrapped up by encapsulation colloid 17 except the top surface to electronic component 15 is wrapped up completely by encapsulation colloid 17.
In this embodiment, further describing the structure, the substrate 11 has a first surface 111 and a second surface 113 facing away from each other, the first surface 111 is provided with a substrate connection point 115, the adaptor unit 13 has a body 131, a first connection point 133 and a second connection point 135, the body 131 has a first body surface 1311 (i.e. the bottom surface of the adaptor unit 13) and a second body surface 1313 (i.e. the top surface of the adaptor unit 13) facing away from each other, the first connection point 133 is disposed on the first body surface 1311, the second connection point 135 is disposed on the second body surface 1313, the first connection point 133 is electrically connected to the second connection point 135 through the inside of the body 131, the encapsulant 17 covers the first surface 111, the adaptor unit 13 is disposed on the first surface 111, the first body surface 1311 faces the first surface 111, and the first connection point 133 is connected to the substrate connection point 115, the adaptor unit 13 is wrapped by the encapsulant 17 except for the second body surface 1313, and the electronic component 15 is disposed on the first surface 111 and completely encapsulated by the encapsulant 17.
Furthermore, the package module 1 further includes a board bottom connection point 117 (see fig. 3). The board bottom connection point 117 is disposed on the second surface 113, and the board bottom connection point 117 is electrically connected to the substrate connection point 115 through the inside of the substrate 11. In addition, the package structure of the second surface 113 in the present embodiment may also be a Land Grid Array (LGA) package or a Ball Grid Array (BGA) package, which may be configured with different package structure designs according to the user's requirements.
In the present embodiment, the first connection point 133 and the second connection point 135 of the adapting unit 13 are pads respectively located on opposite surfaces of the body 131. The electrically connected bracket is disposed inside the body 131, which serves as an electrical path to electrically connect between the first connection point 133 and the second connection point 135. The first connection point 133 and the second connection point 135 are disposed asymmetrically or symmetrically with respect to the body 131, that is, the electrical connection path between the first connection point 133 and the second connection point 135 may be a linear electrical path or a non-linear electrical path, but the structural form of the electrical connection path is not limited, and the electrical connection path may be electrically connected between the first connection point 133 and the second connection point 135. The first connection points 133 are disposed correspondingly according to the positions of the substrate connection points 115 of the substrate 11, and the second connection points 135 are disposed according to the electrical connection positions of the stacked package structure that need to be stacked. Thus, the adaptor unit 13 can change the position of the electrical connection point (i.e. I/O position) again according to the user's requirement, and the body 131 can be designed into different shapes. In addition, stacking a plurality of the relay units 13 can be used as a method for changing the positions of the electrical connection points, and the flexibility of stacking and packaging by using the relay units 13 is high.
Moreover, when the number of the first connection points 133 is plural and the number of the second connection points 135 is plural, the plurality of first connection points 133 and the plurality of second connection points 135 are disposed asymmetrically or/and symmetrically with respect to the body 131. That is, the positions of the first connection point 133 and the second connection point 135 of the same adapter unit 13 can be flexibly designed according to the user's requirement. The electronic component 15 of the present embodiment may be a passive device or a chip, and the electronic component 15 is disposed on the substrate 11 according to the requirement of the user, and the type of the electronic component 15 is not limited. The height of the adapting unit 13 is higher than that of the electronic component 15, which is advantageous to completely wrap the electronic component 15 with the encapsulant 17, and the encapsulant 17 wraps the peripheral surface of the adapting unit 13 and leaves only the top surface (i.e., the surface having the second connection points 135) exposed.
Please refer to fig. 2, which is a diagram illustrating a package module according to a second embodiment of the present invention; as shown in the figure, the difference between the present embodiment and the first embodiment is the electronic component 15, and the electronic component 15 of the present embodiment includes a passive device and a chip structure of wire bonding. The present embodiment illustrates that the electronic component 15 is disposed on the substrate 11 according to the requirement of the user, and the type of the electronic component 15 is not limited.
Please refer to fig. 3, which is a diagram illustrating a package on package structure according to a third embodiment of the present invention; as shown in the drawings, the present embodiment is a package structure in which the package modules of the first embodiment are stacked in the forward direction. The two stacked package modules 1 will be described as a first package module 1A and a second package module 1B, respectively. In this embodiment, the second surface 113 of the first package module 1A faces the encapsulant 17 of the second package module 1B, and the board bottom connection point 117 of the first package module 1A is connected to the second connection point 135 of the second package module 1B. The first package module 1A and the second package module 1B may be the same package module.
Please refer to fig. 4, which is a diagram illustrating a stacked package structure according to a fourth embodiment of the present invention; as shown in the drawing, the difference between the present embodiment and the third embodiment is in the stacked package modules. In the present embodiment, different types of package modules (such as LGA or BGA) are stacked on the package module 1, and the substrates of the different types of package modules are connected to the second connection points 135 of the adaptor unit 13.
Please refer to fig. 5, which is a diagram illustrating a stacked package structure according to a fifth embodiment of the present invention; as shown in the drawings, the present embodiment is a package structure in which the package modules of the first embodiment are stacked in a back-to-back manner, and two stacked package modules 1 are respectively described as a first package module 1A and a second package module 1B. In this embodiment, the encapsulant 17 of the first package module 1A and the encapsulant 17 of the second package module 1B are disposed opposite to each other, and the second connection point 135 of the first package module 1A and the second connection point 135 of the second package module 1B are connected to each other. The first package module 1A and the second package module 1B may be the same package module.
In summary, the present invention provides a package module and a stacked package structure, in which an electrical connection structure that requires a complicated process for stacked package is designed as an electrical component of a single adapting unit, and the adapting unit is directly used as an electrical connection channel between the stacked package structures, so that the step of electrically connecting the stacked package by the complicated process can be omitted, the adapting unit has a simple production process, and can be used in combination with various types of stacked package structures (such as LGA or BGA), and various package stacking methods (such as forward stacking or backward stacking) are provided, thereby providing a more flexible stacking use method for users.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
While the present invention has been described with reference to the embodiments shown in the drawings, the present invention is not limited to the embodiments, which are illustrative and not restrictive, and it will be apparent to those skilled in the art that various changes and modifications can be made therein without departing from the spirit and scope of the invention as defined in the appended claims.

Claims (4)

1. A package on package structure, comprising:
the packaging structure comprises a first packaging module and a second packaging module, wherein the first packaging module and the second packaging module respectively comprise packaging modules;
the package module includes:
the electronic module comprises a substrate, a switching unit, an electronic assembly and a packaging colloid, wherein the bottom surface of the switching unit is arranged on the substrate, the electronic assembly is arranged on the substrate, the switching unit is arranged on the side of the electronic assembly along the direction parallel to the substrate, the height of the switching unit is higher than that of the electronic assembly, the packaging colloid covers the substrate, the switching unit except the top surface is wrapped by the packaging colloid, and the electronic assembly is completely wrapped by the packaging colloid; the packaging colloid is exposed in the surface far away from the substrate except the area where the top surface of the switching unit is located, wherein the area, which is in the surface far away from the substrate and above the electronic assembly, of the packaging colloid is exposed; the top surface of the switching unit is exposed, the switching unit is provided with a second connecting point, the second connecting point is arranged on the exposed top surface of the switching unit, the switching unit is further provided with a body and a first connecting point, the body is provided with a first body surface and a second body surface which are deviated from each other, the first body surface and the second body surface are respectively arranged at two ends of the body, which are deviated from each other, the first connecting point is arranged on the first body surface, the second connecting point is arranged on the second body surface, and the first connecting point is electrically connected to the second connecting point through the inside of the body; the substrate is provided with a first surface and a second surface which are opposite, and the first surface is provided with a substrate connection point;
the packaging colloid of the first packaging module is arranged opposite to the packaging colloid of the second packaging module, and the second connecting point of the first packaging module is mutually connected with the second connecting point of the second packaging module; or, first encapsulation module still includes board end tie point, first encapsulation module board end tie point sets up first encapsulation module on the second surface, first encapsulation module board end tie point warp first encapsulation module the inside electric connection of base plate in first encapsulation module the base plate tie point, first encapsulation module the second surface orientation the second encapsulation module encapsulation colloid, first encapsulation module board end tie point connect in the second encapsulation module the second tie point.
2. The package on package structure of claim 1,
the second encapsulation module comprises a board bottom connection point, the board bottom connection point of the second encapsulation module is arranged on the second surface of the second encapsulation module, and the board bottom connection point of the second encapsulation module is electrically connected with the substrate connection point of the second encapsulation module through the substrate inside the second encapsulation module.
3. The package on package structure of claim 1 or 2, wherein the second surface of the second package module is a grid array package structure or a ball grid array package structure.
4. The package on package structure of claim 1 or 2, wherein the first connection point of the second package module and the second connection point of the second package module are pads.
CN201810275746.1A 2018-03-30 2018-03-30 Packaging module and stacked packaging structure Active CN108630670B (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CN201810275746.1A CN108630670B (en) 2018-03-30 2018-03-30 Packaging module and stacked packaging structure
PCT/CN2019/080091 WO2019184980A1 (en) 2018-03-30 2019-03-28 Packaging module and package on package structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201810275746.1A CN108630670B (en) 2018-03-30 2018-03-30 Packaging module and stacked packaging structure

Publications (2)

Publication Number Publication Date
CN108630670A CN108630670A (en) 2018-10-09
CN108630670B true CN108630670B (en) 2021-04-02

Family

ID=63696486

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201810275746.1A Active CN108630670B (en) 2018-03-30 2018-03-30 Packaging module and stacked packaging structure

Country Status (2)

Country Link
CN (1) CN108630670B (en)
WO (1) WO2019184980A1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108630670B (en) * 2018-03-30 2021-04-02 维沃移动通信有限公司 Packaging module and stacked packaging structure

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1241032A (en) * 1998-06-26 2000-01-12 国际商业机器公司 Highly integrated chip-on-chip packaging
CN1499630A (en) * 2002-11-04 2004-05-26 矽品精密工业股份有限公司 Modularized device of stackable semiconductor package and preparing method

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7884488B2 (en) * 2008-05-01 2011-02-08 Qimonda Ag Semiconductor component with improved contact pad and method for forming the same
CN108630670B (en) * 2018-03-30 2021-04-02 维沃移动通信有限公司 Packaging module and stacked packaging structure

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1241032A (en) * 1998-06-26 2000-01-12 国际商业机器公司 Highly integrated chip-on-chip packaging
CN1499630A (en) * 2002-11-04 2004-05-26 矽品精密工业股份有限公司 Modularized device of stackable semiconductor package and preparing method

Also Published As

Publication number Publication date
WO2019184980A1 (en) 2019-10-03
CN108630670A (en) 2018-10-09

Similar Documents

Publication Publication Date Title
US9177886B2 (en) Semiconductor package including chip support and method of fabricating the same
US6927478B2 (en) Reduced size semiconductor package with stacked dies
CN100524738C (en) Multi-chip stacking package structure
KR20180046990A (en) Semiconductor packages of asymmetric chip stacks
US5227995A (en) High density semiconductor memory module using split finger lead frame
US9105503B2 (en) Package-on-package device
US11961821B2 (en) Semiconductor device assemblies including multiple stacks of different semiconductor dies
CN100524736C (en) A stacking type wafer packaging structure
CN108630670B (en) Packaging module and stacked packaging structure
US7763493B2 (en) Integrated circuit package system with top and bottom terminals
CN100559582C (en) Chip stack package structure and manufacture method thereof
CN114843238A (en) Packaging structure, electronic device and packaging method
CN101226929B (en) Semiconductor package structure and manufacturing method thereof
US8723334B2 (en) Semiconductor device including semiconductor package
KR20020085102A (en) Chip Stacked Semiconductor Package
CN101315921B (en) Chip stack packaging structure and method of producing the same
CN104103605A (en) Semiconductor package and fabrication method thereof
US7847396B2 (en) Semiconductor chip stack-type package and method of fabricating the same
CN212182316U (en) Carrier-free semiconductor laminated packaging structure
KR100464561B1 (en) Semiconductor package and manufacturing method the same
KR20060074091A (en) Chip stack package
KR20020091975A (en) Stacked thin small outline package
KR20090074494A (en) Stack package and method of fabricating the same
CN112349705A (en) Electronic packaging device
CN115020387A (en) Chip stacking and packaging structure and chip stacking and packaging method

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant