CN108615429A - A kind of integrated circuit and device for shot and the acoustical simulation that explodes - Google Patents
A kind of integrated circuit and device for shot and the acoustical simulation that explodes Download PDFInfo
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- CN108615429A CN108615429A CN201810667613.9A CN201810667613A CN108615429A CN 108615429 A CN108615429 A CN 108615429A CN 201810667613 A CN201810667613 A CN 201810667613A CN 108615429 A CN108615429 A CN 108615429A
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- 238000004088 simulation Methods 0.000 title claims abstract description 29
- 230000001133 acceleration Effects 0.000 claims abstract description 26
- 230000005236 sound signal Effects 0.000 claims abstract description 17
- 239000002360 explosive Substances 0.000 claims abstract description 14
- 230000010355 oscillation Effects 0.000 claims description 19
- 230000005611 electricity Effects 0.000 claims description 6
- 230000011664 signaling Effects 0.000 claims description 6
- 230000007812 deficiency Effects 0.000 abstract description 5
- 238000010586 diagram Methods 0.000 description 12
- 102100022785 Creatine kinase B-type Human genes 0.000 description 11
- MZAGXDHQGXUDDX-JSRXJHBZSA-N (e,2z)-4-ethyl-2-hydroxyimino-5-nitrohex-3-enamide Chemical compound [O-][N+](=O)C(C)C(/CC)=C/C(=N/O)/C(N)=O MZAGXDHQGXUDDX-JSRXJHBZSA-N 0.000 description 6
- 238000004880 explosion Methods 0.000 description 5
- HCUOEKSZWPGJIM-YBRHCDHNSA-N (e,2e)-2-hydroxyimino-6-methoxy-4-methyl-5-nitrohex-3-enamide Chemical compound COCC([N+]([O-])=O)\C(C)=C\C(=N/O)\C(N)=O HCUOEKSZWPGJIM-YBRHCDHNSA-N 0.000 description 4
- 101100508840 Daucus carota INV3 gene Proteins 0.000 description 4
- 101001109689 Homo sapiens Nuclear receptor subfamily 4 group A member 3 Proteins 0.000 description 4
- 101000598778 Homo sapiens Protein OSCP1 Proteins 0.000 description 4
- 101001067395 Mus musculus Phospholipid scramblase 1 Proteins 0.000 description 4
- 102100022673 Nuclear receptor subfamily 4 group A member 3 Human genes 0.000 description 4
- 102100038779 Arfaptin-2 Human genes 0.000 description 3
- 101150070189 CIN3 gene Proteins 0.000 description 3
- 101150110971 CIN7 gene Proteins 0.000 description 3
- 241000288673 Chiroptera Species 0.000 description 3
- 101100286980 Daucus carota INV2 gene Proteins 0.000 description 3
- 101000809446 Homo sapiens Arfaptin-2 Proteins 0.000 description 3
- 101150110298 INV1 gene Proteins 0.000 description 3
- 101100397044 Xenopus laevis invs-a gene Proteins 0.000 description 3
- 101100397045 Xenopus laevis invs-b gene Proteins 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- GDOPTJXRTPNYNR-UHFFFAOYSA-N methyl-cyclopentane Natural products CC1CCCC1 GDOPTJXRTPNYNR-UHFFFAOYSA-N 0.000 description 3
- 101100372601 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) POR2 gene Proteins 0.000 description 2
- 101100099673 Zea mays TIP2-3 gene Proteins 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 230000001351 cycling effect Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000000686 essence Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 230000006641 stabilisation Effects 0.000 description 1
- 238000011105 stabilization Methods 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09B—EDUCATIONAL OR DEMONSTRATION APPLIANCES; APPLIANCES FOR TEACHING, OR COMMUNICATING WITH, THE BLIND, DEAF OR MUTE; MODELS; PLANETARIA; GLOBES; MAPS; DIAGRAMS
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- G09B9/003—Simulators for teaching or training purposes for military purposes and tactics
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Abstract
The present invention provides a kind of integrated circuits applied to shot and the acoustical simulation that explodes, first choice signal is exported by control module, first enabled control signal, first trigger signal and power-on reset signal are to frequency division module, audio-frequency module, acceleration module, beat module, address carry module is directly or indirectly controlled, the preset sound code stored in memory module is set to be converted into preset sound signal, and it is exported by output module and presets shot and/or default explosive sound, improve the sound timbre of shot and the acoustical simulation that explodes, it is low to solve existing shot explosive sound analog circuit shot sound level, the deficiencies of quality distortion, the problem of cannot be satisfied practical application request.
Description
Technical field
The invention belongs to integrated circuit fields more particularly to it is a kind of for shot and explode acoustical simulation integrated circuit and
Device.
Background technology
Currently, sound effect integrated circuit be it is a kind of can generate it is a certain or certain several simulated sound effect extensive special
Integrated circuit, for example, peashooter can be made to generate shot or explosive sound applied to the sound effect integrated circuit in peashooter, in order to
Can have the feeling of shot and explosive sound to officers and men in military training, it will usually using the additional loud speaker of audio amplifier circuit come
Simulate shot and explosive sound.
However, existing shot with explosion acoustical simulation there are portability it is poor, shot sound level is low, quality distortion the deficiencies of,
The problem of cannot be satisfied practical application request.
Invention content
The purpose of the present invention is to provide a kind of integrated circuits and device applied to shot and the acoustical simulation that explodes, it is intended to
The deficiencies of solving low existing shot explosive sound analog circuit shot sound level, quality distortion, cannot be satisfied asking for practical application request
Topic.
The first aspect of the embodiment of the present invention provides a kind of integrated circuit applied to shot and the acoustical simulation that explodes, institute
Stating integrated circuit includes：
For exporting first choice signal, the first enabled control signal, the first trigger signal and power-on reset signal
Control module；
It is connect with the control module, for being exported according to the described first enabled control signal and the power-on reset signal
The frequency division module of first fractional frequency signal, the second fractional frequency signal, third fractional frequency signal and the first reset signal；
It is connect with the control module, for storing preset sound code, and according to the described first enabled control signal and institute
State the memory module that first choice signal exports the first pre-set velocity code, the first preset audio code and the first default beat code；
It is connected with the frequency division module and the memory module, for according to first reset signal, described the
Three frequency division signal and the first preset audio code export the audio-frequency module of the first audio signal；
It is connect with the frequency division module and the memory module, for according to the first pre-set velocity code and described the
Three frequency division signal exports the acceleration module of First Speed signal；
It connect with the acceleration module, the memory module and the frequency division module, and is believed according to first frequency dividing
Number, the first default beat code, first reset signal and the First Speed signal export the first cadence signal and
The beat module of first beat clock signal；
It is connect with the control module, the frequency division module, the memory module and the beat module, is used for basis
The first default beat code, first fractional frequency signal, the first enabled control signal, the power-on reset signal and
The first beat clock signal export the address of the first address carry signal, the first feedback signal and the second feedback signal into
Position module；
The memory module is additionally operable to receive described address carry signal, and according to described address carry signal to described pre-
If sound code is selected；
The control module is additionally operable to be made to described first according to first feedback signal and second feedback signal
Signal can be controlled and first trigger signal is controlled；
It is connect with the control module, the frequency division module, the audio-frequency module and the beat module, and according to institute
State the first enabled control signal, second fractional frequency signal, the power-on reset signal, first cadence signal and described
The output module of shot and/or default explosive sound is preset in the output of first audio signal.
Optionally, the integrated circuit further includes for providing frequency of oscillation to the frequency division module and the audio-frequency module
Oscillation module；
The first input end of the oscillation module is connect with the enabled control signal output of the control module, described to shake
The oscillator signal output end for swinging module is connect with the first oscillator signal input terminal of the frequency division module and the audio-frequency module.
Optionally, the control module includes：First feedback signal input terminal, the second feedback signal input terminal, second point
Frequency signal input part, first choice signal output end, the first enabled control signal output, the first trigger signal output end and
Power-on reset signal output end；
First feedback signal input terminal and second feedback signal input terminal respectively with described address carry module
The first feedback signal output and the second feedback signal output connection；
The second fractional frequency signal input terminal is used to receive the second fractional frequency signal of the frequency division module output；
The first choice signal output end is used to export first choice signal to the memory module；
The first enabled control signal output respectively with the first enable signal input terminal of the frequency division module, described
First enable signal input terminal of memory module, the first enable signal input terminal of described address carry module and the output
First enable signal input terminal of module connects；
The first trigger signal output end is connect with the first trigger signal input terminal of described address carry module, is used for
The first trigger signal is exported to described address carry module；
The power-on reset signal output end respectively with the power-on reset signal input terminal of the frequency division module, described address
The power-on reset signal input terminal connection of the power-on reset signal input terminal and the output module of carry module.
Optionally, the control module includes：Push-button unit, central control unit and reset unit；
The push-button unit is used for output key trigger signal, and the button triggering end of the push-button unit is controlled with the center
The push button signalling input terminal of unit processed connects；
The reset unit is controlled for exporting the power-on reset signal, the output end of the reset unit with the center
The power-on reset signal input terminal of unit processed connects, the electrification reset of the output end of the reset unit as the control module
Signal output end；
First feedback input end of first feedback input end of the central control unit as the control module, it is described
Second feedback input end of second feedback input end of central control unit as the control module, the central control unit
Second fractional frequency signal input terminal of the second fractional frequency signal input terminal as the control module, the of the central control unit
First choice signal output end of the one selection signal output end as the control module, the first of the central control unit makes
Can first enabled control signal output of the control signal output as the control module, the of the central control unit
First trigger signal output end of the one trigger signal output end as the control module.
Optionally, the frequency division module includes the first enabled control signal input, the first oscillator signal input terminal, powers on
Reset signal input terminal, the first fractional frequency signal output end, the second fractional frequency signal output end and the first reset signal output end；
The first fractional frequency signal output end respectively with the first fractional frequency signal input terminal of the beat module and described
First fractional frequency signal input terminal of address carry module connects；
The second fractional frequency signal output end respectively with the second fractional frequency signal input terminal of the control module and described
Second fractional frequency signal input terminal of output module connects；
The third fractional frequency signal output end is connect with the third fractional frequency signal input terminal of the acceleration module；
First reset signal output end of the frequency division module is inputted with the first reset signal of the audio-frequency module respectively
The connection of first reset signal input terminal of end and the beat module.
Optionally, the memory module includes the first address carry signal input part, first choice signal input part, first
Enabled control signal input, the first pre-set velocity code output end, the first preset audio code output end and the first default beat
Code output end；
First address carry signal output end of the first address carry signal input part and described address carry module
Connection；
The first choice signal input part is connect with the first choice signal output end of the control module, for receiving
The first choice signal；
The first enabled control signal input is connect with the first enabled control signal output of the control module,
The first enabled control signal for receiving the control module；
The first pre-set velocity code output end is connect with the first pre-set velocity code input terminal of the acceleration module, is used for
The first pre-set velocity code is sent to the acceleration module；
The first preset audio code output end is connect with the first preset audio code input terminal of the audio-frequency module, is used for
The first preset audio code is sent to the audio-frequency module；
The first default beat code output end respectively with the first default beat code input terminal of the beat module and
First default beat code input terminal connection of described address carry module, is used for the beat module and described address carry
Module sends the first default beat code.
Optionally, described address carry module include the first enabled control signal input, the first fractional frequency signal input terminal,
First trigger signal input terminal, the first default beat code input terminal, power-on reset signal input terminal, the first beat clock signal are defeated
Enter end, the first address carry signal output end, the first feedback signal output and the second feedback signal output；
The first enabled control signal input is used to receive the first enabled control letter of the output of the control module
Number；
The first fractional frequency signal input terminal is used to receive the first fractional frequency signal of the frequency division module output；
The first trigger signal input terminal is used to receive the first trigger signal of the control module output；
The first default beat code input terminal is used to receive the first default beat code of the memory module output；
The power-on reset signal input terminal is used to receive the power-on reset signal of the control module output；
The first beat clock signal input terminal is connect with the first beat clock signal output terminal of the beat module,
The first beat clock signal for receiving the beat module；
The first address carry signal output end is for exporting the first address carry signal；
First feedback signal output and second feedback signal output respectively with the control module the
One feedback signal input terminal is connected with the second feedback signal input terminal of the control module, for being exported to the control module
First feedback signal and the second feedback signal.
Optionally, the period of second fractional frequency signal is more than the period of first audio signal.
Optionally, the reset unit includes：First switch pipe, the first capacitance, the first reverser, the second reverser and
Third phase inverter；
The current input terminal of the first switch pipe connects power supply, and the control terminal ground connection of the first switch pipe is described
The current output terminal of first switch pipe and the first end of first capacitance connect the input terminal with first phase inverter altogether, described
The output end of first phase inverter is connect with the input terminal of second phase inverter, the output end of second phase inverter and described the
The input terminals of three reversers connects, the output end of the output end of the third phase inverter as the reset unit.
The second aspect of the embodiment of the present invention additionally provides a kind of device applied to shot and the acoustical simulation that explodes, described
Device includes sound-producing device, and described device further includes integrated circuit described in any one of the above embodiments, the output end of the integrated circuit
It is connect with the sound-producing device.
A kind of integrated circuit applied to shot and the acoustical simulation that explodes is proposed in the embodiment of the present invention, by controlling mould
Block exports first choice signal, the first enabled control signal, the first trigger signal and power-on reset signal to frequency division module, sound
Frequency module, acceleration module, beat module, address carry module are directly or indirectly controlled, and make to store in memory module
Preset sound code is converted into preset sound signal, and is exported by output module and preset shot and/or default explosive sound, improves
The sound timbre of shot and explosion acoustical simulation, solves that existing shot explosive sound analog circuit shot sound level is low, quality distortion
The deficiencies of, the problem of cannot be satisfied practical application request.
Description of the drawings
Fig. 1 is the structural schematic diagram for shot and the integrated circuit for the acoustical simulation that explodes in the embodiment of the present invention one；
Fig. 2 is the structural schematic diagram for shot and the integrated circuit for the acoustical simulation that explodes in the embodiment of the present invention two；
Fig. 3 is the structure of the control module for shot and the integrated circuit for the acoustical simulation that explodes in the embodiment of the present invention
Schematic diagram；
Fig. 4 is the central control unit for shot and the integrated circuit for the acoustical simulation that explodes in the embodiment of the present invention
Electrical block diagram；
Fig. 5 is the circuit of the reset unit for shot and the integrated circuit for the acoustical simulation that explodes in the embodiment of the present invention
Structural schematic diagram；
Fig. 6 is the circuit for shot and the frequency division module of the integrated circuit for the acoustical simulation that explodes in the embodiment of the present invention
Structural schematic diagram；
Fig. 7 is the electrical block diagram of the trigger ZSR in the embodiment of the present invention.
Specific implementation mode
In order to make the purpose , technical scheme and advantage of the present invention be clearer, with reference to the accompanying drawings and embodiments, right
The present invention is further elaborated.It should be appreciated that the specific embodiments described herein are merely illustrative of the present invention, and
It is not used in the restriction present invention.
The fundamental of music includes：Audio, beat and speed, wherein audio has twelve-tone equal temperament, i.e., is divided into octave
The musical notes of 12 equal parts (semitone) in the International Phonetic Symbols of each pitch, often increase semitone, frequency increasesTimes.Common beat has 8 kinds：1/4,1/2,3/4,1,3/2,2,3,4 claps, and the speed in music is exactly every
Minute how many bats (beat/min), it is reducible between 70~240 according to melody Qu Xingzhi to formulate speed.
Fig. 1 is the structural representation for the integrated circuit for being applied to shot and the acoustical simulation that explodes that the embodiment of the present invention one provides
Figure, as shown in Figure 1, the integrated circuit in the present embodiment includes：For export first choice signal, the first enabled control signal,
First trigger signal and the control module of power-on reset signal 100；It is connect with control module 100, it is enabled for receiving first
Control signal and power-on reset signal, and according to the first enabled control signal and power-on reset signal export the first fractional frequency signal,
The frequency division module 200 of second fractional frequency signal, third fractional frequency signal and the first reset signal；It connect, is used for control module 100
Preset sound code is stored, and the first pre-set velocity code, first are exported according to first choice signal and the first enabled control signal
The memory module 600 of preset audio code and the first default beat code；It connect, uses with frequency division module 200 and memory module 600
In the audio-frequency module for exporting the first audio signal according to the first reset signal, third fractional frequency signal and the first preset audio code
300；It is connect with frequency division module 200 and memory module 600, and according to the first pre-set velocity code and third fractional frequency signal output the
The acceleration module 400 of one speed signal；It is connect with acceleration module 400, memory module 600 and frequency division module 200, and according to
One fractional frequency signal, the first default beat code, the first reset signal and First Speed signal export the first cadence signal and first
The beat module 500 of beat clock signal；With control module 100, frequency division module 200, memory module 600 and beat module
500 connections, for according to the first default beat code, the first fractional frequency signal, the first enabled control signal, the power-on reset signal
And the ground of the first address carry signal of the first beat clock signal output, the first feedback signal and the second feedback signal
Location carry module 700；It is connect with control module 100, frequency division module 200, audio-frequency module 300 and beat module 500, and according to
First enabled control signal, the second fractional frequency signal, power-on reset signal, the first cadence signal and the output of the first audio signal are pre-
If the output module 900 of voice signal.
In the present embodiment, memory module 600 is additionally operable to receive address carry signal, and according to address carry signal to pre-
If sound code is selected, control module 100 is additionally operable to according to first feedback signal and second feedback signal pair
One enabled control signal and the first trigger signal are controlled, and control module 100 sends first choice letter to memory module 600
Number, the music sound tone code which is used to select to prestore in memory module 600, the music sound tone code passes through audio mould
Block 300, acceleration module 400, beat module 500 and address carry module 700 are exported after being handled by output module 900
Corresponding preset sound signal.Fig. 2 is the integrated electricity for being applied to shot and the acoustical simulation that explodes that the embodiment of the present invention provides two
The structural schematic diagram on road, as shown in Fig. 2, the integrated circuit for being applied to shot and the acoustical simulation that explodes in the present embodiment further includes
The oscillation module 800 of frequency of oscillation is provided for frequency division module 200 and audio-frequency module 300.Specifically, the first of oscillation module 800
Input terminal is connect with the enabled control signal output of control module 100, oscillator signal output end and the frequency dividing of oscillation module 800
First oscillator signal input terminal of module 200 and audio-frequency module 300 connects.
In the present embodiment, when the first enabled control signal that control module 100 exports is low level, oscillation module
800 can not generate oscillation output square wave, when the first enabled control signal that control module 100 exports is high level, swing module
800 could normal oscillation output square wave.
As an embodiment of the present invention, control module 100 includes：First feedback signal input terminal ENDB1, the second feedback letter
Number input terminal T11, the second fractional frequency signal input terminal H21, first choice signal output end D, the first enabled control signal output
EN1, the first trigger signal output end LT1 and power-on reset signal output end POR1.Specifically, the first of control module 100
Feedback signal input terminal ENDB1, control module 100 the second feedback signal input terminal T11 respectively with address carry module 700
The second feedback signal output T17 connections of first feedback signal output ENDB7 and address carry module 700.Control mould
Second fractional frequency signal input terminal H21 of block 100 is used to receive the second fractional frequency signal of the output of frequency division module 200.Control module 100
First choice signal output end D be used to export first choice signal to memory module 600, specifically, the of control module 100
The number of active lanes of one selection signal output end D is determined according to the melody number of selection, for example, being needed in the present embodiment to 2 head
Melody is selected, then passes through 2n>=2, n=1 is obtained, so being needed in control module 100 through 1 two divided-frequency device ZTR production
Raw signal D1, the first choice signal output end D of control module 100 are then a channel transmission signal D1, and signal D1 can be with
The signal of 2 sections of composition.
In the present embodiment, the first of control module 100 the enabled control signal output EN1 respectively with frequency division module 200
The first enable signal input terminal EN2, the first enable signal input terminal EN6 of memory module 600, address carry module 700
The first enable signal input terminal EN9 connections of first enable signal input terminal EN7 and output module 900.Control module 100
First trigger signal output end LT1 is connect with the first trigger signal input terminal LT7 of address carry module 700, is used for address
Carry module 700 exports the first trigger signal.The power-on reset signal output end POR1 of control module 100 respectively with frequency division module
200 power-on reset signal input terminal POR2, the power-on reset signal input terminal POR7 of address carry module 700 and output mould
The power-on reset signal input terminal POR9 connections of block 900.
As an embodiment of the present invention, Fig. 3 is the collection provided in an embodiment of the present invention for shot and the acoustical simulation that explodes
At the electrical block diagram of the control module 100 of circuit, as shown in figure 3, the control module 100 in the present embodiment includes：It presses
Key unit 103, central control unit 102 and reset unit 101；Specifically, push-button unit 103 is for output key triggering letter
Number, the button triggering end TG103 of push-button unit 103 is connect with the push button signalling input terminal TG102 of central control unit 102；It is multiple
For bit location 101 for exporting power-on reset signal, the output end POR101 of reset unit 101 is upper with central control unit 102
The POR102 connections of reset signal input part, the output end of reset unit 101 are defeated as the power-on reset signal of control module 100
Outlet, specifically, the output end POR101 of reset unit 101 and the power-on reset signal output end POR1 of control module 100 connect
It connects.
In the present embodiment, first feedback of the first feedback input end of central control unit 102 as control module 100
Input terminal, the second feedback input end of the second feedback input end of central control unit 102 as control module 100, center control
Second fractional frequency signal input terminal of the second fractional frequency signal input terminal of unit 102 processed as control module 100, central control unit
First choice signal output end of the 102 first choice signal output end as control module 100, central control unit 102
First enabled control signal output of the first enabled control signal output as control module 100, central control unit 102
First trigger signal output end of the first trigger signal output end as control module 100.Specifically, central control unit
102 the first feedback input end ENDB102 is connect with the first feedback input end ENDB1 of control module 100, central control unit
102 the second feedback input end T102 is connect with the second feedback input end T11 of control module 100, central control unit 102
Second fractional frequency signal input terminal H2102 is connect with the second fractional frequency signal input terminal H21 of control module 100, central control unit
102 first choice signal output end D102 is connect with the first choice signal output end D of control module 100, and center control is single
First enabled control signal output EN102 of member 102 connects with the first of control module 100 the enabled control signal output EN1
It connects, the first trigger signal output end LT102 of central control unit 102 and the first trigger signal output end of control module 100
LT1 connections.
In the present embodiment, push-button unit 103 is used for 102 output key trigger signal of central control unit, wherein point
The second fractional frequency signal that frequency module 200 exports is inputted by the second fractional frequency signal input terminal H2102 of central control unit 102,
As the clock signal of central control unit 102, if the button trigger signal that push-button unit 103 exports is by the high electricity of low transition
It is t (initial high level 2) between usually, the next rising time of the clock signal of central control unit 102 is t (initial high electricity
It puts down 1), at this point, the duration that push-button unit 103 is pressed is greater than T, T=t (initial high level 2)-t (initial high level 1) passes through
The duration that push-button unit 103 is pressed is greater than T to prevent button false triggering, to export effective high level signal.
As an embodiment of the present invention, 103 output key trigger signal of push-button unit, for shot and explosion acoustical simulation
Integrated circuit in the beat of default explosive sound be 4 to clap, the beat for presetting shot is that a quarter is clapped, wherein default to explode
The note number of sound and default shot is 32, and the signal frequency for the First Speed signal that acceleration module 400 exports is 2KHz.
As an embodiment of the present invention, Fig. 4 is the collection provided in an embodiment of the present invention for shot and the acoustical simulation that explodes
At the structural schematic diagram of the central control unit 102 of circuit, as shown in figure 4, of central control unit 102 in the present embodiment
One selection signal output end D102 has triple channel, exports D1 signals, D2 signals and D3 signals respectively, wherein center control
Unit 102 includes：4th phase inverter INV4, the 5th phase inverter INV5, hex inverter INV6, the 7th phase inverter INV7, the 8th
Phase inverter INV8, the 9th phase inverter INV9, the tenth phase inverter INV10, the 11st phase inverter INV11, the 12nd phase inverter
INV12, the 13rd phase inverter INV13, the first trigger Z1, the second trigger Z2, third trigger Z3, the 4th trigger Z4,
First nor gate NOR1, the second nor gate NOR2 and third nor gate NOR3.
Specifically, the input terminal of the 4th phase inverter INV4 and the push button signalling input terminal TG102 of central control unit 102 connect
It connects, the second input terminal of the output end of the 4th phase inverter INV4 and the second nor gate NOR2 are connected to the power supply of the first trigger Z1 altogether
End, the input terminal of the 5th phase inverter INV5 are connect with the second fractional frequency signal input terminal H2102 of central control unit 102, and the 5th
The output end of phase inverter INV5 and the input terminal of hex inverter INV6 are connected to the second input terminal CKB of the first trigger Z1 altogether,
The output end of hex inverter INV6 is connect with the first input end CK of the first trigger Z1, the second output of the first trigger Z1
End QB is connect with the second input terminal CKB of the second trigger Z2, the first output end Q and the second trigger Z2 of the first trigger Z1
First input end CK be connected to the input terminal of the tenth phase inverter INV10 altogether, the second output terminal QB of the second trigger Z2, third are touched
The first input end CK and the input terminal of the 7th phase inverter INV7 of hair device Z3 connects altogether, output end and the center of the 7th phase inverter INV7
The first passage D1 connections of the first choice signal output end D102 of control unit 102, the first output end Q of the second trigger Z2
Connect with the second output terminal CKB of third trigger Z3, the second output terminal QB of third trigger Z3, the 4th trigger Z4
The input terminal of two input terminal CKB and the 8th phase inverter INV8 connects altogether, the output end and central control unit of the 8th phase inverter INV8
The second channel D2 connections of 102 first choice signal output end D102, the first output end Q of third trigger Z3 and the 4th are touched
The first input end CK connections of device Z4 are sent out, the first output end of the 4th trigger Z4 is vacant, the second output of the 4th trigger Z4
End is connect with the input terminal of the 9th phase inverter INV9, the output end of the 9th phase inverter INV9 and the first of central control unit 102
The third channel D3 connections of selection signal output end D102, the power-on reset signal output end R of the first trigger Z1, the second triggering
The power-on reset signal output end R of device Z2, the power-on reset signal output end R and the 4th trigger Z4 of third trigger Z3
Power-on reset signal output end R and the power-on reset signal input terminal POR102 of central control unit 102 connect altogether, the tenth phase inverter
The input terminal of the output end of INV10 and the 11st phase inverter INV11 are connected to the first input end of the first nor gate NOR1 altogether, and the tenth
The output end of one phase inverter INV11 is connect with the second input terminal of the first nor gate NOR1, the output end of the first nor gate NOR1,
The first input end of second nor gate NOR2 and the first trigger signal output end LT102 of central control unit 102 connect altogether, and second
The output end of nor gate NOR2 is connect with the first input end of third nor gate NOR3, the third input of the second nor gate NOR2
End, third nor gate NOR3 the input terminal of output end and the 12nd phase inverter INV12 connect altogether, the second of third nor gate NOR3
Input terminal is connect with the second feedback input end T102 of central control unit 102, the third input terminal of third nor gate NOR3 with
The power-on reset signal input terminal POR102 connections of central control unit 102, the 4th input terminal of third nor gate NOR3 is in
The first feedback input end ENDB102 connections of control unit 102 are entreated, the output end of the 12nd phase inverter INV12 and the 13rd is instead
The input terminal of phase device INV13 connects, the output end of the 13rd phase inverter INV13 and the first of central control unit 102 the enabled control
Signal output end EN102 connections processed.
In the present embodiment, the first trigger Z1, the second trigger Z2, third trigger Z3 and the 4th trigger Z4 are equal
For Z triggers.
In the present embodiment, when the button trigger signal that push-button unit 103 exports is high level signal, when center, control is single
When the push button signalling input terminal TG102 of member 102 receives button trigger signal, which makes central control unit
First enabled control signal of 102 the first enabled control signal output EN102 outputs is high level signal, at this point, central
The first of the second feedback signal and central control unit 102 that second feedback input end T102 of control unit 102 is received is anti-
It is stop signal to present the first feedback signal that input terminal ENDB102 is received, at this point, when the first enabled control signal is low level,
Oscillation module stops oscillation, the power-on reset signal of the power-on reset signal input terminal POR102 receptions of central control unit 102
It just powers on so that circuit does not work.
As an embodiment of the present invention, Fig. 5 is provided in an embodiment of the present invention applied to shot and explosion acoustical simulation
The electrical block diagram of the reset unit 101 of integrated circuit, as shown in figure 5, reset unit 101 includes：First switch pipe M1,
First capacitance C1, the first reverser INV1, the second reverser INV2 and third phase inverter INV3；Specifically, first switch pipe
The current input terminal of M1 connects the control terminal ground connection of power supply first switch pipe M1, the current output terminal of first switch pipe M1 and the
The first end of one capacitance C1 connects the input terminal with the first phase inverter INV1, the output end and the second reverse phase of the first phase inverter INV1 altogether
The input terminal of device INV2 connects, and the output end of the second phase inverter INV2 is connect with the input terminal of third reverser INV3, and third is anti-
Output end of the output end of phase device INV3 as reset unit 101, the i.e. output end of third phase inverter INV3 and reset unit 101
Output end POR101 connections.
In the present embodiment, reset unit 101 utilizes capacitor charge and discharge principle, makes the output end of reset unit 101
POR101 exports power-on reset signal POR, and the output end POR101 of reset unit 101 believes with the electrification reset of control module 100
The connection of number output end.
Preferably, switching tube M1 is N-type MOS transistor, wherein the size of N-type MOS transistor is bigger, and the first electricity
When appearance C1 is also bigger, the delay of the power-on reset signal of the output end POR101 outputs of reset unit 101 is also longer.
As an embodiment of the present invention, frequency division module 200 includes the first enabled control signal input, the first oscillator signal
Input terminal, power-on reset signal input terminal, the first fractional frequency signal output end, the second fractional frequency signal output end and first reset letter
Number output end；First fractional frequency signal output end of frequency division module 200 respectively with the first fractional frequency signal input terminal of beat module 500
And the first fractional frequency signal input terminal connection of address carry module 700；Second fractional frequency signal output end of frequency division module 200 point
It is not connect with the second fractional frequency signal input terminal of the second fractional frequency signal input terminal of control module 100 and output module 900；Point
The third fractional frequency signal output end of frequency module 200 is connect with the third fractional frequency signal input terminal of acceleration module 400；Frequency division module
200 the first reset signal output end respectively with the first reset signal input terminal of audio-frequency module 300 and beat module 500
First reset signal input terminal connects.
As an embodiment of the present invention, Fig. 6 is in the embodiment of the present invention for shot and the integrated of acoustical simulation that explode
The electrical block diagram of the frequency division module 200 of circuit, in the present embodiment, frequency division module 200 includes：Phase inverter INV201,
Phase inverter INV202, trigger Z201, trigger Z202, trigger Z203, trigger Z204, trigger Z205, trigger
It is Z206, trigger Z207, trigger Z208, trigger Z209, trigger Z210, phase inverter INV203, phase inverter INV204, anti-
Phase device INV205, phase inverter INV206, phase inverter INV207 and nor gate NOR201；Specifically, phase inverter INV201's is defeated
Enter end to connect with the first oscillator signal input terminal OSC2 of frequency division module 200, the output end and phase inverter of phase inverter INV201
The input terminal of INV202 and the second signal input terminal CKB of trigger Z201 connect altogether, the output end of phase inverter INV202 and triggering
The first signal input part CK connections of device Z201, the input terminal of phase inverter INV207 and the first of frequency division module 200 the enabled control
Signal input part EN2 connections, the first signal input part connection or non-of the output end AND OR NOT gate NOR201 of phase inverter INV207
The second signal input terminal of door NOR201 is connect with the power-on reset signal input terminal POR2 of frequency division module 200, nor gate
The output end of NOR201 is connect with the input terminal of phase inverter INV206, the first signal output end Q and trigger of trigger Z201
The input terminal of the second signal input terminal CKB and phase inverter INV203 of Z202 connect altogether, the second signal output end of trigger Z201
QB is connected with the first signal input part CK of trigger Z202, the output end of phase inverter INV203 and the first of frequency division module 200
The H12 connections of fractional frequency signal output end, the second signal input terminal of the first signal output end Q and trigger Z203 of trigger Z202
Connection, the first signal input part of the second signal output end QB and trigger Z203 of trigger Z202 are connect, trigger Z203
The first signal output end Q connect with the second signal input terminal of trigger Z204, the second signal output end of trigger Z203
QB is connect with the first signal input part of trigger Z204, the first signal output end Q's and trigger Z205 of trigger Z204
Second signal input terminal connects, and the first signal input part of the second signal output end QB and trigger Z205 of trigger Z204 connect
It connects, the second signal input terminal CKB's and phase inverter INV204 of the first signal output end Q and trigger Z206 of trigger Z205
Input terminal connects altogether, and the first signal input part CK of the second signal output end QB and trigger Z206 of trigger Z205 are connected, instead
The input terminal of phase device INV204 is connect with the second fractional frequency signal output end H22 of frequency division module 200, the first letter of trigger Z206
Number output end Q is connect with the second signal input terminal of trigger Z207, second signal output end QB and the triggering of trigger Z206
The first signal input part of device Z207 connects, the second signal of the first signal output end Q and trigger Z208 of trigger Z207
Input terminal connects, and the first signal input part of the second signal output end QB and trigger Z208 of trigger Z207 are connect, and triggers
The first signal output end Q of device Z208 is connect with the second signal input terminal of trigger Z209, the second signal of trigger Z208
Output end QB is connect with the first signal input part of trigger Z209, the first signal output end Q and trigger of trigger Z209
The second signal input terminal of Z210 connects, and the first signal of the second signal output end QB and trigger Z210 of trigger Z209 are defeated
Enter end connection, the second signal output end QB controls of trigger Z210, the first signal output end and phase inverter of trigger Z210
The input terminal of INV205 connects, and the output end of phase inverter INV205 connects with the third fractional frequency signal output end H32 of frequency division module 200
It connects, the reset signal output of the output end of phase inverter INV206, the reset signal output end R of trigger Z201, trigger Z202
Hold the reset of reset signal the output end R, trigger Z205 of R, the reset signal output end R of trigger Z203, trigger Z204
Reset signal output end R, the trigger of signal output end R, the reset signal output end R of trigger Z206, trigger Z207
The reset signal output end R of the reset signal output end R of Z208, the reset signal output end R of trigger Z209, trigger Z210
It is connect altogether with the first reset signal output end P12 of frequency division module 200.
In the present embodiment, the trigger Z201 in frequency division module 200, trigger Z202, trigger Z203, trigger
Z204, trigger Z205, trigger Z206, trigger Z207, trigger Z208, trigger Z209 and trigger Z210 conducts
Two divided-frequency device carries out the first fractional frequency signal of frequency dividing output, the second fractional frequency signal and third fractional frequency signal, wherein the first frequency dividing
Signal is exported to beat module 500 and address carry module 700, specific volume, and the first fractional frequency signal acts on address carry mould
Block 700 participates in the reset of address carry module 700, and the second fractional frequency signal is exported to control module 100 and output module 900, tool
Body, control module 100 receives the clock signal that the second fractional frequency signal is used as stabilization, and third fractional frequency signal is exported to acceleration module
400 and audio-frequency module 300, the enabled control signal of power-on reset signal and first that frequency division module 200 receives to frequency division module into
It goes and resets, wherein when the first enabled control signal is low level signal, the first power-on reset signal of the output of frequency division module 200
P1 is high level signal, and circuit is made to be constantly in reset state.
As an embodiment of the present invention, memory module 600 includes the first address carry signal input part, first choice signal
Input terminal, the first enabled control signal input, the first pre-set velocity code output end, the first preset audio code output end and
One default beat code output end；First address carry signal input part of memory module 600 and the first of address carry module 700
Address carry signal output end connects；First pre-set velocity code output end of memory module 600 is pre- with the first of acceleration module 400
If speed code input terminal connects；First preset audio code output end of memory module 600 and the first default sound of audio-frequency module 300
Frequency code input terminal connects；First default beat code output end of memory module 600 presets section with the first of beat module 500 respectively
Clap the first default beat code input terminal connection of code input terminal and address carry module 700.
As an embodiment of the present invention, memory module 600 includes：Translator unit harmony tone code storage unit stores mould
Switching between the first address carry signal 32 notes of progress of the block 600 by receiving the output of address carry module, in this implementation
In example, the note number for presetting explosive sound and default shot is 32, specifically, the note number can be by designer's self-defining, in advance
If the note number of explosive sound and default shot is 32, often row has 32 positions to be used for that sound is written to sound code memory unit
Code, translator unit determine the sound code effectively exported by the first choice signal of reception, for example, in table one, by decoder
The signal x of unit output<0>~x<31>Control effective sound code, specifically, in memory module 600 by be arranged PMOS tube come
Export effective sound code 1 and invalid sound code then 0.
Table one：Sound code x<0>~x<31>With the first preset audio code and the relation table of the first default beat code
Table one：Sound code x<0>~x<31>With the first preset audio code and the relation table of the first default beat code
In Table 1, O1-O7 is the first preset audio code, and O8-O9 is the first default beat code.
As an embodiment of the present invention, in memory module 600 further include speed code for exporting the first pre-set velocity code
Output unit due to being stored with different musics in memory module 600, then pre-sets every first melody pre- in the present embodiment
If divisor is used for the head melodies, for example, the first pre-set velocity code includes B1, B2, B3 and B4 uniform velocity code signal, memory module
First choice signal D1 is received, if D1 is 1 when the second first melody, is controlled by first row sound code, it in the present embodiment, can
It is identical with the speed of the two of setting first melodies, so the first pre-set velocity code is identical, the signal B1, B2, B3 that then export and
B4 acts on acceleration module.
As an embodiment of the present invention, address carry module 700 includes the first enabled control signal input, the first frequency dividing
Signal input part, the first trigger signal input terminal, the first default beat code input terminal, power-on reset signal input terminal, first segment
It is defeated to clap clock signal input terminal, the first address carry signal output end, the first feedback signal output and the second feedback signal
Outlet；First enabled control signal input of address carry module 700 is used to receive the first of the output of the control module
Enabled control signal；First fractional frequency signal input terminal of address carry module 700 is used to receive the first of the output of frequency division module 200
Fractional frequency signal；First trigger signal input terminal of address carry module 700 is used to receive the first triggering of the output of control module 100
Signal；First default beat code input terminal of address carry module 700 is used to receive the first default section of the output of memory module 600
Clap code；The power-on reset signal input terminal of address carry module 700 is used to receive the electrification reset letter of the output of control module 100
Number；First beat clock signal input terminal of address carry module 700 is exported with the first beat clock signal of beat module 500
End connection, the first beat clock signal for receiving beat module 500；First address carry of address carry module 700 is believed
Number output end is for exporting the first address carry signal；First feedback signal output of address carry module 700 and address into
Position module 700 the second feedback signal output respectively with the first feedback signal input terminal and control module of control module 100
100 the second feedback signal input terminal connection, for exporting the first feedback signal and the second feedback signal to control module 100.
As an embodiment of the present invention, when the first beat that address carry module 700 is exported by reception beat module 500
Clock signal to provide carry signal, realize note sequence switching, due to note number can by melody designer voluntarily
Setting, if the note sum per first melody being arranged in this circuit is less than or equal to 32,2n>=32.n=5, it is therefore desirable to 5
A two divided-frequency device generates first address carry signal A0~A4 supply memory modules 600 so which group sound code (every group of sound determined
Tone code includes one group of first preset audio code O1~O7) output.
Specifically, when the note number of certain first melody is 32, signal generates the first feedback signal through a trigger again
The high level signal that T1, first feedback signal T1 are generated after the melody containing 32 notes is played, acts on control
Molding block 100 makes oscillation module 800 stop oscillation (EN=0)).When the note number of certain first melody is less than 32, the second feedback
Signal ENDB utilizes the principle of trigger, and generating segment high level signal with the first fractional frequency signal H1 logical combinations resets and make the
One enabled control signal is low level signal, such as certain music note number is 32, then after needing this 32 notes to play, is depositing
The sound code filled out in 600 next position of storage module makes first default beat code O8~O11 of output be 0000.
As an embodiment of the present invention, the oscillator signal input terminal of audio-frequency module 300 and the output end of oscillation module 800 connect
It connects, the first reset signal input terminal of audio-frequency module 300 is connect with the first reset signal output end of frequency division module 200, audio
The third fractional frequency signal input terminal of module 300 is connect with the third fractional frequency signal output end of frequency division module 200, audio-frequency module 300
The first preset audio code input terminal connect with the output end of the first preset audio code of memory module 600, specifically, audio mould
Block 300 exports the first audio signal according to the first reset signal, third fractional frequency signal and the first preset audio code.
In the present embodiment, audio-frequency module 300 receives the first preset audio code of the output of memory module 600 to determine to generate
Which kind of audio, audio-frequency module 300 receive third fractional frequency signal, make the of output according to the variation of the first preset audio code O1-O7
One audio signal changes, wherein the signal frequency of third fractional frequency signal is 8KHz, and the first preset audio code O1-O7 can be managed
Solution is a kind of corresponding note, and the variation of the first audio signal is designed realization according to linear feedback shift register, specifically
Design circuit needs to select according to user, inputs, then uses for example, the first preset audio code O1-O7 includes 7 audio code channels
Elemental device realizes that in the present embodiment, which can be trigger ZSR, wherein the physical circuit of trigger ZSR
Structure is as shown in Figure 7.
In the present embodiment, trigger ZSR includes the 4th CMOS tube I6, the 5th CMOS tube I7, the 6th CMOS tube I8, the 7th
CMOS tube I10, the 8th CMOS tube I12, NOT gate I9, NOT gate I11, NOT gate I16, the 4th N-MOS pipes M6, the 5th N-MOS pipes M7,
Six N-MOS pipes M8, the 4th P-MOS pipes M9.
Specifically, the source S of the 4th CMOS tube I6 the input terminal D as trigger ZSR, the grid G P of the 4th CMOS tube I6
As the ends PS of trigger ZSR, the ends PSB of the grid G N of the 4th CMOS tube I6 as trigger ZSR, the leakage of the 4th CMOS tube I6
Pole D is connect with the source S of the 6th CMOS tube I8.Clock end J of the source S of 5th CMOS tube I7 as trigger ZSR, the 5th
PSB ends of the grid G P of CMOS tube I7 as trigger ZSR, the ends PS of the grid G N of the 5th CMOS tube I7 as trigger ZSR,
The drain D of 5th CMOS tube I7 is connect with the source S of the 6th CMOS tube I8.The grid G P of 6th CMOS tube I8 is as trigger
Clock end CKBs of the grid G N of the clock end CK, the 6th CMOS tube I8 of ZSR as trigger ZSR, the drain electrode of the 6th CMOS tube I8
D is connect by NOT gate I9 with the source S of the 7th CMOS tube I10.The grid G P of 7th CMOS tube I10 as trigger ZSR when
Clock end CKs of the grid G N of clock end CKB, the 7th CMOS tube I10 as trigger ZSR, the drain D of the 7th CMOS tube I10 and the
The source S of eight CMOS tube I12 connects, the input terminal connection of the drain D also NAND gate I11 of the 7th CMOS tube I10.8th CMOS tube
Grid G N clock ends as trigger ZSR of the grid G P of I12 as the clock end CK, the 8th CMOS tube I12 of trigger ZSR
Output end QB of the drain D of CKB, the 7th CMOS tube I10 as trigger ZSR.The output end of NOT gate I11 is as trigger ZSR
Output end Q, the output end of NOT gate I11 also connects with the input terminal of NAND gate I16, the output end of NOT gate I16 and the 7th CMOS
The drain D of pipe I10 connects.Clock end CKB of the grid of 4th N-MOS pipes M6 as trigger ZSR, the 4th N-MOS pipes M6's
Drain electrode is connect with the source electrode of the 5th N-MOS pipes M7；The drain electrode of 5th N-MOS pipes M7 is connect with the source electrode of the 6th N-MOS pipes M8, the
The input terminal connection of the drain electrode of five N-MOS pipes M7 also NAND gate I9, the grid of the 5th N-MOS pipes M7 and the 6th N-MOS pipes M8's
Grid connects, the output end connection of the grid also NAND gate I9 of the 5th N-MOS pipes M7；The drain electrode and the 4th of 6th N-MOS pipes M8
The source electrode of P-MOS pipes M9 connects；Clock end CK of the grid of 4th P-MOS pipes M9 as trigger ZSR.The trigger ZSR
Circuit output signal more stablize, circuit structure is simple, cost-effective.
In the present embodiment, audio-frequency module 300 can be regarded as frequency dividing device, i.e., by controlling the first preset audio code O1-
O7 allows entire audio-frequency module 300 to become preset division device, for example, when it is 0101010 to input O1~O7, which is exactly
15 frequency dividing devices.Determine that maximum divisor (being designed by designer's demand) is 2 firstn- 1, n are that (i.e. circuit needs n ZSR to series
Device), because of the needs of this circuit, the minimum frequency that needs is that signal is obtained after 127 frequency dividings, therefore 2n- 1 >=127, n=7, i.e.,
Need 7 ZSR devices.
As an embodiment of the present invention, acceleration module 400 is designed realization also according to linear feedback shift register,
Wherein, the first pre-set velocity code input terminal of acceleration module 400 and the first pre-set velocity code output end of memory module 600 connect
It connects, the third fractional frequency signal input terminal of acceleration module 400 is connect with the third fractional frequency signal output end of frequency division module 200.
In the present embodiment, it is 2 that can obtain maximum divisor according to linear feedback shift registern- 1, n are series；This
In circuit, maximum divisor is 24- 1=15, therefore it is available to share 15 kinds of speed, as shown in Table 2, from table two it can be seen that,
When divisor 1, circuit can be defaulted as without being divided.
In the present embodiment, the frequency for the First Speed signal TEMPO that this circuit generates is 2KHz, specifically, passing through the
Three frequency division signal so that the frequency of the First Speed signal TEMPO of output is 2KHz, therefore it is 4 that can obtain divisor, i.e., the first default speed
Code B1, B2, B3, B4 0111 is spent, then the input signals of the First Speed signal TEMPO as beat module 500, specifically may be used
To need to design according to user.
Two each speed of table corresponds to divisor code
As an embodiment of the present invention, the first of the first fractional frequency signal input terminal Yu frequency division module 200 of beat module 500
Fractional frequency signal output end connects, the first default beat code input terminal of beat module 500 and the first of memory module 600 the default section
The connection of code output end is clapped, the first reset signal input terminal of beat module 500 is exported with the first reset signal of frequency division module 200
End connection, the First Speed signal input part of beat module 500 are connect with the First Speed signal output end of acceleration module 400.
In the present embodiment, it is 3 bats that the maximum beat used is needed in beat module 500, so 2n- 1 >=12, n=4,
Therefore this circuit forms (maximum divisor is 15) by 4 trigger ZSR, producible beat has 15 altogether.By acceleration module 400
The First Speed signal supply beat module 500 of generation inputs.When wherein divisor is 1, i.e., the first default beat code O8, O9,
O10, O11 1000), the first cadence signal PR that beat module 500 generates directly acts on output module 900.
Specifically, a note corresponds to a beat, so the first beat clock signal RLCK that this cycling circuit generates,
It acts on address carry module 700, allows address carry module 700 to play carry, that is, carries out the switching of note.
It is 1 bat wherein " to remove 4 ", is to be clapped for a quarter because removing 1 in the present embodiment, removes 2 halfs and clap, remove three
It is clapped for 1 for four/triple time, first 4, it is two/triple time to remove 6, and except 8 clap for two, it is triple time to remove 12, therefore bat is shorter, is indicated
Frequency is higher, also smaller except being worth.
Thus we can coordinate each required beat, we can find out the divisor that each beat should be set, wherein this circuit
The beat that First melody is used is 3 bats (code 1100), and the beat that the second head is used claps (code 1000) for 1/4, in table three
At ticking, you can determine the first default beat code of output by the sound code in a certain memory module 600.
| Divisor | 08 | 09 | 010 | 011 | Beat | |
| 15 | 0 | 1 | 0 | 0 | ||
| 14 | 0 | 0 | 1 | 0 | ||
| 13 | 1 | 0 | 0 | 0 | ||
| √ | 12 | 1 | 1 | 0 | 0 | 3 clap |
| 11 | 0 | 1 | 1 | 0 | ||
| 10 | 1 | 0 | 1 | 1 | ||
| 9 | 0 | 1 | 0 | 1 | ||
| 8 | 1 | 0 | 1 | 0 | 2 clap | |
| 7 | 1 | 1 | 0 | 1 | ||
| 6 | 1 | 1 | 1 | 0 | 3/2 claps | |
| 5 | 1 | 1 | 1 | 1 | ||
| 4 | 0 | 1 | 1 | 1 | 1 claps | |
| 3 | 0 | 0 | 1 | 1 | 3/4 claps | |
| 2 | 0 | 0 | 0 | 1 | 1/4 claps | |
| √ | 1 | 1 | 0 | 0 | 0 | 1/4 claps |
Three each beat of table corresponds to divisor code
As an embodiment of the present invention, the period of the second fractional frequency signal is more than the period of the first audio signal.
As an embodiment of the present invention, the present embodiment proposes a kind of device applied to shot and the acoustical simulation that explodes,
Described device includes sound-producing device, and described device further includes the integrated circuit as described in any one of above-described embodiment, integrates electricity
The output end on road is connect with sound-producing device.
A kind of integrated circuit applied to shot and the acoustical simulation that explodes in the embodiment of the present invention is defeated by control module
Go out first choice signal, the first enabled control signal, the first trigger signal and power-on reset signal to frequency division module, audio mould
Block, acceleration module, beat module, address carry module are directly or indirectly controlled, and make to store in memory module default
Sound code is converted into preset sound signal, and exports preset sound signal by output module, improves shot and explosion acoustic mode
The sound timbre of quasi- device, solves the deficiencies of low existing shot explosive sound analog circuit shot sound level, quality distortion, cannot be satisfied
The problem of practical application request.
The foregoing is merely illustrative of the preferred embodiments of the present invention, is not intended to limit the invention, all essences in the present invention
All any modification, equivalent and improvement etc., should all be included in the protection scope of the present invention made by within refreshing and principle.
Claims (10)
1. a kind of integrated circuit for shot and the acoustical simulation that explodes, which is characterized in that the integrated circuit includes：
Control for exporting first choice signal, the first enabled control signal, the first trigger signal and power-on reset signal
Module；
It is connect with the control module, for according to the described first enabled control signal and power-on reset signal output first
The frequency division module of fractional frequency signal, the second fractional frequency signal, third fractional frequency signal and the first reset signal；
It is connect with the control module, for storing preset sound code, and according to the described first enabled control signal and described the
One selection signal exports the memory module of the first pre-set velocity code, the first preset audio code and the first default beat code；
It is connect with the frequency division module and the memory module, for being divided according to first reset signal, the third
Signal and the first preset audio code export the audio-frequency module of the first audio signal；
It is connect with the frequency division module and the memory module, for according to the first pre-set velocity code and the third point
Frequency signal exports the acceleration module of First Speed signal；
It is connect with the acceleration module, the memory module and the frequency division module, and according to first fractional frequency signal, institute
It states the first default beat code, first reset signal and the First Speed signal and exports the first cadence signal and first segment
Clap the beat module of clock signal；
It is connect with the control module, the frequency division module, the memory module and the beat module, for according to
First default beat code, first fractional frequency signal, the first enabled control signal, the power-on reset signal and described
The address carry mould of the first address carry signal of first beat clock signal output, the first feedback signal and the second feedback signal
Block；
The memory module is additionally operable to receive described address carry signal, and according to described address carry signal to the default sound
Tone code is selected；
The control module is additionally operable to according to first feedback signal and second feedback signal to the described first enabled control
Signal processed and first trigger signal are controlled；
It is connect with the control module, the frequency division module, the audio-frequency module and the beat module, and according to described
One enabled control signal, second fractional frequency signal, the power-on reset signal, first cadence signal and described first
The output module of shot and/or default explosive sound is preset in audio signal output.
2. integrated circuit as described in claim 1, which is characterized in that the integrated circuit further includes for the frequency dividing mould
Block and the audio-frequency module provide the oscillation module of frequency of oscillation；
The first input end of the oscillation module is connect with the enabled control signal output of the control module, the oscillation mode
The oscillator signal output end of block is connect with the first oscillator signal input terminal of the frequency division module and the audio-frequency module.
3. integrated circuit as claimed in claim 2, which is characterized in that the control module includes：First feedback signal inputs
End, the second feedback signal input terminal, the second fractional frequency signal input terminal, first choice signal output end, the first enabled control signal
Output end, the first trigger signal output end and power-on reset signal output end；
First feedback signal input terminal and second feedback signal input terminal respectively with described address carry module
One feedback signal output and the connection of the second feedback signal output；
The second fractional frequency signal input terminal is used to receive the second fractional frequency signal of the frequency division module output；
The first choice signal output end is used to export first choice signal to the memory module；
The first enabled control signal output respectively with the first enable signal input terminal of the frequency division module, the storage
First enable signal input terminal of module, the first enable signal input terminal of described address carry module and the output module
The first enable signal input terminal connection；
The first trigger signal output end is connect with the first trigger signal input terminal of described address carry module, is used for institute
It states address carry module and exports the first trigger signal；
The power-on reset signal output end respectively with the power-on reset signal input terminal of the frequency division module, described address carry
The power-on reset signal input terminal connection of the power-on reset signal input terminal and the output module of module.
4. integrated circuit as claimed in claim 3, which is characterized in that the control module includes：Push-button unit, center control
Unit and reset unit；
The push-button unit is used for output key trigger signal, and the button triggering end of the push-button unit and the center control are single
The push button signalling input terminal connection of member；
For the reset unit for exporting the power-on reset signal, the output end of the reset unit and the center control are single
The power-on reset signal input terminal connection of member, the power-on reset signal of the output end of the reset unit as the control module
Output end；
First feedback input end of first feedback input end of the central control unit as the control module, the center
Second feedback input end of second feedback input end of control unit as the control module, the of the central control unit
Second fractional frequency signal input terminal of the two divided-frequency signal input part as the control module, the first choosing of the central control unit
Select first choice signal output end of the signal output end as the control module, the first enabled control of the central control unit
First enabled control signal output of the signal output end processed as the control module, the first of the central control unit touches
First trigger signal output end of the signalling output end as the control module.
5. integrated circuit as claimed in claim 3, which is characterized in that the frequency division module includes that the first enabled control signal is defeated
It is defeated to enter end, the first oscillator signal input terminal, power-on reset signal input terminal, the first fractional frequency signal output end, the second fractional frequency signal
Outlet and the first reset signal output end；
The first fractional frequency signal output end respectively with the first fractional frequency signal input terminal and described address of the beat module
First fractional frequency signal input terminal of carry module connects；
The second fractional frequency signal output end respectively with the second fractional frequency signal input terminal of the control module and the output
Second fractional frequency signal input terminal of module connects；
The third fractional frequency signal output end is connect with the third fractional frequency signal input terminal of the acceleration module；
First reset signal output end of the frequency division module respectively with the first reset signal input terminal of the audio-frequency module with
And the first reset signal input terminal connection of the beat module.
6. integrated circuit as claimed in claim 3, which is characterized in that the memory module includes that the first address carry signal is defeated
Enter end, first choice signal input part, the first enabled control signal input, the first pre-set velocity code output end, first default
Audio code output end and the first default beat code output end；
The first address carry signal input part is connect with the first address carry signal output end of described address carry module；
The first choice signal input part is connect with the first choice signal output end of the control module, described for receiving
First choice signal；
The first enabled control signal input is connect with the first enabled control signal output of the control module, is used for
Receive the first enabled control signal of the control module；
The first pre-set velocity code output end is connect with the first pre-set velocity code input terminal of the acceleration module, is used for institute
It states acceleration module and sends the first pre-set velocity code；
The first preset audio code output end is connect with the first preset audio code input terminal of the audio-frequency module, is used for institute
It states audio-frequency module and sends the first preset audio code；
The first default beat code output end respectively with the first default beat code input terminal of the beat module and described
First default beat code input terminal connection of address carry module, is used for the beat module and described address carry module
Send the described first default beat code.
7. integrated circuit as claimed in claim 3, which is characterized in that described address carry module includes the first enabled control letter
Number input terminal, the first fractional frequency signal input terminal, the first trigger signal input terminal, the first default beat code input terminal, electrification reset
Signal input part, the first beat clock signal input terminal, the first address carry signal output end, the first feedback signal output with
And second feedback signal output；
The first enabled control signal input is used to receive the first enabled control signal of the output of the control module；
The first fractional frequency signal input terminal is used to receive the first fractional frequency signal of the frequency division module output；
The first trigger signal input terminal is used to receive the first trigger signal of the control module output；
The first default beat code input terminal is used to receive the first default beat code of the memory module output；
The power-on reset signal input terminal is used to receive the power-on reset signal of the control module output；
The first beat clock signal input terminal is connect with the first beat clock signal output terminal of the beat module, is used for
Receive the first beat clock signal of the beat module；
The first address carry signal output end is for exporting the first address carry signal；
First feedback signal output is anti-with the first of the control module respectively with second feedback signal output
Feedback signal input terminal is connected with the second feedback signal input terminal of the control module, for exporting first to the control module
Feedback signal and the second feedback signal.
8. integrated circuit as claimed in claim 3, which is characterized in that the period of second fractional frequency signal is more than described first
The period of audio signal.
9. integrated circuit as claimed in claim 4, which is characterized in that the reset unit includes：First switch pipe, the first electricity
Appearance, the first reverser, the second reverser and third phase inverter；
The current input terminal of the first switch pipe connects power supply, and the control terminal of the first switch pipe is grounded, and described first
The first end of the current output terminal of switching tube and first capacitance connects the input terminal with first phase inverter altogether, and described first
The output end of phase inverter is connect with the input terminal of second phase inverter, and the output end of second phase inverter and the third are anti-
It is connected to the input terminal of device, the output end of the output end of the third phase inverter as the reset unit.
10. a kind of device for shot and the acoustical simulation that explodes, described device includes sound-producing device, which is characterized in that described
Device further includes such as claim 1-9 any one of them integrated circuits, the output end of the integrated circuit and sounding dress
Set connection.
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| CN201810667613.9A CN108615429B (en) | 2018-06-26 | 2018-06-26 | Integrated circuit and device for gunshot and explosion simulator |
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| CN201810667613.9A CN108615429B (en) | 2018-06-26 | 2018-06-26 | Integrated circuit and device for gunshot and explosion simulator |
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