CN108572544A - A kind of alternating current-direct current B code self-adaptings resolver and method - Google Patents

A kind of alternating current-direct current B code self-adaptings resolver and method Download PDF

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Publication number
CN108572544A
CN108572544A CN201810365531.9A CN201810365531A CN108572544A CN 108572544 A CN108572544 A CN 108572544A CN 201810365531 A CN201810365531 A CN 201810365531A CN 108572544 A CN108572544 A CN 108572544A
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module
code
signal
direct current
alternating current
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CN108572544B (en
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汤湘伟
夏继钢
王红敏
闫双山
朱文超
王轶
季静
经林
夏慧倩
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Yangzhou Baojun Electronic Co Ltd Zhongdian Science & Technology
CETC Yangzhou Baojun Electronic Co Ltd
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Yangzhou Baojun Electronic Co Ltd Zhongdian Science & Technology
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    • GPHYSICS
    • G04HOROLOGY
    • G04GELECTRONIC TIME-PIECES
    • G04G7/00Synchronisation

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Measurement Of Current Or Voltage (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

The present invention relates to a kind of time receiving and processing devices, and in particular to a kind of alternating current-direct current B code self-adaptings resolver and method.Including power module, B codes processing module, rear panel module and display control module.The B code processing modules of the present invention use the dissection process mode that amplitude is adaptive, polarity is adaptive, can the pulse per second (PPS) of parsing be carried out delay parameter amendment, to obtain accurate pps pulse per second signal, realize the convenience of subscriber signal access;It is provided with temperature control circuit between the first DC/DC modules and second switch control circuit of power module of the present invention, the temperature control circuit includes thermistor, voltage comparator and metal-oxide-semiconductor, when environment temperature reaches+80 DEG C or so, close voltage output, it avoids equipment when hot operation from being damaged, extends the service life of complete machine.

Description

A kind of alternating current-direct current B code self-adaptings resolver and method
Technical field
The present invention relates to a kind of time receiving and processing devices, and in particular to a kind of alternating current-direct current B code self-adaptings resolver and Method.
Background technology
Time measurement, the transmission and application of temporal information, in people's lives, the national economic development especially national defense construction All it is indispensable.The rapid development of science and technology makes people propose increasingly higher demands to the precision of time, is such as The system that satellite or Spacecraft Launch, conventional weapon experiment, TT&C system etc. provide time reference signal.Time service at present There are many kinds of methods, including:Satellite time transfer:Such as the dipper system in China and the GPS system in the U.S.;Shortwave time service:Its signal covers Cover area is smaller, and equipment volume is larger;Long-wave time service:Its signal coverage areas is smaller, and equipment volume is big;Time calibration in network:Including Two kinds of forms of NTP and PTP;Parallel port time service:Binary signal parallel transmission, transmission range are closer;B code time services:Including alternating current code With direct current code, due to carrying out signal transmission by the way of wired, so with higher noiseproof feature etc., various time service sides Formula has its environment applied according to the characteristic of its own.
B code signals are divided into as two kinds of transmission forms of B codes AC signal (B-AC) and B codes direct current signal (B-DC), signal Including the information content and format have the time service of nanosecond as shown in Figure 1, B-DC signals are generally transmitted using differential signal Precision;B-AC codes can meet remote temporal information transmission, and can reach Microsecond grade time service precision.
After B codes time service device in the prior art works long hours at high temperature, the case where being susceptible to abnormity of power supply, into And other component is caused to damage, the performance of complete machine is influenced, temporal information can not achieve self-recision when the error occurs, pass over long distances It is easy to cause error when defeated.
Invention content
The technical problem to be solved in the present invention is to overcome the deficiencies of the prior art and provide a kind of alternating current-direct current B code self-adaptings Resolver and method, when can realize parsing, input range and the polar adaptive adjustment of B code alternating current-direct current signals, receive Between information and state the functions such as display;It is provided additionally with expansible function trough position, is inserted into other function modules, quickly It realizes different business functions, to improve development rate, reduces development cost.
The technical solution that this patent solves above-mentioned technical problem is as follows:A kind of alternating current-direct current B code self-adapting resolvers, including Power module, B codes processing module, rear panel module and display control module;
The power module is powered each module by the rear panel module;
The B codes processing module is connected by the rear panel module with the display control module, the B codes processing module packet Include transformer, numerical-control attenuator and AD acquisition chips and ac-dc converter circuit connected in sequence, the ac-dc converter circuit Be connected with each other FPGA processing circuits, the FPGA processing circuits are connected with each other ARM processing circuits, the FPGA processing circuits it is defeated Enter end connection level shifting circuit, output end connects the numerical-control attenuator, and the input terminal connection of the level shifting circuit is protected Protection circuit.
The rear panel module will be interconnected by onboard high speed receptacle between above-mentioned each module;
The display control module is connected by the rear panel module with the B codes processing module, including message processing module and Display module, described information processing module is for receiving the state of each module and required information to be shown, the display module Time for showing B codes parsing that described information processing module received and status information.
Further, further include switch module, the switch module includes the extension of 8 network interfaces, the interchanger mould Wherein 5 network interfaces of block are interconnected by the rear panel module and each module, and in addition 3 network interfaces are used for completing the number with external equipment According to communication.
Further, the power module includes power protecting circuit connected in sequence, DC filter, first switch control Circuit processed, the first DC/DC modules, second switch control circuit.
Further, it is provided with temperature control between the first DC/DC modules and second switch control circuit of the power module Circuit.
Further, the temperature control circuit includes thermistor, voltage comparator and metal-oxide-semiconductor, when environment temperature reaches+ At 80 DEG C or so, voltage output is closed, equipment when hot operation is avoided to be damaged.
Further, the output end of the second control circuit of the power module is provided with the 2nd DC/DC modules and third DC/DC modules are used for subsequent expansion alternating-current B code output function.
Further, the display module is low temperature serial port liquid crystal display module.
A kind of alternating current-direct current B code self-adapting analytic methods, are as follows:
Step 1: high level time counts:High level timing is carried out to the direct current signal of input, obtains 2ms, 5ms, 8ms Redundancy count;
Step 2: whole second verification:Judgement verification is carried out to the 8ms at whole moment second, it, will by then showing that input signal is effective The pulse per second (PPS) of parsing carries out delay parameter amendment, to obtain correct pps pulse per second signal, while the counting that timing obtains being write The FIFO space for entering FPGA processing circuits carries out data buffer storage, and ARM processing circuits is notified to be read out parsing;
Step 3: ARM processing circuits complete the parsing of Information Level according to the standard agreement of B codes, and time data is passed through Rear panel module is sent to display control module and external equipment.
Further, the direct current signal of the input is the direct current signal that the input of alternating-current B code generates, and detailed process is:From Externally input alternating-current B code, which enters after transformer is isolated, enters numerical-control attenuator into line amplitude self adaptive control;Then into Enter the acquisition that AD acquisition chips carry out AC signal data;Signal condition is carried out by signal conditioning circuit to AC signal, is led to The AD data for crossing FPGA processing circuit internal samples, judge whether sampled value is more than the max threshold of setting, if it does, controlling Numerical-control attenuator increases decaying, until meeting amplitude requirement;If peak value is too small, control numerical-control attenuator reduces attenuation, directly Until amplitude is met the requirements or attenuation reaches minimum, AD sampled values is made to be in best codomain always;Then after adjusting Sampled value carry out operation obtain total null voltage and low and high level decision threshold, so as to according to total null voltage estimate input letter Number zero crossing and peak position, the alternating-current B code signal of sampling can be converted to by DC B code according to decision threshold in peak value moment Signal, and can determine whether out whether the polarity of input signal is correct according to the sampled value at peak position, if polarity is inconsistent Obtained DC B code signal is carried out reversed.
Further, the direct current signal of the input is the direct current signal that the input of DC B code generates, and detailed process is:From Externally input DC B code signal is handled by feeding FPGA processing circuits after protecting circuit and level shifting circuit.
The advantageous effect of this patent is:
1, B code processing modules of the invention use the dissection process mode that amplitude is adaptive, polarity is adaptive, can incite somebody to action The pulse per second (PPS) of parsing carries out delay parameter amendment, to obtain accurate pps pulse per second signal, realizes subscriber signal access just Profit;
2, it is provided with temperature control circuit between the first DC/DC modules and second switch control circuit of power module of the present invention, The temperature control circuit includes that thermistor, voltage comparator and metal-oxide-semiconductor close electricity when environment temperature reaches+80 DEG C or so Pressure output, avoids equipment when hot operation from being damaged, extends the service life of complete machine;
3, switch module of the invention includes the extension of 8 network interfaces, and wherein 5 network interfaces of the switch module pass through institute It states rear panel module to interconnect with each module, in addition 3 network interfaces are used for completing to communicate with the data of external equipment, realize more Ethernets The extension of interface effectively increases the access quantity of inside and outside portion's equipment.
Description of the drawings
It, below will be to specific in order to illustrate more clearly of the specific embodiment of the invention or technical solution in the prior art Embodiment or attached drawing needed to be used in the description of the prior art are briefly described, it should be apparent that, in being described below Attached drawing is some embodiments of the present invention, for those of ordinary skill in the art, before not making the creative labor It puts, other drawings may also be obtained based on these drawings.
Fig. 1 is the information content of B code alternating current-direct current signals and the schematic diagram of format;
Fig. 2 is the power module functional block diagram of the present invention;
Fig. 3 is the functional block diagram of the B code direct current signals processing of the present invention;
Fig. 4 is the B code processing module functional block diagrams of the present invention;
Fig. 5 is that the B codes exchange of the present invention turns the functional block diagram of direct current signal.
Specific implementation mode
The object of the present invention is to provide a kind of alternating current-direct current B code self-adaptings resolver and methods, can realize B code alternating current-direct currents The functions such as the display of the parsing of signal, input range and polar adaptive adjustment, receiving time information and state.It is provided additionally with Expansible function trough position, is inserted into other function modules, fast implements different business functions, to improve exploitation speed Degree reduces development cost.
The present invention a kind of alternating current-direct current B code resolvers include:Power module, switch module, is shown B codes processing module The compositions such as module and other modules are controlled, each plug-in unit is interconnected by the interface of rear panel module.
The power module is powered each module by the rear panel module;
The B codes processing module is connected by the rear panel module with the display control module, the B codes processing module packet Include transformer, numerical-control attenuator and AD acquisition chips and ac-dc converter circuit connected in sequence, the ac-dc converter circuit Be connected with each other FPGA processing circuits, the FPGA processing circuits are connected with each other ARM processing circuits, the FPGA processing circuits it is defeated Enter end connection level shifting circuit, output end connects the numerical-control attenuator, and the input terminal connection of the level shifting circuit is protected Protection circuit.
The rear panel module will be interconnected by onboard high speed receptacle between above-mentioned each module;
The display control module is connected by the rear panel module with the B codes processing module, including message processing module and Display module, described information processing module is for receiving the state of each module and required information to be shown, the display module Time for showing B codes parsing that described information processing module received and status information.
Further, further include switch module, the switch module includes the extension of 8 network interfaces, the interchanger mould Wherein 5 network interfaces of block are interconnected by the rear panel module and each module, and in addition 3 network interfaces are used for completing the number with external equipment According to communication.
Further, the power module includes power protecting circuit connected in sequence, DC filter, first switch control Circuit processed, the first DC/DC modules, second switch control circuit.
Further, it is provided with temperature control between the first DC/DC modules and second switch control circuit of the power module Circuit.
Further, the temperature control circuit includes thermistor, voltage comparator and metal-oxide-semiconductor, when environment temperature reaches+ At 80 DEG C or so, voltage output is closed, equipment when hot operation is avoided to be damaged.
Further, the output end of the second control circuit of the power module is provided with the 2nd DC/DC modules and third DC/DC modules are used for subsequent expansion alternating-current B code output function.
Further, the display module is low temperature serial port liquid crystal display module.
The realization principle block diagram of power module wraps as shown in Fig. 2, first pass around power protecting circuit after external power supply input Containing the Anti-surging design that TVS pipe (JK30) carries out, the reverse-connection preventing circuit that is made of metal-oxide-semiconductor (SUD50P04) and electric to consider Magnetic compatible design and increased DC filter;By DC filter and first switch control after power protecting circuit output After circuit processed input the first DC/DC modules (FED60-24S12), using after second switch control circuit export 12V voltages, Temperature control circuit is increased between first DC/DC modules and second switch control circuit, including thermistor, voltage comparator (MAX931) and metal-oxide-semiconductor (SI4497) circuit closes voltage output, avoids high temperature work when environment temperature reaches+80 DEG C or so Equipment is damaged when making;In view of subsequent expansion alternating-current B code output function, in power module again add generation+8V and- The 2nd DC/DC modules of 8V and the 3rd DC/DC modules.
The hardware realization block diagram of B code processing modules is as shown in figure 4, front panel contains the input of B code alternating current-direct currents and output, test Serial ports and state instruction, being followed by mouth containing has serial ports, Ethernet interface, CAN mouthfuls, the interfaces such as I2C.Due to from externally input alternating-current B Code signal peak-to-peak value range reaches+0.5V~+10V, modulation ratio 2:1~6:1, it is adaptive different defeated in order to enable the machine to Enter range, after the input terminal of AC uses transformer isolation, into numerical-control attenuator into line amplitude self adaptive control, makes input AD The voltage amplitude of acquisition chip (ADS808Y) meets the requirement that peak-to-peak value is not more than 2V, numerical-control attenuator by digital regulation resistance and Operational amplifier is constituted.The software processing block diagram of B code AC signal inversion of direct current signals is as shown in Figures 4 and 5, first to the friendship of input It flows signal and carries out signal condition, by the AD data of FPGA internal samples, judge whether sampled value is more than the max threshold set, If it does, control numerical-control attenuator increases decaying, until meeting amplitude requirement;If peak value is too small, numerical-control attenuator is controlled Reduce attenuation, until amplitude is met the requirements or attenuation reaches minimum, AD sampled values is made to be in best codomain always; Then the sampled value after adjustment is subjected to operation and obtains total null voltage and low and high level decision threshold, so as to according to total null voltage The zero crossing and peak position for estimating input signal can turn the B AC signals of sampling according to decision threshold in peak value moment B direct current signals are changed to, and can determine whether out whether the polarity of input signal is correct according to the sampled value at peak position, if polarity It is inconsistent, obtained B code direct current signals are carried out reversely, subsequent processing is just herein and external input is straight for signal arrival The processing for flowing signal is consistent;Hardware handles block diagram for DC B code signal is as shown in figure 4, through overprotection circuit and level FPGA processing is sent to after conversion;Hardware handles block diagram for direct current signal is as shown in figure 3, first believe the direct current of input Number high level timing being carried out, the redundancy for obtaining 2ms, 5ms, 8ms counts, while carrying out judgement verification to double 8ms at whole moment second, By then showing that input signal is effective, the pulse per second (PPS) of parsing is subjected to delay parameter amendment, to obtain accurate pulse per second (PPS) letter Number.The FIFO space for the counting write-in FPGA that timing is obtained simultaneously, and ARM is notified to be read out parsing.ARM is according to B codes Standard agreement completes the parsing of Information Level, and time data is sent to display control module and external interface.
Switch module is mainly made of network extended chip and protection circuit, it is desirable that realizes 5 road Ethernet interface of backboard With 3 road Ethernet interface of front panel.Selected in this module design the IP175DLF chips of nine positive electrons as realize multichannel with Too network interface function, IP175DLF chips are the Ethernet switches of a 5 port of nine positive electrons, support -40~85 DEG C of works Make temperature range, 2 IP175DLF chips have been used in this module, is interconnected by network interface and realize that most 8 roads Ethernet connects Mouth function, wherein 5 road network mouths are interconnected by rear panel module and internal each function module, also 3 network interfaces designs are in interchanger mould The front panel of block, for completing to communicate with the data of external equipment.Each Ethernet interface is realized by HX5400NL transformers Isolation and driving, and each Ethernet interface has all used protection device progress electrostatic protection and pressure resistance to protect, it is contemplated that Ethernet interface is easy to be influenced by the residual voltage after lightning surge and ceramic discharge tube first class of protection, therefore is existed using GDT Common mode carrying out surge protection is done in transformer front end, and selects the TVS pipe suction that junction capacity is low, the reaction time is fast, takes into account protection electrostatic function Astigmat mould energy.
Display control module includes message processing module and display module, and message processing module is STM32F407ARM chips, shows Show that module is low temperature liquid crystal screen, the information that ARM chips receive the state of internal each module and need to show, such as B code time datas, Then according to the interface protocol of liquid crystal display, the display of various data is completed;Some state instructions for needing visual representation simultaneously, pass through Indicator light in the I/O port driving panel of ARM is completed.
Finally it should be noted that:The above embodiments are only used to illustrate the technical solution of the present invention., rather than its limitations;To the greatest extent Present invention has been described in detail with reference to the aforementioned embodiments for pipe, it will be understood by those of ordinary skill in the art that:Its according to So can with technical scheme described in the above embodiments is modified, either to which part or all technical features into Row equivalent replacement;And these modifications or replacements, various embodiments of the present invention technology that it does not separate the essence of the corresponding technical solution The range of scheme.

Claims (10)

1. a kind of alternating current-direct current B code self-adapting resolvers, it is characterised in that:Including power module, B codes processing module, backboard mould Block and display control module;
The power module is powered each module by the rear panel module;
The B codes processing module is connected by the rear panel module with the display control module, and the B codes processing module includes suitable Transformer, numerical-control attenuator and the AD acquisition chips and ac-dc converter circuit of secondary connection, the ac-dc converter circuit are mutual FPGA processing circuits are connected, the FPGA processing circuits are connected with each other ARM processing circuits, the input terminal of the FPGA processing circuits Level shifting circuit is connected, output end connects the numerical-control attenuator, the input terminal connection protection electricity of the level shifting circuit Road.
The rear panel module will be interconnected by onboard high speed receptacle between above-mentioned each module;
The display control module is connected by the rear panel module with the B codes processing module, including message processing module and display Module, described information processing module is used to receive the state of each module and required information to be shown, the display module are used for The time for the B codes parsing that display described information processing module is received and status information.
2. a kind of alternating current-direct current B code self-adapting resolvers according to claim 1, it is characterised in that:It further include interchanger Module, the switch module include the extension of 8 network interfaces, and wherein 5 network interfaces of the switch module pass through the backboard mould Block is interconnected with each module, and in addition 3 network interfaces are used for completing to communicate with the data of external equipment.
3. a kind of alternating current-direct current B code self-adapting resolvers according to claim 2, it is characterised in that:The power module Including power protecting circuit connected in sequence, DC filter, first switch control circuit, the first DC/DC modules, second switch Control circuit.
4. a kind of alternating current-direct current B code self-adapting resolvers according to claim 3, it is characterised in that:The power module The first DC/DC modules and second switch control circuit between be provided with temperature control circuit.
5. a kind of alternating current-direct current B code self-adapting resolvers according to claim 4, it is characterised in that:The temperature control circuit Pass through second switch control circuit when environment temperature reaches 75-85 DEG C including thermistor, voltage comparator and metal-oxide-semiconductor Voltage output is closed, equipment when hot operation is avoided to be damaged.
6. a kind of alternating current-direct current B code self-adapting resolvers according to claim 4, it is characterised in that:The power module The output end of second control circuit be provided with the 2nd DC/DC modules and the 3rd DC/DC modules, be used for subsequent expansion alternating-current B code Output function.
7. a kind of a kind of alternating current-direct current B code self-adaptings of alternating current-direct current B code self-adapting resolvers according to claim 1 parse Method, it is characterised in that:The display module is low temperature serial port liquid crystal display module.
8. certainly according to a kind of a kind of alternating current-direct current B codes of alternating current-direct current B code self-adapting resolvers of claim 1-7 any one of them Adapt to analytic method, it is characterised in that:It is as follows:
Step 1: high level time counts:High level timing is carried out to the direct current signal of input, obtains the superfluous of 2ms, 5ms, 8ms Remaining counting;
Step 2: whole second verification:Judgement verification is carried out to the 8ms at whole moment second, by then showing that input signal is effective, will be parsed Pulse per second (PPS) carry out delay parameter amendment, to obtain correct pps pulse per second signal, while the counting that timing is obtained is written The FIFO space of FPGA processing circuits carries out data buffer storage, and ARM processing circuits is notified to be read out parsing;
Step 3: ARM processing circuits complete the parsing of Information Level according to the standard agreement of B codes, and time data is passed through into backboard Module is sent to display control module and external equipment.
9. a kind of alternating current-direct current B code self-adapting analytic methods according to claim 8, it is characterised in that:The input it is straight It is the direct current signal that the input of alternating-current B code generates to flow signal, and detailed process is:From externally input alternating-current B code enter transformer into Enter numerical-control attenuator after row isolation into line amplitude self adaptive control;AC signal data are carried out subsequently into AD acquisition chips Acquisition;Signal condition is carried out by signal conditioning circuit to AC signal, by the AD data of FPGA processing circuit internal samples, Judge whether sampled value is more than the max threshold of setting, if it does, controlling numerical-control attenuator increases decaying, until meeting amplitude It is required that;If peak value is too small, control numerical-control attenuator reduces attenuation, until amplitude is met the requirements or attenuation reaches minimum Until, so that AD sampled values is in best codomain always;Then the sampled value after adjustment is subjected to operation and obtains total null voltage and height Low level decision threshold, so as to estimate the zero crossing and peak position of input signal according to total null voltage, in peak value moment The alternating-current B code signal of sampling can be converted to DC B code signal according to decision threshold, and according to the sampled value at peak position It can determine whether out whether the polarity of input signal is correct, carry out obtained DC B code signal reversely if polarity is inconsistent.
10. a kind of alternating current-direct current B code self-adapting analytic methods according to claim 8, it is characterised in that:The input it is straight It is the direct current signal that the input of DC B code generates to flow signal, and detailed process is:Pass through protection from externally input DC B code signal FPGA processing circuits are sent into after circuit and level shifting circuit to be handled.
CN201810365531.9A 2018-04-23 2018-04-23 AC/DC B code self-adaptive analysis device and method Active CN108572544B (en)

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CN2165025Y (en) * 1992-09-03 1994-05-18 郑荣俊 Display alarm device for monitoring air pressure of tyre
JPH09318776A (en) * 1996-05-24 1997-12-12 Toyo Commun Equip Co Ltd Time device
CN101107825A (en) * 2004-12-22 2008-01-16 高通股份有限公司 Methods and apparatus for decoder selection in communication systems
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CN201556051U (en) * 2009-11-02 2010-08-18 上海泰坦通信工程有限公司 Multi-input expanding clock
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