CN108565285A - A kind of GaAs based high electron mobility transistors material and preparation method thereof - Google Patents
A kind of GaAs based high electron mobility transistors material and preparation method thereof Download PDFInfo
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- CN108565285A CN108565285A CN201810660416.4A CN201810660416A CN108565285A CN 108565285 A CN108565285 A CN 108565285A CN 201810660416 A CN201810660416 A CN 201810660416A CN 108565285 A CN108565285 A CN 108565285A
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- 229910001218 Gallium arsenide Inorganic materials 0.000 title claims abstract description 74
- 239000000463 material Substances 0.000 title claims abstract description 25
- 238000002360 preparation method Methods 0.000 title claims abstract description 9
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 claims abstract description 22
- 230000012010 growth Effects 0.000 claims abstract description 19
- 229910000980 Aluminium gallium arsenide Inorganic materials 0.000 claims abstract description 15
- 238000005530 etching Methods 0.000 claims abstract description 14
- 239000000758 substrate Substances 0.000 claims abstract description 11
- 230000004888 barrier function Effects 0.000 claims description 15
- 230000003139 buffering effect Effects 0.000 claims description 2
- 230000034655 secondary growth Effects 0.000 claims 1
- 238000005516 engineering process Methods 0.000 description 5
- 150000001875 compounds Chemical class 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 238000001451 molecular beam epitaxy Methods 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 229910052785 arsenic Inorganic materials 0.000 description 2
- 239000011162 core material Substances 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- 240000007594 Oryza sativa Species 0.000 description 1
- 235000007164 Oryza sativa Nutrition 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000000354 decomposition reaction Methods 0.000 description 1
- 238000003795 desorption Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 239000002019 doping agent Substances 0.000 description 1
- 235000013399 edible fruits Nutrition 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 230000005012 migration Effects 0.000 description 1
- 238000013508 migration Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 235000009566 rice Nutrition 0.000 description 1
- 239000006104 solid solution Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
- H01L29/7786—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/107—Substrate region of field-effect devices
- H01L29/1075—Substrate region of field-effect devices of field-effect transistors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
- H01L29/201—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds, e.g. alloys
- H01L29/205—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds, e.g. alloys in different semiconductor regions, e.g. heterojunctions
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Abstract
The invention discloses a kind of GaAs based high electron mobility transistors materials and preparation method thereof, the device includes GaAs substrates, GaAs buffer layers, InGaAs channel layers, n AlGaAs etching stopping layers, N+GaAs cap layers, it is characterized in that, the growth temperature that the GaAs buffer layers use is low temperature.Preparation method is to grow one layer of GaAs buffer layer under cryogenic conditions on gaas substrates；Then continue to grow high electron mobility transistor active area structure successively on GaAs buffer layers again：InGaAs channel layers, n AlGaAs etching stopping layers, N+GaAs cap layers.The present invention replaces original buffer layer by growing low temperature GaAs buffer layers, purpose is to avoid forming parallel conductance at the buffer layer of high electron mobility transistor structure, to generate buffer layer leaky when device works, the maximum operation frequency of device can be improved in this way, simultaneously effective reduce the threshold voltage of device.
Description
Technical field
The present invention relates to Group III-V compound semiconductor thin-film material growth technology fields, and in particular to Yi Zhonggai
Into GaAs based high electron mobility transistor materials and preparation method thereof.
Background technology
Molecular beam epitaxial growth (MBE) technology basic principle is that substrate slice and several is relatively placed in ultra-high vacuum system
A molecular beam source furnace (jeting furnace) will form the various elements (As, Ga etc.) and dopant element (Si, Be etc.) point of compound
It is not put into heating in different jeting furnaces, makes their molecule or atom with certain heat movement speed and a certain proportion of line
Intensity is ejected into the substrate slice surface of heating, and interaction (including surface migration, decomposition, absorption and desorption etc. are generated with surface
Effect), and carry out the epitaxial growth of monocrystal thin films.According to the set procedure, shutter is switched, furnace temperature is changed, controls growth time,
The compound of the different-thickness or ternary of different component ratio, quaternary solid solution and hetero-junctions can be grown, is prepared various ultra-thin
Layer structural material.
High-quality ultra-thins layer growing technology and the sub-micros such as molecular beam epitaxy (MBE), metal organic chemical vapor deposition (MOCVD)
The development of rice micrometer-nanometer processing technology so that the high electron mobility transistor (HEMT) to come out obtained not in structure in 1980
Disconnected innovation, frequency, power and low-noise performance greatly improve, and become one of the important member of microwave and millimetric wave device.
Although the HEMT of ordinary construction has good high frequency, high speed performance, there is also there are one prodigious problem,
That be exactly its performance temperature stability it is poor.Pseudo-isomorphous high electronic mobility transistor (PHEMT) is to high electron mobility
A kind of improvement of transistor (HEMT), basic structure is referring to Fig. 1.The temperature stability of device threshold voltage is not only increased, and
And also improve the output C-V characteristic of device so that device have the output resistance of bigger, higher mutual conductance, bigger electric current
Processing capacity and higher working frequency, lower noise etc..PHEMT is mainly used for high speed and high-frequency element, is manufacture
The core material of the microwave devices such as GaAs power tubes, low-noise tube, low noise monolithic integrated circuit, T/R components and Power Monolithic Circuit.
Current PHEMT structures, the resistivity of GaAs buffer layers is relatively low, easy tos produce leakage current, reduces the work of device
Working frequency increases the power consumption of device.
Invention content
In order to solve the above problem in the prior art, the object of the present invention is to provide a kind of improved high electronics of GaAs bases
Mobility transistor material reduces leakage current caused by the parallel conductance of buffer layer, the working frequency of device can be improved.
It is a further object of the present invention to provide a kind of preparation methods of GaAs based high electron mobility transistors material.
GaAs based high electron mobility transistors material provided by the invention, including GaAs substrates, GaAs buffer layers,
InGaAs channel layers, n-AlGaAs etching stopping layers, N+GaAs cap layers, wherein the GaAs buffer layers are low temperature buffer layer,
Can also have between middle GaAs buffer layers and InGaAs channel layers or between InGaAs channel layers and n-AlGaAs etching stopping layers
There is a schottky barrier layer, one way in which is can be between GaAs buffer layers and InGaAs channel layers and InGaAs raceway grooves
Respectively increase schottky barrier layer between layer and n-AlGaAs etching stopping layers, i.e. Schottky barrier layer number is two；Separately
A kind of mode be only between GaAs buffer layers and InGaAs channel layers or InGaAs channel layers and n-AlGaAs etching stopping layers it
Between increase a schottky barrier layer, i.e., Schottky barrier layer number be one.
The study found that GaAs buffering layer resistivities are the growth temperature using 580 DEG C, this temperature the main reason for relatively low
Spend growth buffer layer structure resistivity close to intrinsic GaAs crystal resistivity, about 7 × 105Ω .cm, in later stage system
When making HEMT devices, understands the electric current of some and pass through from buffer layer, at this moment GaAs buffer layers just become
The parallel conductance layer of low mobility to reduce the working frequency of device increases the power consumption of device.The present invention uses
200 DEG C~400 DEG C of GaAs buffer growth temperature, the GaAs buffer layers grown in this way have higher resistivity, effectively solve
It has determined this problem；The alms giver of substrate surface or acceptor impurity can also be pinned at low temperature buffer layer simultaneously, greatly reduced slow
Rush layer electric leakage.
Preferably, in above-mentioned GaAs based high electron mobility transistors material, the resistivity of the GaAs buffer layers is 1~
7×107Ω.cm.The optimal resistivity of the GaAs buffer layers is 5 × 107Ω.cm。
Preferably, in above-mentioned GaAs based high electron mobility transistors material, the thickness of the GaAs buffer layers is 50-
5000nm。
The preparation method of the GaAs based high electron mobility transistor materials of any description above provided by the invention, packet
Include following steps：
One layer of GaAs buffer layer is grown on gaas substrates, and growth temperature is 200 DEG C~400 DEG C；Then slow in GaAs again
It rushes on layer and continues to grow successively：InGaAs channel layers, n-AlGaAs etching stopping layers, N+GaAs cap layers.InGaAs channel layers, n-
AlGaAs etching stopping layers, N+GaAs cap layers form high electron mobility transistor active area structure.
GaAs based high electron mobility transistors material provided by the invention and preparation method thereof has following beneficial to effect
Fruit：
Replace original buffer layer by growing low temperature GaAs buffer layers, avoids in high electron mobility transistor structure
Parallel conductance is formed at buffer layer, to generate buffer layer leaky when device works, can improve device most in this way
Big working frequency simultaneously effective reduces the threshold voltage of device.
Description of the drawings
Fig. 1 is high electron mobility transistor material basic structure.
Fig. 2 is embodiment 1GaAs based high electron mobility transistor materials.
Specific implementation mode
Technical scheme of the present invention progress is specifically clearly explained with reference to the accompanying drawings and embodiments, so that this field skill
Art personnel more fully understand the present invention.
Fig. 2 is the basic structure of the high electron mobility transistor of the application, which is specially the high electronics of pseudomorphy
Mobility transistor, referring to Fig.1-2, the material include multiple layers of structure of vertical-growth from bottom to top, be followed successively by GaAs substrates,
GaAs buffer layers, InGaAs channel layers, n-AlGaAs etching stopping layers, N+GaAs cap layers, wherein the GaAs buffer layers use
Growth temperature be 200 DEG C~400 DEG C, especially 250 DEG C~300 DEG C, such as 280 DEG C, 300 DEG C etc..For above
The basic structure of PHEMT materials is not fully defined in above example, and those skilled in the art can be added as needed on it
His layer structure, such as can be between GaAs buffer layers and InGaAs channel layers or InGaAs channel layers stop with n-AlGaAs etchings
Only increase schottky barrier layer between layer, the schottky barrier layer may be used Al (Ga) As, In (Al) As, InP or other three
Five race's semi-conducting materials generate, thickness 1-50nm, such as 15nm, 18nm, 20nm or 35nm etc., growth temperature 450-600
DEG C, wherein optimum temperature is 600 DEG C.One way in which be can between GaAs buffer layers and InGaAs channel layers and
Respectively increase schottky barrier layer, i.e. Schottky barrier layer number between InGaAs channel layers and n-AlGaAs etching stopping layers
It is two；Another way is only between GaAs buffer layers and InGaAs channel layers or InGaAs channel layers are etched with n-AlGaAs
Increase a schottky barrier layer between stop-layer, i.e. Schottky barrier layer number is one.The schottky barrier layer is used for
The region with rectified action is formed on boundary, so that electronics is transmitted inside raceway groove and is reduced flowing of the electronics in vertical direction.
With further reference to Fig. 2, when growing GaAs base pseudo-isomorphous high electronic mobility transistor material structures, semi-insulating
GaAs Grown low temperature GaAs buffer layers, growth temperature are 200 DEG C to 400 DEG C, and the GaAs for substituting 580 DEG C of high growth temperatures is slow
Layer is rushed, the continued growth PHEMT active area structures on this buffer layer, to reduce the buffer layer leakage current of PHEMT devices.Xiao Te
The common growing method that the growing method of base barrier layer is referred to this field is grown.
In order to verify whether this low temperature GaAs buffer layer achievees the effect that high resistant and reduction buffer layer leakage current, need half
Growing low temperature GaAs buffer layers on insulating GaAs substrate, growth temperature are 200 DEG C to 400 DEG C, especially 250 DEG C~300 DEG C
Range, such as 280 DEG C, 300 DEG C etc., growth thickness 50-5000nm, preferred thickness 200nm-500nm, such as can adopt
With 200nm, 500nm, 1500nm or 2000nm etc..Then carry out hall measurement, with judge GaAs buffer layers resistivity whether
Reach 107Ω .cm magnitudes.
By hall measurement, as a result show that the resistivity of GaAs buffer layers is 5 × 107Ω .cm show to reduce growth temperature
Afterwards, the resistivity of GaAs buffer layers obviously increases.
This application involves semiconductor material structures common growth apparatus may be used grown, for example, by using MBE
Equipment etc..
Specific case used herein elaborates inventive concept, the explanation of above example is only intended to
Help understands core of the invention thought.It should be pointed out that for those skilled in the art, not departing from this
Under the premise of inventive concept, any obvious modification, equivalent replacement or the other improvements made should be included in the present invention
Protection domain within.
Claims (6)
1. a kind of GaAs based high electron mobility transistors material, including GaAs substrates, GaAs buffer layers, InGaAs channel layers,
N-AlGaAs etching stopping layers, N+GaAs cap layers, which is characterized in that the GaAs buffer layers are low temperature buffer layer.
2. GaAs based high electron mobility transistors material according to claim 1, which is characterized in that the GaAs bufferings
Also there is schottky barrier layer between layer and InGaAs channel layers.
3. GaAs based high electron mobility transistors material according to claim 1, which is characterized in that the InGaAs ditches
Also there is schottky barrier layer between channel layer and n-AlGaAs etching stopping layers.
4. GaAs based high electron mobility transistors material according to claim 1 or 2 or 3, which is characterized in that described
The resistivity of GaAs buffer layers is 1~7 × 107Ω.cm。
5. GaAs based high electron mobility transistors material according to claim 1 or 2 or 3, which is characterized in that described
The thickness of GaAs buffer layers is 50-5000nm.
6. the preparation method of any GaAs based high electron mobility transistor materials of Claims 1 to 5, feature exist
In including the following steps：
One layer of GaAs buffer layer is grown on gaas substrates, and growth temperature is low temperature；Then again on GaAs buffer layers continue according to
Secondary growth InGaAs channel layers, n-AlGaAs etching stopping layers, N+GaAs cap layers.
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20080017844A1 (en) * | 2004-12-01 | 2008-01-24 | Nichols Kirby B | Low-Temperature-Grown (Ltg) Insulated-Gate Phemt Device and Method |
| CN102569364A (en) * | 2010-12-08 | 2012-07-11 | 中国科学院微电子研究所 | Substrate structure with high mobility and preparation method thereof |
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Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20080017844A1 (en) * | 2004-12-01 | 2008-01-24 | Nichols Kirby B | Low-Temperature-Grown (Ltg) Insulated-Gate Phemt Device and Method |
| CN102569364A (en) * | 2010-12-08 | 2012-07-11 | 中国科学院微电子研究所 | Substrate structure with high mobility and preparation method thereof |
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