CN108564980A - Shifting deposit unit and its driving method, gate driving circuit and display device - Google Patents
Shifting deposit unit and its driving method, gate driving circuit and display device Download PDFInfo
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- CN108564980A CN108564980A CN201810082366.6A CN201810082366A CN108564980A CN 108564980 A CN108564980 A CN 108564980A CN 201810082366 A CN201810082366 A CN 201810082366A CN 108564980 A CN108564980 A CN 108564980A
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
- G11C19/28—Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3674—Details of drivers for scan electrodes
- G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0286—Details of a shift registers arranged for use in a driving circuit
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- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Shift Register Type Memory (AREA)
Abstract
The present invention provides shifting deposit unit and its driving method, gate driving circuit and display device, which includes：Input unit, control terminal are electrically connected with trigger signal input endpoint, and being electrically connected for output end and pull-up node and the first pull-up node control unit provides the first signal for when the control terminal of input unit receives the first signal, pulling up node；Output unit, control terminal, input, output end are electrically connected with pull-up node, clock end, information output respectively, under the control of the first signal of pull-up node, clock end to be connected with signal output end；Pull-up node enhancement unit, control terminal, input, output end are electrically connected with clock end, the first level signal end, pull-up node respectively, when failing edge signal for receiving clock end, first level signal end is connected with pull-up node, it pulls up node and the first signal is provided, failing edge signal can be exported in time by the output unit fully opened, reduce the Tf times.
Description
Technical field
The present invention relates to display technology fields, specifically, the present invention relates to a kind of shifting deposit unit and its driving sides
Method, gate driving circuit and display device.
Background technology
TFT (Thin Film Transistor, thin film transistor (TFT)) formula display screen is all kinds of Laptop ＆ Desktops
On mainstream display device, each liquid crystal pixel point on such display screen is by being integrated in the subsequent film crystal of pixel
Pipe drives, therefore TFT formula display screens are also a kind of active matrix liquid crystal display device.
It is higher and higher with the resolution ratio of liquid crystal display panel, PPI (Pixels Per Inch, the pixel number of per inch
Mesh) it is also higher and higher.With the progress of display technology, gate driving circuit be evolved into GOA (Gate Driver On Array,
Array substrate line driver)；In general, GOA is made of multiple shifting deposit units.
Traditional shifting deposit unit includes mainly input unit, reset unit, pull-up node control unit, pull-down node
Control unit and output unit etc..
However, it was found by the inventors of the present invention that existing shifting deposit unit in the failing edge for receiving clock signal,
The output electric signal of output unit can not be pulled low to rapidly low level, to be easy to cause the Tf (Fall of output electric signal
Time, fall time) it is excessive, the failing edge waveform for exporting electric signal is more distorted, and is easy to cause undercharge or is accidentally exported.
Invention content
The present invention is directed to the shortcomings that existing way, proposes a kind of shifting deposit unit and its driving method, gate driving electricity
Road and display device, to solve the prior art, there are Tf is larger or the asking of being more distorted of failing edge waveform of output electric signal
Topic.
The embodiment of the present invention provides a kind of shifting deposit unit according to the first aspect, including：Input unit, on
Draw node enhancement unit, output unit, trigger signal input terminal, signal output end, clock end, the first level signal end, pull-up
Node；
The input unit, control terminal are electrically connected with the trigger signal input endpoint, output end and the pull-up node
With the electrical connection of the first pull-up node control unit, for when the control terminal of the input unit receives the first signal, to
The pull-up node provides the first signal；
The output unit, control terminal, input, output end respectively with the pull-up node, clock end, information output
Electrical connection, under the control of the first signal of the pull-up node, the clock end to be connected with signal output end；
The pull-up node enhancement unit, control terminal, input, output end are believed with the clock end, the first level respectively
Number end, pull-up node electrical connection, when failing edge signal for receiving the clock end, by the first level signal end with it is described
Pull-up node is connected, and the first signal is provided to the pull-up node.
Preferably, the shifting deposit unit of the embodiment of the present invention, further includes：
First pull-up node control unit, one end are electrically connected with the pull-up node, the other end and the signal output end
Point connection, when the first signal of the first signal or the pull-up node enhancement unit for receiving the input unit, into
Row charging provides the first signal to the pull-up node.
Preferably, the shifting deposit unit of the embodiment of the present invention, further includes：Under first pull-down node control unit, second
Draw node control unit, second electrical level signal end and pull-down node；
First pull-down node control unit, control terminal, first input end, output end respectively with the pull-up node, second
Level signal end, pull-down node electrical connection；
Second pull-down node control unit, control terminal, input, output end respectively with the pull-up node, second electrical level
Signal end, pull-down node electrical connection, under the control of the first signal of the pull-up node, being believed according to second electrical level
Number end second signal to the pull-down node provide second signal.
Preferably, the shifting deposit unit of the embodiment of the present invention, further includes：Reset unit, reset terminal and third level letter
Number end；
The reset unit, control terminal, input, output end respectively with the reset terminal, third level signal end, described
Pull-up node is electrically connected, under the control of the first signal of the reset terminal, believing according to the second of third level signal end
Number to the pull-up node provide second signal.
Preferably, the first pull-down node control unit, the second input terminal is electrically connected with the first level signal end, in institute
Under the control for stating the second signal of pull-up node, by first signal conduction at the first level signal end to the pull-down node.
Preferably, the shifting deposit unit of the embodiment of the present invention, further includes：Second pull-up node control unit and drop-down are single
Member；
Second pull-up node control unit, control terminal, input, output end respectively with the pull-down node, second electrical level
Signal end, the pull-up node, under being controlled in the first signal of the pull-down node, by the second of second electrical level signal end
Signal conduction is to the pull-up node so that the output unit shutdown；
The drop-down unit, control terminal, input, output end respectively with the pull-down node, second electrical level signal end, institute
Signal output end electrical connection is stated, under being controlled in the first signal of the pull-down node, by the second of second electrical level signal end
Signal conduction is to the signal output end.
Preferably, pull-up node enhancement unit, including：5th to the 8th transistor；
6th transistor, grid, the first pole are electrically connected with the clock end, second electrical level signal end respectively, the second pole with
First pole of the 5th transistor and the grid electrical connection of the 7th transistor；
The grid of 5th transistor and the second pole are all electrically connected with the first level signal end；
7th transistor, the second pole of the second pole, the first pole respectively with the first level signal end, the 8th transistor are electrically connected
It connects；
The grid of 8th transistor and the first pole are all electrically connected with the pull-up node.
The embodiment of the present invention additionally provides a kind of gate driving circuit according to the second aspect, including：Multigroup present invention
The shifting deposit unit that embodiment is provided according to the first aspect.
The embodiment of the present invention additionally provides a kind of display device according in terms of third, including：Multigroup present invention is implemented
The shifting deposit unit that example is provided according to the first aspect.
The embodiment of the present invention additionally provides a kind of embodiment of the present invention and is carried according to the first aspect according to the 4th aspect
The driving method of the shifting deposit unit of confession, including：
Input unit in the shifting deposit unit is received by the control terminal of the input unit from the shifting
When the first signal of the trigger signal input terminal of position deposit unit, the first signal is provided to the pull-up node；
Output unit in the shifting deposit unit receives the pull-up by the control terminal of the output unit and saves
When the first signal of point, the clock end and signal that are electrically connected respectively with the output unit in the shifting deposit unit are exported
End conducting；
Pull-up node enhancement unit in the shifting deposit unit passes through the control terminal of the pull-up node enhancement unit
When receiving the failing edge signal of the clock end, the first level being electrically connected respectively with the pull-up node enhancement unit is believed
Number end and the pull-up node conducting, to the pull-up node provide the first signal.
In the embodiment of the present invention, when pull-up node enhancement unit receives the failing edge signal of clock end, by the first level
Signal end is connected with pull-up node, pulls up node and provides the first signal；So that output unit input terminal when receiving
When failing edge signal (being low level from high level saltus step) of Zhong Duan, the pull-up node being electrically connected with the control terminal of output unit is still
It is so able to maintain that at the first signal (high level) so that output unit can keep the state fully opened, i.e. output unit
Input terminal keeps adequately conducting with output end, can pass through the failing edge signal (and subsequent low level signal) of clock end
The output unit fully opened fully is delivered to signal output end in time, to greatly reduce the output signal of signal output end
The Tf times, substantially reduce output electric signal failing edge waveform distortion, greatly promote charge efficiency, substantially reduce signal
The probability that output end accidentally exports promotes reliability.
The additional aspect of the present invention and advantage will be set forth in part in the description, these will become from the following description
Obviously, or practice through the invention is recognized.
Description of the drawings
Above-mentioned and/or additional aspect and advantage of the invention will become from the following description of the accompanying drawings of embodiments
Obviously and it is readily appreciated that, wherein：
Fig. 1 is a kind of modular structure schematic diagram of building mode of the shifting deposit unit of the embodiment of the present invention；
Fig. 2 is the electrical block diagram of an example of the shifting deposit unit of the embodiment of the present invention；
Fig. 3 is the time diagram of existing shift register；
Fig. 4 is the time diagram of the shift register of the embodiment of the present invention.
Specific implementation mode
The embodiment of the present invention is described below in detail, examples of the embodiments are shown in the accompanying drawings, wherein from beginning to end
Same or similar label indicates same or similar element or element with the same or similar functions.Below with reference to attached
The embodiment of figure description is exemplary, and is only used for explaining the present invention, and is not construed as limiting the claims.
Those skilled in the art of the present technique are appreciated that unless expressly stated, singulative " one " used herein, " one
It is a ", " described " and "the" may also comprise plural form.It is to be further understood that is used in the specification of the present invention arranges
It refers to there are the feature, integer, step, operation, element and/or component, but it is not excluded that presence or addition to take leave " comprising "
Other one or more features, integer, step, operation, element, component and/or their group.It should be understood that when we claim member
Part is " connected " or when " coupled " to another element, it can be directly connected or coupled to other elements, or there may also be
Intermediary element.In addition, " connection " used herein or " coupling " may include being wirelessly connected or wirelessly coupling.It is used herein to arrange
Diction "and/or" includes that the whole of one or more associated list items or any cell are combined with whole.
Those skilled in the art of the present technique are appreciated that unless otherwise defined, all terms used herein (including technology art
Language and scientific terminology), there is meaning identical with the general understanding of the those of ordinary skill in fields of the present invention.Should also
Understand, those terms such as defined in the general dictionary, it should be understood that have in the context of the prior art
The consistent meaning of meaning, and unless by specific definitions as here, the meaning of idealization or too formal otherwise will not be used
To explain.
An embodiment of the present invention provides a kind of shifting deposit unit, a kind of module of building mode of the shifting deposit unit
Structural schematic diagram is as shown in Figure 1, include：Input unit, pull-up node enhancement unit, output unit, trigger signal input terminal
(INPUT), signal output end (OUTPUT), clock end (CLK), the first level signal end (VGH), pull-up node (PU).
Input unit, control terminal are electrically connected with trigger signal input endpoint, and output end is saved with pull-up node and the first pull-up
The electrical connection of point control unit provides first for when the control terminal of input unit receives the first signal, pulling up node
Signal.
Output unit, control terminal, input, output end are electrically connected with pull-up node, clock end, information output respectively,
For under the control of the first signal of pull-up node, clock end to be connected with signal output end；
Pull-up node enhancement unit, control terminal, input, output end respectively with clock end, the first level signal end, pull-up
Node is electrically connected, and when failing edge signal for receiving clock end, the first level signal end is connected with pull-up node, upwards
Node is drawn to provide the first signal.Further, the first signal is specially high level signal.
As it can be seen that in the embodiment of the present invention, when pull-up node enhancement unit receives the failing edge signal of clock end, by first
Level signal end is connected with pull-up node, pulls up node and provides the first signal；So that the input terminal in output unit is receiving
To clock end failing edge signal (being low level from high level saltus step) when, the pull-up section that is electrically connected with the control terminal of output unit
Point remains able to maintain the first signal (high level) so that output unit can keep the state fully opened, i.e. output single
The input terminal of member keeps adequately conducting with output end, can be by the failing edge signal (and subsequent low level signal) of clock end
It is fully delivered to signal output end in time by the output unit fully opened, to greatly reduce the output of signal output end
The Tf times of signal substantially reduce the waveform distortion of the failing edge of output electric signal, greatly promote charge efficiency, substantially reduce
The probability that signal output end accidentally exports promotes reliability.
Preferably, as shown in Figure 1, the shifting deposit unit of the embodiment of the present invention, further includes：The control of first pull-up node is single
Member.
First pull-up node control unit, one end are electrically connected with pull-up node, and the other end is connect with signal output end point, are used
When the first signal of the first signal or pull-up node enhancement unit that receive input unit, this first pull-up node is controlled
Unit charges, and pulls up node and provides the first signal.
Preferably, as shown in Figure 1, the shifting deposit unit of the embodiment of the present invention further includes：The control of first pull-down node is single
Member, the second pull-down node control unit, second electrical level signal end (VGL) and pull-down node (PD)；
First pull-down node control unit, control terminal, first input end, output end respectively with pull-up node, second electrical level
Signal end, pull-down node electrical connection, under the control of the first signal of pull-up node, disconnecting the electricity between pull-down node
Road prevents the first signal to be transferred to pull-down node at this moment.
Second pull-down node control unit, control terminal, input, output end respectively with pull-up node, second electrical level signal
End, pull-down node electrical connection, under the control of the first signal of pull-up node, believing according to the second of second electrical level signal end
It number pulls down node and second signal is provided.Further, second signal is specially low level signal.
Preferably, as shown in Figure 1, the shifting deposit unit of the embodiment of the present invention, further includes：Reset unit, reset terminal
(RESET) and third level signal end (VSS)；
Reset unit, control terminal, input, output end are electrically connected with reset terminal, third level signal end, pull-up node respectively
It connects, under the control of the first signal of reset terminal, pulling up node according to the second signal at third level signal end and providing
Second signal.
Preferably, as shown in Figure 1, the first pull-down node control unit of the embodiment of the present invention, the second input terminal and first
Level signal end is electrically connected, and is used under the control of the second signal of pull-up node, by first signal at the first level signal end
It is conducted to pull-down node.
Preferably, as shown in Figure 1, the shifting deposit unit of the embodiment of the present invention, further includes：The control of second pull-up node is single
Member and drop-down unit.
Second pull-up node control unit, control terminal, input, output end respectively with pull-down node, second electrical level signal
End, pull-up node, under the control of the first signal of pull-down node, the second signal of second electrical level signal end to be conducted to
Draw node so that output unit turns off.
Drop-down unit, control terminal, input, output end respectively with pull-down node, second electrical level signal end, signal output end
Electrical connection, under the control of the first signal of pull-down node, it is defeated that the second signal of second electrical level signal end to be conducted to signal
Outlet.
Fig. 2 is the electrical block diagram of an example of the shifting deposit unit of the embodiment of the present invention.In conjunction with Fig. 1 and such as
Shown in Fig. 2, each device and functional unit are made following relationship and belonged to by inventor：
Input unit：Transistor M1；
Pull-up node enhancement unit (is identified in Fig. 2 with dotted line frame)：Transistor M5, M6, M7 and M8；
Output unit：Transistor M3；
First pull-up node control unit：Capacitance C；
Second pull-down node control unit：Transistor M9, M10 and M11；
Second pull-down node control unit：Transistor M12；
Reset unit：Transistor M2；
Second pull-up node control unit：Transistor M13；
Drop-down unit：Transistor M4.
Trigger signal input terminal INPUT, signal output end OUTPUT, clock end CLK, reset terminal RESET, the first level letter
Number end VGH, second electrical level signal end VGL, third level signal end VSS, the 4th level signal end VDD, pull-up node PU, drop-down
Node PD.
The electrical connection between device in each functional unit is described below.
Preferably, as shown in Fig. 2, the grid of the first transistor M1 in the input unit of the embodiment of the present invention, the second pole,
The first order is electrically connected with trigger signal input terminal INPUT, the 4th level signal end VDD and pull-up node PU respectively, for the
When the grid of one transistor M1 receives the first signal of INPUT inputs, pulls up node PU and the first signal is provided.
Preferably, as shown in Fig. 2, one end capacitance C in the first pull-up node unit of the embodiment of the present invention is saved with pull-up
Point PU electrical connections, the other end are electrically connected with signal output end OUTPUT, and OUTPUT is in second signal (low level) shape when initial
State receives the first signal (when high level) by pull-up node PU and starts to charge up so that the level of PU is increased to the first signal.
Preferably, as shown in Fig. 2, third transistor M3 in the output unit of the embodiment of the present invention, grid, the second pole,
First pole is electrically connected with pull-up node PU, clock end CLK, signal output end OUTPUT respectively, for the of pull-up node PU
Under the control of one signal, clock end CLK is connected with signal output end OUTPUT, the letter of CLK is exported to signal output end OUTPUT
Number.
Preferably, as shown in Fig. 2, the pull-up node enhancement unit of the embodiment of the present invention includes：5th transistor M5, the 6th
Transistor M6, the 7th transistor M7 and the 8th transistor M8.
6th transistor M6, grid, the first pole are electrically connected with clock end CLK, second electrical level signal end VGL respectively, and second
Pole is electrically connected with the grid of the first pole of the 5th transistor M5 and the 7th transistor M7.
The grid of 5th transistor M5 and the second pole are all electrically connected with the first level signal end VGH.
7th transistor M7, the second pole, the first pole respectively with the first level signal end VGH, the 8th transistor M8 second
Pole is electrically connected.
The grid of 8th transistor M8 and the first pole are all electrically connected with pull-up node PU.
M6 is used for when CLK exports failing edge signal (from high level saltus step to low level), shutdown.At this point, M5 is by VGH's
First signal conduction to M7 grid so that M7 open.M7 is by the second pole of the first signal conduction of VGH to M8.At this point, due to
The level at the both ends capacitance C is also unmutated, and PU is still the first signal (high level), and M8 is in the conduction state, by the first signal of VGH
It is conducted to the PU being electrically connected with the first pole from the second pole, and charges to C, to which PU is maintained the first level so that defeated
The M3 for going out unit is sufficiently conductive, and the failing edge signal of CLK is fully delivered to OUTPUT in time.
Preferably, as shown in Fig. 2, the first pull-down node control unit of the embodiment of the present invention includes：9th transistor M9,
Tenth transistor M10 and the 11st transistor M11.
Tenth transistor M10, grid, the first pole, the second pole respectively with pull-up node PU, second electrical level signal end VGL,
The grid of 11 transistor M11 is electrically connected.
9th transistor M9, grid and the second pole are all electrically connected with the first electric signal end VGH, the first pole and the 11st crystal
The grid of pipe M11 is electrically connected.
11st transistor M11, the second pole, the first pole are electrically connected with the first electric signal end VGH, pull-down node PD respectively.
M10 is used under the control of the first signal of pull-up node PU, and the second signal of VGL is conducted to the grid of M11,
So that M11 is disconnected, prevent the first signal conduction of VGH to PD.
And M10 is disconnected under the control of the second signal of PU；M9 is by the grid of the first signal conduction of VGH to M11 at this time
Pole so that M11 is connected；M11 is by the first signal conduction of VGH to PD.
Preferably, as shown in Fig. 2, the second pull-down node control unit of the embodiment of the present invention includes the tenth two-transistor
M12.Tenth two-transistor M12, grid, the first order, the second pole respectively with pull-up node PU, second electrical level signal end VGL, drop-down
Node PD electrical connections, under the control of the first signal of pull-up node PU, believing according to the second of second electrical level signal end VGL
It number pulls down node PD and second signal is provided；And under the control of the second signal of PU, the electricity disconnected between VGL and PD is logical
Road.
Preferably, as shown in Fig. 2, the reset unit of the embodiment of the present invention includes second transistor M2.
Second transistor M2, grid, input, output end respectively with reset terminal RESET, third level signal end VSS, on
Node PU electrical connection is drawn, under the control of the first signal of reset terminal RESET, according to the of third level signal end VSS
Binary signal pulls up node PU and provides second signal.
Preferably, as shown in Fig. 2, the second pull-up node control unit of the embodiment of the present invention includes the 13rd transistor
M13。
13rd transistor M13, grid, input, output end respectively with pull-down node PD, second electrical level signal end VGL,
Pull-up node PU, under the control of the first signal of pull-down node PD, the second signal of second electrical level signal end VGL to be connected
To pull-up node PU so that M3 is turned off in output unit.
Preferably, as shown in Fig. 2, the drop-down unit of the embodiment of the present invention includes the 4th transistor M4.
4th transistor M4, grid, input, output end respectively with pull-down node PD, second electrical level signal end VGL, letter
Number output end OUTPUT electrical connections, under the control of the first signal of pull-down node PD, by the of second electrical level signal end VGL
Binary signal is conducted to signal output end OUTPUT, prevents OUTPUT in reseting stage (drop-down stage) output noise signal.
In fact, when the transistor of the embodiment of the present invention is NMOS, the first pole, the second pole are divided into source electrode, drain electrode.
Based on same invention thinking, the embodiment of the present invention additionally provides a kind of driving method of shifting deposit unit, including：
Input unit in shifting deposit unit is received by the control terminal of input unit from shifting deposit unit
When the first signal of trigger signal input terminal, pulls up node and the first signal is provided；
Output unit in shifting deposit unit receives the first signal of pull-up node by the control terminal of output unit
When, it will be connected respectively with the clock end of output unit electrical connection and signal output end in shifting deposit unit；
Pull-up node enhancement unit in shifting deposit unit, when being received by the control terminal of pull-up node enhancement unit
When the failing edge signal of Zhong Duan, the first level signal end being electrically connected respectively with pull-up node enhancement unit and pull-up node are led
It is logical, it pulls up node and the first signal is provided.
The operation principle of the embodiment of the present invention is specifically introduced with reference to sequence diagram example.
Fig. 3 is the time diagram of existing shift register；Fig. 4 is the sequential of the shift register of the embodiment of the present invention
Schematic diagram.T1 is the charging stage of shift register, and T2 is the output stage of shift register, and T3 is under shift register output
For drop along the stage of signal, T4 is the reseting stage of shift register.
As shown in figure 3, in existing shift register, close second signal (the low electricity for being down to VGL of failing edge of OUTPUT
It is flat) when there is more serious distortion, fail in time to be pulled to OUTPUT consistent with the second signal of VGL.This is because existing
Some shift registers lack the pull-up node enhancement unit in the embodiment of the present invention, and the M3 in output unit opens insufficient make
At.
In conjunction with shown in Fig. 2 and Fig. 4, in the T1 stages, VDD is high level, and INPUT input high levels, M1 is opened to be carried to PU points
It charges for the first signal (high level), and to capacitance C so that PU points are set up to the first signal (high level).
In the T1 stages, when PU reaches high level, M3 is started to open at, but because CLK still exports low level, therefore OUTPUT is still
Keep low level.M10 is opened so that the low level of VGL causes to the grid of M11 so that M11 is turned off, and cuts off the high level of VGH
Electric pathway between PD.Meanwhile M12 is opened, and the low level of VGL is conducted to PD so that PD points are set low.
In addition, the T1 stages, when PD points are set to down to low level, M13 is turned off, and M4 is turned off.
T2 stages, INPUT become low level, and PU points keep high level, M4 and M13 to be equipped still in shutdown, and CLK is defeated at this time
Enter high level, M3 is fully opened, and CLK signal is from OUTPU Full-swing outputs.
In the T3 stages, when CLK signal becomes low level (output failing edge signal), M6 is closed, and M7 is opened, since PU points are in
High potential, so M8 is also open, so VGH charges to PU points, so M3 is still within abundant opening state, so
OUTPUT is dragged down rapidly by CLK signal.It disappears this addresses the problem PU point bootstrap effects are caused when CLK signal becomes low level
M3 is caused to open insufficient the problem of causing the distortion of OUTPUT failing edges.
T4 stages, RESET input high levels, M2 are opened, the low level of VSS are conducted to PU, PU is set low to low level.
In the T4 stages, when PU becomes low level, M12 shutdowns switch the electric pathway between the low level of VGL and PD；M10 is closed
It is disconnected so that the high level of VGH is conducted to the grid of M11 by M9 so that M11 is opened is conducted to PD by the high level of VGH, and PD is set
Up to high level.
In the T4 stages, when PD becomes high level, M13 is opened, and the low level of VGL is conducted to PU, PU is set low to low by M13
Level makes M3 no longer export high level to OUTPUT.M4 is opened, and the low level of VGL is conducted to OUTPUT, OUTPUT is clamped
System prevents OUTPUT output noise signals in low level.
Based on same invention thinking, the embodiment of the present invention additionally provides a kind of gate driving circuit, including multigroup present invention
The shifting deposit unit that embodiment provides.
Based on same invention thinking, the embodiment of the present invention additionally provides a kind of display device, including：Multigroup present invention is implemented
The shifting deposit unit that example provides.
Those skilled in the art of the present technique be appreciated that can with computer program instructions come realize these structure charts and/or
The combination of each frame and these structure charts and/or the frame in block diagram and/or flow graph in block diagram and/or flow graph.This technology is led
Field technique personnel be appreciated that these computer program instructions can be supplied to all-purpose computer, special purpose computer or other
The processor of programmable data processing method is realized, to pass through the processing of computer or other programmable data processing methods
Device come execute structure chart and/or block diagram and/or flow graph disclosed by the invention frame or multiple frames in specify scheme.
Those skilled in the art of the present technique are appreciated that in the various operations crossed by discussion in the present invention, method, flow
Steps, measures, and schemes can be replaced, changed, combined or be deleted.Further, each with having been crossed by discussion in the present invention
Other steps, measures, and schemes in kind operation, method, flow may also be alternated, changed, rearranged, decomposed, combined or deleted.
Further, in the prior art to have and step, measure, the scheme in various operations, method, flow disclosed in the present invention
It may also be alternated, changed, rearranged, decomposed, combined or deleted.
The above is only some embodiments of the present invention, it is noted that for the ordinary skill people of the art
For member, various improvements and modifications may be made without departing from the principle of the present invention, these improvements and modifications are also answered
It is considered as protection scope of the present invention.
Claims (10)
1. a kind of shifting deposit unit, which is characterized in that including：Input unit, pull-up node enhancement unit, output unit touch
Signalling input terminal, signal output end, clock end, the first level signal end, pull-up node；
The input unit, control terminal are electrically connected with the trigger signal input endpoint, output end and the pull-up node and the
The electrical connection of one pull-up node control unit, for when the control terminal of the input unit receives the first signal, to described
Pull-up node provides the first signal；
The output unit, control terminal, input, output end are electrically connected with the pull-up node, clock end, information output respectively
It connects, under the control of the first signal of the pull-up node, the clock end to be connected with signal output end；
The pull-up node enhancement unit, control terminal, input, output end respectively with the clock end, the first level signal end,
Pull-up node is electrically connected, when failing edge signal for receiving the clock end, by the first level signal end and the pull-up
Node is connected, and the first signal is provided to the pull-up node.
2. shifting deposit unit according to claim 1, which is characterized in that further include：
First pull-up node control unit, one end are electrically connected with the pull-up node, and the other end connects with the signal output end point
It connects, when the first signal of the first signal or the pull-up node enhancement unit for receiving the input unit, is filled
Electricity provides the first signal to the pull-up node.
3. shifting deposit unit according to claim 2, which is characterized in that further include：First pull-down node control unit,
Second pull-down node control unit, second electrical level signal end and pull-down node；
First pull-down node control unit, control terminal, first input end, output end respectively with the pull-up node, second electrical level
Signal end, pull-down node electrical connection；
Second pull-down node control unit, control terminal, input, output end respectively with the pull-up node, second electrical level signal
End, pull-down node electrical connection, are used under the control of the first signal of the pull-up node, according to second electrical level signal end
Second signal to the pull-down node provide second signal.
4. shifting deposit unit according to claim 3, which is characterized in that further include：Reset unit, reset terminal and third
Level signal end；
The reset unit, control terminal, input, output end respectively with the reset terminal, third level signal end, the pull-up
Node is electrically connected, under the control of the first signal of the reset terminal, according to the second signal at third level signal end to
The pull-up node provides second signal.
5. shifting deposit unit according to claim 4, which is characterized in that
First pull-down node control unit, the second input terminal are electrically connected with the first level signal end, in the pull-up node
Second signal control under, by first signal conduction at the first level signal end to the pull-down node.
6. shifting deposit unit according to claim 5, which is characterized in that further include：Second pull-up node control unit
And drop-down unit；
Second pull-up node control unit, control terminal, input, output end respectively with the pull-down node, second electrical level signal
End, the pull-up node, under being controlled in the first signal of the pull-down node, by the second signal of second electrical level signal end
It is conducted to the pull-up node so that the output unit shutdown；
The drop-down unit, control terminal, input, output end respectively with the pull-down node, second electrical level signal end, the letter
Number output end electrical connection, under the control of the first signal of the pull-down node, by the second signal of second electrical level signal end
It is conducted to the signal output end.
7. shifting deposit unit according to claim 1, which is characterized in that the pull-up node enhancement unit, including：The
Five to the 8th transistors；
6th transistor, grid, the first pole are electrically connected with the clock end, second electrical level signal end respectively, the second pole and the 5th
First pole of transistor and the grid electrical connection of the 7th transistor；
The grid of 5th transistor and the second pole are all electrically connected with the first level signal end；
7th transistor, the second pole, the first pole are electrically connected with the second pole of the first level signal end, the 8th transistor respectively；
The grid of 8th transistor and the first pole are all electrically connected with the pull-up node.
8. a kind of gate driving circuit, which is characterized in that including：Multigroup displacement as described in any one of claim 1-7 is posted
Memory cell.
9. a kind of display device, which is characterized in that including：Multigroup shift LD list as described in any one of claim 1-7
Member.
10. a kind of driving method based on any shifting deposit unit in such as the claims 1-7, which is characterized in that including：
Input unit in the shifting deposit unit is received by the control terminal of the input unit to be posted from the displacement
When the first signal of the trigger signal input terminal of memory cell, the first signal is provided to the pull-up node；
Output unit in the shifting deposit unit receives the pull-up node by the control terminal of the output unit
When the first signal, the clock end and signal output end that are electrically connected respectively with the output unit in the shifting deposit unit are led
It is logical；
Pull-up node enhancement unit in the shifting deposit unit is received by the control terminal of the pull-up node enhancement unit
To the clock end failing edge signal when, the first level signal end that will be electrically connected respectively with the pull-up node enhancement unit
It is connected with the pull-up node, the first signal is provided to the pull-up node.
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| CN201810082366.6A CN108564980B (en) | 2018-01-29 | 2018-01-29 | Shift register unit and driving method thereof, gate drive circuit and display device |
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| CN201810082366.6A CN108564980B (en) | 2018-01-29 | 2018-01-29 | Shift register unit and driving method thereof, gate drive circuit and display device |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111210752A (en) * | 2020-01-20 | 2020-05-29 | 合肥京东方光电科技有限公司 | Shifting register unit, driving method, grid driving circuit and display device |
| CN111477193A (en) * | 2020-05-25 | 2020-07-31 | 京东方科技集团股份有限公司 | Shift register and driving method thereof |
| CN111599323A (en) * | 2020-02-19 | 2020-08-28 | 京东方科技集团股份有限公司 | Shift register, driving method and grid driving circuit |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20110234565A1 (en) * | 2008-12-12 | 2011-09-29 | Sharp Kabushiki Kaisha | Shift register circuit, display device, and method for driving shift register circuit |
| CN103077689A (en) * | 2013-01-15 | 2013-05-01 | 北京大学深圳研究生院 | Shift register cell, gate driving circuit, data driving circuit and display |
| JP2014191836A (en) * | 2013-03-26 | 2014-10-06 | Kyocera Corp | Shift register circuit and image display device |
| CN104867472A (en) * | 2015-06-15 | 2015-08-26 | 合肥京东方光电科技有限公司 | Shift register unit, gate drive circuit and display device |
| CN105096902A (en) * | 2015-09-28 | 2015-11-25 | 京东方科技集团股份有限公司 | Shift register, driving method thereof, gate drive circuit and display device |
| KR20170076951A (en) * | 2015-12-24 | 2017-07-05 | 엘지디스플레이 주식회사 | Scan Driver, Display Device and Driving Method of Display Device |
| CN107633831A (en) * | 2017-10-18 | 2018-01-26 | 京东方科技集团股份有限公司 | Shift register and its driving method, gate driving circuit and display device |
-
2018
- 2018-01-29 CN CN201810082366.6A patent/CN108564980B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20110234565A1 (en) * | 2008-12-12 | 2011-09-29 | Sharp Kabushiki Kaisha | Shift register circuit, display device, and method for driving shift register circuit |
| CN103077689A (en) * | 2013-01-15 | 2013-05-01 | 北京大学深圳研究生院 | Shift register cell, gate driving circuit, data driving circuit and display |
| JP2014191836A (en) * | 2013-03-26 | 2014-10-06 | Kyocera Corp | Shift register circuit and image display device |
| CN104867472A (en) * | 2015-06-15 | 2015-08-26 | 合肥京东方光电科技有限公司 | Shift register unit, gate drive circuit and display device |
| CN105096902A (en) * | 2015-09-28 | 2015-11-25 | 京东方科技集团股份有限公司 | Shift register, driving method thereof, gate drive circuit and display device |
| KR20170076951A (en) * | 2015-12-24 | 2017-07-05 | 엘지디스플레이 주식회사 | Scan Driver, Display Device and Driving Method of Display Device |
| CN107633831A (en) * | 2017-10-18 | 2018-01-26 | 京东方科技集团股份有限公司 | Shift register and its driving method, gate driving circuit and display device |
Non-Patent Citations (1)
| Title |
|---|
| 周洁: "《栅极驱动电路移位寄存器单元专利申请分析》", 《中国科技投资》 * |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111210752A (en) * | 2020-01-20 | 2020-05-29 | 合肥京东方光电科技有限公司 | Shifting register unit, driving method, grid driving circuit and display device |
| CN111599323A (en) * | 2020-02-19 | 2020-08-28 | 京东方科技集团股份有限公司 | Shift register, driving method and grid driving circuit |
| CN111599323B (en) * | 2020-02-19 | 2022-07-05 | 京东方科技集团股份有限公司 | Shift register, driving method and grid driving circuit |
| CN111477193A (en) * | 2020-05-25 | 2020-07-31 | 京东方科技集团股份有限公司 | Shift register and driving method thereof |
| CN111477193B (en) * | 2020-05-25 | 2022-04-26 | 京东方科技集团股份有限公司 | Shift register and driving method thereof |
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| Publication number | Publication date |
|---|---|
| CN108564980B (en) | 2020-11-24 |
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