CN108511602B - MTJ cell and STT-MRAM - Google Patents
MTJ cell and STT-MRAM Download PDFInfo
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Abstract
The application provides an MTJ cell and an STT-MRAM. The MTJ unit comprises a reference layer, a double-barrier structure and a free layer, wherein the reference layer comprises a ferromagnetic material and a nonmagnetic metal material; the double-barrier structure is arranged on the surface of the reference layer and comprises a first insulating layer, a quantum well layer and a second insulating layer, and the forbidden bandwidth of the material of the first insulating layer is eta1The forbidden band width of the material of the quantum well layer is eta2The material of the second insulating layer has a forbidden band width of eta3，η2＜η1，η2＜η3When the voltage at two ends of the double-barrier structure reaches a preset value, electrons incident to the double-barrier structure resonate with a quantum well state energy level in the quantum well layer, and the incident electrons pass through the double-barrier structure through resonant tunneling; the free layer is arranged on the surface of the second insulating layer far away from the quantum well layer, and the material of the free layer comprises a ferromagnetic material and a nonmagnetic metal material. The MTJ is applied in a memory, so that the writing efficiency is high.
Description
Technical Field
The application relates to the technical field of computer storage, in particular to an MTJ unit and an STT-MRAM.
Background
Spin Transfer Torque Magnetic Random Access Memory (STT-MRAM) is a new type of nonvolatile Memory, and its core Memory cell is an MTJ cell. The MTJ is mainly composed of a reference layer, an insulating barrier layer, and a free layer. The reference layer, also called the pinned layer, has its magnetization direction kept unchanged and only the magnetization direction of the free layer is changed to be the same or opposite direction as the reference layer.
MTJ cells rely on quantum tunneling effects to pass electrons through an insulating barrier layer. The tunneling probability of the polarized electrons and the relative magnetization direction of the reference layer and the free layer are related. When the magnetization directions of the free layer and the reference layer are the same, the tunneling probability of polarized electrons is high, and at the moment, the MTJ cell shows a low resistance state (Rp); when the magnetization directions of the free layer and the reference layer are opposite, the tunneling probability of polarized electrons is low, and the MTJ cell shows a high resistance state (Rap). MRAM uses the Rp and Rap states of an MTJ cell to represent logic states "1" and "0", respectively, to enable storage of data. The tunneling magnetoresistance values are expressed as: TMR 100% × (R)ap-Rp)/Rp。
Unlike conventional MRAM, STT-MRAM performs writing operation on MRAM using spin transfer torque effect (STT) of current, and when spin-polarized current passes through a magnetic thin film, the polarized current exchanges interaction with local electrons of the magnetic thin film, thereby applying a torque to local magnetic moment of the magnetic thin film, such that the local magnetic moment tends to be the same as the polarization direction of the spin-polarized current, which is called spin transfer torque effect (STT effect). When the intensity of the polarization current exceeds a certain threshold value, the magnetic moment of the magnetic film per se can be overturned. The magnetization direction of the free layer of the MTJ cell can be made parallel or antiparallel to the magnetization direction of the reference layer using the spin transfer torque effect, thereby achieving a "write" operation.
The data writing efficiency of STT-MRAM is proportional to the intensity of the current flowing through the MTJ cell. The traditional MTJ unit adopts a single-layer insulating material as a barrier layer, and the resistance is generally higher. To obtain a large current density, a high bias voltage must be applied to the MTJ, which results in high power consumption, and is not favorable for further improvement of the write operation speed and the memory density.
Disclosure of Invention
The present disclosure provides an MTJ cell and STT-MRAM to solve the problem of low write efficiency of MTJ cells in the prior art.
To make it practicalTo achieve the above object, according to one aspect of the present application, there is provided an MTJ cell including: a reference layer, the material of the reference layer including a ferromagnetic material and a nonmagnetic metal material, the reference layer having perpendicular magnetic anisotropy; a double barrier structure disposed on the surface of the reference layer, wherein the double barrier structure comprises a first insulating layer, a quantum well layer and a second insulating layer sequentially disposed along a direction away from the reference layer, and the first insulating layer is made of a material having a forbidden band width of η1The material of the quantum well layer has a forbidden band width of eta2The material of the second insulating layer has a forbidden band width of η3，η2＜η1，η2＜η3When the voltage at two ends of the double-barrier structure reaches a preset value, electrons incident to the double-barrier structure resonate with a quantum well state energy level in the quantum well layer, and the incident electrons pass through the double-barrier structure through resonant tunneling; and a free layer disposed on a surface of the second insulating layer remote from the quantum well layer, wherein the free layer is made of a ferromagnetic material and a nonmagnetic metal material, and has perpendicular magnetic anisotropy.
Furthermore, the material of the quantum well layer is a semiconductor material, and the forbidden bandwidth of the semiconductor material is between 0.1 and 4 eV.
Further, the quantum well layer is selected from a Si layer, a Ge layer, a SiC layer, an AlAs layer, an AlSb layer, a GaN layer, a GaP layer, a GaAs layer, an InN layer, an InP layer, an InAs layer, an InSb layer, and TiO layer2And a composite layer formed by one or more layers of the layer and the SiSn layer.
Furthermore, the thickness of the quantum well layer is between 0.5 and 20 nm.
Further, the first insulating layer and the second insulating layer are each independently selected from a composite layer formed of one or more layers of a magnesium oxide layer, a silicon nitride layer, an aluminum oxide layer, a magnesium aluminum oxide layer, a titanium oxide layer, a tantalum oxide layer, a calcium oxide layer, and a ferrite layer.
Further, the thickness of the first insulating layer and/or the second insulating layer is 0.5 to 5 nm.
Further, the MTJ cell further includes: a first electrode layer disposed on a surface of the reference layer away from the double barrier structure; and a second electrode layer disposed on a surface of the free layer remote from the double barrier structure.
According to another aspect of the present application, there is provided an STT-MRAM comprising an MTJ cell, the MTJ cell being any of the MTJ cells described above.
By applying the technical scheme of the application, the double-barrier structure is adopted to replace the insulating barrier layer of the MTJ unit in the prior art, and comprises the first insulating layer, the quantum well layer and the second insulating layer. Wherein the quantum well layer is located between the first insulating layer and the second insulating layer. According to quantum mechanics, in a double barrier structure, the energy levels of electrons or holes in a quantum well layer between two barriers are separated, referred to as quantum well states. And applying bias voltage to the double-barrier structure, wherein when the bias voltage reaches a certain value, the incident electrons resonate with the quantum well state energy level to generate a resonant tunneling phenomenon, namely the transmission probability of the electrons incident into the double-barrier structure can reach 100% theoretically. Based on the principle, when the memory comprising the MTJ is subjected to writing operation, bias voltage with a specific size is applied to the MTJ to generate a resonant tunneling phenomenon, high current density is obtained, the free layer is enabled to be rapidly turned over, and the writing efficiency of the memory is improved.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this application, illustrate embodiments of the application and, together with the description, serve to explain the application and are not intended to limit the application. In the drawings:
FIG. 1 illustrates a schematic structural diagram of an MTJ cell provided in accordance with an embodiment of the application;
FIG. 2 illustrates a schematic structural diagram of an MTJ cell provided by another embodiment of the present application;
FIG. 3 shows a partial circuit diagram of STT-MRAM writing states in embodiment 1 of the present application;
fig. 4 is a schematic diagram showing voltage-current characteristics of an MTJ device in embodiment 1 of the present application; and
FIG. 5 shows a partial circuit diagram of the STT-MRAM of embodiment 1 in reading out the state.
Wherein the figures include the following reference numerals:
1. a first electrode layer; 2. a reference layer; 3. a double barrier structure; 4. a free layer; 5. a second electrode layer; 31. a first insulating layer; 32. a quantum well layer; 33. a second insulating layer; 01. an MTJ cell; 02. a switch; 021. a word line; 022. a bit line; 023. a source line.
Detailed Description
It should be noted that the following detailed description is exemplary and is intended to provide further explanation of the disclosure. Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs.
It is noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of example embodiments according to the present application. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, and it should be understood that when the terms "comprises" and/or "comprising" are used in this specification, they specify the presence of stated features, steps, operations, devices, components, and/or combinations thereof, unless the context clearly indicates otherwise.
As described in the background, the MTJ in the prior art memory requires a large write voltage and a slow write speed, and in order to solve the above technical problems, the present application proposes an MTJ cell and STT-MRAM.
In an exemplary embodiment of the present application, an MTJ cell is provided, as shown in fig. 1, and includes a reference layer 2, a double barrier structure 3 and a free layer 4, wherein a material of the reference layer 2 includes a ferromagnetic material and a nonmagnetic metal material, the reference layer 2 has perpendicular magnetic anisotropy, i.e., a magnetization direction is perpendicular to a thin film interface (parallel to a thickness direction of the reference layer), and the double barrier structure 3 is disposed on the reference layer 2On the surface, the double barrier structure 3 includes a first insulating layer 31, a quantum well layer 32 and a second insulating layer 33 sequentially arranged along the direction far away from the reference layer 2, the first insulating layer 31 is made of a material having a forbidden band width of η1The material of the quantum well layer 32 has a forbidden band width of η2The second insulating layer 33 is made of a material having a forbidden band width of η3，η2＜η1，η2＜η3. The free layer 4 is provided on the surface of the second insulating layer 33 away from the quantum well layer 32. The material of the free layer 4 includes a ferromagnetic material and a nonmagnetic metal material, and the free layer 4 has perpendicular magnetic anisotropy, i.e., a magnetization direction perpendicular to the thin film interface (parallel to the thickness direction of the free layer). According to quantum mechanics, in a double barrier structure, the energy levels of electrons or holes in a quantum well layer between two barriers are separated, referred to as quantum well states. And applying bias voltage to the double-barrier structure, wherein when the bias voltage reaches a certain value, the incident electrons resonate with the quantum well state energy level to generate a resonant tunneling phenomenon, namely the transmission probability of the electrons incident into the double-barrier structure can reach 100% theoretically.
In the STT-MRAM operation process using the MTJ unit of the present invention as a memory unit, when writing data "0", a bias voltage is applied to the MTJ to cause a current to flow from the reference layer to the free layer, and the bias voltage is required to be a voltage value required to cause the double barrier structure to be in a resonant tunneling state, at this time, electrons flow from the free layer to the reference layer through resonant tunneling, and due to the filtering of the reference layer for spin electrons, electrons reflected from the interface back to the free layer exert a spin transfer torque on the free layer, so that the magnetization direction of the free layer is opposite to the magnetization direction of the reference layer, thereby writing "0". When data 1 is written, another bias voltage is applied to the MTJ to enable a current to flow from the free layer to the reference layer, and the magnitude of the bias voltage is required to be a voltage value required to enable the double barrier structure to be in a resonant tunneling state, at this time, electrons flow from the reference layer to the free layer through resonant tunneling, the electrons passing through the reference layer obtain the same spin polarization direction as that of the reference layer, and when passing through the free layer, a spin transfer torque is applied to the free layer to enable the magnetization direction of the free layer to be the same as that of the reference layer, so that 1 is written. The MTJ unit of the invention has very low resistance value under the resonance tunneling voltage, thus very high current density can be obtained, thereby realizing the fast writing of data and improving the writing efficiency.
The reference layer and the free layer have perpendicular magnetic anisotropy, the magnetization direction of the reference layer is perpendicular to the film plane and fixed, the magnetization direction of the free layer is perpendicular to the film plane, and in the actual use process, the magnetization direction of the free layer is changed only through the STT effect, so that the magnetization direction of the free layer is parallel or antiparallel to the magnetization direction of the reference layer, writing of '0' and '1' is further realized, and information storage is realized.
In an embodiment of the present application, the material of the quantum well layer is a semiconductor material, and a forbidden bandwidth of the semiconductor material is between 0.1 eV and 4eV, so that a resonance voltage with an appropriate magnitude can be obtained.
In order to obtain a suitably sized resonance voltage, in one embodiment of the present application, the quantum well layer is selected from the group consisting of a Si layer, a Ge layer, a SiC layer, an AlAs layer, an AlSb layer, a GaN layer, a GaP layer, a GaAs layer, an InN layer, an InP layer, an InAs layer, an InSb layer, a TiO layer2And a composite layer formed by one or more layers of the layer and the SiSn layer.
However, the quantum well layer is not limited to the above-mentioned material layers, and those skilled in the art can select an appropriate material layer as the quantum well layer according to practical circumstances.
In another embodiment of the present application, the thickness of the quantum well layer is between 0.5 nm and 20nm, which is more favorable for maintaining high spin polarization of incident electrons, thereby improving writing efficiency.
In order to further ensure the occurrence of the resonant tunneling phenomenon in the double barrier structure, in yet another embodiment of the present application, the first insulating layer and the second insulating layer are each independently selected from a magnesium oxide (MgO) layerxLayer), silicon oxide layer (SiO)x) Layer, silicon nitride compound layer (SiN)xLayer), aluminum oxide layer (AlO)xLayer), magnesium aluminum oxide layer (MgAlO)xLayer), titanium oxide compoundLayer (TiO)xLayer), tantalum oxide layer (TaO)xLayer), calcium oxide layer (GaO)xLayer) and ferrite layer (FeO)xLayer) of the substrate.
The first insulating layer and the second insulating layer in the present application are not limited to the above-mentioned various material layers, and those skilled in the art can select suitable material layers as the first insulating layer and the second insulating layer according to practical situations. In addition, the first insulating layer and the second insulating layer may be the same material layer or different material layers, and those skilled in the art may set the two layers to be the same or different according to actual situations.
In order to obtain a suitable value of RA (resistance value of MTJ), in an embodiment of the present application, the thickness of the first insulating layer and/or the second insulating layer is between 0.5 nm and 5 nm.
In another embodiment of the present application, as shown in fig. 2, the MTJ unit further includes a first electrode layer 1 and a second electrode layer 5, wherein the first electrode layer 1 is disposed on a surface of the reference layer 2 away from the double barrier structure 3; the second electrode layer 5 is provided on a surface of the free layer 4 remote from the double barrier structure 3.
The first electrode layer and the second electrode layer are used for being connected with a switch circuit, and the switch circuit is used for controlling the voltage loaded on two sides of the MTJ unit.
Specifically, as shown in fig. 3, the switching circuit includes a switch 02, a word line 021, a bit line 022, and a source line 023. The switch includes, but is not limited to, a Diode selector or a mosfet. Preferably, as shown in fig. 3 and 5, the switch 02 is a mosfet, and fig. 3 shows a source line 023 electrically connected to a source thereof. The word line 021 is electrically connected with the grid electrode of the MOS tube, and the drain electrode of the MOS tube is electrically connected with the MTJ module.
The first electrode and the second electrode are made of conductive materials, and those skilled in the art can select suitable conductive materials to form the first electrode and the second electrode according to actual situations, for example, can select a non-magnetic metal material or a magnetic metal material.
Any material in the prior art which can meet the performance requirements of the reference layer can be selected as the material of the reference layer by the skilled person according to the actual situation. For example, one or more of Co, Ni, Fe, CoFe, CoNi, NiFe, CoFeNi, CoB, FeB, CoFeB, NiFeB, Pt, Pd, PtPd, FePt, Ir, Re, Rh, Ru, B, Zr, V, Nb, Ta, Mo, W and Hf may be selected. The reference layer is generally a multilayer film structure, the type and thickness of each thin film are required to be adjusted to enable the magnetization direction of each thin film to be perpendicular to the interface of each thin film, and the coercivity of the reference layer is larger than that of the free layer.
Any material in the prior art which can meet the performance requirements of the free layer can be selected as the material of the free layer by the skilled person according to the actual situation. For example, one or more of Co, Fe, Ni, CoB, FeB, NiB, CoFe, NiFe, CoNi, CoFeNi, CoFeB, NiFeB, CoNiB, CoFeNiB, FePt, FePd, CoPt, CoPd, CoFePt, CoFePd, FePtPd, CoPtPd and CoFePtPd can be selected, the free layer has perpendicular magnetic anisotropy, and the magnetization direction is perpendicular to the film plane.
In another exemplary embodiment of the present application, there is provided a STT-MRAM, as shown in FIGS. 3 and 5, comprising an MTJ cell 01, the MTJ cell 01 being any of the MTJ cells described above.
The STT-MRAM comprises the MTJ unit, so that the writing speed of the memory is high, and the required writing voltage is small.
In order to make the technical solutions of the present application more clearly understood by those skilled in the art, the technical solutions of the present application will be described below with reference to specific embodiments.
Example 1
The STT-MRAM memory includes a plurality of memory cells, each of which includes an MTJ cell 01 and a switching circuit electrically connected to the MTJ cell 01, and the switching circuit includes a switch 02, a word line 021, a bit line 022, and a source line 023. The specific connection relationship is shown in fig. 3 and fig. 5.
The structure of the MTJ cell is shown in FIG. 2, where the first electrode layer 1 is a Ta layer with a thickness of 100 nm; the reference layer 2 is a multilayer film junctionFrom a distance away from the first insulating layer
The first insulating layer 31 is an MgO layer having a thickness of
Its forbidden band width eta17.6 eV; the quantum well layer 32 is a Si layer having a thickness of
Its forbidden band width eta21.1 eV; the second insulating layer 33 is an MgO layer having a thickness of
Its forbidden band width eta37.6 eV; the free layer 4 is a multilayer film structure, and sequentially comprises the following components from the direction close to the second insulating layer:
the second electrode layer 5 is a Ta layer with a thickness of 100nm and eta2＜η1，η2＜η3。
In the "write" operation, as shown in fig. 3, the switch 02 is turned on, and a voltage is applied to the MTJ cell by applying a voltage to the bit line 022 and the source line 023. As shown in FIG. 4, when writing data "0", a forward bias is applied to the MTJ structure such that current flows from the reference layer to the free layer and a voltage value V is set1At this time, electrons flow from the free layer to the reference layer by resonance tunneling, and the current peaks. When writing data '1', a reverse bias is applied to the MTJ structure to cause current to flow from the free layer to the reference layer and set the voltage to a value V1' (the V)1' and V1The current directions of the two electrodes are opposite, and the absolute values of the two electrodes can be equal or unequal, and for different devices, the absolute value relationship of the two electrodes is different), at this time, electrons tunnel in a resonant modeIn a manner that flows from the reference layer to the free layer, the current peaks. Under the voltage corresponding to the resonant tunneling, a large current can be obtained. In STT-MRAM, the speed of the "write" operation is proportional to the current density, so that a very high write speed and hence a very high write efficiency can be obtained at a voltage corresponding to resonant tunneling.
In the "read" operation, as shown in the circuit diagram of FIG. 5, the switch connected to the MTJ cell is turned on, and at this time, the source of the switch is grounded, and a voltage V of a certain magnitude is applied to the bit line 0222So that the MTJ is in a non-resonant tunneling state. Comparing the current flowing through the MTJ bit cell with the current flowing through the reference bit cell to determine the resistance state of the MTJ, and thereby reading the data stored in the MTJ cell, as shown in FIG. 4, the voltage V for the "read" operation2＜V1. In a read operation, the MTJ cell is in a non-resonant tunneling state, and electrons mainly rely on a spin-dependent tunneling process to pass through the double barrier structure, thereby exhibiting a higher resistance value, and thus achieving a higher TMR and signal-to-noise ratio.
Example 2
The difference from example 1 is that: the first insulating layer is an MgO layer having a thickness of
Its forbidden band width eta17.6 eV; the quantum well layer is a Ge layer having a thickness of
Its forbidden band width eta20.67 eV; the second insulating layer is an MgO layer having a thickness of
Its forbidden band width eta3＝7.6eV。
Example 3
The difference from example 1 is that: the quantum well layer is a GaN layer with a thickness of
Its forbidden band width eta23.3 eV; the second insulating layer is an MgO layer having a thickness of
Its forbidden band width eta3＝7.6eV。
Example 4
The difference from example 1 is that the material of the quantum well layer is GeO2Its forbidden band width eta2＝4.1eV。
Example 5
The difference from example 1 is that the thickness of the quantum well layer is 25 nm.
Example 6
The difference from embodiment 1 is that the thickness of the first insulating layer is 6 nm.
Example 7
The difference from embodiment 1 is that the thickness of the second insulating layer is 6 nm.
Example 8
The difference from embodiment 1 is that the first insulating layer is an AlN layer.
Example 9
The difference from embodiment 1 is that the second insulating layer is a ZnO layer.
Comparative example 1
The difference from embodiment 1 is that an insulating barrier layer of 1nm in thickness formed of an MgO material is provided between the free layer and the reference layer, instead of the double barrier structure.
Comparative example 2
The difference from example 1 is that the quantum well layer is SiO2Layer, and η2＝8eV，η2>η1，η2>η3。
The MTJ film was etched to a bit cell diameter of 100nm, the resonance voltage and the time required for successful writing at the tunneling resonance voltage of each example and comparative example were tested at room temperature using an electrical and magnetic test system, and the write time was tested at a bias voltage of 0.8V for the comparative example MTJ structure that did not produce resonant tunneling. The specific test results are shown in table 1.
TABLE 1
As can be seen from the data in the above table, the writing voltages are smaller and the writing speeds are faster in examples 1 to 11 compared to the two comparative examples; compared with the example 1, the forbidden band width of the quantum well layer of the example 4 is larger than 4eV, so that the writing voltage and the writing time are larger than those of the example 1; compared with example 1, the quantum well layer of example 5 has a thickness of more than 20nm, so that the writing voltage and the writing time are both greater than those of example 1; the first insulating layer of example 6 is larger in thickness than that of example 1, so that both the writing voltage and the writing time thereof are larger than those of example 1; the first insulating layer of example 7 is larger in thickness than that of example 1, so that both the writing voltage and the writing time thereof are larger than those of example 1; compared with embodiment 1, the material of the first insulating layer of embodiment 8 is aluminum nitride, so that the writing voltage and the writing current thereof are both larger than those of embodiment 1; compared with embodiment 1, the material of the second insulating layer in embodiment 9 is zinc oxide, so that the writing voltage and the writing current are both higher than those in embodiment 1.
From the above description, it can be seen that the above-described embodiments of the present application achieve the following technical effects:
1) the MTJ unit of the application adopts a double-barrier structure to replace an insulating barrier layer of the MTJ unit in the prior art, and the double-barrier structure of the application comprises a first insulating layer, a quantum well layer and a second insulating layer. Wherein the quantum well layer is located between the first insulating layer and the second insulating layer. According to quantum mechanics, in a double barrier structure, the energy levels of electrons or holes in a quantum well layer between two barriers are separated, referred to as quantum well states. And applying bias voltage to the double-barrier structure, wherein when the bias voltage reaches a certain value, the incident electrons resonate with the quantum well state energy level to generate a resonant tunneling phenomenon, namely the transmission probability of the electrons incident into the double-barrier structure can reach 100% theoretically. Based on the principle, when the memory comprising the MTJ is subjected to writing operation, bias voltage with a specific size is applied to the MTJ to generate a resonant tunneling phenomenon, high current density is obtained, the free layer is enabled to be rapidly turned over, and the writing efficiency of the memory is improved.
2) The STT-MRAM of the application has the MTJ unit, so that the writing speed of the memory is high, and the required writing voltage is small.
The above description is only a preferred embodiment of the present application and is not intended to limit the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims (6)
1. An MTJ cell, comprising:
a reference layer (2), the material of the reference layer (2) comprising a ferromagnetic material and a non-magnetic metallic material, the reference layer (2) having perpendicular magnetic anisotropy;
a double barrier structure (3) disposed on a surface of the reference layer (2), the double barrier structure (3) including a first insulating layer (31), a quantum well layer (32), and a second insulating layer (33) sequentially disposed in a direction away from the reference layer (2), a material of the first insulating layer (31) having a forbidden bandwidth of η [ ]1The material of the quantum well layer (32) has a forbidden band width of eta2The second insulating layer (33) is made of a material having a forbidden band width of eta3，η2＜η1，η2＜η3When the voltage across the double barrier structure (3) reaches a predetermined value, electrons incident on the double barrier structure (3) resonate with a quantum well state energy level in the quantum well layer (32), and the incident electrons pass through the double barrier structure (3) through resonant tunneling; and
a free layer (4) disposed on a surface of the second insulating layer (33) distal from the quantum well layer (32), a material of the free layer (4) including a ferromagnetic material and a nonmagnetic metallic material, the free layer (4) having perpendicular magnetic anisotropy,
the quantum well layer (32) is selected from the group consisting of a Si layer, a Ge layer, a SiC layer, an AlAs layer,AlSb layer, GaN layer, GaP layer, GaAs layer, InN layer, InP layer, InAs layer, InSb layer, TiO layer2A composite layer formed by one or more layers of the layer and the SiSn layer,
the first insulating layer (31) and the second insulating layer (33) are each independently selected from a composite layer formed of one or more layers of a magnesium oxide layer, a silicon nitride layer, an aluminum oxide layer, a magnesium aluminum oxide layer, a titanium oxide layer, a tantalum oxide layer, a calcium oxide layer, and a ferrite oxide layer.
2. The MTJ cell of claim 1, wherein the material of the quantum well layer (32) is a semiconductor material, and wherein the semiconductor material has a forbidden bandwidth of between 0.1 and 4 eV.
3. The MTJ cell of claim 1, wherein the quantum well layer (32) has a thickness of between 0.5 and 20 nm.
4. The MTJ cell of claim 1, wherein the first insulating layer (31) and/or the second insulating layer (33) has a thickness between 0.5 and 5 nm.
5. The MTJ cell of claim 1, further comprising:
a first electrode layer (1) arranged on a surface of the reference layer (2) remote from the double barrier structure (3); and
a second electrode layer (5) arranged on a surface of the free layer (4) remote from the double barrier structure (3).
6. An STT-MRAM comprising an MTJ cell (01), characterized in that the MTJ cell (01) is the MTJ cell (01) of any of claims 1 to 5.
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