WO2016148392A1

WO2016148392A1 - Memory device

Info

Publication number: WO2016148392A1
Application number: PCT/KR2016/001130
Authority: WO
Inventors: 박재근; 이승은
Original assignee: 한양대학교 산학협력단
Priority date: 2015-03-18
Filing date: 2016-02-02
Publication date: 2016-09-22

Abstract

Disclosed is a memory device having a magnetic tunnel junction comprising a free layer, a tunnel barrier and a pinned layer, wherein the free layer comprises at least two layers having magnetism of mutually different directions.

Description

Memory elements

The present invention relates to a memory device, and more particularly to a magnetic memory device using a magnetic tunnel junction (MTJ).

Research into next-generation nonvolatile memory devices, which consume less power and have higher integration than flash memory devices, is being conducted. Such next-generation nonvolatile memory devices include phase change RAM (PRAM) using a state change of a phase change material such as a chalcogenide alloy, and a magnetic tunnel junction according to the magnetization state of a ferromagnetic material. Magnetic RAM (MRAM) using resistance change of MTJ, Ferroelectric memory using polarization of ferroelectric material, Resistance change RAM (ReRAM) using resistance change of variable resistance material, etc. There is this.

Spin-Transfer Torque Magnetic Random Access Memory (STT-MRAM) device that inverts magnetization by using spin-transfer torque (STT) phenomenon due to electron injection and determines resistance difference before and after magnetization reversal as magnetic memory. There is. STT-MRAM devices each include a pinned layer and a free layer formed of ferromagnetic material, and a magnetic tunnel junction having a tunnel barrier formed therebetween. The magnetic tunnel junction has a low resistance state because the magnetization directions of the free layer and the pinned layer are the same (i.e., parallel), so that the current flows easily, and when the magnetization directions are different (i.e., anti-parallel), the current decreases. Indicates the resistance state. In addition, in the magnetic tunnel junction, the magnetization direction should change only in the direction perpendicular to the substrate, so the free layer and the pinned layer should have the vertical magnetization value. Perpendicular magnetic anisotropy (PMA) is excellent when the vertical magnetization value is symmetric with respect to zero and the shape of squareness (S) becomes clear according to the strength and direction of the magnetic field (S = 1). Can be. Such STT-MRAM devices can theoretically cycle beyond 10 ¹⁵ and can switch at as fast as nanoseconds. In particular, the vertical magnetization type STT-MRAM device has no scaling limit in theory, and research is being actively conducted as a next-generation memory device that can replace the DRAM device due to the advantage that the current density of the driving current can be lowered as the scaling progresses. Is going on. Meanwhile, an example of the STT-MRAM device is shown in Korean Patent Registration No. 10-1040163.

In the STT-MRAM device, a seed layer is formed below the free layer, a capping layer is formed on the fixed layer, and a synthetic exchange diamagnetic layer and an upper electrode are formed on the capping layer. In the STT-MRAM device, a silicon oxide film is formed on a silicon substrate, and a seed layer and a magnetic tunnel junction are formed thereon. In addition, a selection element such as a transistor may be formed on the silicon substrate, and the silicon oxide film may be formed to cover the selection element. Therefore, the STT-MRAM device has a stacked structure of a silicon oxide film, a seed layer, a free layer, a tunnel barrier, a pinned layer, a capping layer, a synthetic exchange diamagnetic layer, and an upper electrode on a silicon substrate on which the selection element is formed. Here, the seed layer and the capping layer are formed using tantalum (Ta), and the synthetic exchange diamagnetic layer has a structure in which a lower magnetic layer and an upper magnetic layer in which magnetic metals and nonmagnetic metals are alternately stacked, and a nonmagnetic layer are formed therebetween. Have

However, currently reported magnetic tunnel junctions are based on SiO ₂ or MgO substrates, and do not have a bottom electrode, or a structure using a Ta / Ru bottom electrode. However, in order to implement an STT-MRAM device, a capacitor must be replaced by a magnetic tunnel junction in a 1T1C structure of a conventional DRAM. In this case, a lower electrode must be formed using materials for reducing transistor resistance and preventing metal diffusion. However, magnetic tunnel junctions fabricated using conventional SiO ₂ or MgO substrates are not directly applicable to memory fabrication in consideration of their incorporation into actual cell transistors.

In addition, in order to implement the STT-MRAM device, the switching energy must be low enough to cope with the DRAM, but there is a disadvantage in that the memory manufacturing is difficult due to the high energy for rotating the spin of the free layer.

(Prior art document)

Korea Patent Registration No. 10-1040163

The present invention provides a memory device capable of lowering the switching energy of the free layer.

The present invention provides a memory device capable of rapidly changing the magnetization direction of a magnetic tunnel junction, thereby increasing the operation speed.

The present invention provides a memory device capable of improving the crystallinity of a magnetic tunnel junction and thereby rapidly changing the magnetization direction.

A memory device according to an aspect of the present invention includes a magnetic tunnel junction including a free layer, a tunnel barrier, and a pinned layer, wherein the free layer is formed of at least two layers having magnetizations in different directions.

The free layer has a vertical magnetization adjacent to the pinned layer.

The free layer includes a first magnetization layer having a horizontal magnetization, a separation layer having no magnetization, and a second magnetization layer having a vertical magnetization.

The first and second free layers are formed with different thicknesses using the same material.

The first and second free layers are formed of a material including CoFeB, and the first free layer is formed thicker than the second free layer.

The first free layer is formed to a thickness of 1 nm to 4 nm, and the second free layer is formed to a thickness of 0.8 nm to 1.2 nm.

The separation layer is formed to a thickness of 0.4nm to 2nm using a material of the bcc structure.

The lower electrode further comprises a lower electrode, a buffer layer, and a seed layer formed below the free layer.

The lower electrode is made of a polycrystalline conductive material.

It further comprises a capping layer and a synthetic exchange diamagnetic layer laminated on the pinned layer.

The capping layer is formed of a material of a bcc structure.

The synthetic exchange diamagnetic layer is formed of a material containing Pt.

The embodiment of the present invention can be applied to an actual memory process using 1T1M (1 transistor and 1 MTJ), which is a basic structure of STT-MRAM, using a lower electrode using a polycrystalline conductive material. In addition, by forming a seed layer of polycrystal on the lower electrode, an amorphous magnetic tunnel junction formed thereon is formed along the crystal structure of the seed layer, and then has a more improved crystal structure by heat treatment. Therefore, the change in the magnetization direction of the magnetic tunnel junction can be made drastically, and the operation speed can be increased.

The spin direction of the second free layer of vertical magnetization passes through the horizontal direction by forming the free layer in a laminated structure of a first free layer having horizontal magnetization, a separation layer having no magnetization, and a second free layer having vertical magnetization. The magnetic resonance with the first free layer of the horizontal magnetization when changed in the opposite vertical direction can lower the switching energy of the free layer while maintaining the magnetization characteristics and the magnetoresistance ratio of the magnetic tunnel junction.

1 is a cross-sectional view of a memory device according to an exemplary embodiment of the present invention.

2 and 3 illustrate magnetic properties of a conventional memory device.

4 and 5 illustrate magnetic properties of a memory device according to the present invention;

6 and 7 illustrate switching current characteristics of a memory device according to the related art and the present invention.

8 is a diagram illustrating magnetoresistance ratios of memory devices according to the related art and the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but may be implemented in various forms, and only the embodiments are intended to complete the disclosure of the present invention and to those skilled in the art. It is provided for complete information.

1 is a cross-sectional view of a memory device according to an exemplary embodiment of the present invention, and a cross-sectional view of an STT-MRAM device.

Referring to FIG. 1, a memory device according to an embodiment of the present disclosure may include a lower electrode 110, a first buffer layer 120, a seed layer 130, a free layer 140, and a tunnel formed on a substrate 100. The barrier 150 includes a pinned layer 160, a capping layer 170, a second buffer layer 180, a synthetic exchange diamagnetic layer 190, and an upper electrode 200. Here, the free layer 140, the tunnel barrier 150, and the pinned layer 160 form a magnetic tunnel junction. In addition, the free layer 140 has a stacked structure of the first free layer 141, the separation layer 142, and the second free layer 143, and the first and second

free layers

141 and 143 are different from each other. Has magnetization in the direction.

The substrate 100 may use a semiconductor substrate. For example, the substrate 100 may use a silicon substrate, a gallium arsenide substrate, a silicon germanium substrate, a silicon oxide substrate, or the like. In this embodiment, a silicon substrate is used. In addition, a selection device including a transistor may be formed on the substrate 100. An insulating layer 105 may be formed on the substrate 100. That is, the insulating layer 105 may be formed to cover a predetermined structure such as a selection device, and a contact hole exposing at least a portion of the selection device may be formed in the insulating layer 105. The insulating layer 105 may be formed using an amorphous silicon oxide film (SiO ₂ ) or the like.

The lower electrode 110 is formed on the insulating layer 105. The lower electrode 110 may be formed using a conductive material such as metal or metal nitride. In addition, the lower electrode 110 of the present invention may be formed of at least one layer. Here, the lower electrode 110 may be formed on the insulating layer 105, or may be formed inside the insulating layer 105. The lower electrode 110 may be formed in or on the insulating layer 105 to be connected to the selection element formed on the substrate 100. The lower electrode 110 may be formed of a polycrystal material. That is, the lower electrode 110 may be formed of a conductive material having a bcc structure. For example, the lower electrode 110 may be formed of a metal nitride such as titanium nitride (TiN). Of course, the lower electrode 110 may be formed of at least two layers including titanium nitride. For example, the lower electrode 110 may be formed of a stacked structure of a metal nitride such as titanium nitride and a metal such as tungsten (W). That is, when the lower electrode 110 is formed in a double structure, tungsten may be formed on the insulating layer 105, and titanium nitride may be formed on tungsten.

The first buffer layer 120 is formed on the lower electrode 110. The first buffer layer 120 is provided to solve the lattice constant mismatch between the lower electrode 110 and the seed layer 130. For this purpose, the first buffer layer 120 is made of a material having excellent conformity with the lower electrode 110. Can be formed. For example, when the lower electrode 110 is formed of TiN, the first buffer layer 120 may be formed using tantalum (Ta) having excellent lattice matching with TiN. Here, Ta is amorphous, but since the lower electrode 110 is polycrystalline, the amorphous first buffer layer 120 may be grown along the crystal direction of the polycrystalline lower electrode 110, and then the crystallinity is improved by heat treatment. Can be. Meanwhile, the first buffer layer 120 may be formed to have a thickness of, for example, 2 nm to 10 nm, preferably 5 nm.

The seed layer 130 is formed on the first buffer layer 120. The seed layer 130 may be formed of a polycrystalline material, for example, a conductive material having a bcc structure. For example, the seed layer 130 may be formed of tungsten (W). As such, the seed layer 130 may be formed of a material having a bcc structure to improve crystallinity of the magnetic tunnel junction including the free layer 140, the tunnel barrier 150, and the pinned layer 160 formed thereon. That is, when the seed layer 130 is formed in the bcc structure, an amorphous magnetic tunnel junction formed on the top thereof is grown along the crystal direction of the seed layer 130, and then heat treated for vertical magnetic anisotropy. This crystallinity can be improved than before. In particular, when W is used as the seed layer 130, crystallization is performed after a high temperature heat treatment of 400 ° C. or higher, for example, 400 ° C. to 500 ° C. to diffuse the capping layer material and the synthetic exchange diamagnetic layer material into the tunnel barrier 150. In addition, the free layer 140 and the pinned layer 160 may be crystallized to maintain the perpendicular magnetic anisotropy of the magnetic tunnel junction. That is, in the conventional case in which an amorphous seed layer and an amorphous magnetic tunnel junction are formed on an amorphous insulating layer, the crystallinity of the magnetic tunnel junction does not improve even if heat treatment is performed. However, according to the present invention, when the crystallinity of the magnetic tunnel junction is improved, the magnetization is larger when the magnetic field is applied, and more current flows through the magnetic tunnel junction in parallel. Therefore, applying the magnetic tunnel junction to the memory device can improve the operation speed and reliability of the device. Meanwhile, the seed layer 130 may be formed to have a thickness of, for example, 1 nm to 3 nm.

The free layer 140 is formed on the seed layer 130 and is formed of a ferromagnetic material. The free layer 140 may be changed from one direction to another direction in which magnetization is not fixed in one direction. That is, the free layer 140 may have the same magnetization direction as that of the pinned layer 160 (ie, parallel), or may be opposite (ie, anti-parallel). The magnetic tunnel junction may be used as a memory device by mapping information of '0' or '1' to resistance values that vary depending on the magnetization arrangement of the free layer 140 and the pinned layer 160. For example, when the magnetization direction of the free layer 140 is parallel to the pinned layer 160, the resistance value of the magnetic tunnel junction becomes small, and this case may be defined as data '0'. In addition, when the magnetization direction of the free layer 140 is antiparallel to the pinned layer 160, the resistance value of the magnetic tunnel junction increases, and this case may be defined as data '1'. The free layer 140 according to the present invention is formed in a stacked structure of the first free layer 141, the separation layer 142, and the second free layer 143. Here, the first and second

free layers

141 and 143 may have magnetizations in different directions, and the separation layer 142 does not have magnetization. For example, the first free layer 141 may have a horizontal magnetization and the second free layer 143 may have a vertical magnetization. That is, the first free layer 141 may be magnetized horizontally, the separation layer 142 may not be magnetized, and the second free layer 143 may be magnetized vertically. In addition, the first free layer 141 has a thickness of 1 nm to 4 nm when using the following CoFeB to have a horizontal magnetization, 0.8 nm when using a CoFeB to have a vertical magnetization of the second free layer 143 It can be formed in thickness of -1.2 nm. Of course, the first and second

free layers

141 and 143 may be formed of different materials or have different processes in order to have magnetization in different directions. In addition, the separation layer 142 may form a material having a bcc structure with a thickness of 0.4 nm to 2 nm. The separation layer 142 may be formed of a material of a bcc structure to form the tunnel barrier 150 in a bcc structure, for example, may be formed of W. As such, the first free layer 141 having horizontal magnetization and the second free layer 143 having vertical magnetization are formed with the separation layer 142 interposed therebetween, so that the magnetism of the first and second

free layers

141 and 143 is formed. Resonance can lower the switching energy. That is, when the spin direction of the second free layer 143 of vertical magnetization is changed to the opposite vertical direction through the horizontal direction, the resonance energy of the free layer 140 is changed by the magnetic resonance with the first free layer 141 of the horizontal magnetization. Can be lowered. Meanwhile, the first and second

free layers

141 and 143 may use various materials in addition to CoFeB. For example, a full-heusler semimetal alloy, an amorphous rare earth element alloy, and a magnetic metal. (ferromagnetic metal) and nonmagnetic metal (nonmagnetic matal) can be formed by using a ferromagnetic material such as a multilayer thin film, an alloy having an L10 type crystal structure, or a cobalt-based alloy. The full-heussler semimetal-based alloys include CoFeAl, CoFeAlSi and the like, and amorphous rare earth element alloys include alloys such as TbFe, TbCo, TbFeCo, DyTbFeCo, and GdTbCo. In addition, as a multilayer thin film in which a nonmagnetic metal and a magnetic metal are alternately stacked, Co / Pt, Co / Pd, CoCr / Pt, Co / Ru, Co / Os, Co / Au, Ni / Cu, CoFeAl / Pd, CoFeAl / Pt, CoFeB / Pd, CoFeB / Pt, and the like. The alloy having a L10 type crystal structure includes Fe 50 Pt 50, Fe 50 Pd 50, Co 50 Pt 50, Fe 30 Ni 20 Pt 50, Co 30 Ni 20 Pt 50, and the like. Cobalt-based alloys include CoCr, CoPt, CoCrPt, CoCrTa, CoCrPtTa and CoCrNb in addition to CoFeB. Among these materials, the CoFeB single layer may have a horizontal magnetization and a vertical magnetization through a thickness change, and may be formed thicker than the multilayer structure of CoFeB and Co / Pt or Co / Pd, thereby increasing the magnetoresistance ratio. In addition, since CoFeB is easier to etch than a metal such as Pt or Pd, a CoFeB single layer is easier to manufacture than a multilayer structure containing Pt or Pd. In addition, CoFeB may have horizontal magnetization as well as vertical magnetization by adjusting the thickness. Accordingly, an embodiment of the present invention forms the first and second

free layers

141 and 143 using CoFeB monolayers, and CoFeB is formed into an amorphous and then texturized into bcc 100 by heat treatment.

The tunnel barrier 150 is formed on the free layer 140 to separate the free layer 140 and the pinned layer 160. Tunnel barrier 150 enables quantum mechanical tunneling between free layer 140 and pinned layer 160. The tunnel barrier 150 may include magnesium oxide (MgO), aluminum oxide (Al ₂ O ₃ ), silicon oxide (SiO ₂ ), tantalum oxide (Ta ₂ O ₅ ), silicon nitride (SiNx), aluminum nitride (AlNx), or the like. It can be formed as. In the embodiment of the present invention, polycrystalline magnesium oxide is used as the tunnel barrier 150. The magnesium oxide is then textured into bcc 100 by heat treatment.

The pinned layer 160 is formed on the tunnel barrier 150. The pinned layer 160 is fixed in one direction in a magnetic field within a predetermined range, and may be formed of a ferromagnetic material. For example, magnetization may be fixed in a direction from top to bottom. The pinned layer 160 has, for example, a full-heusler semimetal alloy, an amorphous rare earth element alloy, a multilayer thin film in which magnetic metals and nonmagnetic metals are alternately stacked, or an L10 type crystal structure. It may be formed of a ferromagnetic material such as an alloy. In this case, the pinned layer 160 may be formed of the same ferromagnetic material as the free layer 140, and specifically, may be formed of a single CoFeB layer. CoFeB is amorphous and then texturized into BCC 100 by heat treatment.

The capping layer 170 is formed on the pinned layer 160 to magnetically separate the pinned layer 160 and the synthetic exchange diamagnetic layer 180 from each other. As the capping layer 170 is formed, the magnetization of the synthetic exchange diamagnetic layer 190 and the pinned layer 160 is generated independently of each other. In addition, the capping layer 170 may be formed in consideration of the magnetoresistance ratio of the free layer 140 and the pinned layer 160 for the operation of the magnetic tunnel junction. The capping layer 170 may be formed of a material that allows the synthetic exchange diamagnetic layer 190 to grow crystals. That is, the capping layer 170 allows the first and second

magnetic layers

191 and 193 of the synthetic exchange diamagnetic layer 190 to grow in a desired crystal direction. For example, it may be formed of a metal that facilitates the growth of crystals in the (111) direction of the face centered cubic (FCC) or the (001) direction of the hexagonal close-packed structure (HCP). have. The capping layer 170 includes tantalum (Ta), ruthenium (Ru), titanium (Ti), palladium (Pd), platinum (Pt), magnesium (Mg), cobalt (Co), aluminum (Al), and tungsten (W). It may include a metal or an alloy thereof selected from the group consisting of. Preferably, the capping layer 170 may be formed of at least one of tantalum (Ta) and tungsten (W). That is, the capping layer 170 may be formed of tantalum (Ta) or tungsten (W), or may be formed in a stacked structure of Ta / W. Meanwhile, the capping layer 170 may be formed to a thickness of 0.3 nm to 0.6 nm, but may be formed to a thickness of 0.4 nm to 0.6 nm when using Ta, and 0.35 nm to 0.55 nm when using W. It can be formed as. Here, the magnetization direction of the pinned layer 160 is fixed only when the first magnetic layer 191 of the pinned layer 160 and the synthetic exchange diamagnetic layer 190 is ferrocoupled, but the capping layer 170 using W is When formed to a thickness of 0.55 nm or more, the magnetization direction of the pinned layer 170 is not fixed due to an increase in the thickness of the capping layer 170, and has the same magnetization direction as that of the free layer 150. This does not happen and does not work with memory.

The second buffer layer 180 is formed on the capping layer 170. The second buffer layer 180 is formed to solve the lattice constant mismatch between the capping layer 170 and the synthetic exchange diamagnetic layer 180. For example, the second buffer layer 180 may be formed of the same material as the synthetic exchange diamagnetic layer 180. For example, the second buffer layer 180 may be formed as a single layer in which Co and Pt are stacked.

Synthetic exchange diamagnetic layer 190 is formed on second buffer layer 180. The synthetic exchange diamagnetic layer 190 serves to fix the magnetization of the pinned layer 160. The synthetic exchange diamagnetic layer 190 includes a first magnetic layer 191, a nonmagnetic layer 192, and a second magnetic layer 193. In the synthetic exchange diamagnetic layer 190, the first magnetic layer 191 and the second magnetic layer 193 are antiferromagnetically coupled to each other through the nonmagnetic layer 192. In this case, the magnetization directions of the first magnetic layer 191 and the second magnetic layer 193 are antiparallel to each other. For example, the first magnetic layer 191 may be magnetic in the upper direction (ie, the upper electrode 200 direction), and the second magnetic layer 193 may be magnetized in the lower direction (ie, the magnetic tunnel junction direction). The first magnetic layer 191 and the second magnetic layer 193 may be formed in a structure in which magnetic metals and nonmagnetic metals are alternately stacked. As a magnetic metal, a single metal or an alloy thereof selected from the group consisting of iron (Fe), cobalt (Co), nickel (Ni), and the like may be used, and chromium (Cr), platinum (Pt), palladium as a nonmagnetic metal may be used. A single metal or alloy thereof selected from the group consisting of (Pd), iridium (Ir), rhodium (Rh), ruthenium (Ru), osmium (Os), rhenium (Re), gold (Au) and copper (Cu) Can be used. For example, the first magnetic layer 191 and the second magnetic layer 193 may be formed of [Co / Pd] n, [Co / Pt] n or [CoFe / Pt] n (where n is an integer of 1 or more). Can be. The nonmagnetic layer 192 is formed between the first magnetic layer 191 and the first magnetic layer 193, and is a nonmagnetic material for allowing the first magnetic layer 191 and the second magnetic layer 193 to perform diamagnetic coupling. Is formed. For example, the nonmagnetic layer 192 may be formed of one or an alloy thereof selected from the group consisting of ruthenium (Ru), rhodium (Rh), osmium (Os), rhenium (Re), and chromium (Cr).

The upper electrode 200 is formed on the synthetic exchange diamagnetic layer 190. The upper electrode 200 may be formed using a conductive material, and may be formed of metal, metal oxide, metal nitride, or the like. For example, the upper electrode 200 is a single selected from the group consisting of tantalum (Ta), ruthenium (Ru), titanium (Ti), palladium (Pd), platinum (Pt), magnesium (Mg) and aluminum (Al). It may be formed of a metal or an alloy thereof.

As described above, the memory device according to the embodiments of the present invention forms the lower electrode 110 using a polycrystalline conductive material, for example, TiN, to 1T1M (1 transistor and 1 MTJ), which is a basic structure of the STT-MRAM. It is possible to apply to the actual memory process. In addition, by forming the free layer 130 in a laminated structure of the first free layer 141 having horizontal magnetization, the separation layer 142 having no magnetization, and the second free layer 143 having vertical magnetization, When the spin direction of the second free layer 143 changes from the horizontal direction to the opposite vertical direction, the magnetic resonance characteristics of the magnetic tunnel junction and the magneto-resistance ratio of the magnetic tunnel junction are adjusted by magnetic resonance with the first free layer 141. While maintaining the switching energy of the free layer 140 can be lowered.

종래 예 및 발명 예의 비교Comparison of Conventional Examples and Inventive Examples

After the magnetic tunnel junction and the capping layer are formed on the substrate, the magnetic properties of the memory device subjected to heat treatment at 400 ° C. and the heat exchange at 350 ° C. after forming the synthetic exchange semi-magnetic layer and the upper electrode are illustrated in FIGS. 2 to 5. Shown in That is, FIGS. 2 and 3 are views illustrating magnetic characteristics of a conventional magnetic tunnel junction and a free layer in which a free layer of a single layer is formed, and FIGS. 4 and 5 illustrate first and second magnetizations having magnetizations in different directions. 2 shows the magnetic tunnel junction of the present invention in which a free layer is formed of a free layer and magnetic properties of the free layer. 3 is an enlarged view of portion A of FIG. 2, and FIG. 5 is an enlarged view of portion B of FIG. 4. As shown in FIGS. 4 and 5, the present invention can be seen that the free layer maintains coercive force and squareness as in the prior art shown in FIGS. 2 and 3. By the way, in the conventional case, as shown in FIG. 3, the free layer has only vertical magnetization, but in the case of the present invention, it can be seen that the free layer has not only vertical magnetization but also horizontal magnetization.

6 and 7 illustrate switching current characteristics of the present invention in which the free layer is formed of the first and second free layers having different magnetization directions from those of the conventional single layer free layer. That is, the switching current when the free layer is changed from the parallel to the fixed layer to the antiparallel state by applying a pulse of 10 ns is shown in FIG. 6. The switching current when the free layer is changed from the parallel to the fixed layer is antiparallel. 7 is shown. As shown in FIG. 6, the present invention has a switching current of about 60% lower than the conventional state in the antiparallel state, and when the state changes from the parallel state to the antiparallel state as shown in FIG. 7. It has a switching current about 40% lower than conventional.

8 is a diagram illustrating a magnetoresistance ratio (C) according to a conventional seed layer thickness and a magnetoresistance ratio (D) according to a thickness of a separation layer of the present invention. That is, the seed layer was formed on the TiN lower electrode, and the magnetic resistance ratio was measured by forming a magnetic tunnel junction in which a CoFeB free layer, an MgO tunnel barrier, and a CoFeB fixed layer were stacked. In this case, in the conventional case, a free layer was formed as a single layer, and in the present invention, a separation layer having a bcc structure was formed between two free layers having horizontal magnetization and vertical magnetization. In addition, in the conventional case, the magnetoresistance ratio was measured by changing the thickness of the seed layer, and the present invention measured the magnetoresistance ratio by changing the thickness of the separation layer. As shown in graph C, as the thickness of the seed layer increases, the magnetoresistance ratio decreases, and it can be seen that it has a maximum value of about 147%. In addition, as shown in graph D, as the thickness of the separation layer increases, the magnetoresistance ratio increases, and it can be seen that it has a maximum value of about 150%. Therefore, even when two free layers are formed, the magnetoresistance ratio can be maintained similarly to the case of forming a single free layer.

On the other hand, although the technical spirit of the present invention has been described in detail according to the above embodiment, it should be noted that the above embodiment is for the purpose of explanation and not for the limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.

Claims

A magnetic tunnel junction comprising a free layer, a tunnel barrier, and a fixed layer,

And at least two layers of the free layer having magnetizations in different directions.
The memory device of claim 1, wherein the free layer has vertical magnetization adjacent to the pinned layer.
The memory device of claim 1, wherein the free layer comprises a first magnetization layer having a horizontal magnetization, a separation layer having no magnetization, and a second magnetization layer having a vertical magnetization.
The memory device of claim 3, wherein the first and second free layers are formed to have different thicknesses using the same material.
The memory device of claim 4, wherein the first and second free layers are formed of a material including CoFeB, and the first free layer is thicker than the second free layer.
The memory device of claim 5, wherein the first free layer is formed to a thickness of 1 nm to 4 nm, and the second free layer is formed to a thickness of 0.8 nm to 1.2 nm.
The memory device of claim 6, wherein the separation layer has a thickness of 0.4 nm to 2 nm using a material of a bcc structure.
The memory device of claim 3, further comprising a lower electrode, a buffer layer, and a seed layer stacked below the free layer.
The memory device of claim 8, wherein the lower electrode is made of a polycrystalline conductive material.
The memory device of claim 8, further comprising a capping layer and a synthetic exchange diamagnetic layer stacked on the pinned layer.
The memory device of claim 10, wherein the capping layer is formed of a material having a bcc structure.
The memory device of claim 11, wherein the synthetic exchange diamagnetic layer is formed of a material including Pt.