CN108511516A - A kind of power semiconductor with new model terminal structure - Google Patents

A kind of power semiconductor with new model terminal structure Download PDF

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Publication number
CN108511516A
CN108511516A CN201810560935.3A CN201810560935A CN108511516A CN 108511516 A CN108511516 A CN 108511516A CN 201810560935 A CN201810560935 A CN 201810560935A CN 108511516 A CN108511516 A CN 108511516A
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field plate
type
area
new model
power semiconductor
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单建安
伍震威
周贤达
冯浩
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Zhongshan Han Wei Electronic Technology Co Ltd
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Zhongshan Han Wei Electronic Technology Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/402Field plates
    • H01L29/405Resistive arrangements, e.g. resistive or semi-insulating field plates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/0619Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

A kind of power semiconductor with new model terminal structure, the present invention relates to a kind of semiconductor devices, it is a kind of with high voltage ability to provide, high external charge tolerance, low-leakage current, high dynamic switchs response speed and semiconductor devices easy to manufacture, the present invention provides a kind of semiconductor devices of the new model terminal structure with bar shaped spiral shape high resistant field plate, by the way that bar shaped spiral high resistant field plate is combined with terminal pressure-resistance structure, the voltage endurance capability of device and external charge tolerance can effectively be promoted, and for traditional high resistant planar field plate structure, lower leakage current and higher dynamic responding speed may be implemented, the problem of there is no reduce pressure under device HF switch state, and the selection of field plate material and processing technology are more simple.

Description

A kind of power semiconductor with new model terminal structure
Technical field
The present invention relates to a kind of semiconductor devices, it particularly relates to which a kind of power with new model terminal structure is partly led Body device.
Background technology
Power semiconductor is the basic device in all kinds of power electronic systems.Common power semiconductor packet Include metal-oxide semiconductor fieldeffect transistor (MOSFET), insulated gate bipolar transistor (IGBT), diode (Diode) etc..One important parameter of power semiconductor is exactly its voltage endurance capability, is weighed with its breakdown voltage (BV) index Amount, basic pressure-resistance structure are generally the PN junction being formed between p-type doped semiconductor region and N-shaped doped semiconductor region. When PN junction is reverse biased (i.e. voltage of the voltage of p-type area less than n-type area), device is in reverse blocking mode, this In the case of, depletion region (space charge region) extends in p-type and n-type region.In general, one in these N-shapeds and p-type area Region has lower doping concentration than another region so that and depleted region mainly extends in the region being relatively lightly doped, because The voltage of PN junction both ends application is primarily subjected in this PN junction compared with lightly doped region.
PN junction bears avalanche breakdown mechanism of the limited ability in semiconductor power device of high voltage.With being applied to PN junction Blocking voltage increase, the electric field in space-charge region also enhances therewith.The electric field causes the carrier in space-charge region to add Speed simultaneously collides with atom, and ionization by collision occurs and generates new electron-hole pair, and the carrier that ionization by collision generates continues New carrier is generated by electric field acceleration, finally since avalanche breakdown occurs for avalanche multiplication effect, and when avalanche breakdown generation Voltage be referred to as breakdown voltage, avalanche breakdown occur when device body in highest electric field intensity value be referred to as critical electric field.
However, power semiconductor has the semiconductor regions of limited size, edge surface is arrived in a lateral direction It terminates.PN junction does not extend to the edge surface of semiconductor at general power semiconductor surface, but in a lateral direction with The edge of device keeps one section of distance.At the cut-off of PN junction edge, due to the diffusion of impurity, the shape meeting of PN junction and from It is horizontal to be transformed into arc-shaped.Under device reverse-bias state, due to the influence of circular arc curvature effect, PN junction is in its edge Electric field aggregation can occur, fringe field is caused to increase, reduce voltage endurance capability.Therefore, power semiconductor needs special knot Structure promotes the voltage endurance capability of its fringe region, and this pressure-resistance structure positioned at device edge is referred to as the terminal structure of device.
Traditional terminal structure includes field limiting ring (Guard Ring), field plate (Field Plate), gradual doping (VLD) Deng by taking field limiting ring structure as an example, cross-section structure is as shown in Figure 1.For concise description, with the end of a diode component in Fig. 1 End structure illustrates, which includes that diode is located at the anode electrode 202 on surface and the cathode electrode positioned at the back side Cathode201.Wherein cathode electrode 201 and n+Cathode doped region 105 is connected, in n+The top of cathode doped region 105 is n-Type Lightly doped n-Type drift region 101, in n-The top YoupXing doped anodes area 102 of type drift region 101.Insulating medium layer 110 It is covered in the surface of device, anode electrode 202 is through the contact hole and 102 phase of p-type doped anode area in insulating medium layer 110 Even.Region residing for p-type doped anode area 102 is referred to as active area, it is noted that practical devices ZhongpXing doped anodes area 102 can constantly extend to the left side in figure, and Fig. 1 only shows a part therein.At the cut-off in p-type doped anode area 102 with Region between device edge (right side in figure) is referred to as termination environment.In termination environment, there are one or multiple p-type floatings area 103, P-type floating area 103 extends in the termination environment of device surface, and active area is surrounded by the annular for forming closure, these p-type floatings Area 103 is referred to as field limiting ring.In the outermost peripheral edge of device surface, the general termination doped region 104 for also having N-shaped or p-type doping And its termination field plate 204 of top.When device is in reverse-bias state, p-type doped anode area 102 and n-Type drift region PN junction both sides between 101 can form space charge depletion region, due to n-The doping concentration of type drift region 101 is relatively low, depletion region N can be predominantly located at-In type drift region 101, and depletion region is with the raising of reverse bias voltage and to n+Cathode doped region 105 and The termination doped region 104 of device edge extends.Conversely, if depletion region extension is wider, then the reverse biased that can be resistant to is just It is higher.When depletion region expands to field limiting ring p-type floating 103rd area of area, the p-type field limiting ring JipXing floatings area 103 and n near it- Also new depletion region can be formed between type drift region 101, and is engaged with former depletion region, as a result, n-In type drift region 101 Depletion region can continue to extend in device surface.Therefore, the electric field of device surface is lowered, and voltage endurance capability is enhanced.
But traditional terminal structure is all easy by device fabrication or the pollutant effects of packaging environment.These are dirty Charge, referred to as surface charge can be introduced on the surface of device by contaminating object.The presence of surface charge can change device terminal area surface Field distribution, cause the concentration of local of electric field, hinder the extension of depletion region, reduce the voltage endurance capability of device.Due to pollutant It can not possibly be completely eliminated in the processing of device and encapsulation process, therefore, promote device terminal structure to the resistance to of surface charge Become most important by ability.Based on this purpose, there has been proposed high resistant planar field plate structures, as shown in Figure 2.This structure is at end The surface of petiolarea is covered by the planar material layer of a floor height resistivity, which is referred to as high resistant planar field plate.The height The both sides and anode electrode 202 and termination field plate 204 for hindering planar field plate 107 are respectively connected with.It is in reverse-bias state in device When, the current potential for terminating field plate 204 can be with the current potential approximately equal of cathode electrode 201.Therefore, the both sides of high resistant planar field plate 107 Also the reverse biased of device is born, and then is formed in high resistant planar field plate 107 and is divided from a side to the current potential of other side gradual change Cloth.The Potential distribution and then the n of influence below of this gradual change-The current potential on 101 surface of type drift region is conducive to inhibit n-Type floats It moves 101 surface field of area and concentration of local occurs, promote the uniform expansion of depletion region, promote voltage endurance capability.Further, since high resistant is flat The resistance value of face field plate 107 is less than insulating materials, and internal charge can drift about in the form of electric current.Therefore, when outer When carrying out charge arrival device surface, the anode electrode 202 of both sides can be flowed to along direction of an electric field in high resistant planar field plate 107 Or field plate 204 is terminated, and then avoid influence of the external charge to the termination environment of 107 lower section of high resistant planar field plate.But high resistant The resistance of planar field plate 107 needs enough height, otherwise can be generated between anode electrode 202 and termination field plate 204 very high Leakage current.However, in reality, the planar field plate material for meeting such high resistance requirement is not easy to manufacture, and there are the tired of selection Difficulty, and often there is the deviation of uniformity in material film processing, cause technique processing difficulties and device stability to reduce.More The serious is in high resistant planar field plate 107 and n below-A prodigious parasitic electricity is formd between type drift region 101 Hold.Under devices switch state, high resistant planar field plate 107 forms a prodigious resistance-capacitance (R-C) with above-mentioned parasitic capacitance Delay loop, the switching speed of the serious sluggish device of meeting, and so that the current potential of termination environment and depletion region response speed are seriously dragged Slowly, it causes device to be reduced in the voltage endurance capability of switching transient, even component failure can be caused under serious conditions.Therefore it provides one Kind is with high voltage ability, high external charge tolerance, low-leakage current, high dynamic switch response speed and system easy to process The semiconductor devices made is necessary.
Invention content
Mentioned above to solve the problems, such as, the present invention provides a kind of the following technical solution:
A kind of power semiconductor with new model terminal structure, the semiconductor devices include
Cathode electrode positioned at bottom,
N on the cathode electrode+Cathode doped region,
Set on the n+The n of cathode doped region-Type drift region,
Set on the n-Insulating medium layer above type drift region,
Set on the n-P-type doped anode area in active area above type drift region,
The anode electrode being connected above the p-type doped anode area and with the p-type doped anode area electricity 202;
Set on the n-The end of N-shaped or the p-type doping of the semiconductor substrate surface in termination environment above type drift region Only doped region, the termination doped region are connected with the termination field plate being positioned above;
The n-Being located above type drift region is additionally provided between p-type doped anode area and termination doped region to be used to help The terminal that termination environment exhausts the pressure-resistant performance to promote termination environment exhausts supplementary doping structure;
The high resistant field plate layer of one or more, the high resistant field are additionally provided in termination environment above the insulating medium layer Plate layer is in swirl shape spiral extension from the anode electrode of active area to the termination field plate of termination environment, and exhausts auxiliary with terminal and mix Miscellaneous structure is connected.
Preferably, the high resistant field plate layer cross section is strip.
Preferably, the high resistant field plate layer cross section is cross section strip of the same size.
Preferably, the material for preparing of the high resistant field plate layer is undoped or lightly doped polysilicon, silicon nitride (SixNy), and/or titanium nitride (TiN).
Preferably, it includes positioned at n that the terminal, which exhausts supplementary doping structure,-In termination environment above type drift region P-type floating area 103, the p-type floating area are connected with the electric floating field plate being positioned above, the electric floating field plate and phase Adjacent high resistant field plate layer is connected.
Preferably, the surface of the termination environment is covered with passivation dielectric layer.
Preferably, the passivation dielectric layer is prepared by polyimides, silicon nitride and/or non-crystalline silicon.
Preferably, the width of the electric floating field plate cross section is more than the width in p-type floating area.
Preferably, described electric at least one extending direction of floating field plate is connected with the high resistant field plate layer inclination closed on.
Preferably, there are four extending directions to be connected with the high resistant field plate layer inclination closed on for the electric floating field plate.
Preferably, it includes positioned at n that the terminal, which exhausts supplementary doping structure,-In termination environment above type drift region The p being connected with the p-type doped anode area-The terminal extension area of type, the p-The doping concentration of the terminal extension area of type is low Doping concentration in p-type doped anode area.
Preferably, the p-The terminal extension area of type is connected with electric floating field plate, the electric floating field plate and adjacent High resistant field plate layer be connected.
Preferably, it includes positioned at n that the terminal, which exhausts supplementary doping structure,-In termination environment above type drift region The p for being connected with the p-type doped anode area and extending to termination doped region-The lightly doped area of type, the p-Type it is light The doping concentration for spending doped region is continuously decreased from p-type doped anode area to doped region is terminated.
Preferably, the p-The lightly doped area of type is connected with electric floating field plate, the electric floating field plate and adjacent High resistant field plate layer be connected.
Preferably, the electric floating field plate is connected in the form of discrete with adjacent high resistant field plate layer.
Preferably, the semiconductor device structure in active area be MOSFET (MOS memory) or IGBT (insulated gate bipolar transistor) or JFET (junction field effect transistor) or HEMT (high electron mobility transistor), Or thyristor or BJT (bipolar junction transistor) or SBD (schottky junction diode).
The beneficial effects of the present invention are the present invention proposes a kind of new model terminal with bar shaped spiral shape high resistant field plate The semiconductor devices of structure can effectively promote device by the way that bar shaped spiral high resistant field plate to be combined with terminal pressure-resistance structure Voltage endurance capability and external charge tolerance, and for traditional high resistant planar field plate structure, may be implemented more The problem of low leakage current and higher dynamic responding speed, there is no reduce pressure under device HF switch state, and field Plate material selection and processing technology are more simple.
Description of the drawings
Fig. 1 is the cross-sectional side view of the power semiconductor of a prior art, and terminal structure has several limits Ring;
Fig. 2 is the cross-sectional side view of the power semiconductor of another prior art, and terminal structure is flat with high resistant Face field plate;
Fig. 3 is the cross-sectional side view of the first embodiment of the semiconductor devices of the present invention;
Fig. 4 is the upper surface vertical view of the first embodiment of the semiconductor devices of the present invention;
Fig. 5 is the cross-sectional side view of the second embodiment of the semiconductor devices of the present invention;
Fig. 6 is the cross-sectional side view of the 3rd embodiment of the semiconductor devices of the present invention;
Fig. 7 is the cross-sectional side view of the fourth embodiment of the semiconductor devices of the present invention;
Fig. 8 is the cross-sectional side view of the 5th embodiment of the semiconductor devices of the present invention;
Fig. 9 is the cross-sectional side view of the sixth embodiment of the semiconductor devices of the present invention;
Figure 10 is the upper surface vertical view of the 7th embodiment of the semiconductor devices of the present invention;
Figure 11 is the upper surface vertical view of the 8th embodiment of the semiconductor devices of the present invention;
Figure 12 is the upper surface vertical view of the 9th embodiment of the semiconductor devices of the present invention.
Specific implementation mode
In the following detailed description by refer to the attached drawing, attached drawing forms a part for description and is shown by way of diagram Specific embodiments of the present invention can be put into practice by having gone out, unless expressly stated otherwise, it should be appreciated that various implementations described herein Example feature can be bonded to each other.
Semiconductor devices has active semiconductor regions (active area) and the edge termination region around active semiconductor regions Domain (termination environment).The material for preparing semiconductor devices can be arbitrary semi-conducting material, such as single element semi-conducting material, such as Silicon (Si), germanium (Ge) either compound semiconductor materials such as IV-IV races or iii-v or II-VI group semiconductor material Material.
Wherein suitable IV-IV races semi-conducting material has SiC or SiGe etc..Suitable III-V group semi-conductor material There are GaP, GaAs, InP, InSb, InAs, GaSb, GaN, AlN, InN, AlXGaAs or InGaN etc..Suitable II-VI group Semi-conducting material has ZnO, ZnS, ZnSe, ZnTe, CdS, CdSe, CdTe, HgS, HgCdXTe, BeSe, BeTe or HgS etc.. Suitable III-VI races semi-conducting material has GaS, GaSe, GaTe, InS, InSe, InTe etc..
Semiconductor devices can be but not limited to diode, MOSFET (MOS memory), IGBT (absolutely Edge grid bipolar transistor), JFET (junction field effect transistor), HEMT (high electron mobility transistor), thyristor, BJT (bipolar junction transistor), SBD (schottky junction diode) etc..Active area structure can be the unit knot containing multiple device cells Structure, such as transistor unit in parallel.Device cell can be but not limited to bar element, rectangular element, rectangular cells or Hexagonal cells.Exclusively for the purposes of illustration, the active area structure of the semiconductor devices described in following embodiment is ability Diode structure well known to domain.However, the terminal plot structure described in following embodiment can be with any other above-mentioned device The active area structure of part is used in combination.
Embodiment 1
The cross-sectional side view and upper surface vertical view of the semiconductor devices first embodiment of the present invention are respectively such as Fig. 3, Fig. 4 It is shown.As shown in figure 3, the semiconductor devices invented have positioned at bottom cathode electrode 201, be located at cathode electrode 201 it On n+Cathode doped region 105 is located at n+N on cathodic region 105-Type drift region 101 is located at the n of active area-Type drift region The p-type doped anode area 102 of 101 top is located at n-Insulation on 102 surface of type drift region 101 and p-type doped anode area Dielectric layer 110, the anode electrode 202 being located on the insulating medium layer 110 of active region, the anode electrode 202 and p-type 102 electricity of doped anode area is connected, and is located at the n of termination environment part-The top of type drift region 101 there are one or multiple electric floatings P-type floating area 103, p-type floating area 103 surrounds active area, between p-type floating area 103 and p-type doped anode area 102, And there are spacing between multiple p-type floatings area 103, there is coupled electric floating field plate 203 on p-type floating area 103, The semiconductor substrate surface of terminal area edge has the termination doped region 104 of N-shaped or p-type doping and positioned at termination doped region 104 Top and coupled termination field plate 204, particular, it is important that having spiral in the top of the insulating medium layer 110 of termination environment The high resistant field plate layer 301 that shape extends, the high resistant field plate layer 301 can be made of undoped polycrystalline silicon material, also can be by nitrogen SiClx (SixNy), other highly resistant materials such as titanium nitride (TiN) are constituted, and the high resistant field plate layer 301 is in a company in device surface Continuous spiral bar shaped extends spirally (such as Fig. 4 to the termination field plate 204 of termination environment from the anode electrode 202 of active area in swirl shape It is shown), and be connected respectively with the electric floating field plate 203 on termination environment surface on the way extending.
Under the reverse-bias state of device, the current potential approximately equal of field plate 204 is terminated in back cathode cathode electrode 201 Current potential, and higher than anode electrode 202 current potential.Therefore, the voltage approximately equal at 301 both ends of spiral high resistant field plate layer in The reverse bias voltage of device.The reverse biased size of device is set as VKA, the resistance of spiral high resistant field plate layer 301 is RS, then Size of current in spiral high resistant field plate layer 301 is IS=VKA/RS.Set the resistivity of material of spiral high resistant field plate layer 301 as ρ, length LS, cross-sectional area AS, then its all-in resistance RS=ρ * LS/AS.It can be seen that by the way that high resistant field plate layer 301 is set It counts spiral, the total length L of high resistant field plate layer 301 can be greatly increasedS, appropriate bar shaped field plate is selected to cut on this basis (such as 1~10 μm of area2, this size technique processing in be easily achieved), coordinating common highly resistant material (such as polysilicon) Resistivity can realize very high resistance value RS, can then substantially reduce the leakage current I in spiral high resistant field plate layer 301S.This Outside, pass through the cross section size A of maintenance spiral high resistant field plate layer 301SConsistency, can realize its resistance value uniformly point Cloth, then realize field plate on current potential from anode electrode 202 to terminate 204 even variation of field plate.Further, spiral high resistant The current potential of field plate layer 301 can pass through 110 coupling influence of insulating medium layer n below-The current potential on 101 surface of type drift region, in this way One, n-Also from p-type doped anode area 102 to terminating, doped region 104 is uniform to be become the current potential on 101 surface of type drift region accordingly Change, so as to avoid the concentration of local of electric field, promotes the extension of depletion region, promote the voltage endurance capability of device.
Simultaneously as spiral high resistant field plate floor 301 is covered in the surface in device terminal area and stream has electric current, when external charge When touching the termination environment surface of device, the anode electrode 202 of termination environment both sides can be flowed to along spiral high resistant field plate layer 301 Or field plate 204 is terminated, the influence so as to avoid external charge to termination environment voltage endurance capability improves device and externally carrys out the resistance to of charge By ability.On the other hand, different from traditional high resistant planar field plate, during device HF switch, due to spiral high resistant field plate Layer 301 is connected with the p-type floating doped region 103 in semiconductor region by electric floating field plate 203, and the current potential in p-type floating area 103 It can rapidly be changed by high-speed expansion of the depletion region in semiconductor substrate, therefore spiral high resistant field plate layer may be implemented The high-speed response of 301 current potentials is reduced pressure etc. and to be asked so as to avoid the high-speed switch delay of traditional high resistant planar field plate and dynamic Topic.
Embodiment 2
The cross-sectional side view of the second embodiment of the semiconductor devices of the present invention is as shown in Figure 5.With first embodiment phase Seemingly, the termination environment of the semiconductor of second embodiment also has the bar shaped of the spiral extension positioned at 110 surface of insulating medium layer high Hinder high resistant field plate layer 301.Different from the first embodiment the semiconductor devices of second embodiment also has the characteristics that:Institute The width for stating electric floating field plate 203 is more than the width in p-type floating area 103 below.The increase of 203 width of electric floating field plate helps The electric field near PN junction where reducing p-type floating area 103 below, to promote voltage endurance capability.
Embodiment 3
The cross-sectional side view of the 3rd embodiment of the semiconductor devices of the present invention is as shown in Figure 6.With first embodiment phase Seemingly, the termination environment of the semiconductor of 3rd embodiment also has the bar shaped of the spiral extension positioned at 110 surface of insulating medium layer high Hinder field plate layer 301.Different from the first embodiment the semiconductor devices of 3rd embodiment also has the characteristics that:Original first PXing electricity floatings area 103 in embodiment is replaced by a p-The lightly doped area 106 of type, also known as p-The terminal extension area of type 106.The p-The doping concentration of the terminal extension area 106 of type is generally below the doping concentration in p-type doped anode area 102.In device Under the resistance to pressure condition of part, due to the p-The doping concentration of type terminal extension area 106 is low, thus depletion region can be not only in n-Type floats Area 101 is moved to extend, it can also be in p-Type terminal extension area 106 extends, or even by p-Type terminal extension area 106 close to completely depleted, Then the length for contributing to reduction termination environment, saves the area of device.Further, the p-Type terminal extension area 106 may be used also To be connected with p-type doped anode area 102, to further increase the voltage endurance capability of device.
Embodiment 4
The cross-sectional side view of the fourth embodiment of the semiconductor devices of the present invention is as shown in Figure 7.With first embodiment phase Seemingly, the termination environment of the semiconductor of fourth embodiment also has the bar shaped of the spiral extension positioned at 110 surface of insulating medium layer high Hinder field plate layer 301.Unlike fourth embodiment:PXing electricity floatings area 103 in former first embodiment is replaced by multiple p- The lightly doped area (107,108 ...) of type, left side are connected with p-type doped anode area 102, extend to the termination doping at edge Area 104 is simultaneously attached thereto, the multiple p-Lightly doped area (107,108 ...) the modified doping in a lateral direction of type Concentration, multiple p-Lightly doped area (107,108 ...) concentration of type is successively decreased successively.p-In the lightly doped area (107,108 ...) of type Doping concentration close to the region in p-type doped anode area 102 is higher than the doping concentration close to the region of device edge.This feature Contribute under the premise of maintaining device voltage endurance capability, further decrease the length of the termination environment of device, saves device area.
Embodiment 5
On the basis of embodiment 4, as shown in figure 8, p-type doped anode area 102 and p-Type lightly doped district (107,108 ...) Between can be sequentially connected, further to promote the voltage endurance capability of device.On this basis, due to p-Type lightly doped district (107, 108 ...) it is connected with p-type doped anode area 102, is located at the p-Electric floating on the lightly doped area (107,108 ...) of type Field plate 203 can be omitted, and be for the 5th embodiment of the semiconductor devices of the present invention.
Embodiment 6
The cross-sectional side view of the sixth embodiment of the semiconductor devices of the present invention is as shown in Figure 9.With first embodiment phase Seemingly, the termination environment of the semiconductor of sixth embodiment also has the bar shaped of the spiral extension positioned at 110 surface of insulating medium layer high Hinder field plate layer 301.Different from the first embodiment the semiconductor devices of sixth embodiment also has the characteristics that:In terminal The surface in area is covered with a floor passivation dielectric layer 302.The passivation dielectric layer 302 can be by polyimides (Polyimide), nitrogen The combination of SiClx, the materials such as non-crystalline silicon or these materials is constituted.Passivation dielectric layer 302 helps to further decrease external charge Influence to device promotes the stability of device termination environment pressure resistance.
Embodiment 7
The upper surface vertical view of 7th embodiment of the semiconductor devices of the present invention is as shown in Figure 10.With first embodiment phase Seemingly, the termination environment of the semiconductor of the 7th embodiment also has the bar shaped of the spiral extension positioned at 110 surface of insulating medium layer high Hinder field plate layer 301.Different from the first embodiment the semiconductor devices of the 7th embodiment also has the characteristics that:The spiral shell It revolves in 301 four extending direction shown in vertical view 10 of high resistant field plate layer (" upper and lower, left and right " in figure), there are three sides Remain parallel to neighbouring electric floating field plate 203, it is in certain to remain next extending direction with neighbouring electric floating field plate 203 Angle@.
Embodiment 8
The upper surface vertical view of 8th embodiment of the semiconductor devices of the present invention is as shown in figure 11.With first embodiment phase Seemingly, the termination environment of the semiconductor of the 8th embodiment also has the bar shaped of the spiral extension positioned at 110 surface of insulating medium layer high Hinder field plate layer 301.Different from the first embodiment the semiconductor devices of the 8th embodiment also has the characteristics that:The spiral shell Revolve high resistant field plate layer 301 four extending directions (" upper and lower, left and right " in figure) and neighbouring electricity shown in vertical view 10 Floating field plate 203 is a certain included angle.
Embodiment 9
The upper surface vertical view of 9th embodiment of the semiconductor devices of the present invention is as shown in figure 12.With first embodiment phase Seemingly, the termination environment of the semiconductor of the 9th embodiment also has the bar shaped of the spiral extension positioned at 110 surface of insulating medium layer high Hinder field plate layer 301.Different from the first embodiment the semiconductor devices of the 9th embodiment also has the characteristics that:As overlooked Shown in Figure 12, the electricity floating field plate 203 is discrete annular.Correspondingly, the p-type floating of 203 lower section of electric floating field plate Area 103 can also be discrete annular.
It should be pointed out that although the various exemplary embodiments of the present invention are above had been disclosed for, to ability It is readily apparent that executing the different structure component of identical function can be substituted as the technical staff in domain.In addition, ginseng Examining specific pattern and illustrating the feature released can be combined with the feature of other legends, even in the feelings that those are not specifically mentioned Under condition.

Claims (16)

1. a kind of power semiconductor with new model terminal structure, the semiconductor devices include
Cathode electrode (201) positioned at bottom,
N on the cathode electrode (201)+Cathode doped region (105),
Set on the n+The n of cathode doped region (105)-Type drift region (101),
Set on the n-Insulating medium layer (110) above type drift region (101),
Set on the n-P-type doped anode area (102) in active area above type drift region (101),
The sun being connected above the p-type doped anode area (102) and with described p-type doped anode area (102) electricity Pole electrode (202);
Set on the n-The end of N-shaped or the p-type doping of the semiconductor substrate surface in termination environment above type drift region (101) Only doped region (104), the termination doped region (104) are connected with the termination field plate (204) being positioned above;
It is characterized in that,
The n-Being located between p-type doped anode area (102) and termination doped region (104) above type drift region (101) also sets The terminal for being useful for that termination environment is helped to exhaust the pressure-resistant performance to promote termination environment exhausts supplementary doping structure;
The high resistant field plate layer (301) of one or more is additionally provided in termination environment above the insulating medium layer (110), it is described High resistant field plate layer (301) prolongs to the termination field plate (204) of termination environment in swirl shape helical form from the anode electrode (202) of active area It stretches, and exhausts supplementary doping structure with terminal and be connected.
2. a kind of power semiconductor with new model terminal structure as described in claim 1, which is characterized in that described High resistant field plate layer (301) cross section is strip.
3. a kind of power semiconductor with new model terminal structure as claimed in claim 2, which is characterized in that described High resistant field plate layer (301) cross section is cross section strip of the same size.
4. a kind of power semiconductor with new model terminal structure as described in claim 1, which is characterized in that described The material for preparing of high resistant field plate layer (301) is undoped or lightly doped polysilicon, silicon nitride, and/or titanium nitride.
5. a kind of power semiconductor with new model terminal structure as described in claim 1, which is characterized in that described It includes positioned at n that terminal, which exhausts supplementary doping structure,-P-type floating area (103) in termination environment above type drift region (101), The p-type floating area (103) is connected with the electric floating field plate (203) being positioned above, the electric floating field plate (203) and Adjacent high resistant field plate layer (301) is connected.
6. a kind of power semiconductor with new model terminal structure as claimed in claim 5, which is characterized in that described The surface of termination environment is covered with passivation dielectric layer (302).
7. a kind of power semiconductor with new model terminal structure as claimed in claim 6, which is characterized in that described Passivation dielectric layer (302) is prepared by polyimides, silicon nitride and/or non-crystalline silicon.
8. a kind of power semiconductor with new model terminal structure as claimed in claim 5, which is characterized in that the electricity The width of floating field plate (203) cross section is more than the width in p-type floating area (103).
9. a kind of power semiconductor with new model terminal structure as claimed in claim 5, which is characterized in that the electricity Floating field plate (203) at least one extending direction is connected with high resistant field plate layer (301) inclination closed on.
10. a kind of power semiconductor with new model terminal structure as claimed in claim 9, which is characterized in that described There are four extending directions to be connected with high resistant field plate layer (301) inclination closed on for electric floating field plate (203).
11. a kind of power semiconductor with new model terminal structure as described in claim 1, which is characterized in that described Terminal to exhaust supplementary doping structure include positioned at n-In termination environment above type drift region (101) the and described p-type sun The connected p of pole doped region (102)-The terminal extension area (106) of type, the p-The doping concentration of the terminal extension area (106) of type Less than the doping concentration in p-type doped anode area (102).
12. a kind of power semiconductor with new model terminal structure as claimed in claim 11, which is characterized in that described P-The terminal extension area (106) of type is connected with electric floating field plate (203), the electric floating field plate (203) and adjacent height Field plate layer (301) is hindered to be connected.
13. a kind of power semiconductor with new model terminal structure as described in claim 1, which is characterized in that described Terminal to exhaust supplementary doping structure include positioned at n-In termination environment above type drift region (101) the and described p-type sun The p that pole doped region (102) is connected and extends to termination doped region (104)-The lightly doped area (107/108 ...) of type, it is described p-The doping concentration in the lightly doped area (107/108 ...) of type from p-type doped anode area (102) to terminate doped region (104) by Gradually reduce.
14. a kind of power semiconductor with new model terminal structure as claimed in claim 13, which is characterized in that described P-The lightly doped area (107/108 ...) of type is connected with electric floating field plate (203), the electric floating field plate (203) and phase Adjacent high resistant field plate layer (301) is connected.
15. a kind of power with new model terminal structure as described in any claim in claim 5-10,12,14 is partly led Body device, which is characterized in that the electric floating field plate (203) is in the form of discrete and adjacent high resistant field plate layer (301) It is connected.
16. a kind of power semiconductor with new model terminal structure as described in claim 1, which is characterized in that active Semiconductor device structure in area is MOS memory, insulated gate bipolar transistor, junction field crystalline substance Body pipe, high electron mobility transistor, thyristor, bipolar junction transistor or schottky junction diode.
CN201810560935.3A 2018-06-04 2018-06-04 A kind of power semiconductor with new model terminal structure Pending CN108511516A (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113314599A (en) * 2021-06-22 2021-08-27 珠海市浩辰半导体有限公司 Composite terminal structure and preparation method thereof
DE102021117826A1 (en) 2021-07-09 2023-01-12 Infineon Technologies Ag Power semiconductor device Method of manufacturing a power semiconductor device
CN115602722A (en) * 2022-11-24 2023-01-13 深圳市威兆半导体股份有限公司(Cn) Insulated gate bipolar transistor

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07326775A (en) * 1994-05-31 1995-12-12 Sanken Electric Co Ltd Semiconductor device
US20030209774A1 (en) * 1999-02-01 2003-11-13 Shinichi Jimbo Voltage with standing structure for a semiconductor device
US20030218220A1 (en) * 2002-05-27 2003-11-27 Mitsubishi Denki Kabushiki Kaisha Power semiconductor device and method of manufacturing the same
CN1574400A (en) * 2003-06-11 2005-02-02 株式会社东芝 High withstand voltage semiconductor device
US20130032895A1 (en) * 2011-08-01 2013-02-07 Disney Donald R High-voltage transistor device and associated method for manufacturing
CN103219339A (en) * 2012-01-18 2013-07-24 富士电机株式会社 Semiconductor device
CN103700697A (en) * 2013-12-20 2014-04-02 西安芯派电子科技有限公司 Longitudinal super junction metal oxide field effect transistor
CN104170090A (en) * 2012-03-22 2014-11-26 丰田自动车株式会社 Semiconductor device
CN204632762U (en) * 2015-02-06 2015-09-09 中国科学院微电子研究所 Terminal layout structure for junction terminal extension and terminal structure thereof

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07326775A (en) * 1994-05-31 1995-12-12 Sanken Electric Co Ltd Semiconductor device
US20030209774A1 (en) * 1999-02-01 2003-11-13 Shinichi Jimbo Voltage with standing structure for a semiconductor device
US20030218220A1 (en) * 2002-05-27 2003-11-27 Mitsubishi Denki Kabushiki Kaisha Power semiconductor device and method of manufacturing the same
CN1574400A (en) * 2003-06-11 2005-02-02 株式会社东芝 High withstand voltage semiconductor device
US20130032895A1 (en) * 2011-08-01 2013-02-07 Disney Donald R High-voltage transistor device and associated method for manufacturing
CN103219339A (en) * 2012-01-18 2013-07-24 富士电机株式会社 Semiconductor device
CN104170090A (en) * 2012-03-22 2014-11-26 丰田自动车株式会社 Semiconductor device
CN103700697A (en) * 2013-12-20 2014-04-02 西安芯派电子科技有限公司 Longitudinal super junction metal oxide field effect transistor
CN204632762U (en) * 2015-02-06 2015-09-09 中国科学院微电子研究所 Terminal layout structure for junction terminal extension and terminal structure thereof

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113314599A (en) * 2021-06-22 2021-08-27 珠海市浩辰半导体有限公司 Composite terminal structure and preparation method thereof
DE102021117826A1 (en) 2021-07-09 2023-01-12 Infineon Technologies Ag Power semiconductor device Method of manufacturing a power semiconductor device
CN115602722A (en) * 2022-11-24 2023-01-13 深圳市威兆半导体股份有限公司(Cn) Insulated gate bipolar transistor
CN115602722B (en) * 2022-11-24 2023-03-31 深圳市威兆半导体股份有限公司 Terminal voltage withstanding adjustment method of insulated gate bipolar transistor

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Application publication date: 20180907